RISC-V: fix R_RISCV_ADD32/R_RISCV_SUB32 relocations
PATCH 1/1 RISC-V: fix R_RISCV_ADD32/R_RISCV_SUB32 relocations
The R_RISCV_ADD32/R_RISCV_SUB32 relocations should add/subtract the address of the symbol (without overflow check), not its contents.
--- arch/riscv/kernel/module.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
arch/riscv/kernel/module.c +2 -2
@@ -265,14 +265,14 @@ static int apply_r_riscv_align_rela(struct module *me, u32 *location,static int apply_r_riscv_add32_rela (struct module *me,u32 *location,Elf_Addr v) { - *(u32 *)location += (*(u32 *)v); + *(u32 *)location += (u32 )v;return 0 ; }static int apply_r_riscv_sub32_rela (struct module *me,u32 *location,Elf_Addr v) { - *(u32 *)location -= (*(u32 *)v); + *(u32 *)location -= (u32 )v;return 0 ; }
Signature · 7 lines
2.17.1 -- Andreas Schwab, SUSE Labs, schwab at suse.de GPG Key fingerprint = 0196 BAD8 1CE9 1970 F4BE 1748 E4D4 88E3 0EEA B9D7 "And now for something completely different."
PATCH 1/1 RISC-V: fix R_RISCV_ADD32/R_RISCV_SUB32 relocations
Quoted 18 lines · schwab at suse.de
The R_RISCV_ADD32/R_RISCV_SUB32 relocations should add/subtract the address of the symbol (without overflow check), not its contents.
Signed-off-by Andreas Schwab <[email protected]>--- arch/riscv/kernel/module.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)arch/riscv/kernel/module.c +1
-1@@ -265,14 +265,14 @@ static int apply_r_riscv_align_rela(struct module *me, u32 *location,static int apply_r_riscv_add32_rela (struct module *me,u32 *location,Elf_Addr v) { - *(u32 *)location += (*(u32 *)v); + *(u32 *)location += (u32 )v;
arch/riscv/kernel/module.c static int apply_r_riscv_align_rela(struct module *me, u32 *location, · line 277
Quoted 10 lines
arch/riscv/kernel/module.c +1
-1return 0 ; }static int apply_r_riscv_sub32_rela (struct module *me,u32 *location,Elf_Addr v) { - *(u32 *)location -= (*(u32 *)v); + *(u32 *)location -= (u32 )v;return 0 ; }
Oops, sorry I missed those. The entire relocation set might be worth a once-over, as there's a lot of bit twiddling in here and I wouldn't be surprised if I missed something else as well.
The RISC-V merge window has closed (I tag on Monday, let it bake until Wednesday, and then submit the PR), so I'll target this for my post-RC1 pull request.
Thanks!