KVM for PowerPC 440

1 file changed, 2 insertions(+)

include/asm-powerpc/mmu-44x.h | 2 ++

PowerPC 440 KVM needs to know how many TLB entries are used for the host kernel linear mapping (it does not modify these mappings when switching between guest and host execution).

Signed-off-by Hollis Blanchard <[email protected]>

include/asm-powerpc/mmu-44x.h +2 -0

@@ -53,6 +53,8 @@
 
 #ifndef __ASSEMBLY__
 
+extern unsigned int tlb_44x_hwater;
+
 typedef unsigned long long phys_addr_t;
 
 typedef struct {

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1 file changed, 7 insertions(+)

include/linux/kvm.h | 7 +++++++

Device Control Registers are essentially another address space found on PowerPC 4xx processors, analogous to PIO on x86. DCRs are always 32 bits, and are identified by a 32-bit number.

Quoted 7 lines · Hollis Blanchard

1 file changed, 7 insertions(+)

include/linux/kvm.h | 7 +++++++

Device Control Registers are essentially another address space found on PowerPC 4xx processors, analogous to PIO on x86. DCRs are always 32 bits, and are identified by a 32-bit number.

Well... 10-bit, actually.

Quoted 10 lines · On Monday 07 April 2008 20:11:28 David Gibson wrote:

Quoted 7 lines · Hollis Blanchard

1 file changed, 7 insertions(+)

include/linux/kvm.h | 7 +++++++

Device Control Registers are essentially another address space found on PowerPC 4xx processors, analogous to PIO on x86. DCRs are always 32 bits, and are identified by a 32-bit number.

Well... 10-bit, actually.

The mtdcrux description in the ppc440x6 user manual says the following:

Let the contents of register RA denote a Device Control Register. The contents of GPR[RS] are placed into the designated Device Control
Register.

I take that to mean that we must worry about 32 bits worth of DCR numbers. Perhaps I should say "no more than" rather than "always".

Quoted 18 lines · Hollis Blanchard

Quoted 10 lines · On Monday 07 April 2008 20:11:28 David Gibson wrote:

Quoted 7 lines · Hollis Blanchard

1 file changed, 7 insertions(+)

include/linux/kvm.h | 7 +++++++

Device Control Registers are essentially another address space found on PowerPC 4xx processors, analogous to PIO on x86. DCRs are always 32 bits, and are identified by a 32-bit number.

Well... 10-bit, actually.

The mtdcrux description in the ppc440x6 user manual says the following:

Let the contents of register RA denote a Device Control Register. The contents of GPR[RS] are placed into the designated Device Control
Register.

Quoted 2 lines

I take that to mean that we must worry about 32 bits worth of DCR numbers. Perhaps I should say "no more than" rather than "always".

I think that's less misleading. mtdcrux is very new, anything which only has the mtdcr instruction certainly can't take DCR numbers above 10 bits, and I would expect that even on chips with mtdcrux the DCR bus is probably still only 10-bits, although it could be extended.

Quoted 19 lines · On Monday 07 April 2008 22:54:41 David Gibson wrote:

Quoted 18 lines · Hollis Blanchard

Quoted 10 lines · On Monday 07 April 2008 20:11:28 David Gibson wrote:

Quoted 7 lines · Hollis Blanchard

1 file changed, 7 insertions(+)

include/linux/kvm.h | 7 +++++++

Device Control Registers are essentially another address space found on PowerPC 4xx processors, analogous to PIO on x86. DCRs are always 32 bits, and are identified by a 32-bit number.

Well... 10-bit, actually.

The mtdcrux description in the ppc440x6 user manual says the following:

Let the contents of register RA denote a Device Control Register. The contents of GPR[RS] are placed into the designated Device Control
Register.

Quoted 7 lines

Quoted 2 lines

I take that to mean that we must worry about 32 bits worth of DCR numbers. Perhaps I should say "no more than" rather than "always".

I think that's less misleading. mtdcrux is very new, anything which only has the mtdcr instruction certainly can't take DCR numbers above 10 bits, and I would expect that even on chips with mtdcrux the DCR bus is probably still only 10-bits, although it could be extended.

We're defining a kernel/userspace interface here, and since the hardware is capable of 32-bit DCR numbers, I don't think it makes any sense to not support that. Also, we would just end up placing that number into a u32 anyways, so... :)

Quoted 18 lines · Hollis Blanchard

Quoted 10 lines · On Monday 07 April 2008 20:11:28 David Gibson wrote:

Quoted 7 lines · Hollis Blanchard

1 file changed, 7 insertions(+)

include/linux/kvm.h | 7 +++++++

Device Control Registers are essentially another address space found on PowerPC 4xx processors, analogous to PIO on x86. DCRs are always 32 bits, and are identified by a 32-bit number.

Well... 10-bit, actually.

The mtdcrux description in the ppc440x6 user manual says the following:

Let the contents of register RA denote a Device Control Register. The contents of GPR[RS] are placed into the designated Device Control
Register.

Quoted 2 lines

I take that to mean that we must worry about 32 bits worth of DCR numbers. Perhaps I should say "no more than" rather than "always".

I think that's less misleading. mtdcrux is very new, anything which only has the mtdcr instruction certainly can't take DCR numbers above 10 bits, and I would expect that even on chips with mtdcrux the DCR bus is probably still only 10-bits, although it could be extended.

Currently supports only PowerPC 440 Linux guests on 440 hosts. (Only tested with 440EP "Bamboo" guests so far, but with appropriate userspace support other SoC/board combinations should work.)

Interrupt handling: We use IVPR to hijack the host interrupt vectors while running the guest, but hand off decrementer and external interrupts for normal guest processing.

Address spaces: We take advantage of the fact that Linux doesn't use the AS=1 address space (in host or guest), which gives us virtual address space to use for guest mappings. While the guest is running, the host kernel remains mapped in AS=0, but the guest can only use AS=1 mappings.

TLB entries: The TLB entries covering the host linear address space remain present while running the guest (which reduces the overhead of lightweight exits). We keep three copies of the TLB:
- guest TLB: contents of the TLB as the guest sees it
- shadow TLB: the TLB that is actually in hardware while guest is running
- host TLB: to restore TLB state when context switching guest -> host
When a TLB miss occurs because a mapping was not present in the shadow TLB, but was present in the guest TLB, KVM handles the fault without invoking the guest. Large guest pages are backed by multiple 4KB shadow pages through this mechanism.

Instruction emulation: The guest kernel executes at user level, so executing privileged instructions trap into KVM, where we decode and emulate them. Future performance work will focus on reducing the overhead and frequency of these traps.

IO: MMIO and DCR accesses are emulated by userspace. We use virtio for network and block IO, so those drivers must be enabled in the guest. It's possible that some qemu device emulation (e.g. e1000 or rtl8139) may also work with little effort.

Signed-off-by Hollis Blanchard <[email protected]>

arch/powerpc/kvm/44x_tlb.c new file +27 -0

new file mode 100644
@@ -0,0 +1,224 @@
+/*
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License, version 2, as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
+ *
+ * Copyright IBM Corp. 2007
+ *
+ * Authors: Hollis Blanchard <[email protected]>
+ */
+
+#include <linux/types.h>
+#include <linux/string.h>
+#include <linux/kvm_host.h>
+#include <linux/highmem.h>
+#include <asm/mmu-44x.h>
+#include <asm/kvm_ppc.h>
+
+#include "44x_tlb.h"

arch/powerpc/kvm/44x_tlb.c new file +14 -0

+
+	if (!usermode) {
+		/* Guest is in supervisor mode, so we need to translate guest
+		 * supervisor permissions into user permissions. */
+		attrib &= ~PPC44x_TLB_USER_PERM_MASK;
+		attrib |= (attrib & PPC44x_TLB_SUPER_PERM_MASK) << 3;
+	}
+
+	/* Make sure host can always access this memory. */
+	attrib |= PPC44x_TLB_SX|PPC44x_TLB_SR|PPC44x_TLB_SW;
+
+	return attrib;
+}
+

arch/powerpc/kvm/emulate.c new file +19 -0

new file mode 100644
@@ -0,0 +1,753 @@
+/*
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License, version 2, as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
+ *
+ * Copyright IBM Corp. 2007
+ *
+ * Authors: Hollis Blanchard <[email protected]>
+ */
+

arch/powerpc/kvm/emulate.c new file +15 -0

+int kvmppc_emulate_instruction(struct kvm_run *run, struct kvm_vcpu *vcpu)
+{
+	u32 inst = vcpu->arch.last_inst;
+	u32 ea;
+	int ra;
+	int rb;
+	int rc;
+	int rs;
+	int rt;
+	int sprn;
+	int dcrn;
+	enum emulation_result emulated = EMULATE_DONE;
+	int advance = 1;
+
+	switch (get_op(inst)) {

arch/powerpc/kvm/emulate.c new file +26 -0

+		case 323:                                       /* mfdcr */
+			dcrn = get_dcrn(inst);
+			rt = get_rt(inst);
+
+			/* emulate some access in kernel */
+			switch (dcrn) {
+			case DCRN_CPR0_CFGADDR:
+				vcpu->arch.gpr[rt] = vcpu->arch.cpr0_cfgaddr;
+				break;
+			case DCRN_CPR0_CFGDATA:
+				local_irq_disable();
+				mtdcr(DCRN_CPR0_CFGADDR,
+				      vcpu->arch.cpr0_cfgaddr);
+				vcpu->arch.gpr[rt] = mfdcr(DCRN_CPR0_CFGDATA);
+				local_irq_enable();
+				break;
+			default:
+				run->dcr.dcrn = dcrn;
+				run->dcr.data =  0;
+				run->dcr.is_write = 0;
+				vcpu->arch.io_gpr = rt;
+				vcpu->arch.dcr_needed = 1;
+				emulated = EMULATE_DO_DCR;
+			}
+
+			break;

arch/powerpc/kvm/emulate.c new file +8 -0

+		case 451:                                       /* mtdcr */
+			dcrn = get_dcrn(inst);
+			rs = get_rs(inst);
+
+			/* emulate some access in kernel */
+			switch (dcrn) {
+			case DCRN_CPR0_CFGADDR:
+				vcpu->arch.cpr0_cfgaddr = vcpu->arch.gpr[rs];

On Mon, 07 Apr 2008 15:53:34 -0500

Quoted 3 lines · Hollis Blanchard

Currently supports only PowerPC 440 Linux guests on 440 hosts. (Only tested with 440EP "Bamboo" guests so far, but with appropriate userspace support other SoC/board combinations should work.)

I haven't reviewed the whole patch yet, but lots of it looks pretty clean. A couple comments on some things that made me scratch my head below.

Quoted 25 lines

Interrupt handling: We use IVPR to hijack the host interrupt vectors while running the guest, but hand off decrementer and external interrupts for normal guest processing.

Address spaces: We take advantage of the fact that Linux doesn't use the AS=1 address space (in host or guest), which gives us virtual address space to use for guest mappings. While the guest is running, the host kernel remains mapped in AS=0, but the guest can only use AS=1 mappings.

TLB entries: The TLB entries covering the host linear address space remain present while running the guest (which reduces the overhead of lightweight exits). We keep three copies of the TLB:
- guest TLB: contents of the TLB as the guest sees it
- shadow TLB: the TLB that is actually in hardware while guest is
running - host TLB: to restore TLB state when context switching guest -> host When a TLB miss occurs because a mapping was not present in the shadow TLB, but was present in the guest TLB, KVM handles the fault without invoking the guest. Large guest pages are backed by multiple 4KB shadow pages through this mechanism.

Instruction emulation: The guest kernel executes at user level, so executing privileged instructions trap into KVM, where we decode and emulate them. Future performance work will focus on reducing the overhead and frequency of these traps.

Quoted 6 lines

IO: MMIO and DCR accesses are emulated by userspace. We use virtio for network and block IO, so those drivers must be enabled in the guest. It's possible that some qemu device emulation (e.g. e1000 or rtl8139) may also work with little effort.

Signed-off-by Hollis Blanchard <[email protected]>

As Olof pointed out, having this in Documentation might be nice.

Quoted 5 lines

arch/powerpc/Kconfig.debug +0 -0

@@ -151,6 +151,7 @@
 

arch/powerpc/Kconfig.debug line 157

Quoted 6 lines

arch/powerpc/Kconfig.debug +1 -0

 config PPC_EARLY_DEBUG
 	bool "Early debugging (dangerous)"
+	depends on !KVM
 	help
 	  Say Y to enable some early debugging facilities that may be available
 	  for your processor/board combination. Those facilities are hacks

Might want to add a brief explanation as to why this doesn't work with KVM due to the AS conflict.

Quoted 37 lines

arch/powerpc/kvm/44x_tlb.c new file +13 -0

new file mode 100644
@@ -0,0 +1,224 @@
+/*
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License, version 2, as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301,

USA. + *
+ * Copyright IBM Corp. 2007
+ *
+ * Authors: Hollis Blanchard <[email protected]>
+ */

arch/powerpc/kvm/44x_tlb.c new file +11 -0

+
+#include <linux/types.h>
+#include <linux/string.h>
+#include <linux/kvm_host.h>
+#include <linux/highmem.h>
+#include <asm/mmu-44x.h>
+#include <asm/kvm_ppc.h>
+
+#include "44x_tlb.h"
+
+#define PPC44x_TLB_USER_PERM_MASK

(PPC44x_TLB_UX|PPC44x_TLB_UR|PPC44x_TLB_UW) +#define PPC44x_TLB_SUPER_PERM_MASK (PPC44x_TLB_SX|PPC44x_TLB_SR|PPC44x_TLB_SW) + +static unsigned int kvmppc_tlb_44x_pos;

arch/powerpc/kvm/44x_tlb.c line 37

Quoted 5 lines

arch/powerpc/kvm/44x_tlb.c new file +5 -0

+
+static u32 kvmppc_44x_tlb_shadow_attrib(u32 attrib, int usermode)
+{
+	/* XXX remove mask when Linux is fixed */
+	attrib &= 0xf03f;

What does that mean? Is this the "44x TLB handler writes to reserved fields" issue? If so, could you comment that a little more verbosely?

Or you could just send a patch to fix Linux... ;).

Quoted 14 lines

arch/powerpc/kvm/44x_tlb.c new file +14 -0

+
+	if (!usermode) {
+		/* Guest is in supervisor mode, so we need to translate guest
+		 * supervisor permissions into user permissions. */
+		attrib &= ~PPC44x_TLB_USER_PERM_MASK;
+		attrib |= (attrib & PPC44x_TLB_SUPER_PERM_MASK) << 3;
+	}
+
+	/* Make sure host can always access this memory. */
+	attrib |= PPC44x_TLB_SX|PPC44x_TLB_SR|PPC44x_TLB_SW;
+
+	return attrib;
+}
+

<snip>

Quoted 24 lines

arch/powerpc/kvm/emulate.c new file +13 -0

new file mode 100644
@@ -0,0 +1,753 @@
+/*
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License, version 2, as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301,

USA. + *
+ * Copyright IBM Corp. 2007
+ *
+ * Authors: Hollis Blanchard <[email protected]>
+ */

arch/powerpc/kvm/emulate.c new file +1 -0

+

arch/powerpc/kvm/emulate.c line 29

Quoted 10 lines

arch/powerpc/kvm/emulate.c new file +10 -0

+#include <linux/jiffies.h>
+#include <linux/timer.h>
+#include <linux/types.h>
+#include <linux/string.h>
+#include <linux/kvm_host.h>
+
+#include <asm/dcr.h>
+#include <asm/time.h>
+#include <asm/byteorder.h>
+#include <asm/kvm_ppc.h>

#include <asm/dcr-regs.h>

arch/powerpc/kvm/emulate.c line 34

Quoted 5 lines

arch/powerpc/kvm/emulate.c new file +5 -0

+
+#include "44x_tlb.h"
+
+#define DCRN_CPR0_CFGADDR	0xc
+#define DCRN_CPR0_CFGDATA	0xd

Remove these.

<snip>

Quoted 15 lines

+int kvmppc_emulate_instruction(struct kvm_run *run, struct kvm_vcpu *vcpu) +{

arch/powerpc/kvm/emulate.c new file +13 -0

+	u32 inst = vcpu->arch.last_inst;
+	u32 ea;
+	int ra;
+	int rb;
+	int rc;
+	int rs;
+	int rt;
+	int sprn;
+	int dcrn;
+	enum emulation_result emulated = EMULATE_DONE;
+	int advance = 1;
+
+	switch (get_op(inst)) {

<snip>

Quoted 26 lines

arch/powerpc/kvm/emulate.c new file +26 -0

+		case 323:                                       /* mfdcr */
+			dcrn = get_dcrn(inst);
+			rt = get_rt(inst);
+
+			/* emulate some access in kernel */
+			switch (dcrn) {
+			case DCRN_CPR0_CFGADDR:
+				vcpu->arch.gpr[rt] = vcpu->arch.cpr0_cfgaddr;
+				break;
+			case DCRN_CPR0_CFGDATA:
+				local_irq_disable();
+				mtdcr(DCRN_CPR0_CFGADDR,
+				      vcpu->arch.cpr0_cfgaddr);
+				vcpu->arch.gpr[rt] = mfdcr(DCRN_CPR0_CFGDATA);
+				local_irq_enable();
+				break;
+			default:
+				run->dcr.dcrn = dcrn;
+				run->dcr.data =  0;
+				run->dcr.is_write = 0;
+				vcpu->arch.io_gpr = rt;
+				vcpu->arch.dcr_needed = 1;
+				emulated = EMULATE_DO_DCR;
+			}
+
+			break;

<snip>

Quoted 15 lines

arch/powerpc/kvm/emulate.c new file +15 -0

+		case 451:                                       /* mtdcr */
+			dcrn = get_dcrn(inst);
+			rs = get_rs(inst);
+
+			/* emulate some access in kernel */
+			switch (dcrn) {
+			case DCRN_CPR0_CFGADDR:
+				vcpu->arch.cpr0_cfgaddr = vcpu->arch.gpr[rs];
+				break;
+			default:
+				run->dcr.dcrn = dcrn;
+				run->dcr.data = vcpu->arch.gpr[rs];
+				run->dcr.is_write = 1;
+				vcpu->arch.dcr_needed = 1;
+				emulated = EMULATE_DO_DCR;

arch/powerpc/kvm/emulate.c line 149

Quoted 3 lines

arch/powerpc/kvm/emulate.c new file +3 -0

+			}
+
+			break;

What exactly are those doing? I'm confused as to why the CPR0 DCRs are special cased. Also, you don't seem to actually be doing much on storing guest DCRs, so can I assume they aren't really needed at runtime?

include/asm-powerpc/kvm.h +19 -0

@@ -1,6 +1,55 @@
+/*
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License, version 2, as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
+ *
+ * Copyright IBM Corp. 2007
+ *
+ * Authors: Hollis Blanchard <[email protected]>
+ */
+
  #ifndef __LINUX_KVM_POWERPC_H
  #define __LINUX_KVM_POWERPC_H

include/asm-powerpc/kvm.h +1 -1

-/* powerpc does not support KVM */
+#include <asm/types.h>

include/asm-powerpc/kvm.h +21 -1

-#endif
+struct kvm_regs {
+       __u32 pc;
+       __u32 cr;
+       __u32 ctr;
+       __u32 lr;
+       __u32 xer;
+       __u32 msr;
+       __u32 srr0;
+       __u32 srr1;
+       __u32 pid;
+
+       __u32 sprg0;
+       __u32 sprg1;
+       __u32 sprg2;
+       __u32 sprg3;
+       __u32 sprg4;
+       __u32 sprg5;
+       __u32 sprg6;
+       __u32 sprg7;
+
+       __u64 fpr[32];

Quoted 57 lines · Hollis Blanchard

include/asm-powerpc/kvm.h +13 -0

@@ -1,6 +1,55 @@
+/*
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License, version 2, as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301,

USA. + *
+ * Copyright IBM Corp. 2007
+ *
+ * Authors: Hollis Blanchard <[email protected]>
+ */
+
 #ifndef __LINUX_KVM_POWERPC_H
 #define __LINUX_KVM_POWERPC_H

include/asm-powerpc/kvm.h +1 -1

-/* powerpc does not support KVM */
+#include <asm/types.h>

include/asm-powerpc/kvm.h +28 -1

-#endif
+struct kvm_regs {
+       __u32 pc;
+       __u32 cr;
+       __u32 ctr;
+       __u32 lr;
+       __u32 xer;
+       __u32 msr;
+       __u32 srr0;
+       __u32 srr1;
+       __u32 pid;
+
+       __u32 sprg0;
+       __u32 sprg1;
+       __u32 sprg2;
+       __u32 sprg3;
+       __u32 sprg4;
+       __u32 sprg5;
+       __u32 sprg6;
+       __u32 sprg7;
+
+       __u64 fpr[32];
+       __u32 gpr[32];
+};
+
+struct kvm_sregs {
+};
+
+struct kvm_fpu {

include/asm-powerpc/kvm.h line 55

Quoted 3 lines

include/asm-powerpc/kvm.h +3 -0

+};
+
+#endif /* __LINUX_KVM_POWERPC_H */

Since this defines part of the ABI, it would be nice if it's possible to have it in a platform independent way. Most of the registers here should probably become "unsigned long" instead of "__u32" so that the definition can be used for a potential 64 bit port.

Also, I noticed that you lump everything into kvm_regs, instead of using sregs for stuff like srr0 and kvm_fpu for the fprs. What is the reason for that?

If there is one thing I have learned in my various porting efforts, it's that using a variable-sized type in an interface is just begging for trouble.

x86 uses fixed 64-bit variables here (even with x86-32), so that might be the right solution here.

Implement initial support for KVM for PowerPC 440. There are just two small prerequisite patches, and then the bulk of the code can't be split easily.

Please review; I would like to submit these for 2.6.26. There is plenty of work to do, both functional and optimization, but this code is sufficient to run unmodified 440 Linux guests on a 440 Linux host. What's your favorite bike shed color?

On Mon, 07 Apr 2008 15:53:31 -0500

Quoted 4 lines · Hollis Blanchard

Implement initial support for KVM for PowerPC 440. There are just two small prerequisite patches, and then the bulk of the code can't be split easily.

Quoted 4 lines

Please review; I would like to submit these for 2.6.26. There is plenty of work to do, both functional and optimization, but this code is sufficient to run unmodified 440 Linux guests on a 440 Linux host. What's your favorite bike shed color?

Who's tree are you looking to get this patch set into?