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Minor tracing updates

PATCH New George Dunlap 1 participant 3 messages Jul 8, 2010

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#0 lore raw

PATCH 1/1 Minor tracing updates

Reinstate MSR tracing, add RDTSC tracing

#1 lore raw

PATCH 1/1 trace: Reinstate tracing for emualted MSR reads and writes

xen/arch/x86/hvm/hvm.c +4 -0
diff -r 9d965ac1b0db -r be013c2c88d7 xen/arch/x86/hvm/hvm.c
@@ -2103,6 +2103,8 @@
         }
     }
 
+    HVMTRACE_3D(MSR_READ, (uint32_t)*msr_content, (uint32_t)(*msr_content >> 32), msr);
+
     return X86EMUL_OKAY;
 
 gp_fault:
@@ -2117,6 +2119,8 @@
     uint32_t cpuid[4];
     int ret;
 
+    HVMTRACE_3D(MSR_WRITE, (uint32_t)msr_content, (uint32_t)(msr_content >> 32), msr);
+
     hvm_cpuid(1, &cpuid[0], &cpuid[1], &cpuid[2], &cpuid[3]);
     mtrr = !!(cpuid[3] & bitmaskof(X86_FEATURE_MTRR));
#2 lore raw

PATCH 1/1 trace: Trace emulated RDTSC values

In reply to George Dunlap
xen/arch/x86/hvm/hvm.c +2 -0
diff -r be013c2c88d7 -r 747f73b62c51 xen/arch/x86/hvm/hvm.c
@@ -2011,6 +2011,8 @@
     tsc = hvm_get_guest_tsc(v);
     regs->eax = (uint32_t)tsc;
     regs->edx = (uint32_t)(tsc >> 32);
+
+    HVMTRACE_2D(RDTSC, regs->eax, regs->edx);
 }
 
 int hvm_msr_read_intercept(unsigned int msr, uint64_t *msr_content)
xen/include/asm-x86/hvm/trace.h +1 -0
diff -r be013c2c88d7 -r 747f73b62c51 xen/include/asm-x86/hvm/trace.h
@@ -35,6 +35,7 @@
 #define DO_TRC_HVM_DR_WRITE    DEFAULT_HVM_REGACCESS
 #define DO_TRC_HVM_MSR_READ    DEFAULT_HVM_REGACCESS
 #define DO_TRC_HVM_MSR_WRITE   DEFAULT_HVM_REGACCESS
+#define DO_TRC_HVM_RDTSC       DEFAULT_HVM_REGACCESS
 #define DO_TRC_HVM_CPUID       DEFAULT_HVM_MISC
 #define DO_TRC_HVM_INTR        DEFAULT_HVM_INTR
 #define DO_TRC_HVM_NMI         DEFAULT_HVM_INTR
xen/include/public/trace.h +1 -0
diff -r be013c2c88d7 -r 747f73b62c51 xen/include/public/trace.h
@@ -156,6 +156,7 @@
 #define TRC_HVM_CLTS            (TRC_HVM_HANDLER + 0x18)
 #define TRC_HVM_LMSW            (TRC_HVM_HANDLER + 0x19)
 #define TRC_HVM_LMSW64          (TRC_HVM_HANDLER + TRC_64_FLAG + 0x19)
+#define TRC_HVM_RDTSC           (TRC_HVM_HANDLER + 0x1a)
 #define TRC_HVM_INTR_WINDOW     (TRC_HVM_HANDLER + 0x20)
 #define TRC_HVM_NPF             (TRC_HVM_HANDLER + 0x21)