Add Spreadtrum Sharkl64 Platform support
Subsystems (4)
A message that is not in the archive (sent off-list or not yet received): sprd-dt-v6
v6 cover Add Spreadtrum Sharkl64 Platform support
This patch-set split the last version, and addressed the review comments from last version on serial driver code.
Changes from v5:
- Added maintenance interrupt for gic
- Removed reg property from 'soc' and 'apb' nodes
Zhizhou Zhang (2):
arm64: dts: Add support for Spreadtrum SC9836 SoC in dts and Makefile
arm64: Add support for Spreadtrum's Sharkl64 Platform in Kconfig and
defconfig
arch/arm64/Kconfig | 5 ++ arch/arm64/boot/dts/Makefile | 1 + arch/arm64/boot/dts/sprd/Makefile | 5 ++ arch/arm64/boot/dts/sprd/sc9836-openphone.dts | 49 ++++++++++++++++ arch/arm64/boot/dts/sprd/sc9836.dtsi | 74 +++++++++++++++++++++++++ arch/arm64/boot/dts/sprd/sharkl64.dtsi | 65 ++++++++++++++++++++++ arch/arm64/configs/defconfig | 1 + 7 files changed, 200 insertions(+) create mode 100644 arch/arm64/boot/dts/sprd/Makefile create mode 100644 arch/arm64/boot/dts/sprd/sc9836-openphone.dts create mode 100644 arch/arm64/boot/dts/sprd/sc9836.dtsi create mode 100644 arch/arm64/boot/dts/sprd/sharkl64.dtsi
Signature · 1 line
1.7.9.5
PATCH v6 1/2 arm64: dts: Add support for Spreadtrum SC9836 SoC in dts and Makefile
From: Zhizhou Zhang <[email protected]>
Adds the device tree support for Spreadtrum SC9836 SoC which is based on Sharkl64 platform.
Sharkl64 platform contains the common nodes of Spreadtrum's arm64-based SoCs.
--- arch/arm64/boot/dts/Makefile | 1 + arch/arm64/boot/dts/sprd/Makefile | 5 ++ arch/arm64/boot/dts/sprd/sc9836-openphone.dts | 49 ++++++++++++++++ arch/arm64/boot/dts/sprd/sc9836.dtsi | 74 +++++++++++++++++++++++++ arch/arm64/boot/dts/sprd/sharkl64.dtsi | 65 ++++++++++++++++++++++ 5 files changed, 194 insertions(+) create mode 100644 arch/arm64/boot/dts/sprd/Makefile create mode 100644 arch/arm64/boot/dts/sprd/sc9836-openphone.dts create mode 100644 arch/arm64/boot/dts/sprd/sc9836.dtsi create mode 100644 arch/arm64/boot/dts/sprd/sharkl64.dtsi
arch/arm64/boot/dts/Makefile +1 -0
@@ -2,6 +2,7 @@ dts-dirs += amd dts-dirs += apm dts-dirs += arm dts-dirs += cavium +dts-dirs += sprd always := $(dtb-y) subdir-y := $(dts-dirs)
arch/arm64/boot/dts/sprd/Makefile new file +5 -0
@@ -0,0 +1,5 @@ +dtb-$(CONFIG_ARCH_SPRD) += sc9836-openphone.dtb + +always := $(dtb-y) +subdir-y := $(dts-dirs) +clean-files := *.dtb
arch/arm64/boot/dts/sprd/sc9836-openphone.dts new file +49 -0
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arch/arm64/boot/dts/sprd/sc9836.dtsi new file +74 -0
74 lines not on this page · raw message
arch/arm64/boot/dts/sprd/sharkl64.dtsi new file +65 -0
65 lines not on this page · raw message
Signature · 1 line
1.7.9.5
Re: [PATCH v6 1/2] arm64: dts: Add support for Spreadtrum SC9836 SoC in dts and Makefile
Quoted 73 lines · Chunyan Zhang
From: Zhizhou Zhang <[email protected]>
Adds the device tree support for Spreadtrum SC9836 SoC which is based on Sharkl64 platform.
Sharkl64 platform contains the common nodes of Spreadtrum's arm64-based SoCs.
Signed-off-by Zhizhou Zhang <[email protected]>Signed-off-by Orson Zhai <[email protected]>Signed-off-by Chunyan Zhang <[email protected]>--- arch/arm64/boot/dts/Makefile | 1 + arch/arm64/boot/dts/sprd/Makefile | 5 ++ arch/arm64/boot/dts/sprd/sc9836-openphone.dts | 49 ++++++++++++++++ arch/arm64/boot/dts/sprd/sc9836.dtsi | 74 +++++++++++++++++++++++++ arch/arm64/boot/dts/sprd/sharkl64.dtsi | 65 ++++++++++++++++++++++ 5 files changed, 194 insertions(+) create mode 100644 arch/arm64/boot/dts/sprd/Makefile create mode 100644 arch/arm64/boot/dts/sprd/sc9836-openphone.dts create mode 100644 arch/arm64/boot/dts/sprd/sc9836.dtsi create mode 100644 arch/arm64/boot/dts/sprd/sharkl64.dtsiarch/arm64/boot/dts/Makefile +1
-0@@ -2,6 +2,7 @@ dts-dirs += amd dts-dirs += apm dts-dirs += arm dts-dirs += cavium +dts-dirs += sprd always := $(dtb-y) subdir-y := $(dts-dirs)arch/arm64/boot/dts/sprd/Makefile new file +5
-0@@ -0,0 +1,5 @@ +dtb-$(CONFIG_ARCH_SPRD) += sc9836-openphone.dtb + +always := $(dtb-y) +subdir-y := $(dts-dirs) +clean-files := *.dtbarch/arm64/boot/dts/sprd/sc9836-openphone.dts new file +22
-0@@ -0,0 +1,49 @@ +/* + * Spreadtrum SC9836 openphone board DTS file + * + * Copyright (C) 2014, Spreadtrum Communications Inc. + * + * This file is licensed under a dual GPLv2 or X11 license. + */ + +/dts-v1/; + +#include "sc9836.dtsi" + +/ { + model = "Spreadtrum SC9836 Openphone Board"; + + compatible = "sprd,sc9836-openphone", "sprd,sc9836"; + + aliases { + serial0 = &uart0; + serial1 = &uart1; + serial2 = &uart2; + serial3 = &uart3;
arch/arm64/boot/dts/sprd/sc9836-openphone.dts line 32
Quoted 10 lines
arch/arm64/boot/dts/sprd/sc9836-openphone.dts new file +10
-0+ }; + + memory at 80000000 { + device_type = "memory"; + reg = <0 0x80000000 0 0x20000000>; + }; + + chosen { + stdout-path = &uart0; + };
It would be good to use an explicit configuration here. e.g. have:
chosen {
stdout-path = "serial0:115200n8";
};Where '115200n8' is replaced by whatever the bootloader leaves the UART configured as on this board.
That means you won't need a 'console=' to get nice consistent serial output at boot, and won't be relying on implicit defaults all over the place.
Quoted 78 lines
arch/arm64/boot/dts/sprd/sc9836-openphone.dts new file +17
-0+}; + +&uart0 { + status = "okay"; +}; + +&uart1 { + status = "okay"; +}; + +&uart2 { + status = "okay"; +}; + +&uart3 { + status = "okay"; +};arch/arm64/boot/dts/sprd/sc9836.dtsi new file +55
-0@@ -0,0 +1,74 @@ +/* + * Spreadtrum SC9836 SoC DTS file + * + * Copyright (C) 2014, Spreadtrum Communications Inc. + * + * This file is licensed under a dual GPLv2 or X11 license. + */ + +#include "sharkl64.dtsi" +#include <dt-bindings/interrupt-controller/arm-gic.h> + +/ { + compatible = "sprd,sc9836"; + + cpus { + #address-cells = <2>; + #size-cells = <0>; + + cpu at 0 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x0 0x0>; + enable-method = "psci"; + }; + + cpu at 1 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x0 0x1>; + enable-method = "psci"; + }; + + cpu at 2 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x0 0x2>; + enable-method = "psci"; + }; + + cpu at 3 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x0 0x3>; + enable-method = "psci"; + }; + }; + + gic: interrupt-controller at 12001000 { + compatible = "arm,gic-400"; + reg = <0 0x12001000 0 0x1000>, + <0 0x12002000 0 0x2000>, + <0 0x12004000 0 0x2000>, + <0 0x12006000 0 0x2000>; + #interrupt-cells = <3>; + interrupt-controller;
arch/arm64/boot/dts/sprd/sc9836.dtsi line 65
Quoted 10 lines
arch/arm64/boot/dts/sprd/sc9836.dtsi new file +10
-0+ interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; + }; + + psci { + compatible = "arm,psci"; + method = "smc"; + cpu_on = <0xc4000003>; + cpu_off = <0x84000002>; + cpu_suspend = <0xc4000001>; + };
Given that there are no suspend states in this dts, the cpu_suspend property here could be omitted for now (though I guess it doesn't matter either way).
Quoted 70 lines
arch/arm64/boot/dts/sprd/sc9836.dtsi new file +9
-0+ + timer { + compatible = "arm,armv8-timer"; + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; + }; +};arch/arm64/boot/dts/sprd/sharkl64.dtsi new file +55
-0@@ -0,0 +1,65 @@ +/* + * Spreadtrum Sharkl64 platform DTS file + * + * Copyright (C) 2014, Spreadtrum Communications Inc. + * + * This file is licensed under a dual GPLv2 or X11 license. + */ + +/ { + interrupt-parent = <&gic>; + #address-cells = <2>; + #size-cells = <2>; + + soc { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + ap-apb { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + uart0: serial at 70000000 { + compatible = "sprd,sc9836-uart"; + reg = <0 0x70000000 0 0x100>; + interrupts = <0 2 0xf04>; + clocks = <&clk26mhz>; + status = "disabled"; + }; + + uart1: serial at 70100000 { + compatible = "sprd,sc9836-uart"; + reg = <0 0x70100000 0 0x100>; + interrupts = <0 3 0xf04>; + clocks = <&clk26mhz>; + status = "disabled"; + }; + + uart2: serial at 70200000 { + compatible = "sprd,sc9836-uart"; + reg = <0 0x70200000 0 0x100>; + interrupts = <0 2 0xf04>; + clocks = <&clk26mhz>; + status = "disabled"; + }; + + uart3: serial at 70300000 { + compatible = "sprd,sc9836-uart"; + reg = <0 0x70300000 0 0x100>; + interrupts = <0 3 0xf04>; + clocks = <&clk26mhz>; + status = "disabled";
arch/arm64/boot/dts/sprd/sharkl64.dtsi line 65
Quoted 10 lines
arch/arm64/boot/dts/sprd/sharkl64.dtsi new file +10
-0+ }; + }; + }; + + clk26mhz: clk26mhz { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <26000000>; + }; +};
Other than my comments above, this looks fine to me. I assume the UART binding and driver are already queued somewhere else?
If so:
Thanks,
Mark.
Lyra Zhang
reviewerRe: [PATCH v6 1/2] arm64: dts: Add support for Spreadtrum SC9836 SoC in dts and Makefile
Quoted 91 lines · Mark Rutland
Quoted 73 lines · Chunyan Zhang
From: Zhizhou Zhang <[email protected]>
Adds the device tree support for Spreadtrum SC9836 SoC which is based on Sharkl64 platform.
Sharkl64 platform contains the common nodes of Spreadtrum's arm64-based SoCs.
Signed-off-by Zhizhou Zhang <[email protected]>Signed-off-by Orson Zhai <[email protected]>Signed-off-by Chunyan Zhang <[email protected]>--- arch/arm64/boot/dts/Makefile | 1 + arch/arm64/boot/dts/sprd/Makefile | 5 ++ arch/arm64/boot/dts/sprd/sc9836-openphone.dts | 49 ++++++++++++++++ arch/arm64/boot/dts/sprd/sc9836.dtsi | 74 +++++++++++++++++++++++++ arch/arm64/boot/dts/sprd/sharkl64.dtsi | 65 ++++++++++++++++++++++ 5 files changed, 194 insertions(+) create mode 100644 arch/arm64/boot/dts/sprd/Makefile create mode 100644 arch/arm64/boot/dts/sprd/sc9836-openphone.dts create mode 100644 arch/arm64/boot/dts/sprd/sc9836.dtsi create mode 100644 arch/arm64/boot/dts/sprd/sharkl64.dtsiarch/arm64/boot/dts/Makefile +1
-0@@ -2,6 +2,7 @@ dts-dirs += amd dts-dirs += apm dts-dirs += arm dts-dirs += cavium +dts-dirs += sprd always := $(dtb-y) subdir-y := $(dts-dirs)arch/arm64/boot/dts/sprd/Makefile new file +5
-0@@ -0,0 +1,5 @@ +dtb-$(CONFIG_ARCH_SPRD) += sc9836-openphone.dtb + +always := $(dtb-y) +subdir-y := $(dts-dirs) +clean-files := *.dtbarch/arm64/boot/dts/sprd/sc9836-openphone.dts new file +22
-0@@ -0,0 +1,49 @@ +/* + * Spreadtrum SC9836 openphone board DTS file + * + * Copyright (C) 2014, Spreadtrum Communications Inc. + * + * This file is licensed under a dual GPLv2 or X11 license. + */ + +/dts-v1/; + +#include "sc9836.dtsi" + +/ { + model = "Spreadtrum SC9836 Openphone Board"; + + compatible = "sprd,sc9836-openphone", "sprd,sc9836"; + + aliases { + serial0 = &uart0; + serial1 = &uart1; + serial2 = &uart2; + serial3 = &uart3;arch/arm64/boot/dts/sprd/sc9836-openphone.dts line 32
Quoted 10 lines
arch/arm64/boot/dts/sprd/sc9836-openphone.dts new file +10
-0+ }; + + memory at 80000000 { + device_type = "memory"; + reg = <0 0x80000000 0 0x20000000>; + }; + + chosen { + stdout-path = &uart0; + };It would be good to use an explicit configuration here. e.g. have:
chosen { stdout-path = "serial0:115200n8"; };
Quoted 7 lines
Where '115200n8' is replaced by whatever the bootloader leaves the UART configured as on this board.
That means you won't need a 'console=' to get nice consistent serial output at boot, and won't be relying on implicit defaults all over the place.
ok, I've changed and tested pass.
Quoted 168 lines
Quoted 78 lines
arch/arm64/boot/dts/sprd/sc9836-openphone.dts new file +17
-0+}; + +&uart0 { + status = "okay"; +}; + +&uart1 { + status = "okay"; +}; + +&uart2 { + status = "okay"; +}; + +&uart3 { + status = "okay"; +};arch/arm64/boot/dts/sprd/sc9836.dtsi new file +55
-0@@ -0,0 +1,74 @@ +/* + * Spreadtrum SC9836 SoC DTS file + * + * Copyright (C) 2014, Spreadtrum Communications Inc. + * + * This file is licensed under a dual GPLv2 or X11 license. + */ + +#include "sharkl64.dtsi" +#include <dt-bindings/interrupt-controller/arm-gic.h> + +/ { + compatible = "sprd,sc9836"; + + cpus { + #address-cells = <2>; + #size-cells = <0>; + + cpu at 0 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x0 0x0>; + enable-method = "psci"; + }; + + cpu at 1 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x0 0x1>; + enable-method = "psci"; + }; + + cpu at 2 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x0 0x2>; + enable-method = "psci"; + }; + + cpu at 3 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x0 0x3>; + enable-method = "psci"; + }; + }; + + gic: interrupt-controller at 12001000 { + compatible = "arm,gic-400"; + reg = <0 0x12001000 0 0x1000>, + <0 0x12002000 0 0x2000>, + <0 0x12004000 0 0x2000>, + <0 0x12006000 0 0x2000>; + #interrupt-cells = <3>; + interrupt-controller;arch/arm64/boot/dts/sprd/sc9836.dtsi line 65
Quoted 10 lines
arch/arm64/boot/dts/sprd/sc9836.dtsi new file +10
-0+ interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; + }; + + psci { + compatible = "arm,psci"; + method = "smc"; + cpu_on = <0xc4000003>; + cpu_off = <0x84000002>; + cpu_suspend = <0xc4000001>; + };Given that there are no suspend states in this dts, the
cpu_suspendproperty here could be omitted for now (though I guess it doesn't matter either way).Quoted 75 lines
arch/arm64/boot/dts/sprd/sc9836.dtsi new file +9
-0+ + timer { + compatible = "arm,armv8-timer"; + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; + }; +};arch/arm64/boot/dts/sprd/sharkl64.dtsi new file +60
-0@@ -0,0 +1,65 @@ +/* + * Spreadtrum Sharkl64 platform DTS file + * + * Copyright (C) 2014, Spreadtrum Communications Inc. + * + * This file is licensed under a dual GPLv2 or X11 license. + */ + +/ { + interrupt-parent = <&gic>; + #address-cells = <2>; + #size-cells = <2>; + + soc { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + ap-apb { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + uart0: serial at 70000000 { + compatible = "sprd,sc9836-uart"; + reg = <0 0x70000000 0 0x100>; + interrupts = <0 2 0xf04>; + clocks = <&clk26mhz>; + status = "disabled"; + }; + + uart1: serial at 70100000 { + compatible = "sprd,sc9836-uart"; + reg = <0 0x70100000 0 0x100>; + interrupts = <0 3 0xf04>; + clocks = <&clk26mhz>; + status = "disabled"; + }; + + uart2: serial at 70200000 { + compatible = "sprd,sc9836-uart"; + reg = <0 0x70200000 0 0x100>; + interrupts = <0 2 0xf04>; + clocks = <&clk26mhz>; + status = "disabled"; + }; + + uart3: serial at 70300000 { + compatible = "sprd,sc9836-uart"; + reg = <0 0x70300000 0 0x100>; + interrupts = <0 3 0xf04>; + clocks = <&clk26mhz>; + status = "disabled"; + }; + }; + }; + + clk26mhz: clk26mhz {
Quoted 9 lines
arch/arm64/boot/dts/sprd/sharkl64.dtsi line 65
Quoted 5 lines
arch/arm64/boot/dts/sprd/sharkl64.dtsi new file +5
-0+ compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <26000000>; + }; +};Other than my comments above, this looks fine to me. I assume the UART binding and driver are already queued somewhere else?
Since the last version patch series must be split for applying. I'll send the UART bindings with UART driver soon.
For this case, can I still add your Acked-by and send these two patch to Greg right now?
Thanks a lot,
Chunyan
Quoted 6 lines
If so:
Acked-by Mark Rutland <[email protected]>Thanks,
Mark.
Mark Rutland
reviewerRe: [PATCH v6 1/2] arm64: dts: Add support for Spreadtrum SC9836 SoC in dts and Makefile
Quoted 280 lines · Lyra Zhang
Quoted 91 lines · Mark Rutland
Quoted 73 lines · Chunyan Zhang
From: Zhizhou Zhang <[email protected]>
Adds the device tree support for Spreadtrum SC9836 SoC which is based on Sharkl64 platform.
Sharkl64 platform contains the common nodes of Spreadtrum's arm64-based SoCs.
Signed-off-by Zhizhou Zhang <[email protected]>Signed-off-by Orson Zhai <[email protected]>Signed-off-by Chunyan Zhang <[email protected]>--- arch/arm64/boot/dts/Makefile | 1 + arch/arm64/boot/dts/sprd/Makefile | 5 ++ arch/arm64/boot/dts/sprd/sc9836-openphone.dts | 49 ++++++++++++++++ arch/arm64/boot/dts/sprd/sc9836.dtsi | 74 +++++++++++++++++++++++++ arch/arm64/boot/dts/sprd/sharkl64.dtsi | 65 ++++++++++++++++++++++ 5 files changed, 194 insertions(+) create mode 100644 arch/arm64/boot/dts/sprd/Makefile create mode 100644 arch/arm64/boot/dts/sprd/sc9836-openphone.dts create mode 100644 arch/arm64/boot/dts/sprd/sc9836.dtsi create mode 100644 arch/arm64/boot/dts/sprd/sharkl64.dtsiarch/arm64/boot/dts/Makefile +1
-0@@ -2,6 +2,7 @@ dts-dirs += amd dts-dirs += apm dts-dirs += arm dts-dirs += cavium +dts-dirs += sprd always := $(dtb-y) subdir-y := $(dts-dirs)arch/arm64/boot/dts/sprd/Makefile new file +5
-0@@ -0,0 +1,5 @@ +dtb-$(CONFIG_ARCH_SPRD) += sc9836-openphone.dtb + +always := $(dtb-y) +subdir-y := $(dts-dirs) +clean-files := *.dtbarch/arm64/boot/dts/sprd/sc9836-openphone.dts new file +22
-0@@ -0,0 +1,49 @@ +/* + * Spreadtrum SC9836 openphone board DTS file + * + * Copyright (C) 2014, Spreadtrum Communications Inc. + * + * This file is licensed under a dual GPLv2 or X11 license. + */ + +/dts-v1/; + +#include "sc9836.dtsi" + +/ { + model = "Spreadtrum SC9836 Openphone Board"; + + compatible = "sprd,sc9836-openphone", "sprd,sc9836"; + + aliases { + serial0 = &uart0; + serial1 = &uart1; + serial2 = &uart2; + serial3 = &uart3;arch/arm64/boot/dts/sprd/sc9836-openphone.dts line 32
Quoted 10 lines
arch/arm64/boot/dts/sprd/sc9836-openphone.dts new file +10
-0+ }; + + memory at 80000000 { + device_type = "memory"; + reg = <0 0x80000000 0 0x20000000>; + }; + + chosen { + stdout-path = &uart0; + };It would be good to use an explicit configuration here. e.g. have:
chosen { stdout-path = "serial0:115200n8"; };Quoted 7 lines
Where '115200n8' is replaced by whatever the bootloader leaves the UART configured as on this board.
That means you won't need a 'console=' to get nice consistent serial output at boot, and won't be relying on implicit defaults all over the place.
ok, I've changed and tested pass.
Quoted 168 lines
Quoted 78 lines
arch/arm64/boot/dts/sprd/sc9836-openphone.dts new file +17
-0+}; + +&uart0 { + status = "okay"; +}; + +&uart1 { + status = "okay"; +}; + +&uart2 { + status = "okay"; +}; + +&uart3 { + status = "okay"; +};arch/arm64/boot/dts/sprd/sc9836.dtsi new file +55
-0@@ -0,0 +1,74 @@ +/* + * Spreadtrum SC9836 SoC DTS file + * + * Copyright (C) 2014, Spreadtrum Communications Inc. + * + * This file is licensed under a dual GPLv2 or X11 license. + */ + +#include "sharkl64.dtsi" +#include <dt-bindings/interrupt-controller/arm-gic.h> + +/ { + compatible = "sprd,sc9836"; + + cpus { + #address-cells = <2>; + #size-cells = <0>; + + cpu at 0 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x0 0x0>; + enable-method = "psci"; + }; + + cpu at 1 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x0 0x1>; + enable-method = "psci"; + }; + + cpu at 2 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x0 0x2>; + enable-method = "psci"; + }; + + cpu at 3 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x0 0x3>; + enable-method = "psci"; + }; + }; + + gic: interrupt-controller at 12001000 { + compatible = "arm,gic-400"; + reg = <0 0x12001000 0 0x1000>, + <0 0x12002000 0 0x2000>, + <0 0x12004000 0 0x2000>, + <0 0x12006000 0 0x2000>; + #interrupt-cells = <3>; + interrupt-controller;arch/arm64/boot/dts/sprd/sc9836.dtsi line 65
Quoted 10 lines
arch/arm64/boot/dts/sprd/sc9836.dtsi new file +10
-0+ interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; + }; + + psci { + compatible = "arm,psci"; + method = "smc"; + cpu_on = <0xc4000003>; + cpu_off = <0x84000002>; + cpu_suspend = <0xc4000001>; + };Given that there are no suspend states in this dts, the
cpu_suspendproperty here could be omitted for now (though I guess it doesn't matter either way).Quoted 75 lines
arch/arm64/boot/dts/sprd/sc9836.dtsi new file +9
-0+ + timer { + compatible = "arm,armv8-timer"; + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; + }; +};arch/arm64/boot/dts/sprd/sharkl64.dtsi new file +60
-0@@ -0,0 +1,65 @@ +/* + * Spreadtrum Sharkl64 platform DTS file + * + * Copyright (C) 2014, Spreadtrum Communications Inc. + * + * This file is licensed under a dual GPLv2 or X11 license. + */ + +/ { + interrupt-parent = <&gic>; + #address-cells = <2>; + #size-cells = <2>; + + soc { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + ap-apb { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + uart0: serial at 70000000 { + compatible = "sprd,sc9836-uart"; + reg = <0 0x70000000 0 0x100>; + interrupts = <0 2 0xf04>; + clocks = <&clk26mhz>; + status = "disabled"; + }; + + uart1: serial at 70100000 { + compatible = "sprd,sc9836-uart"; + reg = <0 0x70100000 0 0x100>; + interrupts = <0 3 0xf04>; + clocks = <&clk26mhz>; + status = "disabled"; + }; + + uart2: serial at 70200000 { + compatible = "sprd,sc9836-uart"; + reg = <0 0x70200000 0 0x100>; + interrupts = <0 2 0xf04>; + clocks = <&clk26mhz>; + status = "disabled"; + }; + + uart3: serial at 70300000 { + compatible = "sprd,sc9836-uart"; + reg = <0 0x70300000 0 0x100>; + interrupts = <0 3 0xf04>; + clocks = <&clk26mhz>; + status = "disabled"; + }; + }; + }; + + clk26mhz: clk26mhz {Quoted 9 lines
arch/arm64/boot/dts/sprd/sharkl64.dtsi line 65
Quoted 5 lines
arch/arm64/boot/dts/sprd/sharkl64.dtsi new file +5
-0+ compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <26000000>; + }; +};Other than my comments above, this looks fine to me. I assume the UART binding and driver are already queued somewhere else?
Quoted 5 lines
Since the last version patch series must be split for applying. I'll send the UART bindings with UART driver soon.
For this case, can I still add your Acked-by and send these two patch to Greg right now?
If the UART patches aren't queued yet then I'd like to take a look at their next posting first.
Surely these 2 patches (with parts under arch/arm64) should go via arm-soc?
Thanks,
Mark.
Lyra Zhang
reviewerRe: [PATCH v6 1/2] arm64: dts: Add support for Spreadtrum SC9836 SoC in dts and Makefile
Quoted 281 lines · Mark Rutland
Quoted 280 lines · Lyra Zhang
Quoted 91 lines · Mark Rutland
Quoted 73 lines · Chunyan Zhang
From: Zhizhou Zhang <[email protected]>
Adds the device tree support for Spreadtrum SC9836 SoC which is based on Sharkl64 platform.
Sharkl64 platform contains the common nodes of Spreadtrum's arm64-based SoCs.
Signed-off-by Zhizhou Zhang <[email protected]>Signed-off-by Orson Zhai <[email protected]>Signed-off-by Chunyan Zhang <[email protected]>--- arch/arm64/boot/dts/Makefile | 1 + arch/arm64/boot/dts/sprd/Makefile | 5 ++ arch/arm64/boot/dts/sprd/sc9836-openphone.dts | 49 ++++++++++++++++ arch/arm64/boot/dts/sprd/sc9836.dtsi | 74 +++++++++++++++++++++++++ arch/arm64/boot/dts/sprd/sharkl64.dtsi | 65 ++++++++++++++++++++++ 5 files changed, 194 insertions(+) create mode 100644 arch/arm64/boot/dts/sprd/Makefile create mode 100644 arch/arm64/boot/dts/sprd/sc9836-openphone.dts create mode 100644 arch/arm64/boot/dts/sprd/sc9836.dtsi create mode 100644 arch/arm64/boot/dts/sprd/sharkl64.dtsiarch/arm64/boot/dts/Makefile +1
-0@@ -2,6 +2,7 @@ dts-dirs += amd dts-dirs += apm dts-dirs += arm dts-dirs += cavium +dts-dirs += sprd always := $(dtb-y) subdir-y := $(dts-dirs)arch/arm64/boot/dts/sprd/Makefile new file +5
-0@@ -0,0 +1,5 @@ +dtb-$(CONFIG_ARCH_SPRD) += sc9836-openphone.dtb + +always := $(dtb-y) +subdir-y := $(dts-dirs) +clean-files := *.dtbarch/arm64/boot/dts/sprd/sc9836-openphone.dts new file +22
-0@@ -0,0 +1,49 @@ +/* + * Spreadtrum SC9836 openphone board DTS file + * + * Copyright (C) 2014, Spreadtrum Communications Inc. + * + * This file is licensed under a dual GPLv2 or X11 license. + */ + +/dts-v1/; + +#include "sc9836.dtsi" + +/ { + model = "Spreadtrum SC9836 Openphone Board"; + + compatible = "sprd,sc9836-openphone", "sprd,sc9836"; + + aliases { + serial0 = &uart0; + serial1 = &uart1; + serial2 = &uart2; + serial3 = &uart3;arch/arm64/boot/dts/sprd/sc9836-openphone.dts line 32
Quoted 10 lines
arch/arm64/boot/dts/sprd/sc9836-openphone.dts new file +10
-0+ }; + + memory at 80000000 { + device_type = "memory"; + reg = <0 0x80000000 0 0x20000000>; + }; + + chosen { + stdout-path = &uart0; + };It would be good to use an explicit configuration here. e.g. have:
chosen { stdout-path = "serial0:115200n8"; };Quoted 7 lines
Where '115200n8' is replaced by whatever the bootloader leaves the UART configured as on this board.
That means you won't need a 'console=' to get nice consistent serial output at boot, and won't be relying on implicit defaults all over the place.
ok, I've changed and tested pass.
Quoted 177 lines
Quoted 78 lines
arch/arm64/boot/dts/sprd/sc9836-openphone.dts new file +17
-0+}; + +&uart0 { + status = "okay"; +}; + +&uart1 { + status = "okay"; +}; + +&uart2 { + status = "okay"; +}; + +&uart3 { + status = "okay"; +};arch/arm64/boot/dts/sprd/sc9836.dtsi new file +55
-0@@ -0,0 +1,74 @@ +/* + * Spreadtrum SC9836 SoC DTS file + * + * Copyright (C) 2014, Spreadtrum Communications Inc. + * + * This file is licensed under a dual GPLv2 or X11 license. + */ + +#include "sharkl64.dtsi" +#include <dt-bindings/interrupt-controller/arm-gic.h> + +/ { + compatible = "sprd,sc9836"; + + cpus { + #address-cells = <2>; + #size-cells = <0>; + + cpu at 0 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x0 0x0>; + enable-method = "psci"; + }; + + cpu at 1 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x0 0x1>; + enable-method = "psci"; + }; + + cpu at 2 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x0 0x2>; + enable-method = "psci"; + }; + + cpu at 3 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x0 0x3>; + enable-method = "psci"; + }; + }; + + gic: interrupt-controller at 12001000 { + compatible = "arm,gic-400"; + reg = <0 0x12001000 0 0x1000>, + <0 0x12002000 0 0x2000>, + <0 0x12004000 0 0x2000>, + <0 0x12006000 0 0x2000>; + #interrupt-cells = <3>; + interrupt-controller;arch/arm64/boot/dts/sprd/sc9836.dtsi line 65
Quoted 10 lines
arch/arm64/boot/dts/sprd/sc9836.dtsi new file +10
-0+ interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; + }; + + psci { + compatible = "arm,psci"; + method = "smc"; + cpu_on = <0xc4000003>; + cpu_off = <0x84000002>; + cpu_suspend = <0xc4000001>; + };Given that there are no suspend states in this dts, the
cpu_suspendproperty here could be omitted for now (though I guess it doesn't matter either way).Quoted 70 lines
arch/arm64/boot/dts/sprd/sc9836.dtsi new file +9
-0+ + timer { + compatible = "arm,armv8-timer"; + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; + }; +};arch/arm64/boot/dts/sprd/sharkl64.dtsi new file +55
-0@@ -0,0 +1,65 @@ +/* + * Spreadtrum Sharkl64 platform DTS file + * + * Copyright (C) 2014, Spreadtrum Communications Inc. + * + * This file is licensed under a dual GPLv2 or X11 license. + */ + +/ { + interrupt-parent = <&gic>; + #address-cells = <2>; + #size-cells = <2>; + + soc { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + ap-apb { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + uart0: serial at 70000000 { + compatible = "sprd,sc9836-uart"; + reg = <0 0x70000000 0 0x100>; + interrupts = <0 2 0xf04>; + clocks = <&clk26mhz>; + status = "disabled"; + }; + + uart1: serial at 70100000 { + compatible = "sprd,sc9836-uart"; + reg = <0 0x70100000 0 0x100>; + interrupts = <0 3 0xf04>; + clocks = <&clk26mhz>; + status = "disabled"; + }; + + uart2: serial at 70200000 { + compatible = "sprd,sc9836-uart"; + reg = <0 0x70200000 0 0x100>; + interrupts = <0 2 0xf04>; + clocks = <&clk26mhz>; + status = "disabled"; + }; + + uart3: serial at 70300000 { + compatible = "sprd,sc9836-uart"; + reg = <0 0x70300000 0 0x100>; + interrupts = <0 3 0xf04>; + clocks = <&clk26mhz>; + status = "disabled";arch/arm64/boot/dts/sprd/sharkl64.dtsi line 65
Quoted 10 lines
arch/arm64/boot/dts/sprd/sharkl64.dtsi new file +10
-0+ }; + }; + }; + + clk26mhz: clk26mhz { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <26000000>; + }; +};Other than my comments above, this looks fine to me. I assume the UART binding and driver are already queued somewhere else?
Quoted 9 lines
Quoted 5 lines
Since the last version patch series must be split for applying. I'll send the UART bindings with UART driver soon.
For this case, can I still add your Acked-by and send these two patch to Greg right now?
If the UART patches aren't queued yet then I'd like to take a look at their next posting first.
ok, they have been ready, I'll send them right now.
Quoted 3 lines
Surely these 2 patches (with parts under
arch/arm64) should go via arm-soc?
yes, should be 'arm at kernel.org', right?
Quoted 2 lines
Thanks,
Mark.
PATCH v6 2/2 arm64: Add support for Spreadtrum's Sharkl64 Platform in Kconfig and defconfig
In reply to Chunyan ZhangFrom: Zhizhou Zhang <[email protected]>
Adds support for Spreadtrum's SoC Platform in the arm64 Kconfig and defconfig files.
--- arch/arm64/Kconfig | 5 +++++ arch/arm64/configs/defconfig | 1 + 2 files changed, 6 insertions(+)
arch/arm64/Kconfig +5 -0
@@ -153,6 +153,11 @@ config ARCH_SEATTLE help This enables support for AMD Seattle SOC Family +config ARCH_SPRD + bool "Spreadtrum SoC platform" + help + Support for Spreadtrum ARM based SoCs + config ARCH_THUNDER bool "Cavium Inc. Thunder SoC Family" help
arch/arm64/configs/defconfig +1 -0
@@ -33,6 +33,7 @@ CONFIG_MODULE_UNLOAD=y # CONFIG_BLK_DEV_BSG is not set # CONFIG_IOSCHED_DEADLINE is not set CONFIG_ARCH_THUNDER=y +CONFIG_ARCH_SPRD=y CONFIG_ARCH_VEXPRESS=y CONFIG_ARCH_XGENE=y CONFIG_PCI=y
Signature · 1 line
1.7.9.5