perf tools: Bail out at "--sort dcacheline" and cacheline_size not known
tip-bot for Arnaldo Carvalho de Melo
merge botCommit-ID: 0d203166de37ad50ea826f97570b3a2beea87c9d Gitweb: http://git.kernel.org/tip/0d203166de37ad50ea826f97570b3a2beea87c9d Author: Arnaldo Carvalho de Melo <[email protected]> AuthorDate: Fri, 15 Jul 2016 10:08:43 -0300 Committer: Arnaldo Carvalho de Melo <[email protected]> CommitDate: Fri, 15 Jul 2016 10:08:43 -0300
perf tools: Bail out at "--sort dcacheline" and cacheline_size not known
There are cases where further work would be needed to overcome the fact that neither sysconf(_SC_LEVEL1_DCACHE_LINESIZE) nor /sys/devices/system/cpu/cpu0/cache/index0/coherency_line_size are available in some systems (Android, for instance), so bail out when such a situation takes place.
Cc Adrian Hunter <[email protected]>
Cc David Ahern <[email protected]>
Cc Jiri Olsa <[email protected]>
Cc Namhyung Kim <[email protected]>
Cc Wang Nan <[email protected]>
Signed-off-by Arnaldo Carvalho de Melo <[email protected]>
--- tools/perf/util/sort.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-)
tools/perf/util/sort.c +7 -1
@@ -2381,6 +2381,9 @@ static int sort_dimension__add(struct perf_hpp_list *list, const char *tok,if (sort__mode !=SORT_MODE__MEMORY )return -EINVAL ; +if (sd->entry == &sort_mem_dcacheline && cacheline_size ==0 ) +return -EINVAL ; +if (sd->entry == &sort_mem_daddr_sym) list->sym =1 ;
@@ -2424,7 +2427,10 @@ static int setup_sort_list(struct perf_hpp_list *list, char *str,if (*tok) { ret =sort_dimension__add (list, tok, evlist, level);if (ret == -EINVAL ) { -error ("Invalid --sort key: `%s'" , tok); +if (!cacheline_size && !strncasecmp (tok,"dcacheline" ,strlen (tok))) +error ("The \"dcacheline\" --sort key needs to know the cacheline size and it couldn't be determined on this system" ); +else +error ("Invalid --sort key: `%s'" , tok);break ; }else if (ret == -ESRCH ) {error ("Unknown --sort key: `%s'" , tok);