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perf vendor events: Add BroadwellX V10 event file

tip:perf/core tip-bot for Andi Kleen 1 participant 1 message Oct 19, 2016 perf events

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Commit-ID:  19c0389b60d486010d508d5a1551ee9b6a8b2f45
Gitweb:     http://git.kernel.org/tip/19c0389b60d486010d508d5a1551ee9b6a8b2f45
Author:     Andi Kleen <[email protected]>
AuthorDate: Wed, 5 Oct 2016 09:53:07 -0700
Committer:  Arnaldo Carvalho de Melo <[email protected]>
CommitDate: Mon, 17 Oct 2016 13:39:47 -0300

perf vendor events: Add BroadwellX V10 event file

Add a Intel event file for perf.

Signed-off-by Andi Kleen <[email protected]>
Cc Jiri Olsa <[email protected]>
Cc Sukadev Bhattiprolu <[email protected]>
Link http://lkml.kernel.org/n/[email protected] open here
[ Lowercased the directory and file names ]
Signed-off-by Arnaldo Carvalho de Melo <[email protected]>
---
 .../x86/{broadwellde => broadwellx}/cache.json     | 168 ++++++++++++++++
 .../floating-point.json                            |   0
 .../x86/{broadwellde => broadwellx}/frontend.json  |   0
 .../x86/{broadwellde => broadwellx}/memory.json    | 216 +++++++++++++++++++++
 .../x86/{broadwellde => broadwellx}/other.json     |   0
 .../x86/{broadwellde => broadwellx}/pipeline.json  |   0
 .../virtual-memory.json                            |   0
 tools/perf/pmu-events/arch/x86/mapfile.csv         |   1 +
 8 files changed, 385 insertions(+)
tools/perf/pmu-events/arch/x86/broadwellx/cache.json renamed from tools/perf/pmu-events/arch/x86/broadwellde/cache.json +168 -0
similarity index 84%
copy from tools/perf/pmu-events/arch/x86/broadwellde/cache.json
copy to tools/perf/pmu-events/arch/x86/broadwellx/cache.json
index 36fe398..d1d0438 100644
@@ -520,6 +520,42 @@
         "CounterHTOff": "0,1,2,3"
     },
     {
+        "EventCode": "0xD3",
+        "UMask": "0x4",
+        "BriefDescription": "Retired load uop whose Data Source was: remote DRAM either Snoop not needed or Snoop Miss (RspI)",
+        "Data_LA": "1",
+        "PEBS": "1",
+        "Counter": "0,1,2,3",
+        "EventName": "MEM_LOAD_UOPS_L3_MISS_RETIRED.REMOTE_DRAM",
+        "Errata": "BDE70",
+        "SampleAfterValue": "100007",
+        "CounterHTOff": "0,1,2,3"
+    },
+    {
+        "EventCode": "0xD3",
+        "UMask": "0x10",
+        "BriefDescription": "Retired load uop whose Data Source was: Remote cache HITM",
+        "Data_LA": "1",
+        "PEBS": "1",
+        "Counter": "0,1,2,3",
+        "EventName": "MEM_LOAD_UOPS_L3_MISS_RETIRED.REMOTE_HITM",
+        "Errata": "BDE70",
+        "SampleAfterValue": "100007",
+        "CounterHTOff": "0,1,2,3"
+    },
+    {
+        "EventCode": "0xD3",
+        "UMask": "0x20",
+        "BriefDescription": "Retired load uop whose Data Source was: forwarded from remote cache",
+        "Data_LA": "1",
+        "PEBS": "1",
+        "Counter": "0,1,2,3",
+        "EventName": "MEM_LOAD_UOPS_L3_MISS_RETIRED.REMOTE_FWD",
+        "Errata": "BDE70",
+        "SampleAfterValue": "100007",
+        "CounterHTOff": "0,1,2,3"
+    },
+    {
         "EventCode": "0xF0",
         "UMask": "0x1",
         "BriefDescription": "Demand Data Read requests that access L2 cache",

@@ -770,5 +806,137 @@
         "CounterMask": "1",
         "SampleAfterValue": "2000003",
         "CounterHTOff": "0,1,2,3,4,5,6,7"
+    },
+    {
+        "Offcore": "1",
+        "EventCode": "0xB7, 0xBB",
+        "UMask": "0x1",
+        "BriefDescription": "Counts all requests that hit in the L3",
+        "MSRValue": "0x3f803c8fff",
+        "Counter": "0,1,2,3",
+        "EventName": "OFFCORE_RESPONSE.ALL_REQUESTS.LLC_HIT.ANY_RESPONSE",
+        "MSRIndex": "0x1a6,0x1a7",
+        "SampleAfterValue": "100003",
+        "CounterHTOff": "0,1,2,3"
+    },
+    {
+        "Offcore": "1",
+        "EventCode": "0xB7, 0xBB",
+        "UMask": "0x1",
+        "BriefDescription": "Counts all data/code/rfo reads (demand & prefetch) that hit in the L3 and the snoop to one of the sibling cores hits the line in M state and the line is forwarded",
+        "MSRValue": "0x10003c07f7",
+        "Counter": "0,1,2,3",
+        "EventName": "OFFCORE_RESPONSE.ALL_READS.LLC_HIT.HITM_OTHER_CORE",
+        "MSRIndex": "0x1a6,0x1a7",
+        "SampleAfterValue": "100003",
+        "CounterHTOff": "0,1,2,3"
+    },
+    {
+        "Offcore": "1",
+        "EventCode": "0xB7, 0xBB",
+        "UMask": "0x1",
+        "BriefDescription": "Counts all data/code/rfo reads (demand & prefetch) that hit in the L3 and the snoops to sibling cores hit in either E/S state and the line is not forwarded",
+        "MSRValue": "0x04003c07f7",
+        "Counter": "0,1,2,3",
+        "EventName": "OFFCORE_RESPONSE.ALL_READS.LLC_HIT.HIT_OTHER_CORE_NO_FWD",
+        "MSRIndex": "0x1a6,0x1a7",
+        "SampleAfterValue": "100003",
+        "CounterHTOff": "0,1,2,3"
+    },
+    {
+        "Offcore": "1",
+        "EventCode": "0xB7, 0xBB",
+        "UMask": "0x1",
+        "BriefDescription": "Counts all demand & prefetch code reads that hit in the L3 and the snoops to sibling cores hit in either E/S state and the line is not forwarded",
+        "MSRValue": "0x04003c0244",
+        "Counter": "0,1,2,3",
+        "EventName": "OFFCORE_RESPONSE.ALL_CODE_RD.LLC_HIT.HIT_OTHER_CORE_NO_FWD",
+        "MSRIndex": "0x1a6,0x1a7",
+        "SampleAfterValue": "100003",
+        "CounterHTOff": "0,1,2,3"
+    },
+    {
+        "Offcore": "1",
+        "EventCode": "0xB7, 0xBB",
+        "UMask": "0x1",
+        "BriefDescription": "Counts all demand & prefetch RFOs that hit in the L3 and the snoop to one of the sibling cores hits the line in M state and the line is forwarded",
+        "MSRValue": "0x10003c0122",
+        "Counter": "0,1,2,3",
+        "EventName": "OFFCORE_RESPONSE.ALL_RFO.LLC_HIT.HITM_OTHER_CORE",
+        "MSRIndex": "0x1a6,0x1a7",
+        "SampleAfterValue": "100003",
+        "CounterHTOff": "0,1,2,3"
+    },
+    {
+        "Offcore": "1",
+        "EventCode": "0xB7, 0xBB",
+        "UMask": "0x1",
+        "BriefDescription": "Counts all demand & prefetch RFOs that hit in the L3 and the snoops to sibling cores hit in either E/S state and the line is not forwarded",
+        "MSRValue": "0x04003c0122",
+        "Counter": "0,1,2,3",
+        "EventName": "OFFCORE_RESPONSE.ALL_RFO.LLC_HIT.HIT_OTHER_CORE_NO_FWD",
+        "MSRIndex": "0x1a6,0x1a7",
+        "SampleAfterValue": "100003",
+        "CounterHTOff": "0,1,2,3"
+    },
+    {
+        "Offcore": "1",
+        "EventCode": "0xB7, 0xBB",
+        "UMask": "0x1",
+        "BriefDescription": "Counts all demand & prefetch data reads that hit in the L3 and the snoop to one of the sibling cores hits the line in M state and the line is forwarded",
+        "MSRValue": "0x10003c0091",
+        "Counter": "0,1,2,3",
+        "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.LLC_HIT.HITM_OTHER_CORE",
+        "MSRIndex": "0x1a6,0x1a7",
+        "SampleAfterValue": "100003",
+        "CounterHTOff": "0,1,2,3"
+    },
+    {
+        "Offcore": "1",
+        "EventCode": "0xB7, 0xBB",
+        "UMask": "0x1",
+        "BriefDescription": "Counts all demand & prefetch data reads that hit in the L3 and the snoops to sibling cores hit in either E/S state and the line is not forwarded",
+        "MSRValue": "0x04003c0091",
+        "Counter": "0,1,2,3",
+        "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.LLC_HIT.HIT_OTHER_CORE_NO_FWD",
+        "MSRIndex": "0x1a6,0x1a7",
+        "SampleAfterValue": "100003",
+        "CounterHTOff": "0,1,2,3"
+    },
+    {
+        "Offcore": "1",
+        "EventCode": "0xB7, 0xBB",
+        "UMask": "0x1",
+        "BriefDescription": "Counts prefetch (that bring data to LLC only) code reads that hit in the L3",
+        "MSRValue": "0x3f803c0200",
+        "Counter": "0,1,2,3",
+        "EventName": "OFFCORE_RESPONSE.PF_LLC_CODE_RD.LLC_HIT.ANY_RESPONSE",
+        "MSRIndex": "0x1a6,0x1a7",
+        "SampleAfterValue": "100003",
+        "CounterHTOff": "0,1,2,3"
+    },
+    {
+        "Offcore": "1",
+        "EventCode": "0xB7, 0xBB",
+        "UMask": "0x1",
+        "BriefDescription": "Counts all prefetch (that bring data to LLC only) RFOs that hit in the L3",
+        "MSRValue": "0x3f803c0100",
+        "Counter": "0,1,2,3",
+        "EventName": "OFFCORE_RESPONSE.PF_LLC_RFO.LLC_HIT.ANY_RESPONSE",
+        "MSRIndex": "0x1a6,0x1a7",
+        "SampleAfterValue": "100003",
+        "CounterHTOff": "0,1,2,3"
+    },
+    {
+        "Offcore": "1",
+        "EventCode": "0xB7, 0xBB",
+        "UMask": "0x1",
+        "BriefDescription": "Counts all demand data writes (RFOs) that hit in the L3 and the snoop to one of the sibling cores hits the line in M state and the line is forwarded",
+        "MSRValue": "0x10003c0002",
+        "Counter": "0,1,2,3",
+        "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.LLC_HIT.HITM_OTHER_CORE",
+        "MSRIndex": "0x1a6,0x1a7",
+        "SampleAfterValue": "100003",
+        "CounterHTOff": "0,1,2,3"
     }
 ]
\ No newline at end of file
tools/perf/pmu-events/arch/x86/broadwellx/floating-point.json renamed from tools/perf/pmu-events/arch/x86/broadwellde/floating-point.json +0 -0
similarity index 100%
copy from tools/perf/pmu-events/arch/x86/broadwellde/floating-point.json
copy to tools/perf/pmu-events/arch/x86/broadwellx/floating-point.json
tools/perf/pmu-events/arch/x86/broadwellx/frontend.json renamed from tools/perf/pmu-events/arch/x86/broadwellde/frontend.json +0 -0
similarity index 100%
copy from tools/perf/pmu-events/arch/x86/broadwellde/frontend.json
copy to tools/perf/pmu-events/arch/x86/broadwellx/frontend.json
tools/perf/pmu-events/arch/x86/broadwellx/memory.json renamed from tools/perf/pmu-events/arch/x86/broadwellde/memory.json +216 -0

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tools/perf/pmu-events/arch/x86/broadwellx/other.json renamed from tools/perf/pmu-events/arch/x86/broadwellde/other.json +0 -0
similarity index 100%
copy from tools/perf/pmu-events/arch/x86/broadwellde/other.json
copy to tools/perf/pmu-events/arch/x86/broadwellx/other.json
tools/perf/pmu-events/arch/x86/broadwellx/pipeline.json renamed from tools/perf/pmu-events/arch/x86/broadwellde/pipeline.json +0 -0
similarity index 100%
copy from tools/perf/pmu-events/arch/x86/broadwellde/pipeline.json
copy to tools/perf/pmu-events/arch/x86/broadwellx/pipeline.json
tools/perf/pmu-events/arch/x86/broadwellx/virtual-memory.json renamed from tools/perf/pmu-events/arch/x86/broadwellde/virtual-memory.json +0 -0
similarity index 100%
copy from tools/perf/pmu-events/arch/x86/broadwellde/virtual-memory.json
copy to tools/perf/pmu-events/arch/x86/broadwellx/virtual-memory.json
tools/perf/pmu-events/arch/x86/mapfile.csv +1 -0
index e113719..a67726e 100644
@@ -2,3 +2,4 @@ Family-model,Version,Filename,EventType
 GenuineIntel-6-56,v5,broadwellde,core
 GenuineIntel-6-3D,v17,broadwell,core
 GenuineIntel-6-47,v17,broadwell,core
+GenuineIntel-6-4F,v10,broadwellx,core