Add PMIC DT files for sc7280
Subsystems (4)
v2 cover Add PMIC DT files for sc7280
Changes in V2:
- As per Matthias's comments:
- I've Split the patch into per-PMIC patches and one sc7280 patch
- Removed 2nd critical point, thermal-governer property
- s/pm8325_tz/pm7325_temp_alarm and s/pm7325_temp_alarm/pm7325_thermal
- Fixed few other minor errors.
- As per Bjorn's comments, replaced '_' with '-' in node names and moved DT files inclusion to board dts.
This series is dependent on below series which adds DT files for SC7280 SoC
https://lore.kernel.org/patchwork/project/lkml/list/?series=488871
satya priya (5):
arm64: dts: qcom: pm7325: Add PMIC peripherals for pm7325
arm64: dts: qcom: pm8350c: Add PMIC peripherals for pm8350c
arm64: dts: qcom: pmk8350: Add PMIC peripherals for pmk8350
arm64: dts: qcom: pmr735a: Add PMIC peripherals for pmr735a
arm64: dts: sc7280: Include PMIC DT files for sc7280
arch/arm64/boot/dts/qcom/pm7325.dtsi | 53 +++++++++++++++++ arch/arm64/boot/dts/qcom/pm8350c.dtsi | 53 +++++++++++++++++ arch/arm64/boot/dts/qcom/pmk8350.dtsi | 100 ++++++++++++++++++++++++++++++++ arch/arm64/boot/dts/qcom/pmr735a.dtsi | 53 +++++++++++++++++ arch/arm64/boot/dts/qcom/sc7280-idp.dts | 4 ++ arch/arm64/boot/dts/qcom/sc7280.dtsi | 3 + 6 files changed, 266 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/pm7325.dtsi create mode 100644 arch/arm64/boot/dts/qcom/pm8350c.dtsi create mode 100644 arch/arm64/boot/dts/qcom/pmk8350.dtsi create mode 100644 arch/arm64/boot/dts/qcom/pmr735a.dtsi
Signature · 2 lines
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation
PATCH v2 1/5 arm64: dts: qcom: pm7325: Add PMIC peripherals for pm7325
Add temp-alarm and GPIO support for pm7325.
--- arch/arm64/boot/dts/qcom/pm7325.dtsi | 53 ++++++++++++++++++++++++++++++++++++ 1 file changed, 53 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/pm7325.dtsi
arch/arm64/boot/dts/qcom/pm7325.dtsi new file +53 -0
@@ -0,0 +1,53 @@ +// SPDX-License-Identifier: BSD-3-Clause +// Copyright (c) 2021, The Linux Foundation. All rights reserved. + +#include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/spmi/spmi.h> + +&spmi_bus { + pm7325: pmic@1 { + compatible = "qcom,pm7325", "qcom,spmi-pmic"; + reg = <0x1 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + + pm7325_temp_alarm: temp-alarm@a00 { + compatible = "qcom,spmi-temp-alarm"; + reg = <0xa00>; + interrupts = <0x1 0xa 0x0 IRQ_TYPE_EDGE_BOTH>; + #thermal-sensor-cells = <0>; + }; + + pm7325_gpios: gpios@8800 { + compatible = "qcom,pm7325-gpio", "qcom,spmi-gpio"; + reg = <0x8800>; + gpio-controller; + gpio-ranges = <&pm7325_gpios 0 0 10>; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + }; +}; + +&thermal_zones { + pm7325_thermal: pm7325-thermal { + polling-delay-passive = <100>; + polling-delay = <0>; + thermal-sensors = <&pm7325_temp_alarm>; + + trips { + pm7325_trip0: trip0 { + temperature = <95000>; + hysteresis = <0>; + type = "passive"; + }; + + pm7325_trip1: trip1 { + temperature = <115000>; + hysteresis = <0>; + type = "critical"; + }; + }; + }; +};
Signature · 2 lines
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation
Re: [PATCH V2 1/5] arm64: dts: qcom: pm7325: Add PMIC peripherals for pm7325
Quoted 1 line · satya priya
subject: arm64: dts: qcom: pm7325: Add PMIC peripherals for pm7325
nit: maybe just 'arm64: dts: qcom: Add pm7325 support/.dtsi' or similar?
Quoted 1 line
Add temp-alarm and GPIO support for pm7325.
nit: it's more than that, you are adding the .dtsi for the PMIC itself.
Quoted 12 lines
Signed-off-by satya priya <[email protected]>--- arch/arm64/boot/dts/qcom/pm7325.dtsi | 53 ++++++++++++++++++++++++++++++++++++ 1 file changed, 53 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/pm7325.dtsiarch/arm64/boot/dts/qcom/pm7325.dtsi new file +0
-0
arch/arm64/boot/dts/qcom/pm7325.dtsi line 9
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arch/arm64/boot/dts/qcom/pm7325.dtsi new file +9
-0@@ -0,0 +1,53 @@ +// SPDX-License-Identifier: BSD-3-Clause +// Copyright (c) 2021, The Linux Foundation. All rights reserved. + +#include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/spmi/spmi.h> + +&spmi_bus { + pm7325: pmic@1 { + compatible = "qcom,pm7325", "qcom,spmi-pmic";
I saw the patches that add the compatible strings for the GPIOs, but can't find those that add the strings for the PMICs themselves. Could you provide a link if they have been sent already?
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arch/arm64/boot/dts/qcom/pm7325.dtsi new file +27
-0+ reg = <0x1 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + + pm7325_temp_alarm: temp-alarm@a00 { + compatible = "qcom,spmi-temp-alarm"; + reg = <0xa00>; + interrupts = <0x1 0xa 0x0 IRQ_TYPE_EDGE_BOTH>; + #thermal-sensor-cells = <0>; + }; + + pm7325_gpios: gpios@8800 { + compatible = "qcom,pm7325-gpio", "qcom,spmi-gpio"; + reg = <0x8800>; + gpio-controller; + gpio-ranges = <&pm7325_gpios 0 0 10>; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + }; +}; + +&thermal_zones { + pm7325_thermal: pm7325-thermal { + polling-delay-passive = <100>; + polling-delay = <0>;
arch/arm64/boot/dts/qcom/pm7325.dtsi line 46
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arch/arm64/boot/dts/qcom/pm7325.dtsi new file +10
-0+ thermal-sensors = <&pm7325_temp_alarm>; + + trips { + pm7325_trip0: trip0 { + temperature = <95000>; + hysteresis = <0>; + type = "passive"; + }; + + pm7325_trip1: trip1 {
nit: the critical trip point is often named <name>-crit. One reason for this could be that it allows to add other non-critical trip points (in the .dtsi itself or the <board>.dts), without messing up the enumeration scheme.
Quoted 7 lines
arch/arm64/boot/dts/qcom/pm7325.dtsi new file +7
-0+ temperature = <115000>; + hysteresis = <0>; + type = "critical"; + }; + }; + }; +};
Re: [PATCH V2 1/5] arm64: dts: qcom: pm7325: Add PMIC peripherals for pm7325
Quoted 36 lines · Matthias Kaehlcke
Quoted 1 line · satya priya
subject: arm64: dts: qcom: pm7325: Add PMIC peripherals for pm7325
nit: maybe just 'arm64: dts: qcom: Add pm7325 support/.dtsi' or similar?
Quoted 1 line
Add temp-alarm and GPIO support for pm7325.
nit: it's more than that, you are adding the .dtsi for the PMIC itself.
Quoted 12 lines
Signed-off-by satya priya <[email protected]>--- arch/arm64/boot/dts/qcom/pm7325.dtsi | 53 ++++++++++++++++++++++++++++++++++++ 1 file changed, 53 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/pm7325.dtsiarch/arm64/boot/dts/qcom/pm7325.dtsi new file +0
-0arch/arm64/boot/dts/qcom/pm7325.dtsi line 9
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arch/arm64/boot/dts/qcom/pm7325.dtsi new file +9
-0@@ -0,0 +1,53 @@ +// SPDX-License-Identifier: BSD-3-Clause +// Copyright (c) 2021, The Linux Foundation. All rights reserved. + +#include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/spmi/spmi.h> + +&spmi_bus { + pm7325: pmic@1 { + compatible = "qcom,pm7325", "qcom,spmi-pmic";I saw the patches that add the compatible strings for the GPIOs, but can't find those that add the strings for the PMICs themselves. Could you provide a link if they have been sent already?
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arch/arm64/boot/dts/qcom/pm7325.dtsi new file +6
-0+ reg = <0x1 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + + pm7325_temp_alarm: temp-alarm@a00 { + compatible = "qcom,spmi-temp-alarm";arch/arm64/boot/dts/qcom/pm7325.dtsi line 25
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arch/arm64/boot/dts/qcom/pm7325.dtsi new file +10
-0+ reg = <0xa00>; + interrupts = <0x1 0xa 0x0 IRQ_TYPE_EDGE_BOTH>; + #thermal-sensor-cells = <0>; + }; + + pm7325_gpios: gpios@8800 { + compatible = "qcom,pm7325-gpio", "qcom,spmi-gpio"; + reg = <0x8800>; + gpio-controller; + gpio-ranges = <&pm7325_gpios 0 0 10>;
The GPIO enumeration is a bit confusing. The pm7325 has GPIO_01 to GPIO_10, however IIUC they are mapped such that under Linux enumeration starts with 0. I guess it makes sense to start with 0 and it's done consistently for 'qcom,spmi-gpio', but it's something that must be taken into account when using/configuring those GPIOs.
Re: [PATCH V2 1/5] arm64: dts: qcom: pm7325: Add PMIC peripherals for pm7325
Quoted 51 lines · Matthias Kaehlcke
Quoted 50 lines · Matthias Kaehlcke
Quoted 1 line · satya priya
subject: arm64: dts: qcom: pm7325: Add PMIC peripherals for pm7325
nit: maybe just 'arm64: dts: qcom: Add pm7325 support/.dtsi' or similar?
Quoted 1 line
Add temp-alarm and GPIO support for pm7325.
nit: it's more than that, you are adding the .dtsi for the PMIC itself.
Quoted 12 lines
Signed-off-by satya priya <[email protected]>--- arch/arm64/boot/dts/qcom/pm7325.dtsi | 53 ++++++++++++++++++++++++++++++++++++ 1 file changed, 53 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/pm7325.dtsiarch/arm64/boot/dts/qcom/pm7325.dtsi new file +0
-0arch/arm64/boot/dts/qcom/pm7325.dtsi line 9
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arch/arm64/boot/dts/qcom/pm7325.dtsi new file +9
-0@@ -0,0 +1,53 @@ +// SPDX-License-Identifier: BSD-3-Clause +// Copyright (c) 2021, The Linux Foundation. All rights reserved. + +#include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/spmi/spmi.h> + +&spmi_bus { + pm7325: pmic@1 { + compatible = "qcom,pm7325", "qcom,spmi-pmic";I saw the patches that add the compatible strings for the GPIOs, but can't find those that add the strings for the PMICs themselves. Could you provide a link if they have been sent already?
Quoted 14 lines
arch/arm64/boot/dts/qcom/pm7325.dtsi new file +14
-0+ reg = <0x1 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + + pm7325_temp_alarm: temp-alarm@a00 { + compatible = "qcom,spmi-temp-alarm"; + reg = <0xa00>; + interrupts = <0x1 0xa 0x0 IRQ_TYPE_EDGE_BOTH>; + #thermal-sensor-cells = <0>; + }; + + pm7325_gpios: gpios@8800 { + compatible = "qcom,pm7325-gpio", "qcom,spmi-gpio"; + reg = <0x8800>;
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arch/arm64/boot/dts/qcom/pm7325.dtsi line 25
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arch/arm64/boot/dts/qcom/pm7325.dtsi new file +2
-0+ gpio-controller; + gpio-ranges = <&pm7325_gpios 0 0 10>;The GPIO enumeration is a bit confusing. The pm7325 has
GPIO_01toGPIO_10, however IIUC they are mapped such that under Linux enumeration starts with 0. I guess it makes sense to start with 0 and it's done consistently for 'qcom,spmi-gpio', but it's something that must be taken into account when using/configuring those GPIOs.
Sure, will take care of this while configuring the GPIOs.
Re: [PATCH V2 1/5] arm64: dts: qcom: pm7325: Add PMIC peripherals for pm7325
In reply to Matthias KaehlckeHi Matthias,
Quoted 10 lines · Matthias Kaehlcke
Quoted 1 line · satya priya
subject: arm64: dts: qcom: pm7325: Add PMIC peripherals for pm7325
nit: maybe just 'arm64: dts: qcom: Add pm7325 support/.dtsi' or similar?
Quoted 1 line
Add temp-alarm and GPIO support for pm7325.
nit: it's more than that, you are adding the .dtsi for the PMIC itself.
Okay, will change the commit text.
Quoted 18 lines
Quoted 18 lines
Signed-off-by satya priya <[email protected]>--- arch/arm64/boot/dts/qcom/pm7325.dtsi | 53 ++++++++++++++++++++++++++++++++++++ 1 file changed, 53 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/pm7325.dtsiarch/arm64/boot/dts/qcom/pm7325.dtsi new file +5
-0@@ -0,0 +1,53 @@ +// SPDX-License-Identifier: BSD-3-Clause +// Copyright (c) 2021, The Linux Foundation. All rights reserved. + +#include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/spmi/spmi.h>
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arch/arm64/boot/dts/qcom/pm7325.dtsi line 9
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arch/arm64/boot/dts/qcom/pm7325.dtsi new file +4
-0+ +&spmi_bus { + pm7325: pmic@1 { + compatible = "qcom,pm7325", "qcom,spmi-pmic";I saw the patches that add the compatible strings for the GPIOs, but can't find those that add the strings for the PMICs themselves. Could you provide a link if they have been sent already?
They are not sent yet, qcom,spmi-pmic.txt file conversion to yaml [1] is currently on hold as all the child node bindings needs to be converted to yaml first. Once that is done we can add these strings.
[1] https://lore.kernel.org/patchwork/patch/1359552/
Quoted 34 lines
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arch/arm64/boot/dts/qcom/pm7325.dtsi new file +34
-0+ reg = <0x1 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + + pm7325_temp_alarm: temp-alarm@a00 { + compatible = "qcom,spmi-temp-alarm"; + reg = <0xa00>; + interrupts = <0x1 0xa 0x0 IRQ_TYPE_EDGE_BOTH>; + #thermal-sensor-cells = <0>; + }; + + pm7325_gpios: gpios@8800 { + compatible = "qcom,pm7325-gpio", "qcom,spmi-gpio"; + reg = <0x8800>; + gpio-controller; + gpio-ranges = <&pm7325_gpios 0 0 10>; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + }; +}; + +&thermal_zones { + pm7325_thermal: pm7325-thermal { + polling-delay-passive = <100>; + polling-delay = <0>; + thermal-sensors = <&pm7325_temp_alarm>; + + trips { + pm7325_trip0: trip0 { + temperature = <95000>; + hysteresis = <0>; + type = "passive";
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arch/arm64/boot/dts/qcom/pm7325.dtsi line 46
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arch/arm64/boot/dts/qcom/pm7325.dtsi new file +3
-0+ }; + + pm7325_trip1: trip1 {nit: the critical trip point is often named <name>-crit. One reason for this could be that it allows to add other non-critical trip points (in the .dtsi itself or the <board>.dts), without messing up the enumeration scheme.
ok.
Quoted 7 lines
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arch/arm64/boot/dts/qcom/pm7325.dtsi new file +7
-0+ temperature = <115000>; + hysteresis = <0>; + type = "critical"; + }; + }; + }; +};
PATCH v2 2/5 arm64: dts: qcom: pm8350c: Add PMIC peripherals for pm8350c
In reply to satya priyaAdd temp-alarm and GPIO support for pm8350c.
--- arch/arm64/boot/dts/qcom/pm8350c.dtsi | 53 +++++++++++++++++++++++++++++++++++ 1 file changed, 53 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/pm8350c.dtsi
arch/arm64/boot/dts/qcom/pm8350c.dtsi new file +53 -0
@@ -0,0 +1,53 @@ +// SPDX-License-Identifier: BSD-3-Clause +// Copyright (c) 2021, The Linux Foundation. All rights reserved. + +#include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/spmi/spmi.h> + +&spmi_bus { + pm8350c: pmic@2 { + compatible = "qcom,pm8350c", "qcom,spmi-pmic"; + reg = <0x2 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + + pm8350c_temp_alarm: temp-alarm@a00 { + compatible = "qcom,spmi-temp-alarm"; + reg = <0xa00>; + interrupts = <0x2 0xa 0x0 IRQ_TYPE_EDGE_BOTH>; + #thermal-sensor-cells = <0>; + }; + + pm8350c_gpios: gpios@8800 { + compatible = "qcom,pm8350c-gpio", "qcom,spmi-gpio"; + reg = <0x8800>; + gpio-controller; + gpio-ranges = <&pm8350c_gpios 0 0 9>; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + }; +}; + +&thermal_zones { + pm8350c_thermal: pm8350c-thermal { + polling-delay-passive = <100>; + polling-delay = <0>; + thermal-sensors = <&pm8350c_temp_alarm>; + + trips { + pm8350c_trip0: trip0 { + temperature = <95000>; + hysteresis = <0>; + type = "passive"; + }; + + pm8350c_trip1: trip1 { + temperature = <115000>; + hysteresis = <0>; + type = "critical"; + }; + }; + }; +};
Signature · 2 lines
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation
PATCH v2 3/5 arm64: dts: qcom: pmk8350: Add PMIC peripherals for pmk8350
In reply to satya priyaAdd PON, GPIO, RTC and other PMIC infra modules support for pmk8350.
--- arch/arm64/boot/dts/qcom/pmk8350.dtsi | 100 ++++++++++++++++++++++++++++++++++ 1 file changed, 100 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/pmk8350.dtsi
arch/arm64/boot/dts/qcom/pmk8350.dtsi new file +100 -0
@@ -0,0 +1,100 @@ +// SPDX-License-Identifier: BSD-3-Clause +// Copyright (c) 2021, The Linux Foundation. All rights reserved. + +#include <dt-bindings/input/input.h> +#include <dt-bindings/input/linux-event-codes.h> +#include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/spmi/spmi.h> +#include <dt-bindings/iio/qcom,spmi-adc7-pm8350.h> +#include <dt-bindings/iio/qcom,spmi-adc7-pmk8350.h> +#include <dt-bindings/iio/qcom,spmi-adc7-pmr735a.h> +#include <dt-bindings/iio/qcom,spmi-adc7-pmr735b.h> + +&spmi_bus { + pmk8350: pmic@0 { + compatible = "qcom,pmk8350", "qcom,spmi-pmic"; + reg = <0x0 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + + pmk8350_pon: pon@1300 { + compatible = "qcom,pm8998-pon"; + reg = <0x1300>; + + pwrkey { + compatible = "qcom,pmk8350-pwrkey"; + interrupts = <0x0 0x13 0x7 IRQ_TYPE_EDGE_BOTH>; + linux,code = <KEY_POWER>; + }; + + resin { + compatible = "qcom,pmk8350-resin"; + interrupts = <0x0 0x13 0x6 IRQ_TYPE_EDGE_BOTH>; + linux,code = <KEY_VOLUMEDOWN>; + }; + }; + + pmk8350_vadc: adc@3100 { + compatible = "qcom,spmi-adc7"; + reg = <0x3100>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <0x0 0x31 0x0 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "eoc-int-en-set"; + #io-channel-cells = <1>; + io-channel-ranges; + + pmk8350_die_temp { + reg = <PMK8350_ADC7_DIE_TEMP>; + label = "pmk8350_die_temp"; + qcom,pre-scaling = <1 1>; + }; + + pm8350_die_temp { + reg = <PM8350_ADC7_DIE_TEMP>; + label = "pm8350_die_temp"; + qcom,pre-scaling = <1 1>; + }; + + pmr735a_die_temp { + reg = <PMR735A_ADC7_DIE_TEMP>; + label = "pmr735a_die_temp"; + qcom,pre-scaling = <1 1>; + }; + + pmr735b_die_temp { + reg = <PMR735B_ADC7_DIE_TEMP>; + label = "pmr735b_die_temp"; + qcom,pre-scaling = <1 1>; + }; + }; + + pmk8350_adc_tm: adc-tm@3400 { + compatible = "qcom,adc-tm7"; + reg = <0x3400>; + interrupts = <0x0 0x34 0x0 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "threshold"; + #address-cells = <1>; + #size-cells = <0>; + #thermal-sensor-cells = <1>; + status = "disabled"; + }; + + pmk8350_gpios: gpios@b000 { + compatible = "qcom,pmk8350-gpio", "qcom,spmi-gpio"; + reg = <0xb000>; + gpio-controller; + gpio-ranges = <&pmk8350_gpios 0 0 4>; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + + pmk8350_rtc: rtc@6100 { + compatible = "qcom,pmk8350-rtc"; + reg = <0x6100>, <0x6200>; + reg-names = "rtc", "alarm"; + interrupts = <0x0 0x62 0x1 IRQ_TYPE_EDGE_RISING>; + }; + }; +};
Signature · 2 lines
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation
Re: [PATCH V2 3/5] arm64: dts: qcom: pmk8350: Add PMIC peripherals for pmk8350
Quoted 1 line · satya priya
subject: arm64: dts: qcom: pmk8350: Add PMIC peripherals for pmk8350
same nit as for 1/5: maybe just 'arm64: dts: qcom: Add pml7350 support/.dtsi' or similar since this adds the initial .dtsi for the pmk8350?
Quoted 1 line
Add PON, GPIO, RTC and other PMIC infra modules support for pmk8350.
nit: also mention that it adds the pmk8350 .dtsi in the first place.
Quoted 17 lines
Signed-off-by satya priya <[email protected]>--- arch/arm64/boot/dts/qcom/pmk8350.dtsi | 100 ++++++++++++++++++++++++++++++++++ 1 file changed, 100 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/pmk8350.dtsiarch/arm64/boot/dts/qcom/pmk8350.dtsi new file +5
-0@@ -0,0 +1,100 @@ +// SPDX-License-Identifier: BSD-3-Clause +// Copyright (c) 2021, The Linux Foundation. All rights reserved. + +#include <dt-bindings/input/input.h> +#include <dt-bindings/input/linux-event-codes.h>
arch/arm64/boot/dts/qcom/pmk8350.dtsi line 15
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arch/arm64/boot/dts/qcom/pmk8350.dtsi new file +10
-0+#include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/spmi/spmi.h> +#include <dt-bindings/iio/qcom,spmi-adc7-pm8350.h> +#include <dt-bindings/iio/qcom,spmi-adc7-pmk8350.h> +#include <dt-bindings/iio/qcom,spmi-adc7-pmr735a.h> +#include <dt-bindings/iio/qcom,spmi-adc7-pmr735b.h> + +&spmi_bus { + pmk8350: pmic@0 { + compatible = "qcom,pmk8350", "qcom,spmi-pmic";
Please provide a link to the binding if it has been sent.
Quoted 9 lines
arch/arm64/boot/dts/qcom/pmk8350.dtsi new file +9
-0+ reg = <0x0 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + + pmk8350_pon: pon@1300 { + compatible = "qcom,pm8998-pon"; + reg = <0x1300>; + + pwrkey {
arch/arm64/boot/dts/qcom/pmk8350.dtsi line 34
Quoted 10 lines
arch/arm64/boot/dts/qcom/pmk8350.dtsi new file +10
-0+ compatible = "qcom,pmk8350-pwrkey"; + interrupts = <0x0 0x13 0x7 IRQ_TYPE_EDGE_BOTH>; + linux,code = <KEY_POWER>; + }; + + resin { + compatible = "qcom,pmk8350-resin"; + interrupts = <0x0 0x13 0x6 IRQ_TYPE_EDGE_BOTH>; + linux,code = <KEY_VOLUMEDOWN>; + };
Is the usage of this keys really universal across different boards?
At least for the volume down key for most PMICs the config is in the board file, which seems to make more sense.
Quoted 13 lines
arch/arm64/boot/dts/qcom/pmk8350.dtsi new file +13
-0+ }; + + pmk8350_vadc: adc@3100 { + compatible = "qcom,spmi-adc7"; + reg = <0x3100>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <0x0 0x31 0x0 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "eoc-int-en-set"; + #io-channel-cells = <1>; + io-channel-ranges; + + pmk8350_die_temp {
arch/arm64/boot/dts/qcom/pmk8350.dtsi line 57
Quoted 10 lines
arch/arm64/boot/dts/qcom/pmk8350.dtsi new file +10
-0+ reg = <PMK8350_ADC7_DIE_TEMP>; + label = "pmk8350_die_temp"; + qcom,pre-scaling = <1 1>; + }; + + pm8350_die_temp { + reg = <PM8350_ADC7_DIE_TEMP>; + label = "pm8350_die_temp"; + qcom,pre-scaling = <1 1>; + };
nit: I think this should be 'alphabetical' order, so 'pm8350_die_temp' should be before 'pmk8350_die_temp'.
arch/arm64/boot/dts/qcom/pmk8350.dtsi line 69
Quoted 12 lines
arch/arm64/boot/dts/qcom/pmk8350.dtsi new file +12
-0+ + pmr735a_die_temp { + reg = <PMR735A_ADC7_DIE_TEMP>; + label = "pmr735a_die_temp"; + qcom,pre-scaling = <1 1>; + }; + + pmr735b_die_temp { + reg = <PMR735B_ADC7_DIE_TEMP>; + label = "pmr735b_die_temp"; + qcom,pre-scaling = <1 1>; + };
Is it guaranteed that a board with the pmk8350 will always have the other 3 PMICs?
Quoted 14 lines
arch/arm64/boot/dts/qcom/pmk8350.dtsi new file +14
-0+ }; + + pmk8350_adc_tm: adc-tm@3400 { + compatible = "qcom,adc-tm7"; + reg = <0x3400>; + interrupts = <0x0 0x34 0x0 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "threshold"; + #address-cells = <1>; + #size-cells = <0>; + #thermal-sensor-cells = <1>; + status = "disabled"; + }; + + pmk8350_gpios: gpios@b000 {
arch/arm64/boot/dts/qcom/pmk8350.dtsi line 93
Quoted 10 lines
arch/arm64/boot/dts/qcom/pmk8350.dtsi new file +10
-0+ compatible = "qcom,pmk8350-gpio", "qcom,spmi-gpio"; + reg = <0xb000>; + gpio-controller; + gpio-ranges = <&pmk8350_gpios 0 0 4>; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + + pmk8350_rtc: rtc@6100 {
nit: nodes should be ordered by address, hence 'rtc@6100' should be before 'gpios@b000'.
Quoted 7 lines
arch/arm64/boot/dts/qcom/pmk8350.dtsi new file +7
-0+ compatible = "qcom,pmk8350-rtc"; + reg = <0x6100>, <0x6200>; + reg-names = "rtc", "alarm"; + interrupts = <0x0 0x62 0x1 IRQ_TYPE_EDGE_RISING>; + }; + }; +};
Re: [PATCH V2 3/5] arm64: dts: qcom: pmk8350: Add PMIC peripherals for pmk8350
Quoted 8 lines · Matthias Kaehlcke
Quoted 1 line · satya priya
subject: arm64: dts: qcom: pmk8350: Add PMIC peripherals for pmk8350
same nit as for 1/5: maybe just 'arm64: dts: qcom: Add pml7350 support/.dtsi' or similar since this adds the initial .dtsi for the pmk8350?
Quoted 1 line
Add PON, GPIO, RTC and other PMIC infra modules support for pmk8350.
I see that pmk8350 DT file is already added in linux-next.
Only GPIO node has been added, will add remaining nodes and change commit text accordingly.
Quoted 46 lines
nit: also mention that it adds the pmk8350 .dtsi in the first place.
Quoted 18 lines
Signed-off-by satya priya <[email protected]>--- arch/arm64/boot/dts/qcom/pmk8350.dtsi | 100 ++++++++++++++++++++++++++++++++++ 1 file changed, 100 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/pmk8350.dtsiarch/arm64/boot/dts/qcom/pmk8350.dtsi new file +5
-0@@ -0,0 +1,100 @@ +// SPDX-License-Identifier: BSD-3-Clause +// Copyright (c) 2021, The Linux Foundation. All rights reserved. + +#include <dt-bindings/input/input.h> +#include <dt-bindings/input/linux-event-codes.h>arch/arm64/boot/dts/qcom/pmk8350.dtsi line 15
Quoted 10 lines
arch/arm64/boot/dts/qcom/pmk8350.dtsi new file +10
-0+#include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/spmi/spmi.h> +#include <dt-bindings/iio/qcom,spmi-adc7-pm8350.h> +#include <dt-bindings/iio/qcom,spmi-adc7-pmk8350.h> +#include <dt-bindings/iio/qcom,spmi-adc7-pmr735a.h> +#include <dt-bindings/iio/qcom,spmi-adc7-pmr735b.h> + +&spmi_bus { + pmk8350: pmic@0 { + compatible = "qcom,pmk8350", "qcom,spmi-pmic";Please provide a link to the binding if it has been sent.
Quoted 13 lines
arch/arm64/boot/dts/qcom/pmk8350.dtsi new file +13
-0+ reg = <0x0 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + + pmk8350_pon: pon@1300 { + compatible = "qcom,pm8998-pon"; + reg = <0x1300>; + + pwrkey { + compatible = "qcom,pmk8350-pwrkey"; + interrupts = <0x0 0x13 0x7 IRQ_TYPE_EDGE_BOTH>; + linux,code = <KEY_POWER>; + };
Quoted 9 lines
arch/arm64/boot/dts/qcom/pmk8350.dtsi line 34
Quoted 6 lines
arch/arm64/boot/dts/qcom/pmk8350.dtsi new file +6
-0+ + resin { + compatible = "qcom,pmk8350-resin"; + interrupts = <0x0 0x13 0x6 IRQ_TYPE_EDGE_BOTH>; + linux,code = <KEY_VOLUMEDOWN>; + };Is the usage of this keys really universal across different boards?
Yes, It is universal across different boards.
Quoted 21 lines
At least for the volume down key for most PMICs the config is in the board file, which seems to make more sense.
Quoted 18 lines
arch/arm64/boot/dts/qcom/pmk8350.dtsi new file +18
-0+ }; + + pmk8350_vadc: adc@3100 { + compatible = "qcom,spmi-adc7"; + reg = <0x3100>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <0x0 0x31 0x0 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "eoc-int-en-set"; + #io-channel-cells = <1>; + io-channel-ranges; + + pmk8350_die_temp { + reg = <PMK8350_ADC7_DIE_TEMP>; + label = "pmk8350_die_temp"; + qcom,pre-scaling = <1 1>; + }; +
Quoted 9 lines
arch/arm64/boot/dts/qcom/pmk8350.dtsi line 57
Quoted 5 lines
arch/arm64/boot/dts/qcom/pmk8350.dtsi new file +5
-0+ pm8350_die_temp { + reg = <PM8350_ADC7_DIE_TEMP>; + label = "pm8350_die_temp"; + qcom,pre-scaling = <1 1>; + };nit: I think this should be 'alphabetical' order, so '
pm8350_die_temp' should be before 'pmk8350_die_temp'.
Ok.
Quoted 7 lines
Quoted 7 lines
arch/arm64/boot/dts/qcom/pmk8350.dtsi new file +7
-0+ + pmr735a_die_temp { + reg = <PMR735A_ADC7_DIE_TEMP>; + label = "pmr735a_die_temp"; + qcom,pre-scaling = <1 1>; + }; +
Quoted 9 lines
arch/arm64/boot/dts/qcom/pmk8350.dtsi line 69
Quoted 5 lines
arch/arm64/boot/dts/qcom/pmk8350.dtsi new file +5
-0+ pmr735b_die_temp { + reg = <PMR735B_ADC7_DIE_TEMP>; + label = "pmr735b_die_temp"; + qcom,pre-scaling = <1 1>; + };Is it guaranteed that a board with the pmk8350 will always have the other 3 PMICs?
No.
Ok, will move this to idp board dts file.
Quoted 19 lines
Quoted 19 lines
arch/arm64/boot/dts/qcom/pmk8350.dtsi new file +19
-0+ }; + + pmk8350_adc_tm: adc-tm@3400 { + compatible = "qcom,adc-tm7"; + reg = <0x3400>; + interrupts = <0x0 0x34 0x0 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "threshold"; + #address-cells = <1>; + #size-cells = <0>; + #thermal-sensor-cells = <1>; + status = "disabled"; + }; + + pmk8350_gpios: gpios@b000 { + compatible = "qcom,pmk8350-gpio", "qcom,spmi-gpio"; + reg = <0xb000>; + gpio-controller; + gpio-ranges = <&pmk8350_gpios 0 0 4>; + #gpio-cells = <2>;
Quoted 9 lines
arch/arm64/boot/dts/qcom/pmk8350.dtsi line 93
Quoted 5 lines
arch/arm64/boot/dts/qcom/pmk8350.dtsi new file +5
-0+ interrupt-controller; + #interrupt-cells = <2>; + }; + + pmk8350_rtc: rtc@6100 {nit: nodes should be ordered by address, hence 'rtc@6100' should be before 'gpios@b000'.
Ok.
Quoted 7 lines
Quoted 7 lines
arch/arm64/boot/dts/qcom/pmk8350.dtsi new file +7
-0+ compatible = "qcom,pmk8350-rtc"; + reg = <0x6100>, <0x6200>; + reg-names = "rtc", "alarm"; + interrupts = <0x0 0x62 0x1 IRQ_TYPE_EDGE_RISING>; + }; + }; +};
PATCH v2 4/5 arm64: dts: qcom: pmr735a: Add PMIC peripherals for pmr735a
In reply to satya priyaAdd temp-alarm and GPIO support for pmr735a.
--- arch/arm64/boot/dts/qcom/pmr735a.dtsi | 53 +++++++++++++++++++++++++++++++++++ 1 file changed, 53 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/pmr735a.dtsi
arch/arm64/boot/dts/qcom/pmr735a.dtsi new file +53 -0
@@ -0,0 +1,53 @@ +// SPDX-License-Identifier: BSD-3-Clause +// Copyright (c) 2021, The Linux Foundation. All rights reserved. + +#include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/spmi/spmi.h> + +&spmi_bus { + pmr735a: pmic@4 { + compatible = "qcom,pmr735a", "qcom,spmi-pmic"; + reg = <0x4 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + + pmr735a_temp_alarm: temp-alarm@a00 { + compatible = "qcom,spmi-temp-alarm"; + reg = <0xa00>; + interrupts = <0x4 0xa 0x0 IRQ_TYPE_EDGE_BOTH>; + #thermal-sensor-cells = <0>; + }; + + pmr735a_gpios: gpios@8800 { + compatible = "qcom,pmr735a-gpio", "qcom,spmi-gpio"; + reg = <0x8800>; + gpio-controller; + gpio-ranges = <&pmr735a_gpios 0 0 4>; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + }; +}; + +&thermal_zones { + pmr735a_thermal: pmr735a-thermal { + polling-delay-passive = <100>; + polling-delay = <0>; + thermal-sensors = <&pmr735a_temp_alarm>; + + trips { + pmr735a_trip0: trip0 { + temperature = <95000>; + hysteresis = <0>; + type = "passive"; + }; + + pmr735a_trip1: trip1 { + temperature = <115000>; + hysteresis = <0>; + type = "critical"; + }; + }; + }; +};
Signature · 2 lines
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation
Re: [PATCH V2 4/5] arm64: dts: qcom: pmr735a: Add PMIC peripherals for pmr735a
Same comments as '[1/5] arm64: dts: qcom: pm7325: Add PMIC peripherals for pm7325', plus another nit:
'[3/5] arm64: dts: qcom: pmk8350: Add PMIC peripherals for pmk8350' has an ADC config for the die temperature of the pmr735a, hence it seems this patch should be before the 'pmk8350' one in this series.
Quoted 71 lines · satya priya
Add temp-alarm and GPIO support for pmr735a.
Signed-off-by satya priya <[email protected]>--- arch/arm64/boot/dts/qcom/pmr735a.dtsi | 53 +++++++++++++++++++++++++++++++++++ 1 file changed, 53 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/pmr735a.dtsiarch/arm64/boot/dts/qcom/pmr735a.dtsi new file +53
-0@@ -0,0 +1,53 @@ +// SPDX-License-Identifier: BSD-3-Clause +// Copyright (c) 2021, The Linux Foundation. All rights reserved. + +#include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/spmi/spmi.h> + +&spmi_bus { + pmr735a: pmic@4 { + compatible = "qcom,pmr735a", "qcom,spmi-pmic"; + reg = <0x4 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + + pmr735a_temp_alarm: temp-alarm@a00 { + compatible = "qcom,spmi-temp-alarm"; + reg = <0xa00>; + interrupts = <0x4 0xa 0x0 IRQ_TYPE_EDGE_BOTH>; + #thermal-sensor-cells = <0>; + }; + + pmr735a_gpios: gpios@8800 { + compatible = "qcom,pmr735a-gpio", "qcom,spmi-gpio"; + reg = <0x8800>; + gpio-controller; + gpio-ranges = <&pmr735a_gpios 0 0 4>; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + }; +}; + +&thermal_zones { + pmr735a_thermal: pmr735a-thermal { + polling-delay-passive = <100>; + polling-delay = <0>; + thermal-sensors = <&pmr735a_temp_alarm>; + + trips { + pmr735a_trip0: trip0 { + temperature = <95000>; + hysteresis = <0>; + type = "passive"; + }; + + pmr735a_trip1: trip1 { + temperature = <115000>; + hysteresis = <0>; + type = "critical"; + }; + }; + }; +};Signature · 2 lines
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation
Re: [PATCH V2 4/5] arm64: dts: qcom: pmr735a: Add PMIC peripherals for pmr735a
Quoted 7 lines · Matthias Kaehlcke
Same comments as '[1/5] arm64: dts: qcom: pm7325: Add PMIC peripherals for pm7325', plus another nit:
'[3/5] arm64: dts: qcom: pmk8350: Add PMIC peripherals for pmk8350' has an ADC config for the die temperature of the pmr735a, hence it seems this patch should be before the 'pmk8350' one in this series.
Okay.
Quoted 5 lines · satya priya
Quoted 4 lines
Add temp-alarm and GPIO support for pmr735a.
Signed-off-by satya priya <[email protected]>---
PATCH v2 5/5 arm64: dts: sc7280: Include PMIC DT files for sc7280
In reply to satya priyaInclude pm7325, pm8350c, pmk8350 and pmr735a DT files. Also add thermal-zones node.
--- arch/arm64/boot/dts/qcom/sc7280-idp.dts | 4 ++++ arch/arm64/boot/dts/qcom/sc7280.dtsi | 3 +++ 2 files changed, 7 insertions(+)
arch/arm64/boot/dts/qcom/sc7280-idp.dts +4 -0
@@ -8,6 +8,10 @@ /dts-v1/; #include "sc7280.dtsi" +#include "pm7325.dtsi" +#include "pm8350c.dtsi" +#include "pmk8350.dtsi" +#include "pmr735a.dtsi" / { model = "Qualcomm Technologies, Inc. sc7280 IDP platform";
arch/arm64/boot/dts/qcom/sc7280.dtsi +3 -0
@@ -605,4 +605,7 @@ <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>, <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>; }; + + thermal_zones: thermal-zones { + }; };
Signature · 2 lines
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation
Quoted 7 lines · satya priya
Changes in V2:
- As per Matthias's comments:
- I've Split the patch into per-PMIC patches and one sc7280 patch
- Removed 2nd critical point, thermal-governer property
- s/pm8325_tz/pm7325_temp_alarm and s/pm7325_temp_alarm/pm7325_thermal
- Fixed few other minor errors.
Quoted 5 lines
- As per Bjorn's comments, replaced '_' with '-' in node names and moved DT files inclusion to board dts.
This series is dependent on below series which adds DT files for SC7280 SoC
https://lore.kernel.org/patchwork/project/lkml/list/?series=488871
No need to mention this dependency, as you posted this after said series had been picked up.
However, also picked up are patches from Vinod adding initial pm8350c and pmk8350 files, so please rebase you changes onto linux-next - in addition to follow up on Matthias feedback.
Thanks,
Bjorn
Quoted 24 lines
satya priya (5):
arm64: dts: qcom: pm7325: Add PMIC peripherals for pm7325
arm64: dts: qcom: pm8350c: Add PMIC peripherals for pm8350c
arm64: dts: qcom: pmk8350: Add PMIC peripherals for pmk8350
arm64: dts: qcom: pmr735a: Add PMIC peripherals for pmr735a
arm64: dts: sc7280: Include PMIC DT files for sc7280arch/arm64/boot/dts/qcom/pm7325.dtsi | 53 +++++++++++++++++ arch/arm64/boot/dts/qcom/pm8350c.dtsi | 53 +++++++++++++++++ arch/arm64/boot/dts/qcom/pmk8350.dtsi | 100 ++++++++++++++++++++++++++++++++ arch/arm64/boot/dts/qcom/pmr735a.dtsi | 53 +++++++++++++++++ arch/arm64/boot/dts/qcom/sc7280-idp.dts | 4 ++ arch/arm64/boot/dts/qcom/sc7280.dtsi | 3 + 6 files changed, 266 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/pm7325.dtsi create mode 100644 arch/arm64/boot/dts/qcom/pm8350c.dtsi create mode 100644 arch/arm64/boot/dts/qcom/pmk8350.dtsi create mode 100644 arch/arm64/boot/dts/qcom/pmr735a.dtsiSignature · 2 lines
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation