Tegra EHCI driver
Subsystems (5)
v2 cover Tegra EHCI driver
This patch series adds support for EHCI compliant USB host controllers found in Tegra SoCs. The EHCI driver depends on the Tegra PHY configuration interface that is used by both tegra ehci driver and gadget driver. Tested on 2.6.38rc4.
v2 changes:
* Add ulpi_viewport.c for controllers with a viewport register
* Update tegra usb_phy interface
* Remove tegra_ehci_reset and use ehci_reset or tdi_reset instead
* Select USB_ARCH_HAS_EHCI in tegra/Kconfig instead of usb/Kconfig
Benoit Goby (3):
usb: otg: Add ulpi viewport access ops
ARM: tegra: Add support for Tegra USB PHYs
usb: host: Add EHCI driver for NVIDIA Tegra SoCs
Robert Morell (1):
USB: ehci: tegra: Align DMA transfers to 32 bytes
arch/arm/mach-tegra/Kconfig | 3 + arch/arm/mach-tegra/Makefile | 1 + arch/arm/mach-tegra/include/mach/usb_phy.h | 86 +++ arch/arm/mach-tegra/usb_phy.c | 795 ++++++++++++++++++++++++++++ drivers/usb/host/Kconfig | 8 + drivers/usb/host/ehci-hcd.c | 5 + drivers/usb/host/ehci-tegra.c | 716 +++++++++++++++++++++++++ drivers/usb/otg/Kconfig | 7 + drivers/usb/otg/Makefile | 1 + drivers/usb/otg/ulpi_viewport.c | 81 +++ include/linux/tegra_usb.h | 35 ++ include/linux/usb/ulpi.h | 5 + 12 files changed, 1743 insertions(+), 0 deletions(-) create mode 100644 arch/arm/mach-tegra/include/mach/usb_phy.h create mode 100644 arch/arm/mach-tegra/usb_phy.c create mode 100644 drivers/usb/host/ehci-tegra.c create mode 100644 drivers/usb/otg/ulpi_viewport.c create mode 100644 include/linux/tegra_usb.h
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A message that is not in the archive (sent off-list or not yet received): 1297895962-28590-1-git-send-email-benoit-z5hGa2qSFaRBDgjK7y7TUQ@public.gmane.org
PATCH v2 1/4 usb: otg: Add ulpi viewport access ops
Add generic access ops for controllers with a ulpi viewport register (e.g. Chipidea/ARC based controllers).
--- drivers/usb/otg/Kconfig | 7 +++ drivers/usb/otg/Makefile | 1 + drivers/usb/otg/ulpi_viewport.c | 81 +++++++++++++++++++++++++++++++++++++++ include/linux/usb/ulpi.h | 5 ++ 4 files changed, 94 insertions(+), 0 deletions(-) create mode 100644 drivers/usb/otg/ulpi_viewport.c
drivers/usb/otg/Kconfig +7 -0
@@ -49,6 +49,13 @@ config USB_ULPI Enable this to support ULPI connected USB OTG transceivers which are likely found on embedded boards. +config USB_ULPI_VIEWPORT + bool "ULPI Viewport Access Operations" + depends on USB_ULPI + help + Provides read/write operations to the ULPI phy register set for + controllers with a viewport register (e.g. Chipidea/ARC controllers). + config TWL4030_USB tristate "TWL4030 USB Transceiver Driver" depends on TWL4030_CORE && REGULATOR_TWL4030
drivers/usb/otg/Makefile +1 -0
@@ -16,5 +16,6 @@ obj-$(CONFIG_TWL6030_USB) += twl6030-usb.o obj-$(CONFIG_USB_LANGWELL_OTG) += langwell_otg.o obj-$(CONFIG_NOP_USB_XCEIV) += nop-usb-xceiv.o obj-$(CONFIG_USB_ULPI) += ulpi.o +obj-$(CONFIG_USB_ULPI_VIEWPORT) += ulpi_viewport.o obj-$(CONFIG_USB_MSM_OTG_72K) += msm72k_otg.o obj-$(CONFIG_AB8500_USB) += ab8500-usb.o
drivers/usb/otg/ulpi_viewport.c new file +81 -0
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include/linux/usb/ulpi.h +5 -0
@@ -184,4 +184,9 @@struct otg_transceiver *otg_ulpi_create (struct otg_io_access_ops *ops,unsigned int flags); +#ifdef CONFIG_USB_ULPI_VIEWPORT +/* access ops for controllers with a viewport register */ +extern struct otg_io_access_ops ulpi_viewport_access_ops; +#endif +#endif /* __LINUX_USB_ULPI_H */
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A message that is not in the archive (sent off-list or not yet received): 1297895962-28590-2-git-send-email-benoit-z5hGa2qSFaRBDgjK7y7TUQ@public.gmane.org
Re: [PATCH v2 1/4] usb: otg: Add ulpi viewport access ops
Quoted 4 lines · Benoit Goby
Add generic access ops for controllers with a ulpi viewport register (e.g. Chipidea/ARC based controllers).
Change-Id: I53d50857d4716f8df708af199ad1def1ff9d4beb
WTF is this?
I've complained about this in the past, please don't send this ever again, as it makes NO sense for a patch that is being sent for acceptance to the kernel source tree.
I'll wait for your resubmission before taking this series.
thanks,
greg k-h
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PATCH v2 2/4 ARM: tegra: Add support for Tegra USB PHYs
In reply to a message not in the archiveInterface used by Tegra's gadget driver and ehci driver to power on and configure the USB PHYs.
--- arch/arm/mach-tegra/Kconfig | 3 + arch/arm/mach-tegra/Makefile | 1 + arch/arm/mach-tegra/include/mach/usb_phy.h | 86 +++ arch/arm/mach-tegra/usb_phy.c | 795 ++++++++++++++++++++++++++++ 4 files changed, 885 insertions(+), 0 deletions(-) create mode 100644 arch/arm/mach-tegra/include/mach/usb_phy.h create mode 100644 arch/arm/mach-tegra/usb_phy.c
arch/arm/mach-tegra/Kconfig +3 -0
@@ -10,6 +10,9 @@ config ARCH_TEGRA_2x_SOC select CPU_V7 select ARM_GIC select ARCH_REQUIRE_GPIOLIB + select USB_ARCH_HAS_EHCI if USB_SUPPORT + select USB_ULPI if USB_SUPPORT + select USB_ULPI_VIEWPORT if USB_SUPPORT help Support for NVIDIA Tegra AP20 and T20 processors, based on the ARM CortexA9MP CPU and the ARM PL310 L2 cache controller
arch/arm/mach-tegra/Makefile +1 -0
@@ -15,6 +15,7 @@ obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o obj-$(CONFIG_TEGRA_SYSTEM_DMA) += dma.o obj-$(CONFIG_CPU_FREQ) += cpu-tegra.o obj-$(CONFIG_TEGRA_PCI) += pcie.o +obj-$(CONFIG_USB_SUPPORT) += usb_phy.o obj-${CONFIG_MACH_HARMONY} += board-harmony.o obj-${CONFIG_MACH_HARMONY} += board-harmony-pinmux.o
arch/arm/mach-tegra/include/mach/usb_phy.h new file +86 -0
86 lines not on this page · raw message
arch/arm/mach-tegra/usb_phy.c new file +795 -0
795 lines not on this page · raw message
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PATCH v2 3/4 usb: host: Add EHCI driver for NVIDIA Tegra SoCs
In reply to a message not in the archive--- drivers/usb/host/Kconfig | 8 + drivers/usb/host/ehci-hcd.c | 5 + drivers/usb/host/ehci-tegra.c | 626 +++++++++++++++++++++++++++++++++++++++++ include/linux/tegra_usb.h | 35 +++ 4 files changed, 674 insertions(+), 0 deletions(-) create mode 100644 drivers/usb/host/ehci-tegra.c create mode 100644 include/linux/tegra_usb.h
drivers/usb/host/Kconfig +8 -0
@@ -152,6 +152,14 @@ config USB_EHCI_MSM This driver depends on OTG driver for PHY initialization, clock management, powering up VBUS, and power management. +config USB_EHCI_TEGRA + boolean "NVIDIA Tegra HCD support" + depends on USB_EHCI_HCD && ARCH_TEGRA + select USB_EHCI_ROOT_HUB_TT + help + This driver enables support for the internal USB Host Controller + found in NVIDIA Tegra SoCs. The Tegra controller is EHCI compliant. + config USB_EHCI_HCD_PPC_OF bool "EHCI support for PPC USB controller on OF platform bus" depends on USB_EHCI_HCD && PPC_OF
drivers/usb/host/ehci-hcd.c +5 -0
@@ -1245,6 +1245,11 @@ MODULE_LICENSE ("GPL");#define PLATFORM_DRIVER ehci_msm_driver#endif +#ifdef CONFIG_USB_EHCI_TEGRA +#include "ehci-tegra.c" +#define PLATFORM_DRIVER tegra_ehci_driver +#endif +#if !defined(PCI_DRIVER ) && !defined(PLATFORM_DRIVER ) && \ !defined(PS3_SYSTEM_BUS_DRIVER ) && !defined(OF_PLATFORM_DRIVER ) && \ !defined(XILINX_OF_PLATFORM_DRIVER )
drivers/usb/host/ehci-tegra.c new file +626 -0
626 lines not on this page · raw message
include/linux/tegra_usb.h new file +35 -0
@@ -0,0 +1,35 @@ +/* +* Copyright (C) 2010 Google, Inc. +* +* This program is free software; you can redistribute it and/or modify it +* under the terms of the GNU General Public License as published by the +* Free Software Foundation; either version 2 of the License, or (at your +* option) any later version. +* +* This program is distributed in the hope that it will be useful, but WITHOUT +* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +* more details. +* +* You should have received a copy of the GNU General Public License along +* with this program; if not, write to the Free Software Foundation, Inc., +* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. +*/ + +#ifndef _TEGRA_USB_H_ +#define _TEGRA_USB_H_ + +enum tegra_usb_operating_modes { +TEGRA_USB_DEVICE , +TEGRA_USB_HOST , +TEGRA_USB_OTG , +}; + +struct tegra_ehci_platform_data { +enum tegra_usb_operating_modes operating_mode; +/* power down the phy on bus suspend */ +int power_down_on_bus_suspend; +void *phy_config; +}; + +#endif /* _TEGRA_USB_H_ */
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PATCH v2 4/4 USB: ehci: tegra: Align DMA transfers to 32 bytes
In reply to a message not in the archiveFrom: Robert Morell <[email protected]>
The Tegra2 USB controller doesn't properly deal with misaligned DMA buffers, causing corruption. This is especially prevalent with USB network adapters, where skbuff alignment is often in the middle of a 4-byte dword.
To avoid this, allocate a temporary buffer for the DMA if the provided buffer isn't sufficiently aligned.
--- drivers/usb/host/ehci-tegra.c | 90 +++++++++++++++++++++++++++++++++++++++++ 1 files changed, 90 insertions(+), 0 deletions(-)
drivers/usb/host/ehci-tegra.c +90 -0
@@ -28,6 +28,8 @@#define TEGRA_USB_PORTSC1_PTC (x) (((x) & 0xf) << 16) +#define TEGRA_USB_DMA_ALIGN 32 +struct tegra_ehci_hcd {struct ehci_hcd *ehci;struct tegra_usb_phy *phy;
@@ -388,6 +390,92 @@ static int tegra_ehci_bus_resume(struct usb_hcd *hcd) }#endif +struct temp_buffer { +void *kmalloc_ptr; +void *old_xfer_buffer; +u8 data[0 ]; +}; + +static void free_temp_buffer (struct urb *urb) +{ +enum dma_data_direction dir; +struct temp_buffer *temp; + +if (!(urb->transfer_flags &URB_ALIGNED_TEMP_BUFFER )) +return ; + + dir =usb_urb_dir_in (urb) ?DMA_FROM_DEVICE :DMA_TO_DEVICE ; + + temp = container_of(urb->transfer_buffer, struct temp_buffer, + data); + +if (dir ==DMA_FROM_DEVICE ) +memcpy (temp->old_xfer_buffer, temp->data, + urb->transfer_buffer_length); + urb->transfer_buffer = temp->old_xfer_buffer; +kfree (temp->kmalloc_ptr); + + urb->transfer_flags &= ~URB_ALIGNED_TEMP_BUFFER ; +} + +static int alloc_temp_buffer (struct urb *urb,gfp_t mem_flags) +{ +enum dma_data_direction dir; +struct temp_buffer *temp, *kmalloc_ptr; +size_t kmalloc_size; + +if (urb->num_sgs || urb->sg || + urb->transfer_buffer_length ==0 || + !((uintptr_t )urb->transfer_buffer & (TEGRA_USB_DMA_ALIGN -1 ))) +return 0 ; + + dir =usb_urb_dir_in (urb) ?DMA_FROM_DEVICE :DMA_TO_DEVICE ; + +/* Allocate a buffer with enough padding for alignment */ + kmalloc_size = urb->transfer_buffer_length + +sizeof (struct temp_buffer ) +TEGRA_USB_DMA_ALIGN -1 ; + + kmalloc_ptr =kmalloc (kmalloc_size, mem_flags); +if (!kmalloc_ptr) +return -ENOMEM ; + +/* Position our struct temp_buffer such that data is aligned */ + temp =PTR_ALIGN (kmalloc_ptr +1 ,TEGRA_USB_DMA_ALIGN ) -1 ; + + temp->kmalloc_ptr = kmalloc_ptr; + temp->old_xfer_buffer = urb->transfer_buffer; +if (dir ==DMA_TO_DEVICE ) +memcpy (temp->data, urb->transfer_buffer, + urb->transfer_buffer_length); + urb->transfer_buffer = temp->data; + + urb->transfer_flags |=URB_ALIGNED_TEMP_BUFFER ; + +return 0 ; +} + +static int tegra_ehci_map_urb_for_dma (struct usb_hcd *hcd,struct urb *urb, +gfp_t mem_flags) +{ +int ret; + + ret =alloc_temp_buffer (urb, mem_flags); +if (ret) +return ret; + + ret =usb_hcd_map_urb_for_dma (hcd, urb, mem_flags); +if (ret) +free_temp_buffer (urb); + +return ret; +} + +static void tegra_ehci_unmap_urb_for_dma (struct usb_hcd *hcd,struct urb *urb) +{ +usb_hcd_unmap_urb_for_dma (hcd, urb); +free_temp_buffer (urb); +} +static const struct hc_driver tegra_ehci_hc_driver = { .description = hcd_name, .product_desc ="Tegra EHCI Host Controller" ,
@@ -403,6 +491,8 @@ static const struct hc_driver tegra_ehci_hc_driver = { .shutdown = tegra_ehci_shutdown, .urb_enqueue = ehci_urb_enqueue, .urb_dequeue = ehci_urb_dequeue, + .map_urb_for_dma = tegra_ehci_map_urb_for_dma, + .unmap_urb_for_dma = tegra_ehci_unmap_urb_for_dma, .endpoint_disable = ehci_endpoint_disable, .endpoint_reset = ehci_endpoint_reset, .get_frame_number = ehci_get_frame,
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