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mfd: wm5102: Expose DRE control registers

PATCH Applied Charles Keepax 3 participants 5 messages Jun 12, 2013 – Jun 17, 2013

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#0 lore raw

PATCH 1/2 mfd: wm5102: Expose DRE control registers

Certain use cases may require specific DRE settings so expose the necessary registers.

---
 drivers/mfd/wm5102-tables.c           |    9 ++++++-
 include/linux/mfd/arizona/registers.h |   44 +++++++++++++++++++++++++++++++++
 2 files changed, 52 insertions(+), 1 deletions(-)
drivers/mfd/wm5102-tables.c +8 -1
index 155c4a1..802dd3c 100644
@@ -65,7 +65,8 @@ static const struct reg_default wm5102_revb_patch[] = {
 	{ 0x418, 0xa080 },
 	{ 0x420, 0xa080 },
 	{ 0x428, 0xe000 },
-	{ 0x443, 0xDC1A },
+	{ 0x442, 0x3F0A },
+	{ 0x443, 0xDC1F },
 	{ 0x4B0, 0x0066 },
 	{ 0x458, 0x000b },
 	{ 0x212, 0x0000 },
@@ -424,6 +425,9 @@ static const struct reg_default wm5102_reg_default[] = {
 	{ 0x00000435, 0x0180 },   /* R1077  - DAC Digital Volume 5R */ 
 	{ 0x00000436, 0x0081 },   /* R1078  - DAC Volume Limit 5R */
 	{ 0x00000437, 0x0200 },   /* R1079  - Noise Gate Select 5R */
+	{ 0x00000440, 0x8FFF },   /* R1088  - DRE Enable */
+	{ 0x00000442, 0x3F0A },   /* R1090  - DRE Control 2 */
+	{ 0x00000443, 0xDC1F },   /* R1090  - DRE Control 3 */
 	{ 0x00000450, 0x0000 },   /* R1104  - DAC AEC Control 1 */ 
 	{ 0x00000458, 0x000B },   /* R1112  - Noise Gate Control */
 	{ 0x00000490, 0x0069 },   /* R1168  - PDM SPK1 CTRL 1 */ 
@@ -1197,6 +1201,9 @@ static bool wm5102_readable_register(struct device *dev, unsigned int reg)
 	case ARIZONA_DAC_DIGITAL_VOLUME_5R:
 	case ARIZONA_DAC_VOLUME_LIMIT_5R:
 	case ARIZONA_NOISE_GATE_SELECT_5R:
+	case ARIZONA_DRE_ENABLE:
+	case ARIZONA_DRE_CONTROL_2:
+	case ARIZONA_DRE_CONTROL_3:
 	case ARIZONA_DAC_AEC_CONTROL_1:
 	case ARIZONA_NOISE_GATE_CONTROL:
 	case ARIZONA_PDM_SPK1_CTRL_1:
include/linux/mfd/arizona/registers.h +44 -0

56 lines not on this page · raw message

Signature · 1 line
1.7.2.5
#1 lore raw

PATCH 2/2 ASoC: wm5102: Expose controls for DRE

Certain use cases may require specific DRE settings so expose control of these.

---
 sound/soc/codecs/wm5102.c |   13 +++++++++++++
 1 files changed, 13 insertions(+), 0 deletions(-)
sound/soc/codecs/wm5102.c +13 -0
index 842adfd..e723ac0 100644
@@ -816,6 +816,19 @@ SOC_VALUE_ENUM("HPOUT1 OSR", wm5102_hpout_osr[0]),
 SOC_VALUE_ENUM("HPOUT2 OSR", wm5102_hpout_osr[1]),
 SOC_VALUE_ENUM("EPOUT OSR", wm5102_hpout_osr[2]),
 
+SOC_DOUBLE("HPOUT1 DRE Switch", ARIZONA_DRE_ENABLE,
+	   ARIZONA_DRE1L_ENA_SHIFT, ARIZONA_DRE1R_ENA_SHIFT, 1, 0),
+SOC_DOUBLE("HPOUT2 DRE Switch", ARIZONA_DRE_ENABLE,
+	   ARIZONA_DRE2L_ENA_SHIFT, ARIZONA_DRE2R_ENA_SHIFT, 1, 0),
+SOC_SINGLE("EPOUT DRE Switch", ARIZONA_DRE_ENABLE,
+	   ARIZONA_DRE3L_ENA_SHIFT, 1, 0),
+
+SOC_SINGLE("DRE Threshold", ARIZONA_DRE_CONTROL_2,
+	   ARIZONA_DRE_T_LOW_SHIFT, 63, 0),
+
+SOC_SINGLE("DRE Low Level ABS", ARIZONA_DRE_CONTROL_3,
+	   ARIZONA_DRE_LOW_LEVEL_ABS_SHIFT, 15, 0),
+
 SOC_ENUM("Output Ramp Up", arizona_out_vi_ramp),
 SOC_ENUM("Output Ramp Down", arizona_out_vd_ramp),
 
Signature · 1 line
1.7.2.5
maintainer Applied
#2 lore raw
In reply to Charles Keepax
Quoted 2 lines · Charles Keepax

Certain use cases may require specific DRE settings so expose the necessary registers.

Applied both, thanks.

#3 lore raw

Hi Mark,

Quoted 5 lines · Mark Brown
Quoted 2 lines · Charles Keepax

Certain use cases may require specific DRE settings so expose the necessary registers.

Applied both, thanks.

Do you have ASoC dependencies on this one or do you mind me taking it ?

Cheers,
Samuel.

Signature · 2 lines
Intel Open Source Technology Centre
http://oss.intel.com/
maintainer
#4 lore raw
Quoted 9 lines · Samuel Ortiz
Quoted 5 lines · Mark Brown
Quoted 2 lines · Charles Keepax

Certain use cases may require specific DRE settings so expose the necessary registers.

Applied both, thanks.

Do you have ASoC dependencies on this one or do you mind me taking it ?

The new register defines get used for the ASoC controls unfortunately so there is a dependency.