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hwspinlock/msm: Add support for Qualcomm MSM HW Mutex block

PATCH In review Kumar Gala 5 participants 10 messages Aug 14, 2013 – Feb 28, 2014

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Kumar Gala

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#0 lore raw

PATCH v3 1/1 hwspinlock/msm: Add support for Qualcomm MSM HW Mutex block

Add driver for Qualcomm MSM Hardware Mutex block that exists on newer MSM SoC (MSM8974, etc).

CC Jeffrey Hugo <[email protected]>
CC Eric Holmberg <[email protected]>

---
v3:
* moved dt binding into hwlock/
* removed smp_mb() as they were not needed
* cleanup warning

v2:
* Fixed init of stride
* Dealt with a number of comments from Stephen Boyd:
- use of <linux/io.h> instead of <asm/io.h>
- declaring msm_hwspinlock_of_match once & as const
- drop unneccessary () in an if statement
- style cleanup to have devm_kzalloc on one line

 .../devicetree/bindings/hwlock/msm-tcsr-mutex.txt  |  20 +++
 drivers/hwspinlock/Kconfig                         |  11 ++
 drivers/hwspinlock/Makefile                        |   1 +
 drivers/hwspinlock/msm_hwspinlock.c                | 149 +++++++++++++++++++++
 4 files changed, 181 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/hwlock/msm-tcsr-mutex.txt
 create mode 100644 drivers/hwspinlock/msm_hwspinlock.c
Documentation/devicetree/bindings/hwlock/msm-tcsr-mutex.txt new file +20 -0
new file mode 100644
index 0000000..56740a3
@@ -0,0 +1,20 @@
+Qualcomm MSM Hardware Mutex Block:
+
+The hardware block provides mutexes utilized between different processors
+on the SoC as part of the communication protocol used by these processors.
+
+Required properties:
+- compatible: should be "qcom,tcsr-mutex"
+- reg: Should contain registers location and length of mutex registers
+- reg-names:
+	"mutex-base"  - string to identify mutex registers
+- qcom,num-locks: the number of locks/mutexes supported
+
+Example:
+
+	hwlock@fd484000 {
+		compatible = "qcom,tcsr-mutex";
+		reg = <0xfd484000 0x1000>;
+		reg-names = "mutex-base";
+		qcom,num-locks = <32>;
+	};
drivers/hwspinlock/Kconfig +11 -0
index 70637d2..192e939 100644
@@ -8,6 +8,17 @@ config HWSPINLOCK
 
 menu "Hardware Spinlock drivers"
 
+config HWSPINLOCK_MSM
+	tristate "MSM Hardware Spinlock device"
+	depends on ARCH_MSM
+	select HWSPINLOCK
+	help
+	  Say y here to support the MSM Hardware Mutex functionality, which
+	  provides a synchronisation mechanism for the various processors on
+	  the SoC.
+
+	  If unsure, say N.
+
 config HWSPINLOCK_OMAP
 	tristate "OMAP Hardware Spinlock device"
 	depends on ARCH_OMAP4 || SOC_OMAP5
drivers/hwspinlock/Makefile +1 -0
index 93eb64b..4074c56 100644
@@ -3,5 +3,6 @@
 #
 
 obj-$(CONFIG_HWSPINLOCK)		+= hwspinlock_core.o
+obj-$(CONFIG_HWSPINLOCK_MSM)		+= msm_hwspinlock.o
 obj-$(CONFIG_HWSPINLOCK_OMAP)		+= omap_hwspinlock.o
 obj-$(CONFIG_HSEM_U8500)		+= u8500_hsem.o
drivers/hwspinlock/msm_hwspinlock.c new file +149 -0

149 lines not on this page · raw message

Signature · 2 lines
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hosted by The Linux Foundation
Reviewed-by on v3 1/1
#1 lore raw
Quoted 6 lines · Kumar Gala

Add driver for Qualcomm MSM Hardware Mutex block that exists on newer MSM SoC (MSM8974, etc).

CC Jeffrey Hugo <[email protected]>
CC Eric Holmberg <[email protected]>

Looks good.

Quoted 14 lines

---
v3:
* moved dt binding into hwlock/
* removed smp_mb() as they were not needed
* cleanup warning

v2:
* Fixed init of stride
* Dealt with a number of comments from Stephen Boyd:
- use of <linux/io.h> instead of <asm/io.h>
- declaring msm_hwspinlock_of_match once & as const
- drop unneccessary () in an if statement
- style cleanup to have devm_kzalloc on one line

Signature · 2 lines
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
hosted by The Linux Foundation
#2 lore raw
In reply to Kumar Gala

Documentation/devicetree/bindings/hwlock/msm-tcsr-mutex.txt line 10

Quoted 5 lines · Kumar Gala
Documentation/devicetree/bindings/hwlock/msm-tcsr-mutex.txt new file +5 -0
+Required properties:
+- compatible: should be "qcom,tcsr-mutex"
+- reg: Should contain registers location and length of mutex registers
+- reg-names:
+	"mutex-base"  - string to identify mutex registers

Just out of curiosity, why is reg-names required? Especially if there seem to be only one set of registers?

Paweł

#3 lore raw
Quoted 9 lines · Pawel Moll

Documentation/devicetree/bindings/hwlock/msm-tcsr-mutex.txt line 10

Quoted 5 lines · Kumar Gala
Documentation/devicetree/bindings/hwlock/msm-tcsr-mutex.txt new file +5 -0
+Required properties:
+- compatible: should be "qcom,tcsr-mutex"
+- reg: Should contain registers location and length of mutex registers
+- reg-names:
+	"mutex-base"  - string to identify mutex registers

Just out of curiosity, why is reg-names required? Especially if there seem to be only one set of registers?

Indeed, I tend to think that reg-names is a bad idea.

IIRC, the rule for "reg" is that entries must always have a defined order, so that it can always be accessed by integer index. And given that's true, allowing for reg-names just creates confusion since it implies you can look up the index in reg-names and then read reg at that index.

Now the same isn't true for clocks/clock-names for example, where it's defined that there is no order, so you must search clock-names first.

Inconsistency in rules, uggh.

#4 lore raw
Quoted 4 lines · Stephen Warren

Indeed, I tend to think that reg-names is a bad idea.

IIRC, the rule for "reg" is that entries must always have a defined order, so that it can always be accessed by integer index.

First time I hear about that rule, really...

Quoted 4 lines

And given
that's true, allowing for reg-names just creates confusion since it implies you can look up the index in reg-names and then read reg at that index.

I actually believe that named resources leave less are for error than indexed ones. And this is the message I remember being "spread" in the times of static platform devices.

Pawel

author
#5 lore raw
Quoted 13 lines · Pawel Moll
Quoted 4 lines · Stephen Warren

Indeed, I tend to think that reg-names is a bad idea.

IIRC, the rule for "reg" is that entries must always have a defined order, so that it can always be accessed by integer index.

First time I hear about that rule, really...

Quoted 4 lines

And given
that's true, allowing for reg-names just creates confusion since it implies you can look up the index in reg-names and then read reg at that index.

Quoted 5 lines

I actually believe that named resources leave less are for error than indexed ones. And this is the message I remember being "spread" in the times of static platform devices.

Pawel

I can understand that reg-names being optional for older bindings to ensure backwards compat, but for newer ones agree that it is less error prone. This is something we should try to come to some agreement on.

- k

Signature · 2 lines
Employee of Qualcomm Innovation Center, Inc.
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation
author
#6 lore raw
In reply to Pawel Moll
Quoted 11 lines · Pawel Moll

Documentation/devicetree/bindings/hwlock/msm-tcsr-mutex.txt line 10

Quoted 5 lines · Kumar Gala
Documentation/devicetree/bindings/hwlock/msm-tcsr-mutex.txt new file +5 -0
+Required properties:
+- compatible: should be "qcom,tcsr-mutex"
+- reg: Should contain registers location and length of mutex registers
+- reg-names:
+	"mutex-base"  - string to identify mutex registers

Just out of curiosity, why is reg-names required? Especially if there seem to be only one set of registers?

Paweł

At one point I thought there was going to be more than one reg region, I can drop it. However, I dont see any issue with a binding making it required if it desires.

- k

Signature · 2 lines
Employee of Qualcomm Innovation Center, Inc.
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation
#7 lore raw
In reply to Kumar Gala

Documentation/devicetree/bindings/hwlock/msm-tcsr-mutex.txt line 11

Quoted 11 lines · Kumar Gala

Add driver for Qualcomm MSM Hardware Mutex block that exists on newer MSM SoC (MSM8974, etc).

Documentation/devicetree/bindings/hwlock/msm-tcsr-mutex.txt +6 -0
 
+Required properties:
+- compatible: should be "qcom,tcsr-mutex"
+- reg: Should contain registers location and length of mutex registers
+- reg-names:
+	"mutex-base"  - string to identify mutex registers
+- qcom,num-locks: the number of locks/mutexes supported

Doesn't the block support any interrupts? I suppose the interrupts property can be optional though even if it does.

Aside from the comments re: reg-names, this binding seems fine.

author
#8 lore raw
Quoted 6 lines · Stephen Warren
Quoted 4 lines · Kumar Gala

Add driver for Qualcomm MSM Hardware Mutex block that exists on newer MSM SoC (MSM8974, etc).

Documentation/devicetree/bindings/hwlock/msm-tcsr-mutex.txt +0 -0
Quoted 9 lines

Documentation/devicetree/bindings/hwlock/msm-tcsr-mutex.txt line 11

Quoted 6 lines
Documentation/devicetree/bindings/hwlock/msm-tcsr-mutex.txt +6 -0
+Required properties:
+- compatible: should be "qcom,tcsr-mutex"
+- reg: Should contain registers location and length of mutex registers
+- reg-names:
+	"mutex-base"  - string to identify mutex registers
+- qcom,num-locks: the number of locks/mutexes supported

Doesn't the block support any interrupts? I suppose the interrupts property can be optional though even if it does.

No interrupts on the block.

Quoted 2 lines

Aside from the comments re: reg-names, this binding seems fine. --

- k

Signature · 2 lines
Employee of Qualcomm Innovation Center, Inc.
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation
#9 lore raw
In reply to Kumar Gala

Hi Kumar,

I pulled this in to my 3.14 tree and gave it a spin. But I keep hitting the case of unlock below telling me that someone else is holding the lock.

On Wed, Aug 14, 2013 at 12:09 PM, Kumar Gala <[email protected]> wrote:
[...]

drivers/hwspinlock/msm_hwspinlock.c line 35

Quoted 6 lines
drivers/hwspinlock/msm_hwspinlock.c new file +6 -0
+
+static int msm_hwspinlock_trylock(struct hwspinlock *lock)
+{
+       void __iomem *lock_addr = lock->priv;
+
+       writel_relaxed(SPINLOCK_ID_APPS_PROC, lock_addr);

You need some sort of barrier here; the caf code have a smp_mb() here, inserting that solves the problem.

Quoted 8 lines
drivers/hwspinlock/msm_hwspinlock.c new file +8 -0
+
+       return readl_relaxed(lock_addr) == SPINLOCK_ID_APPS_PROC;
+}
+
+static void msm_hwspinlock_unlock(struct hwspinlock *lock)
+{
+       u32 lock_owner;
+       void __iomem *lock_addr = lock->priv;

drivers/hwspinlock/msm_hwspinlock.c line 53

Quoted 10 lines
drivers/hwspinlock/msm_hwspinlock.c new file +10 -0
+
+       lock_owner = readl_relaxed(lock_addr);
+       if (lock_owner != SPINLOCK_ID_APPS_PROC) {
+               pr_err("%s: spinlock not owned by us (actual owner is %d)\n",
+                               __func__, lock_owner);
+       }
+
+       writel_relaxed(0, lock_addr);
+}
+

Part of this I think this driver looks good, it would be nice to get the last details cleaned up so we could get it into the tree.

Regards,
Bjorn