Add support for MSM's mmio clock/reset controller

The first breaks a reset-controller include ordering requirement. It got an ack so I think we're ok for it to go through the clock tree.

The next patch adds support for setting the rate and the parent at the same time based on patches from James Hogan's remuxing set_rate series.

After that we add MSM clock hardware support and SoC specific drivers. The DT node additions will be sent through the MSM maintainers once these patches are accepted.

Changes since v4:
* Moved regmap code out of the core into drivers/clk/qcom/
* Reworked to use a wrapper clk_regmap struct

Changes since v3:
* Moved binding include to clock/
* New patch for 8660 GCC driver
* Renamed directory to qcom to match vendor prefix
* Added some missing clocks in 8974 GCC driver
* New patch for 8974 MMCC driver

Changes since v2:

* Completed 8960 and 8974 GCC data & dt-bindings
* Added support for reset controllers
* Squashed some bugs in 8974 gcc clocks
* New patch to fix clk NULL pointer deref
* New patch to fix #include requirement for reset-controller.h

Changes since v1:

* Rewrote binding to use #clock-cells=1
* Reworked library components (pll, rcg, branch) to use regmap
* Dropped common clock framework patches that did DT parsing
* New patches for regmap support in common clock framework

Stephen Boyd (14):
reset: Silence warning in reset-controller.h
clk: Add set_rate_and_parent() op
clk: qcom: Add a regmap type clock struct
clk: qcom: Add support for phase locked loops (PLLs)
clk: qcom: Add support for root clock generators (RCGs)
clk: qcom: Add support for branches/gate clocks
clk: qcom: Add reset controller support
clk: qcom: Add support for MSM8960's global clock controller (GCC)
clk: qcom: Add support for MSM8960's multimedia clock controller

    (MMCC)
  clk: qcom: Add support for MSM8974's global clock controller (GCC)
  clk: qcom: Add support for MSM8974's multimedia clock controller
    (MMCC)

clk: qcom: Add support for MSM8660's global clock controller (GCC)
devicetree: bindings: Document qcom,gcc
devicetree: bindings: Document qcom,mmcc

 Documentation/clk.txt                              |    3 +
 .../devicetree/bindings/clock/qcom,gcc.txt         |   21 +
 .../devicetree/bindings/clock/qcom,mmcc.txt        |   21 +
 drivers/clk/Kconfig                                |    2 +
 drivers/clk/Makefile                               |    1 +
 drivers/clk/clk.c                                  |   78 +-
 drivers/clk/qcom/Kconfig                           |   47 +
 drivers/clk/qcom/Makefile                          |   14 +
 drivers/clk/qcom/clk-branch.c                      |  159 ++
 drivers/clk/qcom/clk-branch.h                      |   56 +
 drivers/clk/qcom/clk-pll.c                         |  222 ++
 drivers/clk/qcom/clk-pll.h                         |   66 +
 drivers/clk/qcom/clk-rcg.c                         |  517 ++++
 drivers/clk/qcom/clk-rcg.h                         |  159 ++
 drivers/clk/qcom/clk-rcg2.c                        |  291 ++
 drivers/clk/qcom/clk-regmap.c                      |  114 +
 drivers/clk/qcom/clk-regmap.h                      |   45 +
 drivers/clk/qcom/gcc-msm8660.c                     | 2819 ++++++++++++++++++
 drivers/clk/qcom/gcc-msm8960.c                     | 2993 ++++++++++++++++++++
 drivers/clk/qcom/gcc-msm8974.c                     | 2694 ++++++++++++++++++
 drivers/clk/qcom/mmcc-msm8960.c                    | 2321 +++++++++++++++
 drivers/clk/qcom/mmcc-msm8974.c                    | 2625 +++++++++++++++++
 drivers/clk/qcom/reset.c                           |   63 +
 drivers/clk/qcom/reset.h                           |   37 +
 include/dt-bindings/clock/qcom,gcc-msm8660.h       |  276 ++
 include/dt-bindings/clock/qcom,gcc-msm8960.h       |  313 ++
 include/dt-bindings/clock/qcom,gcc-msm8974.h       |  320 +++
 include/dt-bindings/clock/qcom,mmcc-msm8960.h      |  137 +
 include/dt-bindings/clock/qcom,mmcc-msm8974.h      |  161 ++
 include/dt-bindings/reset/qcom,gcc-msm8660.h       |  134 +
 include/dt-bindings/reset/qcom,gcc-msm8960.h       |  118 +
 include/dt-bindings/reset/qcom,gcc-msm8974.h       |   96 +
 include/dt-bindings/reset/qcom,mmcc-msm8960.h      |   93 +
 include/dt-bindings/reset/qcom,mmcc-msm8974.h      |   62 +
 include/linux/clk-provider.h                       |   15 +
 include/linux/reset-controller.h                   |    1 +
 36 files changed, 17075 insertions(+), 19 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/clock/qcom,gcc.txt
 create mode 100644 Documentation/devicetree/bindings/clock/qcom,mmcc.txt
 create mode 100644 drivers/clk/qcom/Kconfig
 create mode 100644 drivers/clk/qcom/Makefile
 create mode 100644 drivers/clk/qcom/clk-branch.c
 create mode 100644 drivers/clk/qcom/clk-branch.h
 create mode 100644 drivers/clk/qcom/clk-pll.c
 create mode 100644 drivers/clk/qcom/clk-pll.h
 create mode 100644 drivers/clk/qcom/clk-rcg.c
 create mode 100644 drivers/clk/qcom/clk-rcg.h
 create mode 100644 drivers/clk/qcom/clk-rcg2.c
 create mode 100644 drivers/clk/qcom/clk-regmap.c
 create mode 100644 drivers/clk/qcom/clk-regmap.h
 create mode 100644 drivers/clk/qcom/gcc-msm8660.c
 create mode 100644 drivers/clk/qcom/gcc-msm8960.c
 create mode 100644 drivers/clk/qcom/gcc-msm8974.c
 create mode 100644 drivers/clk/qcom/mmcc-msm8960.c
 create mode 100644 drivers/clk/qcom/mmcc-msm8974.c
 create mode 100644 drivers/clk/qcom/reset.c
 create mode 100644 drivers/clk/qcom/reset.h
 create mode 100644 include/dt-bindings/clock/qcom,gcc-msm8660.h
 create mode 100644 include/dt-bindings/clock/qcom,gcc-msm8960.h
 create mode 100644 include/dt-bindings/clock/qcom,gcc-msm8974.h
 create mode 100644 include/dt-bindings/clock/qcom,mmcc-msm8960.h
 create mode 100644 include/dt-bindings/clock/qcom,mmcc-msm8974.h
 create mode 100644 include/dt-bindings/reset/qcom,gcc-msm8660.h
 create mode 100644 include/dt-bindings/reset/qcom,gcc-msm8960.h
 create mode 100644 include/dt-bindings/reset/qcom,gcc-msm8974.h
 create mode 100644 include/dt-bindings/reset/qcom,mmcc-msm8960.h
 create mode 100644 include/dt-bindings/reset/qcom,mmcc-msm8974.h

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hosted by The Linux Foundation

If a user of <linux/reset-controller.h> doesn't include <linux/of.h> before including reset-controller.h they'll get a warning as follows:

include/linux/reset-controller.h:44:17:
warning: 'struct of_phandle_args' declared inside parameter list

This is because of_phandle_args is not forward declared. Add the declaration to silence this warning.

---
 include/linux/reset-controller.h | 1 +
 1 file changed, 1 insertion(+)

index 2f61311ae3e0..41a4695fde08 100644
@@ -21,6 +21,7 @@ struct reset_control_ops {
 
 struct module;
 struct device_node;
+struct of_phandle_args;
 
 /**
  * struct reset_controller_dev - reset controller entity that might

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hosted by The Linux Foundation

Some of Qualcomm's clocks can change their parent and rate at the same time with a single register write. Add support for this hardware to the common clock framework by adding a new set_rate_and_parent() op. When the clock framework determines that both the parent and the rate are going to change during clk_set_rate() it will call the .set_rate_and_parent() op if available and fall back to calling .set_parent() followed by .set_rate() otherwise.

---
 Documentation/clk.txt        |  3 ++
 drivers/clk/clk.c            | 78 +++++++++++++++++++++++++++++++++-----------
 include/linux/clk-provider.h | 15 +++++++++
 3 files changed, 77 insertions(+), 19 deletions(-)

index 3aeb5c440442..79700eab821d 100644
@@ -77,6 +77,9 @@ the operations defined in clk.h:
 		int		(*set_parent)(struct clk_hw *hw, u8 index);
 		u8		(*get_parent)(struct clk_hw *hw);
 		int		(*set_rate)(struct clk_hw *hw, unsigned long);
+		int		(*set_rate_and_parent)(struct clk_hw *hw,
+					    unsigned long rate,
+					    unsigned long parent_rate, u8 index);
 		void		(*init)(struct clk_hw *hw);
 	};
 

index 7e59253b8603..a944222a43df 100644
@@ -108,6 +108,18 @@ struct clk_hw;
  *		which is likely helpful for most .set_rate implementation.
  *		Returns 0 on success, -EERROR otherwise.
  *
+ * @set_rate_and_parent: Change the rate and the parent of this clock. The
+ *		requested rate is specified by the second argument, which
+ *		should typically be the return of .round_rate call.  The
+ *		third argument gives the parent rate which is likely helpful
+ *		for most .set_rate_and_parent implementation. The fourth
+ *		argument gives the parent index. This callback is optional (and
+ *		unnecessary) for clocks with 0 or 1 parents as well as
+ *		for clocks that can tolerate switching the rate and the parent
+ *		separately via calls to .set_parent and .set_rate.
+ *		Returns 0 on success, -EERROR otherwise.
+ *
+ *
  * The clk_enable/clk_disable and clk_prepare/clk_unprepare pairs allow
  * implementations to split any work between atomic (enable) and sleepable
  * (prepare) contexts.  If enabling a clock requires code that might sleep,

@@ -139,6 +151,9 @@ struct clk_ops {
 	u8		(*get_parent)(struct clk_hw *hw);
 	int		(*set_rate)(struct clk_hw *hw, unsigned long,
 				    unsigned long);
+	int		(*set_rate_and_parent)(struct clk_hw *hw,
+				    unsigned long rate,
+				    unsigned long parent_rate, u8 index);
 	void		(*init)(struct clk_hw *hw);
 };
 

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hosted by The Linux Foundation

Add a clock type that associates a regmap pointer and some enable/disable bits with a clk_hw struct. This will be the struct that a hw specific implementation wraps if it wants to use the regmap helper functions.

---
 drivers/clk/Kconfig           |   2 +
 drivers/clk/Makefile          |   1 +
 drivers/clk/qcom/Kconfig      |   5 ++
 drivers/clk/qcom/Makefile     |   3 ++
 drivers/clk/qcom/clk-regmap.c | 114 ++++++++++++++++++++++++++++++++++++++++++
 drivers/clk/qcom/clk-regmap.h |  45 +++++++++++++++++
 6 files changed, 170 insertions(+)
 create mode 100644 drivers/clk/qcom/Kconfig
 create mode 100644 drivers/clk/qcom/Makefile
 create mode 100644 drivers/clk/qcom/clk-regmap.c
 create mode 100644 drivers/clk/qcom/clk-regmap.h

index 5c51115081b3..afd2a45bba82 100644
@@ -107,6 +107,8 @@ config COMMON_CLK_KEYSTONE
           Supports clock drivers for Keystone based SOCs. These SOCs have local
 	  a power sleep control module that gate the clock to the IPs and PLLs.
 
+source "drivers/clk/qcom/Kconfig"
+
 endmenu
 
 source "drivers/clk/mvebu/Kconfig"

index 7a10bc9a23e7..088b517245cd 100644
@@ -21,6 +21,7 @@ obj-$(CONFIG_PLAT_SPEAR)	+= spear/
 obj-$(CONFIG_ARCH_U300)		+= clk-u300.o
 obj-$(CONFIG_COMMON_CLK_VERSATILE) += versatile/
 obj-$(CONFIG_ARCH_SIRF)		+= clk-prima2.o
+obj-$(CONFIG_COMMON_CLK_QCOM)	+= qcom/
 obj-$(CONFIG_PLAT_ORION)	+= mvebu/
 ifeq ($(CONFIG_COMMON_CLK), y)
 obj-$(CONFIG_ARCH_MMP)		+= mmp/

new file mode 100644
index 000000000000..73a8c8fb547f
@@ -0,0 +1,5 @@
+config COMMON_CLK_QCOM
+	tristate "Support for Qualcomm's clock controllers"
+	depends on OF
+	select REGMAP_MMIO
+

new file mode 100644
index 000000000000..f9faa8fa9392
@@ -0,0 +1,3 @@
+obj-$(CONFIG_COMMON_CLK_QCOM) += clk-qcom.o
+
+clk-qcom-$(CONFIG_COMMON_CLK_QCOM) += clk-regmap.o

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hosted by The Linux Foundation

Add support for Qualcomm's PLLs (phase locked loops). This is sufficient enough to be able to determine the rate the PLL is running at. We can add rate setting support later when it's needed.

---
 drivers/clk/qcom/Makefile  |   1 +
 drivers/clk/qcom/clk-pll.c | 222 +++++++++++++++++++++++++++++++++++++++++++++
 drivers/clk/qcom/clk-pll.h |  66 ++++++++++++++
 3 files changed, 289 insertions(+)
 create mode 100644 drivers/clk/qcom/clk-pll.c
 create mode 100644 drivers/clk/qcom/clk-pll.h

index f9faa8fa9392..7871e235c2b1 100644
@@ -1,3 +1,4 @@
 obj-$(CONFIG_COMMON_CLK_QCOM) += clk-qcom.o
 
 clk-qcom-$(CONFIG_COMMON_CLK_QCOM) += clk-regmap.o
+clk-qcom-$(CONFIG_COMMON_CLK_QCOM) += clk-pll.o

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hosted by The Linux Foundation

Add support for the root clock generators on Qualcomm devices. RCGs are highly customizable mux/divider/counter clocks that can be used to generate almost any rate desired given some input source that is faster than the desired rate.

---
 drivers/clk/qcom/Makefile   |   2 +
 drivers/clk/qcom/clk-rcg.c  | 517 ++++++++++++++++++++++++++++++++++++++++++++
 drivers/clk/qcom/clk-rcg.h  | 159 ++++++++++++++
 drivers/clk/qcom/clk-rcg2.c | 291 +++++++++++++++++++++++++
 4 files changed, 969 insertions(+)
 create mode 100644 drivers/clk/qcom/clk-rcg.c
 create mode 100644 drivers/clk/qcom/clk-rcg.h
 create mode 100644 drivers/clk/qcom/clk-rcg2.c

index 7871e235c2b1..5d0a6e0ac01f 100644
@@ -2,3 +2,5 @@ obj-$(CONFIG_COMMON_CLK_QCOM) += clk-qcom.o
 
 clk-qcom-$(CONFIG_COMMON_CLK_QCOM) += clk-regmap.o
 clk-qcom-$(CONFIG_COMMON_CLK_QCOM) += clk-pll.o
+clk-qcom-$(CONFIG_COMMON_CLK_QCOM) += clk-rcg.o
+clk-qcom-$(CONFIG_COMMON_CLK_QCOM) += clk-rcg2.o

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hosted by The Linux Foundation

---
 drivers/clk/qcom/Makefile     |   1 +
 drivers/clk/qcom/clk-branch.c | 159 ++++++++++++++++++++++++++++++++++++++++++
 drivers/clk/qcom/clk-branch.h |  56 +++++++++++++++
 3 files changed, 216 insertions(+)
 create mode 100644 drivers/clk/qcom/clk-branch.c
 create mode 100644 drivers/clk/qcom/clk-branch.h

index 5d0a6e0ac01f..1b4f75f58031 100644
@@ -4,3 +4,4 @@ clk-qcom-$(CONFIG_COMMON_CLK_QCOM) += clk-regmap.o
 clk-qcom-$(CONFIG_COMMON_CLK_QCOM) += clk-pll.o
 clk-qcom-$(CONFIG_COMMON_CLK_QCOM) += clk-rcg.o
 clk-qcom-$(CONFIG_COMMON_CLK_QCOM) += clk-rcg2.o
+clk-qcom-$(CONFIG_COMMON_CLK_QCOM) += clk-branch.o

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hosted by The Linux Foundation

Reset controllers and clock controllers are combined into one IP block on Qualcomm chipsets. Usually a reset signal is associated with each clock branch but sometimes a reset signal is associated with a handful of clocks. Either way the register interface is the same; set a bit to assert a reset and clear a bit to deassert a reset. Add support for these types of resets signals.

---
 drivers/clk/qcom/Kconfig  |  2 +-
 drivers/clk/qcom/Makefile |  1 +
 drivers/clk/qcom/reset.c  | 63 +++++++++++++++++++++++++++++++++++++++++++++++
 drivers/clk/qcom/reset.h  | 37 ++++++++++++++++++++++++++++
 4 files changed, 102 insertions(+), 1 deletion(-)
 create mode 100644 drivers/clk/qcom/reset.c
 create mode 100644 drivers/clk/qcom/reset.h

index 73a8c8fb547f..06ccce65d598 100644
@@ -2,4 +2,4 @@ config COMMON_CLK_QCOM
 	tristate "Support for Qualcomm's clock controllers"
 	depends on OF
 	select REGMAP_MMIO
-
+	select RESET_CONTROLLER

index 1b4f75f58031..ec12ec4568ff 100644
@@ -5,3 +5,4 @@ clk-qcom-$(CONFIG_COMMON_CLK_QCOM) += clk-pll.o
 clk-qcom-$(CONFIG_COMMON_CLK_QCOM) += clk-rcg.o
 clk-qcom-$(CONFIG_COMMON_CLK_QCOM) += clk-rcg2.o
 clk-qcom-$(CONFIG_COMMON_CLK_QCOM) += clk-branch.o
+clk-qcom-$(CONFIG_COMMON_CLK_QCOM) += reset.o

new file mode 100644
index 000000000000..e22b16720386
@@ -0,0 +1,37 @@
+/*
+ * Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __QCOM_CLK_RESET_H__
+#define __QCOM_CLK_RESET_H__
+
+#include <linux/reset-controller.h>
+
+struct qcom_reset_map {
+	unsigned int reg;
+	u8 bit;
+};
+
+struct regmap;
+
+struct qcom_reset_controller {
+	const struct qcom_reset_map *reset_map;
+	struct regmap *regmap;
+	struct reset_controller_dev rcdev;
+};
+
+#define to_qcom_reset_controller(r) \
+	container_of(r, struct qcom_reset_controller, rcdev);
+
+extern struct reset_control_ops qcom_reset_ops;
+
+#endif

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hosted by The Linux Foundation

Add a driver for the global clock controller found on MSM8960 based platforms. This should allow most non-multimedia device drivers to probe and control their clocks.

---
 drivers/clk/qcom/Kconfig                     |    8 +
 drivers/clk/qcom/Makefile                    |    2 +
 drivers/clk/qcom/gcc-msm8960.c               | 2993 ++++++++++++++++++++++++++
 include/dt-bindings/clock/qcom,gcc-msm8960.h |  313 +++
 include/dt-bindings/reset/qcom,gcc-msm8960.h |  118 +
 5 files changed, 3434 insertions(+)
 create mode 100644 drivers/clk/qcom/gcc-msm8960.c
 create mode 100644 include/dt-bindings/clock/qcom,gcc-msm8960.h
 create mode 100644 include/dt-bindings/reset/qcom,gcc-msm8960.h

index 06ccce65d598..8b39761dc9fb 100644
@@ -3,3 +3,11 @@ config COMMON_CLK_QCOM
 	depends on OF
 	select REGMAP_MMIO
 	select RESET_CONTROLLER
+
+config MSM_GCC_8960
+	tristate "MSM8960 Global Clock Controller"
+	depends on COMMON_CLK_QCOM
+	help
+	  Support for the global clock controller on msm8960 devices.
+	  Say Y if you want to use peripheral devices such as UART, SPI,
+	  i2c, USB, SD/eMMC, SATA, PCIe, etc.

index ec12ec4568ff..1fb673c4f786 100644
@@ -6,3 +6,5 @@ clk-qcom-$(CONFIG_COMMON_CLK_QCOM) += clk-rcg.o
 clk-qcom-$(CONFIG_COMMON_CLK_QCOM) += clk-rcg2.o
 clk-qcom-$(CONFIG_COMMON_CLK_QCOM) += clk-branch.o
 clk-qcom-$(CONFIG_COMMON_CLK_QCOM) += reset.o
+
+obj-$(CONFIG_MSM_GCC_8960) += gcc-msm8960.o

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hosted by The Linux Foundation

Part of the diff is not shown here. View the raw message.

Add a driver for the multimedia clock controller found on MSM 8960 based platforms. This should allow multimedia device drivers to probe and control their clocks.

---
 drivers/clk/qcom/Kconfig                      |    9 +
 drivers/clk/qcom/Makefile                     |    1 +
 drivers/clk/qcom/mmcc-msm8960.c               | 2321 +++++++++++++++++++++++++
 include/dt-bindings/clock/qcom,mmcc-msm8960.h |  137 ++
 include/dt-bindings/reset/qcom,mmcc-msm8960.h |   93 +
 5 files changed, 2561 insertions(+)
 create mode 100644 drivers/clk/qcom/mmcc-msm8960.c
 create mode 100644 include/dt-bindings/clock/qcom,mmcc-msm8960.h
 create mode 100644 include/dt-bindings/reset/qcom,mmcc-msm8960.h

index 8b39761dc9fb..715269381cca 100644
@@ -11,3 +11,12 @@ config MSM_GCC_8960
 	  Support for the global clock controller on msm8960 devices.
 	  Say Y if you want to use peripheral devices such as UART, SPI,
 	  i2c, USB, SD/eMMC, SATA, PCIe, etc.
+
+config MSM_MMCC_8960
+	tristate "MSM8960 Multimedia Clock Controller"
+	select MSM_GCC_8960
+	depends on COMMON_CLK_QCOM
+	help
+	  Support for the multimedia clock controller on msm8960 devices.
+	  Say Y if you want to support multimedia devices such as display,
+	  graphics, video encode/decode, camera, etc.

index 1fb673c4f786..52efa954ed3e 100644
@@ -8,3 +8,4 @@ clk-qcom-$(CONFIG_COMMON_CLK_QCOM) += clk-branch.o
 clk-qcom-$(CONFIG_COMMON_CLK_QCOM) += reset.o
 
 obj-$(CONFIG_MSM_GCC_8960) += gcc-msm8960.o
+obj-$(CONFIG_MSM_MMCC_8960) += mmcc-msm8960.o

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hosted by The Linux Foundation

Add a driver for the global clock controller found on MSM 8974 based platforms. This should allow most non-multimedia device drivers to probe and control their clocks.

---
 drivers/clk/qcom/Kconfig                     |    8 +
 drivers/clk/qcom/Makefile                    |    1 +
 drivers/clk/qcom/gcc-msm8974.c               | 2694 ++++++++++++++++++++++++++
 include/dt-bindings/clock/qcom,gcc-msm8974.h |  320 +++
 include/dt-bindings/reset/qcom,gcc-msm8974.h |   96 +
 5 files changed, 3119 insertions(+)
 create mode 100644 drivers/clk/qcom/gcc-msm8974.c
 create mode 100644 include/dt-bindings/clock/qcom,gcc-msm8974.h
 create mode 100644 include/dt-bindings/reset/qcom,gcc-msm8974.h

index 715269381cca..7a1325119637 100644
@@ -20,3 +20,11 @@ config MSM_MMCC_8960
 	  Support for the multimedia clock controller on msm8960 devices.
 	  Say Y if you want to support multimedia devices such as display,
 	  graphics, video encode/decode, camera, etc.
+
+config MSM_GCC_8974
+	tristate "MSM8974 Global Clock Controller"
+	depends on COMMON_CLK_QCOM
+	help
+	  Support for the global clock controller on msm8974 devices.
+	  Say Y if you want to use peripheral devices such as UART, SPI,
+	  i2c, USB, SD/eMMC, SATA, PCIe, etc.

index 52efa954ed3e..10883e6306de 100644
@@ -8,4 +8,5 @@ clk-qcom-$(CONFIG_COMMON_CLK_QCOM) += clk-branch.o
 clk-qcom-$(CONFIG_COMMON_CLK_QCOM) += reset.o
 
 obj-$(CONFIG_MSM_GCC_8960) += gcc-msm8960.o
+obj-$(CONFIG_MSM_GCC_8974) += gcc-msm8974.o
 obj-$(CONFIG_MSM_MMCC_8960) += mmcc-msm8960.o

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hosted by The Linux Foundation

Part of the diff is not shown here. View the raw message.

Add a driver for the global clock controller found on MSM 8974 based platforms. This should allow most multimedia device drivers to probe and control their clocks.

---
 drivers/clk/qcom/Kconfig                      |    9 +
 drivers/clk/qcom/Makefile                     |    1 +
 drivers/clk/qcom/mmcc-msm8974.c               | 2625 +++++++++++++++++++++++++
 include/dt-bindings/clock/qcom,mmcc-msm8974.h |  161 ++
 include/dt-bindings/reset/qcom,mmcc-msm8974.h |   62 +
 5 files changed, 2858 insertions(+)
 create mode 100644 drivers/clk/qcom/mmcc-msm8974.c
 create mode 100644 include/dt-bindings/clock/qcom,mmcc-msm8974.h
 create mode 100644 include/dt-bindings/reset/qcom,mmcc-msm8974.h

index 7a1325119637..7b582dd5cd08 100644
@@ -28,3 +28,12 @@ config MSM_GCC_8974
 	  Support for the global clock controller on msm8974 devices.
 	  Say Y if you want to use peripheral devices such as UART, SPI,
 	  i2c, USB, SD/eMMC, SATA, PCIe, etc.
+
+config MSM_MMCC_8974
+	tristate "MSM8974 Multimedia Clock Controller"
+	select MSM_GCC_8974
+	depends on COMMON_CLK_QCOM
+	help
+	  Support for the multimedia clock controller on msm8974 devices.
+	  Say Y if you want to support multimedia devices such as display,
+	  graphics, video encode/decode, camera, etc.

index 10883e6306de..e00cb848a1ae 100644
@@ -10,3 +10,4 @@ clk-qcom-$(CONFIG_COMMON_CLK_QCOM) += reset.o
 obj-$(CONFIG_MSM_GCC_8960) += gcc-msm8960.o
 obj-$(CONFIG_MSM_GCC_8974) += gcc-msm8974.o
 obj-$(CONFIG_MSM_MMCC_8960) += mmcc-msm8960.o
+obj-$(CONFIG_MSM_MMCC_8974) += mmcc-msm8974.o

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Add a driver for the global clock controller found on MSM8660 based platforms. This should allow most non-multimedia device drivers to probe and control their clocks.

---
 drivers/clk/qcom/Kconfig                     |    8 +
 drivers/clk/qcom/Makefile                    |    1 +
 drivers/clk/qcom/gcc-msm8660.c               | 2819 ++++++++++++++++++++++++++
 include/dt-bindings/clock/qcom,gcc-msm8660.h |  276 +++
 include/dt-bindings/reset/qcom,gcc-msm8660.h |  134 ++
 5 files changed, 3238 insertions(+)
 create mode 100644 drivers/clk/qcom/gcc-msm8660.c
 create mode 100644 include/dt-bindings/clock/qcom,gcc-msm8660.h
 create mode 100644 include/dt-bindings/reset/qcom,gcc-msm8660.h

index 7b582dd5cd08..995bcfa021a4 100644
@@ -4,6 +4,14 @@ config COMMON_CLK_QCOM
 	select REGMAP_MMIO
 	select RESET_CONTROLLER
 
+config MSM_GCC_8660
+	tristate "MSM8660 Global Clock Controller"
+	depends on COMMON_CLK_QCOM
+	help
+	  Support for the global clock controller on msm8660 devices.
+	  Say Y if you want to use peripheral devices such as UART, SPI,
+	  i2c, USB, SD/eMMC, etc.
+
 config MSM_GCC_8960
 	tristate "MSM8960 Global Clock Controller"
 	depends on COMMON_CLK_QCOM

index e00cb848a1ae..190d38433202 100644
@@ -7,6 +7,7 @@ clk-qcom-$(CONFIG_COMMON_CLK_QCOM) += clk-rcg2.o
 clk-qcom-$(CONFIG_COMMON_CLK_QCOM) += clk-branch.o
 clk-qcom-$(CONFIG_COMMON_CLK_QCOM) += reset.o
 
+obj-$(CONFIG_MSM_GCC_8660) += gcc-msm8660.o
 obj-$(CONFIG_MSM_GCC_8960) += gcc-msm8960.o
 obj-$(CONFIG_MSM_GCC_8974) += gcc-msm8974.o
 obj-$(CONFIG_MSM_MMCC_8960) += mmcc-msm8960.o

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Document the global clock controller found on Qualcomm devices.

---
 .../devicetree/bindings/clock/qcom,gcc.txt          | 21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/clock/qcom,gcc.txt

new file mode 100644
index 000000000000..767401f42871
@@ -0,0 +1,21 @@
+Qualcomm Global Clock & Reset Controller Binding
+------------------------------------------------
+
+Required properties :
+- compatible : shall contain only one of the following:
+
+			"qcom,gcc-msm8660"
+			"qcom,gcc-msm8960"
+			"qcom,gcc-msm8974"
+
+- reg : shall contain base register location and length
+- #clock-cells : shall contain 1
+- #reset-cells : shall contain 1
+
+Example:
+	clock-controller at 900000 {
+		compatible = "qcom,gcc-msm8960";
+		reg = <0x900000 0x4000>;
+		#clock-cells = <1>;
+		#reset-cells = <1>;
+	};

The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
hosted by The Linux Foundation

Document the multimedia clock controller found on Qualcomm devices

---
 .../devicetree/bindings/clock/qcom,mmcc.txt         | 21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/clock/qcom,mmcc.txt

new file mode 100644
index 000000000000..d572e9964c54
@@ -0,0 +1,21 @@
+Qualcomm Multimedia Clock & Reset Controller Binding
+----------------------------------------------------
+
+Required properties :
+- compatible : shall contain only one of the following:
+
+			"qcom,mmcc-msm8660"
+			"qcom,mmcc-msm8960"
+			"qcom,mmcc-msm8974"
+
+- reg : shall contain base register location and length
+- #clock-cells : shall contain 1
+- #reset-cells : shall contain 1
+
+Example:
+	clock-controller at 4000000 {
+		compatible = "qcom,mmcc-msm8960";
+		reg = <0x4000000 0x1000>;
+		#clock-cells = <1>;
+		#reset-cells = <1>;
+	};

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hosted by The Linux Foundation

Quoting Stephen Boyd (2014-01-15 10:47:20)

Hi Stephen,

These patches look great and I've taken them into clk-next for testing. They should get pushed out to my Linaro mirror later today and will go in for 3.14. Thanks for spinning the revisions to this series so quickly.

There might still be some way to share the regmap helpers in the future, and getting these patches merged is a good starting point.

Regards,
Mike

< snip >

checkpatch is whining about patches

4
5
6
7
8

(Just for completeness if someone thinks I did not check all the patches, it also whines about patch 11, but I think the whining should be ignored, and it whines about patch 1 but I think that might be a checkpatch bug.)

-Frank

< snip >

Never mind.... I see that the patches are already in 3.14-rc1.

-Frank

Hi Frank.

For patch 1, what checkpatch bug might that be?

I think all the checkpatch whinges in patch 11 are correct.

I didn't check any of 4-8.

see below

Agreed on patch 11, judgement call on whether to ignore the warnings.

Hi Joe,

Thanks for jumping in. I did not want to bother you until I dug a little deeper into the warning to see if I was just misunderstanding something.

Sorry, it is patch 2, not patch 1 ("[PATCH v5 02/14] clk: Add set_rate_and_parent() op"):

WARNING: Multiple spaces after return type
#188: FILE: include/linux/clk-provider.h:154:
+ int (*set_rate_and_parent)(struct clk_hw *hw,

total: 0 errors, 1 warnings, 152 lines checked

-Frank

[]

Yup, that one might be a bit aggressive.

It's a complaint about function pointer declaration style.

from checkpatch:
------------------------------------------------------

# unnecessary space "type  (*funcptr)(args...)"
			elsif ($declare =~ /\s{2,}$/) {
				WARN("SPACING",
				     "Multiple spaces after return type\n" . $herecurr);
			}
------------------------------------------------------

This is warning about style equivalent to declarations like:

int foo(int bar);

checkpatch doesn't warn about declarations of that style, so likely checkpatch shouldn't warn about multiple spaces after a function pointer return type either.

I don't have a strong opinion one way or another about it.

If you think it should be silenced, it could be either downgraded to a CHK or removed altogether.

OK, now the warning makes sense. I was reading "spaces" to mean the space character instead of white space.

I don't have a strong opinion either, but downgrading to a CHK would be nice.

It would be less confusing to me (though awkward sounding) to change the message to "Multiple whitespaces after return type".

-Frank