arm: add Faraday A36x SoC platform support

From: Kuo-Jung Su <[email protected]>

These patches introduce Faraday A36x SoC platform support.

Here are some public documents for your reference.

http://www.faraday-tech.com/html/documentation/index.html

There is also a A369 QEMU emulator available at my github account:

https://github.com/dantesu1218/qemu.git

Here is quick start for QEMU + U-Boot:

1. Download the QEMU source tree

   $ git clone -b qemu-1.5.1 https://github.com/dantesu1218/qemu.git

2. Build & Install the QEMU:

   $ ./configure --target-list=arm-softmmu
   $ make
   $ make install

3. Launch u-boot with QEMU:

   $ qemu-system-arm -M a369 -m 512M -nographic -kernel ~/u-boot-2013.07/u-boot

Changes for v7:
- Update license to use SPDX identifiers.
- cfi_flash: drop the patch to unmap_physmem(), because it's already applied.
- ftnandc021: put_unaligned() -> memcpy()
- ftnandc021: update ecc relatived function prototypes to fix compile warnnings.

Changes for v6:
- Drop ethernet driver updates for ftmac110&ftgmac100, because they are already commited.
- arch/arm/cpu/faraday/cpu.c:

     struct ftwdt010_wdt __iomem *regs -> struct ftwdt010_wdt *regs

- arch/arm/cpu/faraday/cmd_bootfa.c: fix compiler warnning
- arch/arm/cpu/faraday/cmd_bootfa.c: use shorter paragraph in commit message, and move the original statement into the top of source file.
- ftnandc021: update README for CONFIG_SYS_FTNANDC021_TIMING
- ftnandc021: remove illegal type-punning

Changes for v5:
- Coding Style cleanup:
1. struct chip_regs __iomem *regs -> struct chip_regs *regs
2. Move Faraday specific APIs into asm/arch-faraday/*.h
- Fix Copyright notices (dates) throughout the patch
- Make 'arm: dma_alloc_coherent: malloc() -> memalign()' as a separate patch
- Make 'cfi_flash: use buffer length in unmap_physmem()' as a separate patch
- Define Faraday machine type in board's config header file
- Add the rationale to the command 'bootfa'
- Add myself as the maintainer for Faraday A360/A369 in MAINTAINERS.
- Chain the video:FTLCDC200 back to this patch series.
- Chain the nand:FTNANDC021 back to this patch series.
- Chain the net:FTGMAC100 & FTMAC110 back to this patch series.
- Update Faraday Firmware Image Format:
1. Drop u-boot image support to simplify the design.
Since it's not possible for the hard-wired ROM code of A360/A369 to support U-boot images. And the real bootloader for A360/A369 is actually Faraday bootcode2, rather than U-Boot.
2. Add image creation timestamp
- Update 'arch/arm/cpu/faraday/start.S' with the new design, which move relocation into 'arch/arm/lib/relocate.S'
- Drop i2c:FTI2C010 & spi:FTSSP010_SPI support. The corresponding patch would restart after this patch series have been accepted.
- Revise IRQ & MMU design: Now the exception table would be mapped to

     0x00000000 as a small page(4KB), rather than runtime adjust after
     relocation finished.

- Revise irq:FTINTC020 design, now the irq is always enabled inside irq_install_handler().
- Revise clock management system
- Revise FTPWMTMR010 & FTTMR010 timer design:
1. Drop IRQ dependant implementation
2. Use gd->arch.timer_rate_hz for timer clock source
3. Use gd->arch.tbl for timestamp

Changes for v4:
- Coding Style cleanup.
- Break down the patch series:
- Patches without hard dependency to this series are now seperate patches.
- Split up the patch into more logical changesets (i.e. interrupt & timers are now split up)
- Drop the faraday/nand.h to remove dependency to ftnandc021
- Drop the faraday/mmc.h to remove dependency to ftsdc010
- Add change logs to each part of the patch series to make patchwork be able to grab comments.

Changes for v3:
- Coding Style cleanup.
There is still one warnning reported by checkpatch.pl, however it's too deep for me to fix it.
Here is the shapshot for it:
-----------------------------------------------------
WARNING: do not add new typedefs
#9735: FILE: include/lcd.h:258:
+typedef struct vidinfo {
-----------------------------------------------------
- Drop bit fields from c struct.
- Drop macros for wirtel()/readl(), call them directly.
- Always insert a blank line between declarations and code.
- Replace all the infinite wait loop with a timeout.
- Add '__iomem' to all the declaration of HW register pointers.
- cmd_boot.c: Make it a separate stand-alone patch.
- ftspi020: Make it a separate stand-alone patch.
- dma-mapping.h: Have the global data ptr declared outside functions.
- dma-mapping.h: Add #if...#else...#endif to dma_free_coherent().
- MMU/D-Cache: Drop static non-cached region, now we use map_physmem()/unmap_physmem() for dynamic mappings.
- ftmac110: Make a correction to multi-line comment style
- ftmac110: Use random MAC address while having trouble to get one from environment variables.
- ftmac110: Add comments to timing control registers.
- ftnandc021: Re-write this driver with ECC enabled and correct column address handling for OOB read/write,
and fixing issused addressed by Scott.
- a36x_config: No more static global network configurations.
- a36x_config: Add a common file for the redundant configurations.

Changes for v2:
- Coding Style cleanup.
- Use readl(), writel(), clrsetbits_le32() to replace REG() macros.
- Use structure based hardware registers to replace the macro constants.
- Replace BIT() with BIT_MASK().
- echi-faraday: Remove debug codes.
- ftmac110: Remove debug codes.
- cache-cp15: Enable write buffer in write-through mode.

Kuo-Jung Su (11):
arm: dma_alloc_coherent: malloc() -> memalign()
video: add Faraday FTLCDC200 LCD controller support
nand: add Faraday FTNANDC021 NAND controller support
arm: add MMU/D-Cache support for Faraday cores
arm: add Faraday processor core support
arm: add Faraday FTINTC020 interrupt controller support
arm: add Faraday FTTMR010 timer support
arm: add Faraday FTPWMTMR010 timer support
arm: add customized boot command for Faraday Images
mmc: ftsdc010_mci: clk_get_rate() -> clock_get_rate()
arm: add Faraday A360/A369 SoC platform support

 MAINTAINERS                                   |    5 +
 README                                        |   10 +
 arch/arm/cpu/faraday/Makefile                 |   42 ++
 arch/arm/cpu/faraday/a360/Makefile            |   33 ++
 arch/arm/cpu/faraday/a369/Makefile            |   34 ++
 arch/arm/cpu/faraday/a369/cmd_fa606.c         |   74 +++
 arch/arm/cpu/faraday/cmd_bootfa.c             |  267 +++++++++++
 arch/arm/cpu/faraday/config.mk                |   17 +
 arch/arm/cpu/faraday/cpu.c                    |  333 ++++++++++++++
 arch/arm/cpu/faraday/ftintc020.c              |  144 ++++++
 arch/arm/cpu/faraday/ftpwmtmr010.c            |  116 +++++
 arch/arm/cpu/faraday/fttmr010.c               |  124 +++++
 arch/arm/cpu/faraday/fwimage.h                |   35 ++
 arch/arm/cpu/faraday/fwimage2.h               |   55 +++
 arch/arm/cpu/faraday/start.S                  |  419 +++++++++++++++++
 arch/arm/cpu/u-boot.lds                       |   11 +
 arch/arm/include/asm/arch-a360/hardware.h     |   72 +++
 arch/arm/include/asm/arch-a360/pmu.h          |   83 ++++
 arch/arm/include/asm/arch-a360/scu.h          |   67 +++
 arch/arm/include/asm/arch-a369/ahbc.h         |   22 +
 arch/arm/include/asm/arch-a369/hardware.h     |   86 ++++
 arch/arm/include/asm/arch-a369/scu.h          |  212 +++++++++
 arch/arm/include/asm/arch-faraday/clock.h     |   29 ++
 arch/arm/include/asm/arch-faraday/interrupt.h |   17 +
 arch/arm/include/asm/dma-mapping.h            |   58 ++-
 arch/arm/include/asm/global_data.h            |    4 +
 arch/arm/include/asm/io.h                     |  159 ++++++-
 arch/arm/include/asm/system.h                 |    7 +-
 arch/arm/lib/cache-cp15.c                     |    9 +
 board/faraday/a360evb/Makefile                |   29 ++
 board/faraday/a360evb/board.c                 |   71 +++
 board/faraday/a360evb/clock.c                 |   71 +++
 board/faraday/a360evb/config.mk               |   17 +
 board/faraday/a360evb/lowlevel_init.S         |   16 +
 board/faraday/a369evb/Makefile                |   29 ++
 board/faraday/a369evb/board.c                 |  175 +++++++
 board/faraday/a369evb/clock.c                 |   81 ++++
 board/faraday/a369evb/config.mk               |   17 +
 board/faraday/a369evb/lowlevel_init.S         |  119 +++++
 boards.cfg                                    |    3 +
 drivers/mmc/ftsdc010_mci.c                    |    2 +-
 drivers/mtd/nand/Makefile                     |    1 +
 drivers/mtd/nand/ftnandc021.c                 |  609 +++++++++++++++++++++++++
 drivers/video/Makefile                        |    1 +
 drivers/video/ftlcdc200.c                     |  136 ++++++
 drivers/video/ftlcdc200_panel.c               |  209 +++++++++
 include/common.h                              |    5 +
 include/configs/a360.h                        |   70 +++
 include/configs/a369-common.h                 |   85 ++++
 include/configs/a369.h                        |   47 ++
 include/configs/a369_fa606te.h                |   40 ++
 include/configs/faraday-common.h              |  242 ++++++++++
 include/faraday/ftintc020.h                   |   36 ++
 include/faraday/ftlcdc200.h                   |  178 ++++++++
 include/faraday/ftnandc021.h                  |  152 ++++++
 include/faraday/ftpwmtmr010.h                 |   40 ++
 include/faraday/ftsmc020.h                    |    1 +
 include/faraday/fttmr010.h                    |   17 +
 include/lcd.h                                 |   33 ++
 59 files changed, 5062 insertions(+), 14 deletions(-)
 create mode 100644 arch/arm/cpu/faraday/Makefile
 create mode 100644 arch/arm/cpu/faraday/a360/Makefile
 create mode 100644 arch/arm/cpu/faraday/a369/Makefile
 create mode 100644 arch/arm/cpu/faraday/a369/cmd_fa606.c
 create mode 100644 arch/arm/cpu/faraday/cmd_bootfa.c
 create mode 100644 arch/arm/cpu/faraday/config.mk
 create mode 100644 arch/arm/cpu/faraday/cpu.c
 create mode 100644 arch/arm/cpu/faraday/ftintc020.c
 create mode 100644 arch/arm/cpu/faraday/ftpwmtmr010.c
 create mode 100644 arch/arm/cpu/faraday/fttmr010.c
 create mode 100644 arch/arm/cpu/faraday/fwimage.h
 create mode 100644 arch/arm/cpu/faraday/fwimage2.h
 create mode 100644 arch/arm/cpu/faraday/start.S
 create mode 100644 arch/arm/include/asm/arch-a360/hardware.h
 create mode 100644 arch/arm/include/asm/arch-a360/pmu.h
 create mode 100644 arch/arm/include/asm/arch-a360/scu.h
 create mode 100644 arch/arm/include/asm/arch-a369/ahbc.h
 create mode 100644 arch/arm/include/asm/arch-a369/hardware.h
 create mode 100644 arch/arm/include/asm/arch-a369/scu.h
 create mode 100644 arch/arm/include/asm/arch-faraday/clock.h
 create mode 100644 arch/arm/include/asm/arch-faraday/interrupt.h
 create mode 100644 board/faraday/a360evb/Makefile
 create mode 100644 board/faraday/a360evb/board.c
 create mode 100644 board/faraday/a360evb/clock.c
 create mode 100644 board/faraday/a360evb/config.mk
 create mode 100644 board/faraday/a360evb/lowlevel_init.S
 create mode 100644 board/faraday/a369evb/Makefile
 create mode 100644 board/faraday/a369evb/board.c
 create mode 100644 board/faraday/a369evb/clock.c
 create mode 100644 board/faraday/a369evb/config.mk
 create mode 100644 board/faraday/a369evb/lowlevel_init.S
 create mode 100644 drivers/mtd/nand/ftnandc021.c
 create mode 100644 drivers/video/ftlcdc200.c
 create mode 100644 drivers/video/ftlcdc200_panel.c
 create mode 100644 include/configs/a360.h
 create mode 100644 include/configs/a369-common.h
 create mode 100644 include/configs/a369.h
 create mode 100644 include/configs/a369_fa606te.h
 create mode 100644 include/configs/faraday-common.h
 create mode 100644 include/faraday/ftintc020.h
 create mode 100644 include/faraday/ftlcdc200.h
 create mode 100644 include/faraday/ftnandc021.h
 create mode 100644 include/faraday/ftpwmtmr010.h

--
1.7.9.5

From: Kuo-Jung Su <[email protected]>

Even though the MMU/D-cache is off, some DMA engines still expect strict address alignment.

For example, the incoming Faraday FTMAC110 & FTGMAC100 ethernet controllers expect the tx/rx descriptors should always be aligned to 16-bytes boundary.

---
Changes for v6, v7:
- Nothing updates

Changes for v5:
- Initial commit, which is separated from "arm: add MMU/D-Cache support for Faraday cores"

 arch/arm/include/asm/dma-mapping.h |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

index 009863b..55a4e26 100644
@@ -16,7 +16,7 @@ enum dma_data_direction {
 
 static void *dma_alloc_coherent(size_t len, unsigned long *handle)
 {
-	*handle = (unsigned long)malloc(len);
+	*handle = (unsigned long)memalign(ARCH_DMA_MINALIGN, len);
 	return (void *)*handle;
 }
 

--
1.7.9.5

Hi Kuo-Jung,

Applied to u-boot-arm/master, thanks!

Amicalement,

Albert.

From: Kuo-Jung Su <[email protected]>

Faraday FTLCDC200 Color LCD controller performs translation of pixel-coded data into the required formats and timings to drive a variety of single/dual mono and color LCDs.

Depending on the LCD type and mode, the unpacked data can represent:
1. an actual true display gray or color value
2. an address to a 256 x 16 bit wide palette RAM gray or color value.

The FTLCDC200 generates 4 individual interrupts for:
1. DMA FIFO underflow
2. base address update
3. vertical status
4. bus error.

There is also a single combined interrupt that is raised when any of the individual interrupts become active.

---
Changes for v7:
- Update license to use SPDX identifiers.

Changes for v6:
- Nothing updates

Changes for v5:
- Coding Style cleanup:

     struct chip_regs __iomem *regs -> struct chip_regs *regs

- Chain it back to Faraday A360/A369 patch series, because Faraday A369 depends on the header file of this patch for I2C work-around.(Enable I2C clock to prevent I2C bus hangs)

Changes for v4:
- Nothing updates

Changes for v3:
- Nothing updates

Changes for v2:
- Make it a separate patch, rather then a part of Faraday A36x patch series

 drivers/video/Makefile          |    1 +
 drivers/video/ftlcdc200.c       |  136 +++++++++++++++++++++++++
 drivers/video/ftlcdc200_panel.c |  209 +++++++++++++++++++++++++++++++++++++++
 include/faraday/ftlcdc200.h     |  178 +++++++++++++++++++++++++++++++++
 include/lcd.h                   |   33 +++++++
 5 files changed, 557 insertions(+)
 create mode 100644 drivers/video/ftlcdc200.c
 create mode 100644 drivers/video/ftlcdc200_panel.c
 create mode 100644 include/faraday/ftlcdc200.h

index f1fb26c..873ee26 100644
@@ -19,6 +19,7 @@ COBJS-$(CONFIG_EXYNOS_MIPI_DSIM) += exynos_mipi_dsi.o exynos_mipi_dsi_common.o \
 				exynos_mipi_dsi_lowlevel.o
 COBJS-$(CONFIG_EXYNOS_PWM_BL) += exynos_pwm_bl.o
 COBJS-$(CONFIG_FSL_DIU_FB) += fsl_diu_fb.o videomodes.o
+COBJS-$(CONFIG_FTLCDC200) += ftlcdc200.o ftlcdc200_panel.o
 COBJS-$(CONFIG_MPC8XX_LCD) += mpc8xx_lcd.o
 COBJS-$(CONFIG_PXA_LCD) += pxa_lcd.o
 COBJS-$(CONFIG_S6E8AX0) += s6e8ax0.o

index b54255a..37dbc79 100644
@@ -237,6 +237,39 @@ typedef struct vidinfo {
 
 void init_panel_info(vidinfo_t *vid);
 
+#elif defined(CONFIG_FTLCDC200)
+
+typedef struct vidinfo {
+	ushort	vl_col;		/* Number of columns (i.e. 800) */
+	ushort	vl_row;		/* Number of rows (i.e. 600) */
+
+	u_char	vl_bpix;	/* Bits per pixel, 0 = 1, 1 = 2 ... 4 = 16 */
+
+	/* Timing Parameters */
+	u_char	vl_fps;		/* Frame per second */
+
+	u_char	vl_hsw;
+	u_char	vl_hbp;
+	u_char	vl_hfp;
+
+	u_char	vl_vsw;
+	u_char	vl_vbp;
+	u_char	vl_vfp;
+
+	/* Pre-defined FTLCDC200 register values */
+	u_long	vl_enable;	/* LCDEnable */
+	u_long	vl_pixel;	/* PanelPixel */
+	u_long	vl_polarity;/* Polarity */
+	u_long	vl_serial;	/* SerialPanelPixel */
+	u_long	vl_ccir656;	/* CCIR656 */
+
+	/* Panel name */
+	char	*vl_name;
+
+	ushort	*cmap;		/* Pointer to the colormap */
+	void	*priv;		/* Pointer to driver-specific data */
+} vidinfo_t;
+
 #else
 
 typedef struct vidinfo {

--
1.7.9.5

Thanks,

Anatolij

From: Kuo-Jung Su <[email protected]>

Faraday FTNANDC021 is an integrated NAND flash controller. It use a build-in command table to abstract the underlying NAND flash control logic.

For example:

Issuing a command 0x10 to FTNANDC021 would result in a page write + a read status operation.

---
Changes for v7:
- ftnandc021.[ch]: Update license to use SPDX identifiers.
- ftnandc021.c: put_unaligned() -> memcpy()
- ftnandc021.c: update ecc relatived function prototypes to fix compile warnnings.

Changes for v6:
- Update README for CONFIG_SYS_FTNANDC021_TIMING
- Remove illegal type-punning by introducing put_unaligned() & get_unaligned().

Changes for v5 (Part of A360/A369 patch series):
- Coding Style cleanup:

     struct chip_regs __iomem *regs -> struct chip_regs *regs

- For there is a strong dependancy between this and A360/A369 patch series, it had been chained back to A360/A369 patch series.
- The latest nand_base requires the ecc.strength to be set properlly, so this patch adds ecc.strength setting accroding to ECC algorithm.

Changes for v5 (Standalone):
- Update README for the description of CONFIG_SYS_FTNANDC021_TIMING.
- Drop redundant white space. (i.e. if (mtd->writesize >= ' '4096))

Changes for v4:
- Make it a separate patch, rather then a part of Faraday A36x patch series
- Drop the faraday/nand.h to remove dependency to Faraday A36x patch series.
- CONFIG_SYS_NAND_TIMING -> CONFIG_SYS_FTNANDC021_TIMING
- Remove non-ECC code.
- Implement private hwecc read/write_page functions to get rid of .eccpos & .eccbytes.
- Use macro constants for timeout control

Changes for v3:
- Coding Style cleanup.
- Drop macros for wirtel()/readl(), call them directly.
- Always insert a blank line between declarations and code.
- Replace all the infinite wait loop with a timeout.
- Add '__iomem' to all the declaration of HW register pointers.
- Re-write this driver with ECC enabled and correct column address handling for OOB read/write,
- Fix issuses addressed by Scott.

Changes for v2:
- Coding Style cleanup.
- Use readl(), writel(), clrsetbits_le32() to replace REG() macros.
- Use structure based hardware registers to replace the macro constants.
- Replace BIT() with BIT_MASK().

 README                        |   10 +
 drivers/mtd/nand/Makefile     |    1 +
 drivers/mtd/nand/ftnandc021.c |  609 +++++++++++++++++++++++++++++++++++++++++
 include/faraday/ftnandc021.h  |  152 ++++++++++
 4 files changed, 772 insertions(+)
 create mode 100644 drivers/mtd/nand/ftnandc021.c
 create mode 100644 include/faraday/ftnandc021.h

index a5c3e8d..f4b0dbe 100644
@@ -4076,6 +4076,16 @@ Low Level (hardware related) configuration options:
 		- drivers/mtd/nand/ndfc.c
 		- drivers/mtd/nand/mxc_nand.c
 
+- CONFIG_SYS_FTNANDC021_TIMING
+		This option specifies an array of customized timing parameters
+		for Faraday FTNANDC021 NAND flash controller.
+		e.g.
+		#define CONFIG_SYS_FTNANDC021_TIMING \
+			{ CONFIG_NAND_K9F4G08U0B_AC1, CONFIG_NAND_K9F4G08U0B_AC2 }
+		where CONFIG_NAND_K9F4G08U0B_AC[1/2] are the optimized AC
+		timing parameters for register AC_TIMING1 and AC_TIMING2 which
+		control the timing for CLE, ALE, WE and RE signals.
+
 - CONFIG_SYS_NDFC_EBC0_CFG
 		Sets the EBC0_CFG register for the NDFC. If not defined
 		a default value will be used.

index e27e0b7..ee85b8a 100644
@@ -48,6 +48,7 @@ COBJS-$(CONFIG_NAND_FSL_ELBC) += fsl_elbc_nand.o
 COBJS-$(CONFIG_NAND_FSL_IFC) += fsl_ifc_nand.o
 COBJS-$(CONFIG_NAND_FSL_UPM) += fsl_upm.o
 COBJS-$(CONFIG_NAND_FSMC) += fsmc_nand.o
+COBJS-$(CONFIG_NAND_FTNANDC021) += ftnandc021.o
 COBJS-$(CONFIG_NAND_JZ4740) += jz4740_nand.o
 COBJS-$(CONFIG_NAND_KB9202) += kb9202_nand.o
 COBJS-$(CONFIG_NAND_KIRKWOOD) += kirkwood_nand.o

--
1.7.9.5

[snip]

2013/7/30 Scott Wood <[email protected]>:

Got it, thanks.
I'll make a separate cosmetic patch for it. (or probably in V8)

Best wishes,
Kuo-Jung Su

From: Kuo-Jung Su <[email protected]>

This updates the map_physmem()/unmap_physmem(), and use them to implement dma_alloc_coherent() & dma_free_coherent().

It uses 1MB section for each mapping, and thus wastes lots of address space, however this should still be good enough for tiny systems (i.e. u-boot).

---
Changes for v6, v7:
- Nothing updates

Changes for v5:
- Add void dram_bank_mmu_setup() into 'arch/arm/cpu/faraday/cpu.c' to override the weak function in "cache-cp15.c".
- Use small page (4KB) to map relocated exception table to 0x0000

Changes for v4:
- Coding Style cleanup.

Changes for v3:
- Coding Style cleanup.
- Always insert a blank line between declarations and code.
- dma-mapping.h: Have the global data ptr declared outside functions.
- dma-mapping.h: Add #if...#else...#endif to dma_free_coherent().
- Drop static non-cached region, now we use map_physmem()/unmap_physmem() for dynamic mappings.

Changes for v2:
- Coding Style cleanup.
- cache-cp15: Enable write buffer in write-through mode.

 arch/arm/include/asm/dma-mapping.h |   56 ++++++++++++-
 arch/arm/include/asm/global_data.h |    4 +
 arch/arm/include/asm/io.h          |  159 ++++++++++++++++++++++++++++++++++--
 arch/arm/include/asm/system.h      |    7 +-
 arch/arm/lib/cache-cp15.c          |    9 ++
 5 files changed, 223 insertions(+), 12 deletions(-)

index 55a4e26..e066204 100644
@@ -8,22 +8,76 @@
 #ifndef __ASM_ARM_DMA_MAPPING_H
 #define __ASM_ARM_DMA_MAPPING_H
 
+#if defined(CONFIG_FARADAY) && !defined(CONFIG_SYS_DCACHE_OFF)
+#include <asm/u-boot.h>
+#include <asm/global_data.h>
+#include <asm/io.h>
+#include <malloc.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+#endif /* CONFIG_FARADAY && !CONFIG_SYS_DCACHE_OFF */
+
 enum dma_data_direction {
 	DMA_BIDIRECTIONAL	= 0,
 	DMA_TO_DEVICE		= 1,
 	DMA_FROM_DEVICE		= 2,
 };
 
-static void *dma_alloc_coherent(size_t len, unsigned long *handle)
+static inline void *dma_alloc_coherent(size_t len, unsigned long *handle)
 {
+#if defined(CONFIG_FARADAY) && !defined(CONFIG_SYS_DCACHE_OFF)
+	void *map, *va = memalign(ARCH_DMA_MINALIGN, len);
+
+	if (va && gd->arch.cpu_mmu) {
+		invalidate_dcache_range((ulong)va, (ulong)va + len);
+		map = map_physmem((phys_addr_t)va, len, MAP_NOCACHE);
+		if (!map)
+			free(va);
+		va = map;
+	}
+
+	if (handle)
+		*handle = virt_to_phys(va);
+
+	return va;
+#else  /* CONFIG_FARADAY && !CONFIG_SYS_DCACHE_OFF */
 	*handle = (unsigned long)memalign(ARCH_DMA_MINALIGN, len);
 	return (void *)*handle;
+#endif /* CONFIG_FARADAY && !CONFIG_SYS_DCACHE_OFF */
+}
+
+static inline void dma_free_coherent(void *vaddr, ulong len)
+{
+#if defined(CONFIG_FARADAY) && !defined(CONFIG_SYS_DCACHE_OFF)
+	void *tmp = (void *)virt_to_phys(vaddr);
+	unmap_physmem(vaddr, len);
+	vaddr = tmp;
+#endif
+	free(vaddr);
 }
 
 static inline unsigned long dma_map_single(volatile void *vaddr, size_t len,
 					   enum dma_data_direction dir)
 {
+#if defined(CONFIG_FARADAY) && !defined(CONFIG_SYS_DCACHE_OFF)
+	if (gd->arch.cpu_mmu) {
+		switch (dir) {
+		case DMA_BIDIRECTIONAL:
+		case DMA_TO_DEVICE:
+			flush_dcache_range((ulong)vaddr,
+				(ulong)vaddr + len);
+			break;
+
+		case DMA_FROM_DEVICE:
+			invalidate_dcache_range((ulong)vaddr,
+				(ulong)vaddr + len);
+			break;
+		}
+	}
+	return virt_to_phys((void *)vaddr);
+#else  /* CONFIG_FARADAY && !CONFIG_SYS_DCACHE_OFF */
 	return (unsigned long)vaddr;
+#endif /* CONFIG_FARADAY && !CONFIG_SYS_DCACHE_OFF */
 }
 
 static inline void dma_unmap_single(volatile void *vaddr, size_t len,

index 79a9597..587ecbc 100644
@@ -26,6 +26,10 @@ struct arch_global_data {
 	unsigned long	pllb_rate_hz;
 	unsigned long	at91_pllb_usb_init;
 #endif
+#ifdef CONFIG_FARADAY
+	unsigned long   cpu_id;
+	unsigned long   cpu_mmu;	/* has mmu */
+#endif
 	/* "static data" needed by most of timer.c on ARM platforms */
 	unsigned long timer_rate_hz;
 	unsigned long tbu;

index 760345f..050b707 100644
@@ -97,9 +97,10 @@ static inline void set_dacr(unsigned int val)
 
 /* options available for data cache on each page */
 enum dcache_option {
-	DCACHE_OFF = 0x12,
-	DCACHE_WRITETHROUGH = 0x1a,
-	DCACHE_WRITEBACK = 0x1e,
+	DCACHE_OFF = 0x12,          /* non-cached + non-buffered */
+	DCACHE_WRITECOMBINE = 0x16, /* non-cached + buffered */
+	DCACHE_WRITETHROUGH = 0x1a, /* cached + non-buffered */
+	DCACHE_WRITEBACK = 0x1e,    /* cached + buffered */
 };
 
 /* Size of an MMU section */

index 8642010..3259a33 100644
@@ -110,6 +110,10 @@ static inline void mmu_setup(void)
 
 	/* and enable the mmu */
 	reg = get_cr();	/* get control reg. */
+#ifdef CONFIG_FARADAY
+	reg |= CR_W;	/* enable write buffer */
+	reg |= CR_Z;	/* enable branch prediction */
+#endif
 	cp_delay();
 	set_cr(reg | CR_M);
 }

@@ -124,6 +128,11 @@ static void cache_enable(uint32_t cache_bit)
 {
 	uint32_t reg;
 
+#ifdef CONFIG_FARADAY
+	if (!gd->arch.cpu_mmu && (cache_bit == CR_C))
+		return;
+#endif
+
 	/* The data cache is not active unless the mmu is enabled too */
 	if ((cache_bit == CR_C) && !mmu_enabled())
 		mmu_setup();

--
1.7.9.5

From: Kuo-Jung Su <[email protected]>

This adds i/d-cache control, mmu setup & bootstrap code for Faraday cores.

---
Changes for v7:
- Update license to use SPDX identifiers.

Changes for v6:
- Nothing updates

Changes for v5:
- Initial commit which is separated from
"arm: add Faraday common utilities"

 arch/arm/cpu/faraday/Makefile  |   39 ++++
 arch/arm/cpu/faraday/config.mk |   17 ++
 arch/arm/cpu/faraday/cpu.c     |  333 +++++++++++++++++++++++++++++++
 arch/arm/cpu/faraday/start.S   |  419 ++++++++++++++++++++++++++++++++++++++++
 4 files changed, 808 insertions(+)
 create mode 100644 arch/arm/cpu/faraday/Makefile
 create mode 100644 arch/arm/cpu/faraday/config.mk
 create mode 100644 arch/arm/cpu/faraday/cpu.c
 create mode 100644 arch/arm/cpu/faraday/start.S

new file mode 100644
index 0000000..acc09eb
@@ -0,0 +1,39 @@
+#
+# (C) Copyright 2013 Faraday Technology
+# Dante Su <[email protected]>
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= $(obj)lib$(CPU).o
+
+src-y  := cpu.o
+
+START	= start.o
+COBJS	= $(src-y)
+
+ifdef	CONFIG_SPL_BUILD
+ifdef	CONFIG_SPL_NO_CPU_SUPPORT_CODE
+START	:=
+endif
+endif
+
+SRCS	:= $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS	:= $(addprefix $(obj),$(COBJS) $(SOBJS))
+START	:= $(addprefix $(obj),$(START))
+
+all:	$(obj).depend $(START) $(LIB)
+
+$(LIB):	$(OBJS)
+	$(call cmd_link_o_target, $(OBJS))
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################

new file mode 100644
index 0000000..eed9c81
@@ -0,0 +1,17 @@
+#
+# (C) Copyright 2013 Faraday Technology
+# Dante Su <[email protected]>
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+PLATFORM_RELFLAGS += -fno-common -ffixed-r8 -msoft-float
+
+PLATFORM_CPPFLAGS += -march=armv4
+# =========================================================================
+#
+# Supply options according to compiler version
+#
+# =========================================================================
+PF_RELFLAGS_SLB_AT := $(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,))
+PLATFORM_RELFLAGS += $(PF_RELFLAGS_SLB_AT)

--
1.7.9.5

From: Kuo-Jung Su <[email protected]>

---
Changes for v7:
- Update license to use SPDX identifiers.

Changes for v6:
- Nothing updates

Changes for v5:
- Coding Style cleanup.
- Now the irq is always enabled inside irq_install_handler().

Changes for v4:
- Coding Style cleanup.
- Break up from [arm: add Faraday A36x SoC platform support]

Changes for v3:
- Coding Style cleanup.
- Drop macros for wirtel()/readl(), call them directly.
- Always insert a blank line between declarations and code.
- Add '__iomem' to all the declaration of HW register pointers.

Changes for v2:
- Coding Style cleanup.
- Use readl(), writel(), clrsetbits_le32() to replace REG() macros.
- Use structure based hardware registers to replace the macro constants.
- Replace BIT() with BIT_MASK().

 arch/arm/cpu/faraday/Makefile    |    1 +
 arch/arm/cpu/faraday/ftintc020.c |  144 ++++++++++++++++++++++++++++++++++++++
 include/common.h                 |    3 +
 include/faraday/ftintc020.h      |   36 ++++++++++
 4 files changed, 184 insertions(+)
 create mode 100644 arch/arm/cpu/faraday/ftintc020.c
 create mode 100644 include/faraday/ftintc020.h

index acc09eb..6302a1d 100644
@@ -10,6 +10,7 @@ include $(TOPDIR)/config.mk
 LIB	= $(obj)lib$(CPU).o
 
 src-y  := cpu.o
+src-$(CONFIG_FTINTC020)   += ftintc020.o
 
 START	= start.o
 COBJS	= $(src-y)

index 8addf43..dbebecf 100644
@@ -94,6 +94,9 @@ typedef volatile unsigned char	vu_char;
 #ifdef CONFIG_SOC_DA8XX
 #include <asm/arch/hardware.h>
 #endif
+#ifdef CONFIG_FARADAY
+#include <asm/arch-faraday/interrupt.h>
+#endif
 
 #include <part.h>
 #include <flash.h>

new file mode 100644
index 0000000..1afeb7c
@@ -0,0 +1,36 @@
+/*
+ * arch/arm/cpu/faraday/ftintc020.h
+ *
+ * (C) Copyright 2013 Faraday Technology
+ * Dante Su <[email protected]>
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#ifndef ARCH_ARM_CPU_FARADAY_FTINTC020_H
+#define ARCH_ARM_CPU_FARADAY_FTINTC020_H
+
+struct ftintc020_pic_regs {
+	uint32_t src; /* source register */
+	uint32_t ena; /* enable register */
+	uint32_t scr; /* status clear register */
+	uint32_t tmr; /* trigger mode register */
+	uint32_t tlr; /* trigger level register */
+	uint32_t sr;  /* status register */
+	uint32_t rsvd[2];
+};
+
+struct ftintc020_regs {
+	/* IRQ/FIQ:  0 ~ 31 */
+	struct ftintc020_pic_regs irq32; /* 0x00 - 0x1C: IRQ 0 ~ 31 */
+	struct ftintc020_pic_regs fiq32; /* 0x20 - 0x3C: FIQ 0 ~ 31 */
+	uint32_t rsvd1[4];               /* 0x40 - 0x4C: Reserved */
+	uint32_t revision;               /* 0x50: Revision Register */
+	uint32_t feature;                /* 0x54: Feature Register */
+	uint32_t rsvd2[2];               /* 0x58 - 0x5C: Reserved */
+	/* IRQ/FIQ: 32 ~ 63 */
+	struct ftintc020_pic_regs irq64; /* 0x60 - 0x7C: IRQ 32 ~ 63 */
+	struct ftintc020_pic_regs fiq64; /* 0x80 - 0x9C: FIQ 32 ~ 63 */
+};
+
+#endif

--
1.7.9.5

From: Kuo-Jung Su <[email protected]>

---
Changes for v7:
- Update license to use SPDX identifiers.

Changes for v6:
- Nothing updates

Changes for v5:
- Drop IRQ dependant implementation
- Use gd->arch.timer_rate_hz for timer clock source
- Use gd->arch.tbl for timestamp

Changes for v4:
- Coding Style cleanup.
- Break up from [arm: add Faraday A36x SoC platform support]

Changes for v3:
- Coding Style cleanup.
- Drop macros for wirtel()/readl(), call them directly.
- Always insert a blank line between declarations and code.
- Add '__iomem' to all the declaration of HW register pointers.

Changes for v2:
- Coding Style cleanup.
- Use readl(), writel(), clrsetbits_le32() to replace REG() macros.
- Use structure based hardware registers to replace the macro constants.
- Replace BIT() with BIT_MASK().

 arch/arm/cpu/faraday/Makefile   |    1 +
 arch/arm/cpu/faraday/fttmr010.c |  124 +++++++++++++++++++++++++++++++++++++++
 include/faraday/fttmr010.h      |   17 ++++++
 3 files changed, 142 insertions(+)
 create mode 100644 arch/arm/cpu/faraday/fttmr010.c

index 6302a1d..df28792 100644
@@ -11,6 +11,7 @@ LIB	= $(obj)lib$(CPU).o
 
 src-y  := cpu.o
 src-$(CONFIG_FTINTC020)   += ftintc020.o
+src-$(CONFIG_FTTMR010)    += fttmr010.o
 
 START	= start.o
 COBJS	= $(src-y)

index 2ab68d1..21ab113 100644
@@ -45,6 +45,16 @@ struct fttmr010 {
 #define FTTMR010_TM1_CLOCK	(1 << 1)
 #define FTTMR010_TM1_ENABLE	(1 << 0)
 
+#define FTTMR010_TM1_CRMASK \
+	(FTTMR010_TM1_UPDOWN | FTTMR010_TM1_OFENABLE \
+	| FTTMR010_TM1_CLOCK | FTTMR010_TM1_ENABLE)
+#define FTTMR010_TM2_CRMASK \
+	(FTTMR010_TM2_UPDOWN | FTTMR010_TM2_OFENABLE \
+	| FTTMR010_TM2_CLOCK | FTTMR010_TM2_ENABLE)
+#define FTTMR010_TM3_CRMASK \
+	(FTTMR010_TM3_UPDOWN | FTTMR010_TM3_OFENABLE \
+	| FTTMR010_TM3_CLOCK | FTTMR010_TM3_ENABLE)
+
 /*
  * Timer Interrupt State & Mask Registers
  */

@@ -58,4 +68,11 @@ struct fttmr010 {
 #define FTTMR010_TM1_MATCH2	(1 << 1)
 #define FTTMR010_TM1_MATCH1	(1 << 0)
 
+#define FTTMR010_TM1_ISRMASK \
+	(FTTMR010_TM1_OVERFLOW | FTTMR010_TM1_MATCH2 | FTTMR010_TM1_MATCH1)
+#define FTTMR010_TM2_ISRMASK \
+	(FTTMR010_TM2_OVERFLOW | FTTMR010_TM2_MATCH2 | FTTMR010_TM2_MATCH1)
+#define FTTMR010_TM3_ISRMASK \
+	(FTTMR010_TM3_OVERFLOW | FTTMR010_TM3_MATCH2 | FTTMR010_TM3_MATCH1)
+
 #endif	/* __FTTMR010_H */

--
1.7.9.5

From: Kuo-Jung Su <[email protected]>

---
Changes for v7:
- Update license to use SPDX identifiers.

Changes for v6:
- Nothing updates

Changes for v5:
- Drop IRQ dependant implementation
- Use gd->arch.timer_rate_hz for timer clock source
- Use gd->arch.tbl for timestamp

Changes for v4:
- Coding Style cleanup.
- Break up from [arm: add Faraday A36x SoC platform support]

Changes for v3:
- Coding Style cleanup.
- Drop macros for wirtel()/readl(), call them directly.
- Always insert a blank line between declarations and code.
- Add '__iomem' to all the declaration of HW register pointers.

Changes for v2:
- Coding Style cleanup.
- Use readl(), writel(), clrsetbits_le32() to replace REG() macros.
- Use structure based hardware registers to replace the macro constants.
- Replace BIT() with BIT_MASK().

 arch/arm/cpu/faraday/Makefile      |    1 +
 arch/arm/cpu/faraday/ftpwmtmr010.c |  116 ++++++++++++++++++++++++++++++++++++
 include/faraday/ftpwmtmr010.h      |   40 +++++++++++++
 3 files changed, 157 insertions(+)
 create mode 100644 arch/arm/cpu/faraday/ftpwmtmr010.c
 create mode 100644 include/faraday/ftpwmtmr010.h

index df28792..715bb5d 100644
@@ -12,6 +12,7 @@ LIB	= $(obj)lib$(CPU).o
 src-y  := cpu.o
 src-$(CONFIG_FTINTC020)   += ftintc020.o
 src-$(CONFIG_FTTMR010)    += fttmr010.o
+src-$(CONFIG_FTPWMTMR010) += ftpwmtmr010.o
 
 START	= start.o
 COBJS	= $(src-y)

new file mode 100644
index 0000000..806f4c0
@@ -0,0 +1,40 @@
+/*
+ * arch/arm/cpu/faraday/ftpwmtmr010.h
+ *
+ * (C) Copyright 2013 Faraday Technology
+ * Dante Su <[email protected]>
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#ifndef ARCH_ARM_CPU_FARADAY_FTPWMTMR010_H
+#define ARCH_ARM_CPU_FARADAY_FTPWMTMR010_H
+
+struct ftpwmtmr010_timer {
+	uint32_t ctrl;	/* Control */
+#define CTRL_EXTCLK			(1 << 0) /* use external clock */
+#define CTRL_START			(1 << 1) /* timer start */
+#define CTRL_UPDATE			(1 << 2) /* update timer counter */
+#define CTRL_AUTORELOAD		(1 << 4) /* auto-reload timer counter */
+#define CTRL_INTEN			(1 << 5) /* interrupt enabled */
+
+	uint32_t cntb;	/* Count buffer */
+	uint32_t cmpb;	/* Compare buffer */
+	uint32_t cnto;	/* Count observation */
+};
+
+struct ftpwmtmr010_regs {
+	/* 0x00: Interrupt status register */
+	uint32_t isr;
+
+	/* 0x04 - 0x0C: Reserved */
+	uint32_t rsvd[3];
+
+	/* 0x10 - 0x8C: timer registers */
+	struct ftpwmtmr010_timer t[8];
+
+	/* 0x90: Revision register */
+	uint32_t rev;
+};
+
+#endif

--
1.7.9.5

From: Kuo-Jung Su <[email protected]>

At the time of writting, none of Faraday NAND & SPI controllers supports XIP (eXecute In Place), and the 1st stage bootstrap stored in embedded ROM is not compatible to U-Boot design.

So this patch is added to support booting from Faraday Images.

---
Changes for v7:
- Update license to use SPDX identifiers.

Changes for v6:
- Fix compiler warnning
- Use shorter paragraph in commit message, and move the original statement into the top of cmd_bootfa.c.

Changes for v5:
- Rename from 'arm: add Faraday firmware image utility' into 'arm: add Faraday specific boot command'
- Add missing CRC check to the command 'bootfa'.
- Add rationale to the command 'bootfa'.

Changes for v4:
- Coding Style cleanup.
- Break up from [arm: add Faraday A36x SoC platform support]

Changes for v3:
- Coding Style cleanup.
- Always insert a blank line between declarations and code.

Changes for v2:
- Coding Style cleanup.

 arch/arm/cpu/faraday/Makefile     |    2 +-
 arch/arm/cpu/faraday/cmd_bootfa.c |  267 +++++++++++++++++++++++++++++++++++++
 arch/arm/cpu/faraday/fwimage.h    |   35 +++++
 arch/arm/cpu/faraday/fwimage2.h   |   55 ++++++++
 arch/arm/cpu/u-boot.lds           |   11 ++
 5 files changed, 369 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/cpu/faraday/cmd_bootfa.c
 create mode 100644 arch/arm/cpu/faraday/fwimage.h
 create mode 100644 arch/arm/cpu/faraday/fwimage2.h

index 715bb5d..289823c 100644
@@ -9,7 +9,7 @@ include $(TOPDIR)/config.mk
 
 LIB	= $(obj)lib$(CPU).o
 
-src-y  := cpu.o
+src-y  := cpu.o cmd_bootfa.o
 src-$(CONFIG_FTINTC020)   += ftintc020.o
 src-$(CONFIG_FTTMR010)    += fttmr010.o
 src-$(CONFIG_FTPWMTMR010) += ftpwmtmr010.o

new file mode 100644
index 0000000..c01799b
@@ -0,0 +1,35 @@
+/*
+ * linux/arch/arm/plat-faraday/fwimage.h
+ *
+ * (C) Copyright 2013 Faraday Technology
+ * Dante Su <[email protected]>
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#ifndef _ARCH_ARM_PLAT_FARADAY_FWIMAGE_H
+#define _ARCH_ARM_PLAT_FARADAY_FWIMAGE_H
+
+struct fwparam {
+	uint32_t count;
+	uint32_t version; /* ycmo100525: for firmware image version */
+	uint32_t addr[31];
+	uint32_t data[31];
+};
+
+struct fwfile {
+	char name[64];
+	uint32_t size;
+};
+
+struct fwimage {
+	uint32_t magic; /* Image Header Magic */
+	uint32_t length;/* Image Header Length */
+
+	/* 256 bytes, embedded paramters area */
+	struct fwparam param;
+
+	struct fwfile  file[1];
+};
+
+#endif /* _ARCH_ARM_PLAT_FARADAY_FWIMAGE_H */

index 490aed2..f3ea681 100644
@@ -7,6 +7,8 @@
  * SPDX-License-Identifier:	GPL-2.0+
  */
 
+#include <config.h>
+
 OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
 OUTPUT_ARCH(arm)
 ENTRY(_start)

@@ -19,6 +21,15 @@ SECTIONS
 	{
 		*(.__image_copy_start)
 		CPUDIR/start.o (.text*)
+#ifdef CONFIG_FARADAY
+		/*
+		 * Dante Su 2012.10.09:
+		 * Reserved for the faimage v2.1.
+		 * 1. CPUDIR/start.o: It shall never be > 4KB.
+		 * 2. faimage header: It shall always be stored at 0x1000, and <= 1KB.
+		 */
+		. = 0x00001400;
+#endif
 		*(.text*)
 	}
 

--
1.7.9.5

Hi Kuo-Jung,

Sorry, but I don't see why SPL could not run in SRAM as the 2nd bootloader in your description; SPL certainly does not try to "alter a embedded ROM". So, please rewrite the paragraph with the correct reason why SPL cannot be the 2nd bootloader, e.g., is it

- because the 2nd bootloader is actually in ROM?
- because the SRAM is too small?
- ...

In any case:

"Drop"? Certainly not. "Introduce a new image format where U-Boot is prepended with a header defined as follow...", yes -- you can even make a case that, if SPL cannot be the 2nd bootloader, then SPL is actually "dropped" for this platform. Please rewrite.

Also: could the whole description and rationale be moved to some README.* file either arch/arm/cpu/faraday or in doc/ so that readers oof the C file can see the start of the actual code without having to scroll through hundreds of comment lines?

Amicalement,

Albert.

2013/9/14 Albert ARIBAUD <[email protected]>:

Got it, thanks.
I'll try to study the SPL again, and rewrite the paragraph.

Got it, thanks

Got it, thanks

Best wishes,
Kuo-Jung Su

From: Kuo-Jung Su <[email protected]>

This updates ftsdc010_mci.c for latest Faraday clock APIs.

---
Changes for v6, v7:
- Nothing updates

Changes for v5:
- Initial commit

 drivers/mmc/ftsdc010_mci.c |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

index 7600d5c..54976b0 100644
@@ -366,7 +366,7 @@ int ftsdc010_mmc_init(int devid)
 #ifdef CONFIG_SYS_CLK_FREQ
 	chip->sclk = CONFIG_SYS_CLK_FREQ;
 #else
-	chip->sclk = clk_get_rate("SDC");
+	chip->sclk = clock_get_rate(MMC_CLK);
 #endif
 
 	mmc->voltages  = MMC_VDD_32_33 | MMC_VDD_33_34;

--
1.7.9.5

From: Kuo-Jung Su <[email protected]>

This adds board support for the Faraday A360/A369 SoC platforms.

Working functions:
- MMU/D-cache
- SD Host controller
- USB EHCI controller
- USB Gadget controller
- Network
- NAND

---
Changes for v7:
- Update license to use SPDX identifiers.

Changes for v6:
- arch/arm/cpu/faraday/cpu.c:

     struct ftwdt010_wdt __iomem *regs -> struct ftwdt010_wdt *regs

Changes for v5:
- Coding Style cleanup:
1. struct chip_regs __iomem *regs -> struct chip_regs *regs
2. Move Faraday specific APIs into asm/arch-faraday/*.h
- Fix Copyright notices (dates) throughout the patch
- Define Faraday machine type in board's config header file
- Add myself as the maintainer for Faraday A360/A369 in MAINTAINERS.
- Drop i2c:FTI2C010 & spi:FTSSP010_SPI support. The corresponding patch would restart after this patch series have been accepted.
- Revise clock management system

Changes for v4:
- Coding Style cleanup.
- Break-down the interrupt, timers and common utilties.

Changes for v3:
- Coding Style cleanup.
- Drop macros for wirtel()/readl(), call them directly.
- Always insert a blank line between declarations and code.
- Add '__iomem' to all the declaration of HW register pointers.
- a36x_config: No more static global network configurations.
- a36x_config: Add a common file for the redundant configurations.

Changes for v2:
- Coding Style cleanup.
- Use readl(), writel(), clrsetbits_le32() to replace REG() macros.
- Use structure based hardware registers to replace the macro constants.
- Replace BIT() with BIT_MASK().

 MAINTAINERS                                   |    5 +
 arch/arm/cpu/faraday/a360/Makefile            |   33 ++++
 arch/arm/cpu/faraday/a369/Makefile            |   34 ++++
 arch/arm/cpu/faraday/a369/cmd_fa606.c         |   74 ++++++++
 arch/arm/include/asm/arch-a360/hardware.h     |   72 ++++++++
 arch/arm/include/asm/arch-a360/pmu.h          |   83 +++++++++
 arch/arm/include/asm/arch-a360/scu.h          |   67 +++++++
 arch/arm/include/asm/arch-a369/ahbc.h         |   22 +++
 arch/arm/include/asm/arch-a369/hardware.h     |   86 +++++++++
 arch/arm/include/asm/arch-a369/scu.h          |  212 ++++++++++++++++++++++
 arch/arm/include/asm/arch-faraday/clock.h     |   29 +++
 arch/arm/include/asm/arch-faraday/interrupt.h |   17 ++
 board/faraday/a360evb/Makefile                |   29 +++
 board/faraday/a360evb/board.c                 |   71 ++++++++
 board/faraday/a360evb/clock.c                 |   71 ++++++++
 board/faraday/a360evb/config.mk               |   17 ++
 board/faraday/a360evb/lowlevel_init.S         |   16 ++
 board/faraday/a369evb/Makefile                |   29 +++
 board/faraday/a369evb/board.c                 |  175 ++++++++++++++++++
 board/faraday/a369evb/clock.c                 |   81 +++++++++
 board/faraday/a369evb/config.mk               |   17 ++
 board/faraday/a369evb/lowlevel_init.S         |  119 ++++++++++++
 boards.cfg                                    |    3 +
 include/common.h                              |    2 +
 include/configs/a360.h                        |   70 +++++++
 include/configs/a369-common.h                 |   85 +++++++++
 include/configs/a369.h                        |   47 +++++
 include/configs/a369_fa606te.h                |   40 ++++
 include/configs/faraday-common.h              |  242 +++++++++++++++++++++++++
 include/faraday/ftsmc020.h                    |    1 +
 30 files changed, 1849 insertions(+)
 create mode 100644 arch/arm/cpu/faraday/a360/Makefile
 create mode 100644 arch/arm/cpu/faraday/a369/Makefile
 create mode 100644 arch/arm/cpu/faraday/a369/cmd_fa606.c
 create mode 100644 arch/arm/include/asm/arch-a360/hardware.h
 create mode 100644 arch/arm/include/asm/arch-a360/pmu.h
 create mode 100644 arch/arm/include/asm/arch-a360/scu.h
 create mode 100644 arch/arm/include/asm/arch-a369/ahbc.h
 create mode 100644 arch/arm/include/asm/arch-a369/hardware.h
 create mode 100644 arch/arm/include/asm/arch-a369/scu.h
 create mode 100644 arch/arm/include/asm/arch-faraday/clock.h
 create mode 100644 arch/arm/include/asm/arch-faraday/interrupt.h
 create mode 100644 board/faraday/a360evb/Makefile
 create mode 100644 board/faraday/a360evb/board.c
 create mode 100644 board/faraday/a360evb/clock.c
 create mode 100644 board/faraday/a360evb/config.mk
 create mode 100644 board/faraday/a360evb/lowlevel_init.S
 create mode 100644 board/faraday/a369evb/Makefile
 create mode 100644 board/faraday/a369evb/board.c
 create mode 100644 board/faraday/a369evb/clock.c
 create mode 100644 board/faraday/a369evb/config.mk
 create mode 100644 board/faraday/a369evb/lowlevel_init.S
 create mode 100644 include/configs/a360.h
 create mode 100644 include/configs/a369-common.h
 create mode 100644 include/configs/a369.h
 create mode 100644 include/configs/a369_fa606te.h
 create mode 100644 include/configs/faraday-common.h

index 081cf96..c0d4417 100644
@@ -644,6 +644,11 @@ Po-Yu Chuang <[email protected]>
 
 	a320evb		FA526 (ARM920T-like) (a320 SoC)
 
+Kuo-Jung Su <[email protected]>
+
+	a360evb		FA626TE (Faraday ARMv5TE) (a360 SoC)
+	a369evb		FA626TE & FA606TE (Faraday ARMv5TE) (a369 SoC)
+
 Eric Cooper <[email protected]>
 
 	dockstar	ARM926EJS (Kirkwood SoC)

new file mode 100644
index 0000000..aecae59
@@ -0,0 +1,33 @@
+#
+# (C) Copyright 2013 Faraday Technology
+# Dante Su <[email protected]>
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= $(obj)lib$(SOC).o
+
+obj-y   :=
+
+COBJS	:= $(obj-y)
+SOBJS	:=
+
+SRCS	:= $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS	:= $(addprefix $(obj),$(COBJS) $(SOBJS))
+START	:= $(addprefix $(obj),$(START))
+
+all:	$(obj).depend $(LIB)
+
+$(LIB):	$(OBJS)
+	$(call cmd_link_o_target, $(OBJS))
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################

new file mode 100644
index 0000000..69376c3
@@ -0,0 +1,34 @@
+#
+# (C) Copyright 2013 Faraday Technology
+# Dante Su <[email protected]>
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= $(obj)lib$(SOC).o
+
+obj-y   :=
+obj-$(CONFIG_CMD_FA606) += cmd_fa606.o
+
+COBJS	:= $(obj-y)
+SOBJS	:=
+
+SRCS	:= $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS	:= $(addprefix $(obj),$(COBJS) $(SOBJS))
+START	:= $(addprefix $(obj),$(START))
+
+all:	$(obj).depend $(LIB)
+
+$(LIB):	$(OBJS)
+	$(call cmd_link_o_target, $(OBJS))
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################

new file mode 100644
index 0000000..30e6724
@@ -0,0 +1,22 @@
+/*
+ * arch/arm/include/asm/arch-a369/ahbc.h
+ *
+ * (C) Copyright 2013 Faraday Technology
+ * Dante Su <[email protected]>
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#ifndef __ASM_ARCH_AHBC_H
+#define __ASM_ARCH_AHBC_H
+
+struct a369ahbc_regs {
+	uint32_t slave[32];/* Slave Device Configurations */
+	uint32_t priority; /* Priority */
+	uint32_t idle_cnt; /* IDLE Counter */
+	uint32_t control;  /* Control Register */
+	uint32_t revision; /* Revision ID */
+	uint32_t cpusao;   /* CPUS (FA606TE) Address Offset */
+};
+
+#endif

new file mode 100644
index 0000000..6c10415
@@ -0,0 +1,29 @@
+/*
+ * asm/arch-faraday/clock.h
+ *
+ * (C) Copyright 2013 Faraday Technology
+ * Dante Su <[email protected]>
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#ifndef _ASM_ARCH_FARADAY_CLOCK_H
+#define _ASM_ARCH_FARADAY_CLOCK_H
+
+/* Clock identifiers */
+enum clk_id {
+	SYS_CLK,
+	AHB_CLK,
+	APB_CLK,
+	CPU_CLK,
+	I2C_CLK,
+	MMC_CLK,
+	SDC_CLK,
+	SPI_CLK,
+	SSP_CLK,
+};
+
+void  clock_init(void);
+ulong clock_get_rate(enum clk_id id);
+
+#endif	/* _ASM_ARCH_FARADAY_CLOCK_H */

new file mode 100644
index 0000000..5eb406c
@@ -0,0 +1,17 @@
+/*
+ * asm/arch-faraday/interrupt.h
+ *
+ * (C) Copyright 2013 Faraday Technology
+ * Dante Su <[email protected]>
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#ifndef _ASM_ARCH_FARADAY_INTERRUPT_H
+#define _ASM_ARCH_FARADAY_INTERRUPT_H
+
+void irq_set_trigger(int irq, int edge, int low);
+void irq_enable(int irq);
+void irq_disable(int irq);
+
+#endif	/* _ASM_ARCH_FARADAY_INTERRUPT_H */

new file mode 100644
index 0000000..233f6d3
@@ -0,0 +1,29 @@
+#
+# (C) Copyright 2013 Faraday Technology
+# Dante Su <[email protected]>
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= $(obj)lib$(BOARD).o
+
+COBJS	:= board.o clock.o
+SOBJS	:= lowlevel_init.o
+
+SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS	:= $(addprefix $(obj),$(COBJS))
+SOBJS	:= $(addprefix $(obj),$(SOBJS))
+
+$(LIB):	$(obj).depend $(OBJS) $(SOBJS)
+	$(call cmd_link_o_target, $(OBJS) $(SOBJS))
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################

new file mode 100644
index 0000000..bbc18c8
@@ -0,0 +1,17 @@
+#
+# (C) Copyright 2013 Faraday Technology
+# Dante Su <[email protected]>
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+#########################################################################
+
+ALL += $(obj)u-boot.img
+
+# Environment variables in NAND
+#ifeq ($(ENV),NAND)
+#PLATFORM_RELFLAGS += -DCONFIG_ENV_IS_IN_NAND
+#else
+#PLATFORM_RELFLAGS += -DCONFIG_ENV_IS_IN_FLASH
+#endif

new file mode 100644
index 0000000..90480aa
@@ -0,0 +1,16 @@
+/*
+ * Board specific setup info
+ *
+ * (C) Copyright 2013 Faraday Technology
+ * Dante Su <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <config.h>
+#include <version.h>
+
+/* Set up the platform, once the cpu has been initialized */
+.globl lowlevel_init
+lowlevel_init:
+	mov	pc,lr

new file mode 100644
index 0000000..233f6d3
@@ -0,0 +1,29 @@
+#
+# (C) Copyright 2013 Faraday Technology
+# Dante Su <[email protected]>
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= $(obj)lib$(BOARD).o
+
+COBJS	:= board.o clock.o
+SOBJS	:= lowlevel_init.o
+
+SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS	:= $(addprefix $(obj),$(COBJS))
+SOBJS	:= $(addprefix $(obj),$(SOBJS))
+
+$(LIB):	$(obj).depend $(OBJS) $(SOBJS)
+	$(call cmd_link_o_target, $(OBJS) $(SOBJS))
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################

new file mode 100644
index 0000000..bbc18c8
@@ -0,0 +1,17 @@
+#
+# (C) Copyright 2013 Faraday Technology
+# Dante Su <[email protected]>
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+#########################################################################
+
+ALL += $(obj)u-boot.img
+
+# Environment variables in NAND
+#ifeq ($(ENV),NAND)
+#PLATFORM_RELFLAGS += -DCONFIG_ENV_IS_IN_NAND
+#else
+#PLATFORM_RELFLAGS += -DCONFIG_ENV_IS_IN_FLASH
+#endif

index 944ed4c..ed45524 100644
@@ -72,6 +72,9 @@ mini2440                     arm         arm920t     mini2440            friendl
 VCMA9                        arm         arm920t     vcma9               mpl            s3c24x0
 smdk2410                     arm         arm920t     -                   samsung        s3c24x0
 omap1510inn                  arm         arm925t     -                   ti
+a360                         arm         faraday     a360evb             faraday        a360
+a369                         arm         faraday     a369evb             faraday        a369
+a369_fa606te                 arm         faraday     a369evb             faraday        a369
 integratorap_cm926ejs        arm         arm926ejs   integrator          armltd         -           integratorap:CM926EJ_S
 integratorcp_cm926ejs        arm         arm926ejs   integrator          armltd         -           integratorcp:CM924EJ_S
 aspenite                     arm         arm926ejs   -                   Marvell        armada100

index dbebecf..ab9f0d2 100644
@@ -95,6 +95,8 @@ typedef volatile unsigned char	vu_char;
 #include <asm/arch/hardware.h>
 #endif
 #ifdef CONFIG_FARADAY
+#include <asm/arch/hardware.h>
+#include <asm/arch-faraday/clock.h>
 #include <asm/arch-faraday/interrupt.h>
 #endif
 

new file mode 100644
index 0000000..521f14e
@@ -0,0 +1,40 @@
+/*
+ * (C) Copyright 2013 Faraday Technology
+ * Dante Su <[email protected]>
+ *
+ * Support for Faraday A369(FIE3369) boards.
+ * Tested on A369 EVB2 with 512MB SDRAM and 256MB nand flash.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#define CONFIG_A369_FA606TE_PLATFORM
+
+/* Support external AHB */
+/* #define CONFIG_SUPP_EXTAHB */
+
+/* Support USB RNDIS Ethernet */
+/* #define CONFIG_SUPP_USB_RNDIS */
+
+/* Support VGA Console */
+/* #define CONFIG_SUPP_VGA_CONSOLE */
+
+/* Support interrupt */
+/* #define CONFIG_USE_IRQ */
+
+/* Disable MMU/D-CACHE */
+#define CONFIG_SYS_DCACHE_OFF
+
+/* Disable I-CACHE */
+#define CONFIG_SYS_ICACHE_OFF
+
+/* Set interrupt controler to FTINCT020.1 */
+#define CONFIG_FTINTC020_BASE       CONFIG_FTINTC020_BASE1
+
+/* A369 common configuration */
+#include "a369-common.h"
+
+#endif

index 54120ab..89809b6 100644
@@ -70,5 +70,6 @@ void ftsmc020_init(void);
 #define FTSMC020_TPR_WTC(x)	(((x) & 0x3) << 6)
 #define FTSMC020_TPR_AHT(x)	(((x) & 0x3) << 4)
 #define FTSMC020_TPR_TRNA(x)	(((x) & 0xf) << 0)
+#define FTSMC020_TPR_WORST	0x0f1ff3ff /* worst but safe */
 
 #endif	/* __FTSMC020_H */

--
1.7.9.5

From: Kuo-Jung Su <[email protected]>

Faraday FTNANDC021 is an integrated NAND flash controller. It use a build-in command table to abstract the underlying NAND flash control logic.

For example:

Issuing a command 0x10 to FTNANDC021 would result in a page write + a read status operation.

---
Changes for v8:
- Add ftnandc021 spl driver
- Drop '#include <asm/unaligned.h>'
- Coding style cleanup
- Update NAND flash ecc layout
- Split from Faraday A36x patch series

Changes for v7:
- ftnandc021.[ch]: Update license to use SPDX identifiers.
- ftnandc021.c: put_unaligned() -> memcpy()
- ftnandc021.c: update ecc relatived function prototypes to fix compile warnnings.

Changes for v6:
- Update README for CONFIG_SYS_FTNANDC021_TIMING
- Remove illegal type-punning by introducing put_unaligned() & get_unaligned().

Changes for v5 (Part of A360/A369 patch series):
- Coding Style cleanup:

     struct chip_regs __iomem *regs -> struct chip_regs *regs

- For there is a strong dependancy between this and A360/A369 patch series, it had been chained back to A360/A369 patch series.
- The latest nand_base requires the ecc.strength to be set properlly, so this patch adds ecc.strength setting accroding to ECC algorithm.

Changes for v5 (Standalone):
- Update README for the description of CONFIG_SYS_FTNANDC021_TIMING.
- Drop redundant white space. (i.e. if (mtd->writesize >= ' '4096))

Changes for v4:
- Make it a separate patch, rather then a part of Faraday A36x patch series
- Drop the faraday/nand.h to remove dependency to Faraday A36x patch series.
- CONFIG_SYS_NAND_TIMING -> CONFIG_SYS_FTNANDC021_TIMING
- Remove non-ECC code.
- Implement private hwecc read/write_page functions to get rid of .eccpos & .eccbytes.
- Use macro constants for timeout control

Changes for v3:
- Coding Style cleanup.
- Drop macros for wirtel()/readl(), call them directly.
- Always insert a blank line between declarations and code.
- Replace all the infinite wait loop with a timeout.
- Add '__iomem' to all the declaration of HW register pointers.
- Re-write this driver with ECC enabled and correct column address handling for OOB read/write.
- Fix issuses addressed by Scott.

Changes for v2:
- Coding Style cleanup.
- Use readl(), writel(), clrsetbits_le32() to replace REG() macros.
- Use structure based hardware registers to replace the macro constants.
- Replace BIT() with BIT_MASK().

 README                            |    6 +
 drivers/mtd/nand/Makefile         |    2 +
 drivers/mtd/nand/ftnandc021.c     |  608 +++++++++++++++++++++++++++++++++++++
 drivers/mtd/nand/ftnandc021_spl.c |  203 +++++++++++++
 include/faraday/ftnandc021.h      |  151 +++++++++
 5 files changed, 970 insertions(+)
 create mode 100644 drivers/mtd/nand/ftnandc021.c
 create mode 100644 drivers/mtd/nand/ftnandc021_spl.c
 create mode 100644 include/faraday/ftnandc021.h

index 5def773..a8d3039 100644
@@ -4227,6 +4227,12 @@ Low Level (hardware related) configuration options:
 		- drivers/mtd/nand/ndfc.c
 		- drivers/mtd/nand/mxc_nand.c
 
+- CONFIG_SYS_FTNANDC021_TIMING
+		This option specifies an array of customized timing parameters
+		for Faraday FTNANDC021 NAND flash controller.
+		e.g.
+		#define CONFIG_SYS_FTNANDC021_TIMING { 0x02240264, 0x42054209 }
+
 - CONFIG_SYS_NDFC_EBC0_CFG
 		Sets the EBC0_CFG register for the NDFC. If not defined
 		a default value will be used.

index e145cd1..7e6d441 100644
@@ -45,6 +45,7 @@ obj-$(CONFIG_NAND_FSL_ELBC) += fsl_elbc_nand.o
 obj-$(CONFIG_NAND_FSL_IFC) += fsl_ifc_nand.o
 obj-$(CONFIG_NAND_FSL_UPM) += fsl_upm.o
 obj-$(CONFIG_NAND_FSMC) += fsmc_nand.o
+obj-$(CONFIG_NAND_FTNANDC021) += ftnandc021.o
 obj-$(CONFIG_NAND_JZ4740) += jz4740_nand.o
 obj-$(CONFIG_NAND_KB9202) += kb9202_nand.o
 obj-$(CONFIG_NAND_KIRKWOOD) += kirkwood_nand.o

@@ -66,6 +67,7 @@ else  # minimal SPL drivers
 
 obj-$(CONFIG_NAND_FSL_ELBC) += fsl_elbc_spl.o
 obj-$(CONFIG_NAND_FSL_IFC) += fsl_ifc_spl.o
+obj-$(CONFIG_NAND_FTNANDC021) += ftnandc021_spl.o
 obj-$(CONFIG_NAND_MXC) += mxc_nand_spl.o
 
 endif # drivers

--
1.7.9.5

Please unsplit (or just have the custodian that takes the other Faraday patches take this with the ack). My understanding is that U-Boot's dead code rules prevent me from applying this separately from a board that uses it (it also makes it hard for me to verify that it builds).

-Scott

Got it, thanks, and sorry for the mess I made.

I'll send out the unsplit patch after the Faraday platform patches got commited.

2014-03-04 10:17 GMT+08:00 Scott Wood <[email protected]>:

Best wishes,
Kuo-Jung Su

From: Kuo-Jung Su <[email protected]>

These patches introduce Faraday A36x SoC platform support.

Here are some public documents for your reference.

http://www.faraday-tech.com/html/documentation/index.html

There is also a A369 QEMU emulator available at my github account:

https://github.com/dantesu1218/qemu.git

Here is quick start for QEMU + U-Boot:

1. Download the QEMU source tree

   $ git clone -b qemu-1.5.1 https://github.com/dantesu1218/qemu.git

2. Build & Install the QEMU:

   $ ./configure --target-list=arm-softmmu
   $ make
   $ make install

3. Launch u-boot with QEMU:

   $ qemu-system-arm -M a369 -m 512M -nographic -kernel ~/u-boot-2014.01/u-boot

Changes for v8:
- Revise MMU/D-cache support
- Revise Faraday SoC common configurations.
- Drop FTINTC020 interrupt controller support.
- Drop FTLCDC200 LCD controller support.
- Drop FTNANDC021 NAND flash controller support, it would be latter submitted as a standalone patch set.
- Drop proprietary Faraday SPL support, the u-boot-spl would be adapted instead. However because it depends on the FTNANDC021 patch set, so it would be submitted after the FTNANDC021 patch set get committed.

Changes for v7:
- Update license to use SPDX identifiers.
- cfi_flash: drop the patch to unmap_physmem(), because it's already applied.
- ftnandc021: put_unaligned() -> memcpy()
- ftnandc021: update ecc relatived function prototypes to fix compile warnnings.

Changes for v6:
- Drop ethernet driver updates for ftmac110&ftgmac100, because they are already commited.
- arch/arm/cpu/faraday/cpu.c:

     struct ftwdt010_wdt __iomem *regs -> struct ftwdt010_wdt *regs

- arch/arm/cpu/faraday/cmd_bootfa.c: fix compiler warnning
- arch/arm/cpu/faraday/cmd_bootfa.c: use shorter paragraph in commit message, and move the original statement into the top of source file.
- ftnandc021: update README for CONFIG_SYS_FTNANDC021_TIMING
- ftnandc021: remove illegal type-punning

Changes for v5:
- Coding Style cleanup:
1. struct chip_regs __iomem *regs -> struct chip_regs *regs
2. Move Faraday specific APIs into asm/arch-faraday/*.h
- Fix Copyright notices (dates) throughout the patch
- Make 'arm: dma_alloc_coherent: malloc() -> memalign()' as a separate patch
- Make 'cfi_flash: use buffer length in unmap_physmem()' as a separate patch
- Define Faraday machine type in board's config header file
- Add the rationale to the command 'bootfa'
- Add myself as the maintainer for Faraday A360/A369 in MAINTAINERS.
- Chain the video:FTLCDC200 back to this patch series.
- Chain the nand:FTNANDC021 back to this patch series.
- Chain the net:FTGMAC100 & FTMAC110 back to this patch series.
- Update Faraday Firmware Image Format:
1. Drop u-boot image support to simplify the design.
Since it's not possible for the hard-wired ROM code of A360/A369 to support U-boot images. And the real bootloader for A360/A369 is actually Faraday bootcode2, rather than U-Boot.
2. Add image creation timestamp
- Update 'arch/arm/cpu/faraday/start.S' with the new design, which move relocation into 'arch/arm/lib/relocate.S'
- Drop i2c:FTI2C010 & spi:FTSSP010_SPI support. The corresponding patch would restart after this patch series have been accepted.
- Revise IRQ & MMU design: Now the exception table would be mapped to

     0x00000000 as a small page(4KB), rather than runtime adjust after
     relocation finished.

- Revise irq:FTINTC020 design, now the irq is always enabled inside irq_install_handler().
- Revise clock management system
- Revise FTPWMTMR010 & FTTMR010 timer design:
1. Drop IRQ dependant implementation
2. Use gd->arch.timer_rate_hz for timer clock source
3. Use gd->arch.tbl for timestamp

Changes for v4:
- Coding Style cleanup.
- Break down the patch series:
- Patches without hard dependency to this series are now seperate patches.
- Split up the patch into more logical changesets (i.e. interrupt & timers are now split up)
- Drop the faraday/nand.h to remove dependency to ftnandc021
- Drop the faraday/mmc.h to remove dependency to ftsdc010
- Add change logs to each part of the patch series to make patchwork be able to grab comments.

Changes for v3:
- Coding Style cleanup.
There is still one warnning reported by checkpatch.pl, however it's too deep for me to fix it.
Here is the shapshot for it:
-----------------------------------------------------
WARNING: do not add new typedefs
#9735: FILE: include/lcd.h:258:
+typedef struct vidinfo {
-----------------------------------------------------
- Drop bit fields from c struct.
- Drop macros for wirtel()/readl(), call them directly.
- Always insert a blank line between declarations and code.
- Replace all the infinite wait loop with a timeout.
- Add '__iomem' to all the declaration of HW register pointers.
- cmd_boot.c: Make it a separate stand-alone patch.
- ftspi020: Make it a separate stand-alone patch.
- dma-mapping.h: Have the global data ptr declared outside functions.
- dma-mapping.h: Add #if...#else...#endif to dma_free_coherent().
- MMU/D-Cache: Drop static non-cached region, now we use map_physmem()/unmap_physmem() for dynamic mappings.
- ftmac110: Make a correction to multi-line comment style
- ftmac110: Use random MAC address while having trouble to get one from environment variables.
- ftmac110: Add comments to timing control registers.
- ftnandc021: Re-write this driver with ECC enabled and correct column address handling for OOB read/write,
and fixing issused addressed by Scott.
- a36x_config: No more static global network configurations.
- a36x_config: Add a common file for the redundant configurations.

Changes for v2:
- Coding Style cleanup.
- Use readl(), writel(), clrsetbits_le32() to replace REG() macros.
- Use structure based hardware registers to replace the macro constants.
- Replace BIT() with BIT_MASK().
- echi-faraday: Remove debug codes.
- ftmac110: Remove debug codes.
- cache-cp15: Enable write buffer in write-through mode.

Kuo-Jung Su (8):
arm: global_data: prepare for Faraday SoC support
arm: make mmu_enabled() a global function
arm: add Faraday ARM cores support
arm: faraday: revise the DMA API
arm: faraday: add FTPWMTMR010 timer support
arm: faraday: add FTTMR010 timer support
arm: faraday: add A360 SoC support
arm: faraday: add A369 SoC support

 arch/arm/cpu/faraday/Makefile             |   13 +
 arch/arm/cpu/faraday/a360/Makefile        |    8 +
 arch/arm/cpu/faraday/a369/Makefile        |    8 +
 arch/arm/cpu/faraday/cache.c              |  190 ++++++++++++++
 arch/arm/cpu/faraday/config.mk            |   15 ++
 arch/arm/cpu/faraday/cpu.c                |  206 +++++++++++++++
 arch/arm/cpu/faraday/ftpwmtmr010.c        |  112 ++++++++
 arch/arm/cpu/faraday/fttmr010.c           |  123 +++++++++
 arch/arm/cpu/faraday/start.S              |  407 +++++++++++++++++++++++++++++
 arch/arm/include/asm/arch-a360/hardware.h |   70 +++++
 arch/arm/include/asm/arch-a360/sysc.h     |   68 +++++
 arch/arm/include/asm/arch-a369/hardware.h |   88 +++++++
 arch/arm/include/asm/arch-a369/sysc.h     |  211 +++++++++++++++
 arch/arm/include/asm/config.h             |   12 +
 arch/arm/include/asm/dma-mapping.h        |   37 +++
 arch/arm/include/asm/faraday-common.h     |   13 +
 arch/arm/include/asm/global_data.h        |    4 +
 arch/arm/include/asm/io.h                 |   19 +-
 arch/arm/lib/cache-cp15.c                 |    7 +-
 board/faraday/a360evb/Makefile            |    9 +
 board/faraday/a360evb/board.c             |   70 +++++
 board/faraday/a360evb/clock.c             |   62 +++++
 board/faraday/a360evb/lowlevel_init.S     |   15 ++
 board/faraday/a369evb/Makefile            |    9 +
 board/faraday/a369evb/board.c             |  122 +++++++++
 board/faraday/a369evb/clock.c             |   68 +++++
 board/faraday/a369evb/lowlevel_init.S     |   15 ++
 boards.cfg                                |    2 +
 include/common.h                          |    5 +
 include/configs/a360.h                    |   58 ++++
 include/configs/a369.h                    |  103 ++++++++
 include/configs/faraday-common.h          |  253 ++++++++++++++++++
 include/faraday/ftpwmtmr010.h             |   41 +++
 include/faraday/ftsmc020.h                |    1 +
 include/faraday/fttmr010.h                |   17 ++
 35 files changed, 2458 insertions(+), 3 deletions(-)
 create mode 100644 arch/arm/cpu/faraday/Makefile
 create mode 100644 arch/arm/cpu/faraday/a360/Makefile
 create mode 100644 arch/arm/cpu/faraday/a369/Makefile
 create mode 100644 arch/arm/cpu/faraday/cache.c
 create mode 100644 arch/arm/cpu/faraday/config.mk
 create mode 100644 arch/arm/cpu/faraday/cpu.c
 create mode 100644 arch/arm/cpu/faraday/ftpwmtmr010.c
 create mode 100644 arch/arm/cpu/faraday/fttmr010.c
 create mode 100644 arch/arm/cpu/faraday/start.S
 create mode 100644 arch/arm/include/asm/arch-a360/hardware.h
 create mode 100644 arch/arm/include/asm/arch-a360/sysc.h
 create mode 100644 arch/arm/include/asm/arch-a369/hardware.h
 create mode 100644 arch/arm/include/asm/arch-a369/sysc.h
 create mode 100644 arch/arm/include/asm/faraday-common.h
 create mode 100644 board/faraday/a360evb/Makefile
 create mode 100644 board/faraday/a360evb/board.c
 create mode 100644 board/faraday/a360evb/clock.c
 create mode 100644 board/faraday/a360evb/lowlevel_init.S
 create mode 100644 board/faraday/a369evb/Makefile
 create mode 100644 board/faraday/a369evb/board.c
 create mode 100644 board/faraday/a369evb/clock.c
 create mode 100644 board/faraday/a369evb/lowlevel_init.S
 create mode 100644 include/configs/a360.h
 create mode 100644 include/configs/a369.h
 create mode 100644 include/configs/faraday-common.h
 create mode 100644 include/faraday/ftpwmtmr010.h

--
1.7.9.5

From: Kuo-Jung Su <[email protected]>

Add 'cpu_id' and 'has_mmu' for Faraday SoC platforms

---
Changes for v8:
- Initial commit

 arch/arm/include/asm/global_data.h |    4 ++++
 arch/arm/lib/cache-cp15.c          |    5 +++++
 2 files changed, 9 insertions(+)

index e126436..db24a16 100644
@@ -26,6 +26,10 @@ struct arch_global_data {
 	unsigned long	pllb_rate_hz;
 	unsigned long	at91_pllb_usb_init;
 #endif
+#ifdef CONFIG_SOC_FARADAY
+	unsigned long cpu_id;
+	unsigned long has_mmu;
+#endif
 	/* "static data" needed by most of timer.c on ARM platforms */
 	unsigned long timer_rate_hz;
 	unsigned long tbu;

index 8642010..550cced 100644
@@ -90,6 +90,11 @@ static inline void mmu_setup(void)
 	int i;
 	u32 reg;
 
+#ifdef CONFIG_SOC_FARADAY
+	if (!gd->arch.has_mmu)
+		return;
+#endif
+
 	arm_init_before_mmu();
 	/* Set up an identity-mapping for all 4GB, rw for everyone */
 	for (i = 0; i < 4096; i++)

--
1.7.9.5

From: Kuo-Jung Su <[email protected]>

By making mmu_enabled() a global function, we could reuse the code in other mmu/d-cache related routines.

---
Changes for v8:
- Initial commit

 arch/arm/lib/cache-cp15.c |    2 +-
 include/common.h          |    1 +
 2 files changed, 2 insertions(+), 1 deletion(-)

index 550cced..61264e8 100644
@@ -119,7 +119,7 @@ static inline void mmu_setup(void)
 	set_cr(reg | CR_M);
 }
 
-static int mmu_enabled(void)
+int mmu_enabled(void)
 {
 	return get_cr() & CR_M;
 }

index d49c514..44c6bab 100644
@@ -549,6 +549,7 @@ void	icache_disable(void);
 int	dcache_status (void);
 void	dcache_enable (void);
 void	dcache_disable(void);
+int	mmu_enabled(void);
 void	mmu_disable(void);
 #if defined(CONFIG_ARM)
 void	relocate_code(ulong);

--
1.7.9.5

From: Kuo-Jung Su <[email protected]>

Here is the list of verified cores:

1. FA606TE (ARMv5TE, no mmu)
2. FA626TE (ARMv5TE)

---
Changes for v8:
- add arm_init_before_mmu() & mmu_page_table_flush()

Changes for v7:
- Update license to use SPDX identifiers.

Changes for v6:
- Nothing updates

Changes for v5:
- Initial commit

 arch/arm/cpu/faraday/Makefile  |   10 +
 arch/arm/cpu/faraday/cache.c   |  190 +++++++++++++++++++
 arch/arm/cpu/faraday/config.mk |   15 ++
 arch/arm/cpu/faraday/cpu.c     |  176 +++++++++++++++++
 arch/arm/cpu/faraday/start.S   |  407 ++++++++++++++++++++++++++++++++++++++++
 5 files changed, 798 insertions(+)
 create mode 100644 arch/arm/cpu/faraday/Makefile
 create mode 100644 arch/arm/cpu/faraday/cache.c
 create mode 100644 arch/arm/cpu/faraday/config.mk
 create mode 100644 arch/arm/cpu/faraday/cpu.c
 create mode 100644 arch/arm/cpu/faraday/start.S

new file mode 100644
index 0000000..c859238
@@ -0,0 +1,10 @@
+#
+# (C) Copyright 2000-2003
+# Wolfgang Denk, DENX Software Engineering, wd at denx.de.
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+extra-y := start.o
+
+obj-y   += cpu.o cache.o

new file mode 100644
index 0000000..f39e70b
@@ -0,0 +1,15 @@
+#
+# (C) Copyright 2000-2003
+# Wolfgang Denk, DENX Software Engineering, wd at denx.de.
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+PLATFORM_CPPFLAGS += -march=armv5te
+# =========================================================================
+#
+# Supply options according to compiler version
+#
+# =========================================================================
+PF_RELFLAGS_SLB_AT := $(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,))
+PLATFORM_RELFLAGS += $(PF_RELFLAGS_SLB_AT)

--
1.7.9.5

From: Kuo-Jung Su <[email protected]>

The DMA API is revised as follow:

1. Create an un-cached shadow memory for malloc(), the un-cached shadow memory is controlled by CONFIG_CONSISTENT_DMA_START and CONFIG_CONSISTENT_DMA_END, and initialized inside arch_early_init_r().

2. The virtual address returned by dma_alloc_coherent() always points to the corresponding uncached shadow memory initialized at step 1.

3. The dma_map_single() will now invalidate/flush caches.

4. The virt_to_phys() will now calculate the physical address from the section tables.

---
Changes for v8:
- Revised to use a shadow uncached region for malloc().

Changes for v6, v7:
- Nothing updates

Changes for v5:
- Add void dram_bank_mmu_setup() into 'arch/arm/cpu/faraday/cpu.c' to override the weak function in "cache-cp15.c".
- Use small page (4KB) to map relocated exception table to 0x0000

Changes for v4:
- Coding Style cleanup.

Changes for v3:
- Coding Style cleanup.
- Always insert a blank line between declarations and code.
- dma-mapping.h: Have the global data ptr declared outside functions.
- dma-mapping.h: Add #if...#else...#endif to dma_free_coherent().
- Drop static non-cached region, now we use map_physmem()/unmap_physmem() for dynamic mappings.

Changes for v2:
- Coding Style cleanup.
- cache-cp15: Enable write buffer in write-through mode.

 arch/arm/cpu/faraday/cpu.c         |   30 +++++++++++++++++++++++++++++
 arch/arm/include/asm/config.h      |   12 ++++++++++++
 arch/arm/include/asm/dma-mapping.h |   37 ++++++++++++++++++++++++++++++++++++
 arch/arm/include/asm/io.h          |   19 ++++++++++++++++--
 4 files changed, 96 insertions(+), 2 deletions(-)

index d3c8a9e..83bc7f7 100644
@@ -101,6 +101,36 @@ int print_cpuinfo(void)
 }
 #endif /* CONFIG_DISPLAY_CPUINFO */
 
+#ifdef CONFIG_ARCH_EARLY_INIT_R
+int	arch_early_init_r(void)
+{
+#ifndef CONFIG_SYS_DCACHE_OFF
+	uint32_t mask = ~(SZ_1M - 1);
+	uint32_t phys = mem_malloc_start & mask;
+	uint32_t stop = (mem_malloc_end + (SZ_1M - 1)) & mask;
+	uint32_t size = stop - phys;
+	uint32_t virt = CONFIG_CONSISTENT_DMA_START & mask;
+	uint32_t *sect_table = (uint32_t *)gd->arch.tlb_addr;
+
+	if (!mmu_enabled())
+		return 0;
+
+	if (size > (CONFIG_CONSISTENT_DMA_END - virt))
+		panic("malloc size is too large for dma buffer\n");
+
+	while (size > 0) {
+		sect_table[virt >> 20] = phys | (3 << 10) | DCACHE_OFF;
+		virt += SZ_1M;
+		phys += SZ_1M;
+		size -= SZ_1M;
+	}
+
+	mmu_page_table_flush(mem_malloc_start & mask, stop);
+#endif /* !CONFIG_SYS_DCACHE_OFF */
+	return 0;
+}
+#endif /* CONFIG_ARCH_EARLY_INIT_R */
+
 int cleanup_before_linux(void)
 {
 	/*

index 99b703e..295907c 100644
@@ -7,6 +7,18 @@
 #ifndef _ASM_CONFIG_H_
 #define _ASM_CONFIG_H_
 
+#if defined(CONFIG_SOC_FARADAY) && !defined(CONFIG_SYS_DCACHE_OFF)
+#ifndef CONFIG_ARCH_EARLY_INIT_R
+#define CONFIG_ARCH_EARLY_INIT_R
+#endif
+#ifndef CONFIG_CONSISTENT_DMA_START
+#define CONFIG_CONSISTENT_DMA_START   0xff000000
+#endif
+#ifndef CONFIG_CONSISTENT_DMA_END
+#define CONFIG_CONSISTENT_DMA_END     0xfff00000
+#endif
+#endif /* CONFIG_SOC_FARADAY && !CONFIG_SYS_DCACHE_OFF */
+
 #define CONFIG_LMB
 #define CONFIG_SYS_BOOT_RAMDISK_HIGH
 #endif

index 55a4e26..3b76046 100644
@@ -8,6 +8,10 @@
 #ifndef __ASM_ARM_DMA_MAPPING_H
 #define __ASM_ARM_DMA_MAPPING_H
 
+#if defined(CONFIG_SOC_FARADAY) && !defined(CONFIG_SYS_DCACHE_OFF)
+#include <malloc.h>
+#endif /* CONFIG_SOC_FARADAY && !CONFIG_SYS_DCACHE_OFF */
+
 enum dma_data_direction {
 	DMA_BIDIRECTIONAL	= 0,
 	DMA_TO_DEVICE		= 1,

@@ -16,13 +20,46 @@ enum dma_data_direction {
 
 static void *dma_alloc_coherent(size_t len, unsigned long *handle)
 {
+#if defined(CONFIG_SOC_FARADAY) && !defined(CONFIG_SYS_DCACHE_OFF)
+	uint32_t ofs;
+	void *mem = memalign(ARCH_DMA_MINALIGN, len);
+
+	if (handle)
+		*handle = (unsigned long)mem;
+
+	if (mem && mmu_enabled()) {
+		invalidate_dcache_range((ulong)mem, (ulong)mem + len);
+		ofs = (uint32_t)mem - (mem_malloc_start & 0xfff00000);
+		mem = (void *)(CONFIG_CONSISTENT_DMA_START + ofs);
+	}
+
+	return mem;
+#else  /* CONFIG_SOC_FARADAY && !CONFIG_SYS_DCACHE_OFF */
 	*handle = (unsigned long)memalign(ARCH_DMA_MINALIGN, len);
+#endif /* CONFIG_SOC_FARADAY && !CONFIG_SYS_DCACHE_OFF */
 	return (void *)*handle;
 }
 
 static inline unsigned long dma_map_single(volatile void *vaddr, size_t len,
 					   enum dma_data_direction dir)
 {
+#if defined(CONFIG_SOC_FARADAY) && !defined(CONFIG_SYS_DCACHE_OFF)
+	if (mmu_enabled()) {
+		switch (dir) {
+		case DMA_BIDIRECTIONAL:
+		case DMA_TO_DEVICE:
+			flush_dcache_range((ulong)vaddr,
+				(ulong)vaddr + len);
+			break;
+
+		case DMA_FROM_DEVICE:
+			invalidate_dcache_range((ulong)vaddr,
+				(ulong)vaddr + len);
+			break;
+		}
+		return virt_to_phys((void *)vaddr);
+	}
+#endif /* CONFIG_SOC_FARADAY && !CONFIG_SYS_DCACHE_OFF */
 	return (unsigned long)vaddr;
 }
 

index 1fbc531..b55d9e1 100644
@@ -28,6 +28,9 @@
 #if 0	/* XXX###XXX */
 #include <asm/arch/hardware.h>
 #endif	/* XXX###XXX */
+#if defined(CONFIG_SOC_FARADAY) && !defined(CONFIG_SYS_DCACHE_OFF)
+#include <common.h>
+#endif
 
 static inline void sync(void)
 {

@@ -57,9 +60,21 @@ static inline void unmap_physmem(void *vaddr, unsigned long flags)
 
 }
 
-static inline phys_addr_t virt_to_phys(void * vaddr)
+static inline phys_addr_t virt_to_phys(void *vaddr)
 {
-	return (phys_addr_t)(vaddr);
+#if defined(CONFIG_SOC_FARADAY) && !defined(CONFIG_SYS_DCACHE_OFF)
+	DECLARE_GLOBAL_DATA_PTR;
+	u32 *sect_table = (u32 *)gd->arch.tlb_addr;
+	phys_addr_t phys = (phys_addr_t)vaddr;
+
+	if (!vaddr || !mmu_enabled())
+		return phys;
+
+	phys = sect_table[(u32)vaddr >> 20] & 0xfff00000;
+	return phys + ((phys_addr_t)vaddr & 0x000fffff);
+#else  /* CONFIG_SOC_FARADAY && !CONFIG_SYS_DCACHE_OFF */
+	return (phys_addr_t)vaddr;
+#endif /* CONFIG_SOC_FARADAY && !CONFIG_SYS_DCACHE_OFF */
 }
 
 /*

--
1.7.9.5

From: Kuo-Jung Su <[email protected]>

Faraday FTPWMTMR010 is a simple APB device which supports both timer and pwm functions.

---
Changes for v8:
- Nothing updates

Changes for v7:
- Update license to use SPDX identifiers.

Changes for v6:
- Nothing updates

Changes for v5:
- Drop IRQ dependant implementation
- Use gd->arch.timer_rate_hz for timer clock source
- Use gd->arch.tbl for timestamp

Changes for v4:
- Coding Style cleanup.
- Break up from [arm: add Faraday A36x SoC platform support]

Changes for v3:
- Coding Style cleanup.
- Drop macros for wirtel()/readl(), call them directly.
- Always insert a blank line between declarations and code.
- Add '__iomem' to all the declaration of HW register pointers.

Changes for v2:
- Coding Style cleanup.
- Use readl(), writel(), clrsetbits_le32() to replace REG() macros.
- Use structure based hardware registers to replace the macro constants.
- Replace BIT() with BIT_MASK().

 arch/arm/cpu/faraday/Makefile      |    2 +
 arch/arm/cpu/faraday/ftpwmtmr010.c |  112 ++++++++++++++++++++++++++++++++++++
 include/faraday/ftpwmtmr010.h      |   41 +++++++++++++
 3 files changed, 155 insertions(+)
 create mode 100644 arch/arm/cpu/faraday/ftpwmtmr010.c
 create mode 100644 include/faraday/ftpwmtmr010.h

index c859238..9bcdeba 100644
@@ -8,3 +8,5 @@
 extra-y := start.o
 
 obj-y   += cpu.o cache.o
+
+obj-$(CONFIG_FTPWMTMR010) += ftpwmtmr010.o

--
1.7.9.5

From: Kuo-Jung Su <[email protected]>

Faraday FTTMR010 is a simple APB device which supports generic timer functions.

---
Changes for v8:
- Nothing updates

Changes for v7:
- Update license to use SPDX identifiers.

Changes for v6:
- Nothing updates

Changes for v5:
- Drop IRQ dependant implementation
- Use gd->arch.timer_rate_hz for timer clock source
- Use gd->arch.tbl for timestamp

Changes for v4:
- Coding Style cleanup.
- Break up from [arm: add Faraday A36x SoC platform support]

Changes for v3:
- Coding Style cleanup.
- Drop macros for wirtel()/readl(), call them directly.
- Always insert a blank line between declarations and code.
- Add '__iomem' to all the declaration of HW register pointers.

Changes for v2:
- Coding Style cleanup.
- Use readl(), writel(), clrsetbits_le32() to replace REG() macros.
- Use structure based hardware registers to replace the macro constants.
- Replace BIT() with BIT_MASK().

 arch/arm/cpu/faraday/Makefile   |    1 +
 arch/arm/cpu/faraday/fttmr010.c |  123 +++++++++++++++++++++++++++++++++++++++
 include/faraday/fttmr010.h      |   17 ++++++
 3 files changed, 141 insertions(+)
 create mode 100644 arch/arm/cpu/faraday/fttmr010.c

index 9bcdeba..19c5796 100644
@@ -9,4 +9,5 @@ extra-y := start.o
 
 obj-y   += cpu.o cache.o
 
+obj-$(CONFIG_FTTMR010)    += fttmr010.o
 obj-$(CONFIG_FTPWMTMR010) += ftpwmtmr010.o

index 2ab68d1..21ab113 100644
@@ -45,6 +45,16 @@ struct fttmr010 {
 #define FTTMR010_TM1_CLOCK	(1 << 1)
 #define FTTMR010_TM1_ENABLE	(1 << 0)
 
+#define FTTMR010_TM1_CRMASK \
+	(FTTMR010_TM1_UPDOWN | FTTMR010_TM1_OFENABLE \
+	| FTTMR010_TM1_CLOCK | FTTMR010_TM1_ENABLE)
+#define FTTMR010_TM2_CRMASK \
+	(FTTMR010_TM2_UPDOWN | FTTMR010_TM2_OFENABLE \
+	| FTTMR010_TM2_CLOCK | FTTMR010_TM2_ENABLE)
+#define FTTMR010_TM3_CRMASK \
+	(FTTMR010_TM3_UPDOWN | FTTMR010_TM3_OFENABLE \
+	| FTTMR010_TM3_CLOCK | FTTMR010_TM3_ENABLE)
+
 /*
  * Timer Interrupt State & Mask Registers
  */

@@ -58,4 +68,11 @@ struct fttmr010 {
 #define FTTMR010_TM1_MATCH2	(1 << 1)
 #define FTTMR010_TM1_MATCH1	(1 << 0)
 
+#define FTTMR010_TM1_ISRMASK \
+	(FTTMR010_TM1_OVERFLOW | FTTMR010_TM1_MATCH2 | FTTMR010_TM1_MATCH1)
+#define FTTMR010_TM2_ISRMASK \
+	(FTTMR010_TM2_OVERFLOW | FTTMR010_TM2_MATCH2 | FTTMR010_TM2_MATCH1)
+#define FTTMR010_TM3_ISRMASK \
+	(FTTMR010_TM3_OVERFLOW | FTTMR010_TM3_MATCH2 | FTTMR010_TM3_MATCH1)
+
 #endif	/* __FTTMR010_H */

--
1.7.9.5

From: Kuo-Jung Su <[email protected]>

This adds board support for the Faraday A360 SoC platform.

Working functions:
- MMU/D-cache
- SD Host controller
- USB EHCI controller
- Network
- I2C EEPROM
- UART

---
Changes for v8:
- Make A360 a standalong changeset.

Changes for v7:
- Update license to use SPDX identifiers.

Changes for v6:

	- arch/arm/cpu/faraday/cpu.c:
	  struct ftwdt010_wdt __iomem *regs -> struct ftwdt010_wdt *regs

Changes for v5:
- Coding Style cleanup:
1. struct chip_regs __iomem *regs -> struct chip_regs *regs
2. Move Faraday specific APIs into asm/arch-faraday/*.h
- Fix Copyright notices (dates) throughout the patch
- Define Faraday machine type in board's config header file
- Add myself as the maintainer for Faraday A360/A369 in MAINTAINERS.
- Drop i2c:FTI2C010 & spi:FTSSP010_SPI support. The corresponding patch would restart after this patch series have been accepted.
- Revise clock management system

Changes for v4:
- Coding Style cleanup.
- Break-down the interrupt, timers and common utilties.

Changes for v3:
- Coding Style cleanup.
- Drop macros for wirtel()/readl(), call them directly.
- Always insert a blank line between declarations and code.
- Add '__iomem' to all the declaration of HW register pointers.
- a36x_config: No more static global network configurations.
- a36x_config: Add a common file for the redundant configurations.

Changes for v2:
- Coding Style cleanup.
- Use readl(), writel(), clrsetbits_le32() to replace REG() macros.
- Use structure based hardware registers to replace the macro constants.
- Replace BIT() with BIT_MASK().

 arch/arm/cpu/faraday/a360/Makefile        |    8 +
 arch/arm/include/asm/arch-a360/hardware.h |   70 ++++++++
 arch/arm/include/asm/arch-a360/sysc.h     |   68 ++++++++
 arch/arm/include/asm/faraday-common.h     |   13 ++
 board/faraday/a360evb/Makefile            |    9 +
 board/faraday/a360evb/board.c             |   70 ++++++++
 board/faraday/a360evb/clock.c             |   62 +++++++
 board/faraday/a360evb/lowlevel_init.S     |   15 ++
 boards.cfg                                |    1 +
 include/common.h                          |    4 +
 include/configs/a360.h                    |   58 +++++++
 include/configs/faraday-common.h          |  253 +++++++++++++++++++++++++++++
 12 files changed, 631 insertions(+)
 create mode 100644 arch/arm/cpu/faraday/a360/Makefile
 create mode 100644 arch/arm/include/asm/arch-a360/hardware.h
 create mode 100644 arch/arm/include/asm/arch-a360/sysc.h
 create mode 100644 arch/arm/include/asm/faraday-common.h
 create mode 100644 board/faraday/a360evb/Makefile
 create mode 100644 board/faraday/a360evb/board.c
 create mode 100644 board/faraday/a360evb/clock.c
 create mode 100644 board/faraday/a360evb/lowlevel_init.S
 create mode 100644 include/configs/a360.h
 create mode 100644 include/configs/faraday-common.h

new file mode 100644
index 0000000..b244f22
@@ -0,0 +1,8 @@
+#
+# (C) Copyright 2000-2003
+# Wolfgang Denk, DENX Software Engineering, wd at denx.de.
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+obj-y   :=

new file mode 100644
index 0000000..e8c4c83
@@ -0,0 +1,13 @@
+/*
+ * (C) Copyright 2013 Faraday Technology
+ * Dante Su <[email protected]>
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#ifndef _ASM_FARADAY_COMMON_H
+#define _ASM_FARADAY_COMMON_H
+
+ulong clk_get_rate(const char *id);
+
+#endif	/* _ASM_FARADAY_COMMON_H */

new file mode 100644
index 0000000..42fef70
@@ -0,0 +1,9 @@
+#
+# (C) Copyright 2000-2006
+# Wolfgang Denk, DENX Software Engineering, wd at denx.de.
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+obj-y	:= board.o clock.o
+obj-y	+= lowlevel_init.o

new file mode 100644
index 0000000..cbc006d
@@ -0,0 +1,15 @@
+/*
+ * (C) Copyright 2013
+ * Faraday Technology Corporation. <http://www.faraday-tech.com/tw/>
+ * Kuo-Jung Su <[email protected]>
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <config.h>
+#include <version.h>
+
+/* Set up the platform, once the cpu has been initialized */
+.globl lowlevel_init
+lowlevel_init:
+	mov	pc,lr

index c602a16..304417d 100644
@@ -59,6 +59,7 @@ Active  arm         arm720t        -           armltd          integrator
 Active  arm         arm920t        -           armltd          integrator          integratorap_cm920t                  integratorap:CM920T                                                                                                               Linus Walleij <[email protected]>
 Active  arm         arm920t        -           armltd          integrator          integratorcp_cm920t                  integratorcp:CM920T                                                                                                               Linus Walleij <[email protected]>
 Active  arm         arm920t        a320        faraday         -                   a320evb                              -                                                                                                                                 Po-Yu Chuang <[email protected]>
+Active  arm         faraday        a360        faraday         a360evb             a360evb                              a360                                                                                                                              Kuo-Jung Su <[email protected]>
 Active  arm         arm920t        at91        atmel           at91rm9200ek        at91rm9200ek                         at91rm9200ek                                                                                                                      Andreas Bie?mann <[email protected]>
 Active  arm         arm920t        at91        atmel           at91rm9200ek        at91rm9200ek_ram                     at91rm9200ek:RAMBOOT                                                                                                              Andreas Bie?mann <[email protected]>
 Active  arm         arm920t        at91        BuS             eb_cpux9k2          eb_cpux9k2                           eb_cpux9k2                                                                                                                        Jens Scharsig <[email protected]>

index 44c6bab..5dd1ea1 100644
@@ -94,6 +94,10 @@ typedef volatile unsigned char	vu_char;
 #ifdef CONFIG_SOC_DA8XX
 #include <asm/arch/hardware.h>
 #endif
+#ifdef CONFIG_SOC_FARADAY
+#include <asm/arch/hardware.h>
+#include <asm/faraday-common.h>
+#endif
 
 #include <part.h>
 #include <flash.h>

--
1.7.9.5

From: Kuo-Jung Su <[email protected]>

This adds board support for the Faraday A369 SoC platform.

Working functions:
- MMU/D-cache
- SD Host controller
- USB EHCI controller
- Network
- I2C EEPROM
- UART

---
Changes for v8:
- Make A369 a standalong changeset.

Changes for v7:
- Update license to use SPDX identifiers.

Changes for v6:

	- arch/arm/cpu/faraday/cpu.c:
	  struct ftwdt010_wdt __iomem *regs -> struct ftwdt010_wdt *regs

Changes for v5:
- Coding Style cleanup:
1. struct chip_regs __iomem *regs -> struct chip_regs *regs
2. Move Faraday specific APIs into asm/arch-faraday/*.h
- Fix Copyright notices (dates) throughout the patch
- Define Faraday machine type in board's config header file
- Add myself as the maintainer for Faraday A360/A369 in MAINTAINERS.
- Drop i2c:FTI2C010 & spi:FTSSP010_SPI support. The corresponding patch would restart after this patch series have been accepted.
- Revise clock management system

Changes for v4:
- Coding Style cleanup.
- Break-down the interrupt, timers and common utilties.

Changes for v3:
- Coding Style cleanup.
- Drop macros for wirtel()/readl(), call them directly.
- Always insert a blank line between declarations and code.
- Add '__iomem' to all the declaration of HW register pointers.
- a36x_config: No more static global network configurations.
- a36x_config: Add a common file for the redundant configurations.

Changes for v2:
- Coding Style cleanup.
- Use readl(), writel(), clrsetbits_le32() to replace REG() macros.
- Use structure based hardware registers to replace the macro constants.
- Replace BIT() with BIT_MASK().

 arch/arm/cpu/faraday/a369/Makefile        |    8 ++
 arch/arm/include/asm/arch-a369/hardware.h |   88 ++++++++++++
 arch/arm/include/asm/arch-a369/sysc.h     |  211 +++++++++++++++++++++++++++++
 board/faraday/a369evb/Makefile            |    9 ++
 board/faraday/a369evb/board.c             |  122 +++++++++++++++++
 board/faraday/a369evb/clock.c             |   68 ++++++++++
 board/faraday/a369evb/lowlevel_init.S     |   15 ++
 boards.cfg                                |    1 +
 include/configs/a369.h                    |  103 ++++++++++++++
 include/faraday/ftsmc020.h                |    1 +
 10 files changed, 626 insertions(+)
 create mode 100644 arch/arm/cpu/faraday/a369/Makefile
 create mode 100644 arch/arm/include/asm/arch-a369/hardware.h
 create mode 100644 arch/arm/include/asm/arch-a369/sysc.h
 create mode 100644 board/faraday/a369evb/Makefile
 create mode 100644 board/faraday/a369evb/board.c
 create mode 100644 board/faraday/a369evb/clock.c
 create mode 100644 board/faraday/a369evb/lowlevel_init.S
 create mode 100644 include/configs/a369.h

new file mode 100644
index 0000000..1081c06
@@ -0,0 +1,8 @@
+#
+# (C) Copyright 2000-2003
+# Wolfgang Denk, DENX Software Engineering, wd at denx.de.
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+obj-y :=

new file mode 100644
index 0000000..42fef70
@@ -0,0 +1,9 @@
+#
+# (C) Copyright 2000-2006
+# Wolfgang Denk, DENX Software Engineering, [email protected].
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+obj-y	:= board.o clock.o
+obj-y	+= lowlevel_init.o

new file mode 100644
index 0000000..cbc006d
@@ -0,0 +1,15 @@
+/*
+ * (C) Copyright 2013
+ * Faraday Technology Corporation. <http://www.faraday-tech.com/tw/>
+ * Kuo-Jung Su <[email protected]>
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <config.h>
+#include <version.h>
+
+/* Set up the platform, once the cpu has been initialized */
+.globl lowlevel_init
+lowlevel_init:
+	mov	pc,lr

index 304417d..53a0133 100644
@@ -60,6 +60,7 @@ Active  arm         arm920t        -           armltd          integrator
 Active  arm         arm920t        -           armltd          integrator          integratorcp_cm920t                  integratorcp:CM920T                                                                                                               Linus Walleij <[email protected]>
 Active  arm         arm920t        a320        faraday         -                   a320evb                              -                                                                                                                                 Po-Yu Chuang <[email protected]>
 Active  arm         faraday        a360        faraday         a360evb             a360evb                              a360                                                                                                                              Kuo-Jung Su <[email protected]>
+Active  arm         faraday        a369        faraday         a369evb             a369evb                              a369                                                                                                                              Kuo-Jung Su <[email protected]>
 Active  arm         arm920t        at91        atmel           at91rm9200ek        at91rm9200ek                         at91rm9200ek                                                                                                                      Andreas Bie?mann <[email protected]>
 Active  arm         arm920t        at91        atmel           at91rm9200ek        at91rm9200ek_ram                     at91rm9200ek:RAMBOOT                                                                                                              Andreas Bie?mann <[email protected]>
 Active  arm         arm920t        at91        BuS             eb_cpux9k2          eb_cpux9k2                           eb_cpux9k2                                                                                                                        Jens Scharsig <[email protected]>

index 54120ab..485d7c2 100644
@@ -70,5 +70,6 @@ void ftsmc020_init(void);
 #define FTSMC020_TPR_WTC(x)	(((x) & 0x3) << 6)
 #define FTSMC020_TPR_AHT(x)	(((x) & 0x3) << 4)
 #define FTSMC020_TPR_TRNA(x)	(((x) & 0xf) << 0)
+#define FTSMC020_TPR_FAILSAFE	0x0f1ff3ff /* fail-safe timing */
 
 #endif	/* __FTSMC020_H */

--
1.7.9.5

From: Kuo-Jung Su <[email protected]>

These patches introduce Faraday A369 & Virtual SoC platform support.

Here are some public documents for your reference.

http://www.faraday-tech.com/html/Product/SoCPlatform/SoCreativeIII.htm
http://www.faraday-tech.com/html/documentation/index.html

There is also a QEMU based A369 emulator available at my github account:

https://github.com/dantesu1218/qemu.git

Here is quick start for QEMU + U-Boot:

1. Download the QEMU source tree

   $ git clone -b qemu-1.5.1 https://github.com/dantesu1218/qemu.git

2. Build & Install the QEMU:

   $ ./configure --target-list=arm-softmmu
   $ make
   $ make install

3. Launch u-boot with QEMU:

   $ qemu-system-arm -M a369 -m 512M -nographic -kernel ~/u-boot-2014.01/u-boot

Changes for v9:
- Shrink the patch by dropping MMU/D-cache support, and see if we could get this patch accepted ASAP.
- Replace the out-of-date A360 EVB with Faraday Virtual Machine (FVM).
- Build 'arch_preboot_os()' only when CONFIG_CMD_BOOTM is defined.
- Add do_go_exec() to override the default behavior of 'go' command.
- Make Faraday SoC helper files & ftsmc020 standalone changesets.
- Coding style cleanup.

Changes for v8:
- Revise MMU/D-cache support
- Revise Faraday SoC common configurations.
- Drop FTINTC020 interrupt controller support.
- Drop FTLCDC200 LCD controller support.
- Drop FTNANDC021 NAND flash controller support, it would be latter submitted as a standalone patch set.
- Drop proprietary Faraday SPL support, the u-boot-spl would be adapted instead. However because it depends on the FTNANDC021 patch set, so it would be submitted after the FTNANDC021 patch set get committed.

Changes for v7:
- Update license to use SPDX identifiers.
- cfi_flash: drop the patch to unmap_physmem(), because it's already applied.
- ftnandc021: put_unaligned() -> memcpy()
- ftnandc021: update ecc relatived function prototypes to fix compile warnnings.

Changes for v6:
- Drop ethernet driver updates for ftmac110&ftgmac100, because they are already commited.
- arch/arm/cpu/faraday/cpu.c:

     struct ftwdt010_wdt __iomem *regs -> struct ftwdt010_wdt *regs

- arch/arm/cpu/faraday/cmd_bootfa.c: fix compiler warnning
- arch/arm/cpu/faraday/cmd_bootfa.c: use shorter paragraph in commit message, and move the original statement into the top of source file.
- ftnandc021: update README for CONFIG_SYS_FTNANDC021_TIMING
- ftnandc021: remove illegal type-punning

Changes for v5:
- Coding Style cleanup:
1. struct chip_regs __iomem *regs -> struct chip_regs *regs
2. Move Faraday specific APIs into asm/arch-faraday/*.h
- Fix Copyright notices (dates) throughout the patch
- Make 'arm: dma_alloc_coherent: malloc() -> memalign()' as a separate patch
- Make 'cfi_flash: use buffer length in unmap_physmem()' as a separate patch
- Define Faraday machine type in board's config header file
- Add the rationale to the command 'bootfa'
- Add myself as the maintainer for Faraday A360/A369 in MAINTAINERS.
- Chain the video:FTLCDC200 back to this patch series.
- Chain the nand:FTNANDC021 back to this patch series.
- Chain the net:FTGMAC100 & FTMAC110 back to this patch series.
- Update Faraday Firmware Image Format:
1. Drop u-boot image support to simplify the design.
Since it's not possible for the hard-wired ROM code of A360/A369 to support U-boot images. And the real bootloader for A360/A369 is actually Faraday bootcode2, rather than U-Boot.
2. Add image creation timestamp
- Update 'arch/arm/cpu/faraday/start.S' with the new design, which move relocation into 'arch/arm/lib/relocate.S'
- Drop i2c:FTI2C010 & spi:FTSSP010_SPI support. The corresponding patch would restart after this patch series have been accepted.
- Revise IRQ & MMU design: Now the exception table would be mapped to

     0x00000000 as a small page(4KB), rather than runtime adjust after
     relocation finished.

- Revise irq:FTINTC020 design, now the irq is always enabled inside irq_install_handler().
- Revise clock management system
- Revise FTPWMTMR010 & FTTMR010 timer design:
1. Drop IRQ dependant implementation
2. Use gd->arch.timer_rate_hz for timer clock source
3. Use gd->arch.tbl for timestamp

Changes for v4:
- Coding Style cleanup.
- Break down the patch series:
- Patches without hard dependency to this series are now seperate patches.
- Split up the patch into more logical changesets (i.e. interrupt & timers are now split up)
- Drop the faraday/nand.h to remove dependency to ftnandc021
- Drop the faraday/mmc.h to remove dependency to ftsdc010
- Add change logs to each part of the patch series to make patchwork be able to grab comments.

Changes for v3:
- Coding Style cleanup.
There is still one warnning reported by checkpatch.pl, however it's too deep for me to fix it.
Here is the shapshot for it:
-----------------------------------------------------
WARNING: do not add new typedefs
#9735: FILE: include/lcd.h:258:
+typedef struct vidinfo {
-----------------------------------------------------
- Drop bit fields from c struct.
- Drop macros for wirtel()/readl(), call them directly.
- Always insert a blank line between declarations and code.
- Replace all the infinite wait loop with a timeout.
- Add '__iomem' to all the declaration of HW register pointers.
- cmd_boot.c: Make it a separate stand-alone patch.
- ftspi020: Make it a separate stand-alone patch.
- dma-mapping.h: Have the global data ptr declared outside functions.
- dma-mapping.h: Add #if...#else...#endif to dma_free_coherent().
- MMU/D-Cache: Drop static non-cached region, now we use map_physmem()/unmap_physmem() for dynamic mappings.
- ftmac110: Make a correction to multi-line comment style
- ftmac110: Use random MAC address while having trouble to get one from environment variables.
- ftmac110: Add comments to timing control registers.
- ftnandc021: Re-write this driver with ECC enabled and correct column address handling for OOB read/write,
and fixing issused addressed by Scott.
- a36x_config: No more static global network configurations.
- a36x_config: Add a common file for the redundant configurations.

Changes for v2:
- Coding Style cleanup.
- Use readl(), writel(), clrsetbits_le32() to replace REG() macros.
- Use structure based hardware registers to replace the macro constants.
- Replace BIT() with BIT_MASK().
- echi-faraday: Remove debug codes.
- ftmac110: Remove debug codes.
- cache-cp15: Enable write buffer in write-through mode.

Kuo-Jung Su (7):
arm: add Faraday ARMv5TE cores support
arm: add Faraday SoC helper files
arm: faraday: add FTTMR010 timer support
arm: faraday: add FTPWMTMR010 timer support
arm: faraday: ftsmc020: add a fail-safe macro constant
arm: faraday: add A369 evaluation board support
arm: faraday: add Faraday Virtual Machine support

 arch/arm/cpu/faraday/Makefile             |   13 +
 arch/arm/cpu/faraday/a369/Makefile        |    8 +
 arch/arm/cpu/faraday/cache.c              |  164 ++++++++++++
 arch/arm/cpu/faraday/config.mk            |   15 ++
 arch/arm/cpu/faraday/cpu.c                |  115 ++++++++
 arch/arm/cpu/faraday/ftpwmtmr010.c        |  112 ++++++++
 arch/arm/cpu/faraday/fttmr010.c           |  123 +++++++++
 arch/arm/cpu/faraday/fvm/Makefile         |    8 +
 arch/arm/cpu/faraday/start.S              |  407 +++++++++++++++++++++++++++++
 arch/arm/include/asm/arch-a369/hardware.h |   88 +++++++
 arch/arm/include/asm/arch-a369/sysc.h     |  211 +++++++++++++++
 arch/arm/include/asm/arch-fvm/hardware.h  |   76 ++++++
 arch/arm/include/asm/faraday.h            |   13 +
 board/faraday/a369evb/Makefile            |    9 +
 board/faraday/a369evb/board.c             |  122 +++++++++
 board/faraday/a369evb/clock.c             |   68 +++++
 board/faraday/a369evb/lowlevel_init.S     |   15 ++
 board/faraday/fvm/Makefile                |    9 +
 board/faraday/fvm/board.c                 |   60 +++++
 board/faraday/fvm/clock.c                 |   49 ++++
 board/faraday/fvm/lowlevel_init.S         |   15 ++
 boards.cfg                                |    2 +
 include/common.h                          |    3 +
 include/configs/a369.h                    |  111 ++++++++
 include/configs/faraday-common.h          |  314 ++++++++++++++++++++++
 include/configs/fvm.h                     |   61 +++++
 include/faraday/ftpwmtmr010.h             |   41 +++
 include/faraday/ftsmc020.h                |    1 +
 include/faraday/fttmr010.h                |   17 ++
 29 files changed, 2250 insertions(+)
 create mode 100644 arch/arm/cpu/faraday/Makefile
 create mode 100644 arch/arm/cpu/faraday/a369/Makefile
 create mode 100644 arch/arm/cpu/faraday/cache.c
 create mode 100644 arch/arm/cpu/faraday/config.mk
 create mode 100644 arch/arm/cpu/faraday/cpu.c
 create mode 100644 arch/arm/cpu/faraday/ftpwmtmr010.c
 create mode 100644 arch/arm/cpu/faraday/fttmr010.c
 create mode 100644 arch/arm/cpu/faraday/fvm/Makefile
 create mode 100644 arch/arm/cpu/faraday/start.S
 create mode 100644 arch/arm/include/asm/arch-a369/hardware.h
 create mode 100644 arch/arm/include/asm/arch-a369/sysc.h
 create mode 100644 arch/arm/include/asm/arch-fvm/hardware.h
 create mode 100644 arch/arm/include/asm/faraday.h
 create mode 100644 board/faraday/a369evb/Makefile
 create mode 100644 board/faraday/a369evb/board.c
 create mode 100644 board/faraday/a369evb/clock.c
 create mode 100644 board/faraday/a369evb/lowlevel_init.S
 create mode 100644 board/faraday/fvm/Makefile
 create mode 100644 board/faraday/fvm/board.c
 create mode 100644 board/faraday/fvm/clock.c
 create mode 100644 board/faraday/fvm/lowlevel_init.S
 create mode 100644 include/configs/a369.h
 create mode 100644 include/configs/faraday-common.h
 create mode 100644 include/configs/fvm.h
 create mode 100644 include/faraday/ftpwmtmr010.h

--
1.7.9.5

From: Kuo-Jung Su <[email protected]>

Here is the list of verified cores:

1. FA606TE (ARMv5TE, no mmu)
2. FA626TE (ARMv5TE)

---
Changes for v9:
- Build 'arch_preboot_os()' only when CONFIG_CMD_BOOTM is defined.
- Add do_go_exec() to override the default behavior of 'go' command.

Changes for v8:
- add arm_init_before_mmu() & mmu_page_table_flush()

Changes for v7:
- Update license to use SPDX identifiers.

Changes for v6:
- Nothing updates

Changes for v5:
- Initial commit

 arch/arm/cpu/faraday/Makefile  |   10 +
 arch/arm/cpu/faraday/cache.c   |  164 ++++++++++++++++
 arch/arm/cpu/faraday/config.mk |   15 ++
 arch/arm/cpu/faraday/cpu.c     |  115 ++++++++++++
 arch/arm/cpu/faraday/start.S   |  407 ++++++++++++++++++++++++++++++++++++++++
 5 files changed, 711 insertions(+)
 create mode 100644 arch/arm/cpu/faraday/Makefile
 create mode 100644 arch/arm/cpu/faraday/cache.c
 create mode 100644 arch/arm/cpu/faraday/config.mk
 create mode 100644 arch/arm/cpu/faraday/cpu.c
 create mode 100644 arch/arm/cpu/faraday/start.S

new file mode 100644
index 0000000..c859238
@@ -0,0 +1,10 @@
+#
+# (C) Copyright 2000-2003
+# Wolfgang Denk, DENX Software Engineering, wd at denx.de.
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+extra-y := start.o
+
+obj-y   += cpu.o cache.o

new file mode 100644
index 0000000..f39e70b
@@ -0,0 +1,15 @@
+#
+# (C) Copyright 2000-2003
+# Wolfgang Denk, DENX Software Engineering, wd at denx.de.
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+PLATFORM_CPPFLAGS += -march=armv5te
+# =========================================================================
+#
+# Supply options according to compiler version
+#
+# =========================================================================
+PF_RELFLAGS_SLB_AT := $(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,))
+PLATFORM_RELFLAGS += $(PF_RELFLAGS_SLB_AT)

--
1.7.9.5

From: Kuo-Jung Su <[email protected]>

1. arch/arm/include/asm/faraday.h:
Faraday SoC header file

2. include/configs/faraday-common.h:
Faraday SoC common/default configurations

---
Changes for v9:
- Separated as a standalone changeset by first time.

 arch/arm/include/asm/faraday.h   |   13 ++
 include/common.h                 |    3 +
 include/configs/faraday-common.h |  314 ++++++++++++++++++++++++++++++++++++++
 3 files changed, 330 insertions(+)
 create mode 100644 arch/arm/include/asm/faraday.h
 create mode 100644 include/configs/faraday-common.h

new file mode 100644
index 0000000..2b59af1
@@ -0,0 +1,13 @@
+/*
+ * (C) Copyright 2013 Faraday Technology
+ * Dante Su <[email protected]>
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#ifndef _ASM_FARADAY_H
+#define _ASM_FARADAY_H
+
+ulong clk_get_rate(const char *id);
+
+#endif	/* EOF */

index d49c514..eaac828 100644
@@ -94,6 +94,9 @@ typedef volatile unsigned char	vu_char;
 #ifdef CONFIG_SOC_DA8XX
 #include <asm/arch/hardware.h>
 #endif
+#ifdef CONFIG_SOC_FARADAY
+#include <asm/faraday.h>
+#endif
 
 #include <part.h>
 #include <flash.h>

--
1.7.9.5

From: Kuo-Jung Su <[email protected]>

Faraday FTTMR010 is a simple APB device which supports generic timer functions.

---
Changes for v9:
- Nothing updates

Changes for v8:
- Nothing updates

Changes for v7:
- Update license to use SPDX identifiers.

Changes for v6:
- Nothing updates

Changes for v5:
- Drop IRQ dependant implementation
- Use gd->arch.timer_rate_hz for timer clock source
- Use gd->arch.tbl for timestamp

Changes for v4:
- Coding Style cleanup.
- Break up from [arm: add Faraday A36x SoC platform support]

Changes for v3:
- Coding Style cleanup.
- Drop macros for wirtel()/readl(), call them directly.
- Always insert a blank line between declarations and code.
- Add '__iomem' to all the declaration of HW register pointers.

Changes for v2:
- Coding Style cleanup.
- Use readl(), writel(), clrsetbits_le32() to replace REG() macros.
- Use structure based hardware registers to replace the macro constants.
- Replace BIT() with BIT_MASK().

 arch/arm/cpu/faraday/Makefile   |    2 +
 arch/arm/cpu/faraday/fttmr010.c |  123 +++++++++++++++++++++++++++++++++++++++
 include/faraday/fttmr010.h      |   17 ++++++
 3 files changed, 142 insertions(+)
 create mode 100644 arch/arm/cpu/faraday/fttmr010.c

index c859238..73f6934 100644
@@ -8,3 +8,5 @@
 extra-y := start.o
 
 obj-y   += cpu.o cache.o
+
+obj-$(CONFIG_FTTMR010)    += fttmr010.o

index 2ab68d1..21ab113 100644
@@ -45,6 +45,16 @@ struct fttmr010 {
 #define FTTMR010_TM1_CLOCK	(1 << 1)
 #define FTTMR010_TM1_ENABLE	(1 << 0)
 
+#define FTTMR010_TM1_CRMASK \
+	(FTTMR010_TM1_UPDOWN | FTTMR010_TM1_OFENABLE \
+	| FTTMR010_TM1_CLOCK | FTTMR010_TM1_ENABLE)
+#define FTTMR010_TM2_CRMASK \
+	(FTTMR010_TM2_UPDOWN | FTTMR010_TM2_OFENABLE \
+	| FTTMR010_TM2_CLOCK | FTTMR010_TM2_ENABLE)
+#define FTTMR010_TM3_CRMASK \
+	(FTTMR010_TM3_UPDOWN | FTTMR010_TM3_OFENABLE \
+	| FTTMR010_TM3_CLOCK | FTTMR010_TM3_ENABLE)
+
 /*
  * Timer Interrupt State & Mask Registers
  */

@@ -58,4 +68,11 @@ struct fttmr010 {
 #define FTTMR010_TM1_MATCH2	(1 << 1)
 #define FTTMR010_TM1_MATCH1	(1 << 0)
 
+#define FTTMR010_TM1_ISRMASK \
+	(FTTMR010_TM1_OVERFLOW | FTTMR010_TM1_MATCH2 | FTTMR010_TM1_MATCH1)
+#define FTTMR010_TM2_ISRMASK \
+	(FTTMR010_TM2_OVERFLOW | FTTMR010_TM2_MATCH2 | FTTMR010_TM2_MATCH1)
+#define FTTMR010_TM3_ISRMASK \
+	(FTTMR010_TM3_OVERFLOW | FTTMR010_TM3_MATCH2 | FTTMR010_TM3_MATCH1)
+
 #endif	/* __FTTMR010_H */

--
1.7.9.5

From: Kuo-Jung Su <[email protected]>

Faraday FTPWMTMR010 is a simple APB device which supports both timer and pwm functions.

---
Changes for v9:
- Nothing updates

Changes for v8:
- Nothing updates

Changes for v7:
- Update license to use SPDX identifiers.

Changes for v6:
- Nothing updates

Changes for v5:
- Drop IRQ dependant implementation
- Use gd->arch.timer_rate_hz for timer clock source
- Use gd->arch.tbl for timestamp

Changes for v4:
- Coding Style cleanup.
- Break up from [arm: add Faraday A36x SoC platform support]

Changes for v3:
- Coding Style cleanup.
- Drop macros for wirtel()/readl(), call them directly.
- Always insert a blank line between declarations and code.
- Add '__iomem' to all the declaration of HW register pointers.

Changes for v2:
- Coding Style cleanup.
- Use readl(), writel(), clrsetbits_le32() to replace REG() macros.
- Use structure based hardware registers to replace the macro constants.
- Replace BIT() with BIT_MASK().

 arch/arm/cpu/faraday/Makefile      |    1 +
 arch/arm/cpu/faraday/ftpwmtmr010.c |  112 ++++++++++++++++++++++++++++++++++++
 include/faraday/ftpwmtmr010.h      |   41 +++++++++++++
 3 files changed, 154 insertions(+)
 create mode 100644 arch/arm/cpu/faraday/ftpwmtmr010.c
 create mode 100644 include/faraday/ftpwmtmr010.h

index 73f6934..19c5796 100644
@@ -10,3 +10,4 @@ extra-y := start.o
 obj-y   += cpu.o cache.o
 
 obj-$(CONFIG_FTTMR010)    += fttmr010.o
+obj-$(CONFIG_FTPWMTMR010) += ftpwmtmr010.o

--
1.7.9.5

From: Kuo-Jung Su <[email protected]>

Add a macro constant for fail-safe timing value.

---
Changes for v9:
- Separated as a standalone changeset by first time.

 include/faraday/ftsmc020.h |    1 +
 1 file changed, 1 insertion(+)

index 54120ab..485d7c2 100644
@@ -70,5 +70,6 @@ void ftsmc020_init(void);
 #define FTSMC020_TPR_WTC(x)	(((x) & 0x3) << 6)
 #define FTSMC020_TPR_AHT(x)	(((x) & 0x3) << 4)
 #define FTSMC020_TPR_TRNA(x)	(((x) & 0xf) << 0)
+#define FTSMC020_TPR_FAILSAFE	0x0f1ff3ff /* fail-safe timing */
 
 #endif	/* __FTSMC020_H */

--
1.7.9.5

From: Kuo-Jung Su <[email protected]>

The A369 is an ARM CPU-based SoC with rich SoC features and convenient FPGA link for building fast system prototyping and volume production.

More information about this hardware can be found at:
http://www.faraday-tech.com/html/Product/SoCPlatform/SoCreativeIII.htm

---
Changes for v9:
- Revise the commit message.

Changes for v8:
- Make A369 a standalong changeset.

Changes for v7:
- Update license to use SPDX identifiers.

Changes for v6:

	- arch/arm/cpu/faraday/cpu.c:
	  struct ftwdt010_wdt __iomem *regs -> struct ftwdt010_wdt *regs

Changes for v5:
- Coding Style cleanup:
1. struct chip_regs __iomem *regs -> struct chip_regs *regs
2. Move Faraday specific APIs into asm/arch-faraday/*.h
- Fix Copyright notices (dates) throughout the patch
- Define Faraday machine type in board's config header file
- Add myself as the maintainer for Faraday A360/A369 in MAINTAINERS.
- Drop i2c:FTI2C010 & spi:FTSSP010_SPI support. The corresponding patch would restart after this patch series have been accepted.
- Revise clock management system

Changes for v4:
- Coding Style cleanup.
- Break-down the interrupt, timers and common utilties.

Changes for v3:
- Coding Style cleanup.
- Drop macros for wirtel()/readl(), call them directly.
- Always insert a blank line between declarations and code.
- Add '__iomem' to all the declaration of HW register pointers.
- a36x_config: No more static global network configurations.
- a36x_config: Add a common file for the redundant configurations.

Changes for v2:
- Coding Style cleanup.
- Use readl(), writel(), clrsetbits_le32() to replace REG() macros.
- Use structure based hardware registers to replace the macro constants.
- Replace BIT() with BIT_MASK().

 arch/arm/cpu/faraday/a369/Makefile        |    8 ++
 arch/arm/include/asm/arch-a369/hardware.h |   88 ++++++++++++
 arch/arm/include/asm/arch-a369/sysc.h     |  211 +++++++++++++++++++++++++++++
 board/faraday/a369evb/Makefile            |    9 ++
 board/faraday/a369evb/board.c             |  122 +++++++++++++++++
 board/faraday/a369evb/clock.c             |   68 ++++++++++
 board/faraday/a369evb/lowlevel_init.S     |   15 ++
 boards.cfg                                |    1 +
 include/configs/a369.h                    |  111 +++++++++++++++
 9 files changed, 633 insertions(+)
 create mode 100644 arch/arm/cpu/faraday/a369/Makefile
 create mode 100644 arch/arm/include/asm/arch-a369/hardware.h
 create mode 100644 arch/arm/include/asm/arch-a369/sysc.h
 create mode 100644 board/faraday/a369evb/Makefile
 create mode 100644 board/faraday/a369evb/board.c
 create mode 100644 board/faraday/a369evb/clock.c
 create mode 100644 board/faraday/a369evb/lowlevel_init.S
 create mode 100644 include/configs/a369.h

new file mode 100644
index 0000000..1081c06
@@ -0,0 +1,8 @@
+#
+# (C) Copyright 2000-2003
+# Wolfgang Denk, DENX Software Engineering, wd at denx.de.
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+obj-y :=

new file mode 100644
index 0000000..42fef70
@@ -0,0 +1,9 @@
+#
+# (C) Copyright 2000-2006
+# Wolfgang Denk, DENX Software Engineering, [email protected].
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+obj-y	:= board.o clock.o
+obj-y	+= lowlevel_init.o

new file mode 100644
index 0000000..2085760
@@ -0,0 +1,15 @@
+/*
+ * (C) Copyright 2013
+ * Faraday Technology Corporation. <http://www.faraday-tech.com/>
+ * Kuo-Jung Su <[email protected]>
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <config.h>
+#include <version.h>
+
+/* Set up the platform, once the cpu has been initialized */
+.globl lowlevel_init
+lowlevel_init:
+	mov	pc,lr

index a8336cc..a998452 100644
@@ -59,6 +59,7 @@ Active  arm         arm720t        -           armltd          integrator
 Active  arm         arm920t        -           armltd          integrator          integratorap_cm920t                  integratorap:CM920T                                                                                                               Linus Walleij <[email protected]>
 Active  arm         arm920t        -           armltd          integrator          integratorcp_cm920t                  integratorcp:CM920T                                                                                                               Linus Walleij <[email protected]>
 Active  arm         arm920t        a320        faraday         -                   a320evb                              -                                                                                                                                 Po-Yu Chuang <[email protected]>
+Active  arm         faraday        a369        faraday         a369evb             a369evb                              a369                                                                                                                              Kuo-Jung Su <[email protected]>
 Active  arm         arm920t        at91        atmel           at91rm9200ek        at91rm9200ek                         at91rm9200ek                                                                                                                      Andreas Bie?mann <[email protected]>
 Active  arm         arm920t        at91        atmel           at91rm9200ek        at91rm9200ek_ram                     at91rm9200ek:RAMBOOT                                                                                                              Andreas Bie?mann <[email protected]>
 Active  arm         arm920t        at91        BuS             eb_cpux9k2          eb_cpux9k2                           eb_cpux9k2                                                                                                                        Jens Scharsig <[email protected]>

--
1.7.9.5

From: Kuo-Jung Su <[email protected]>

Faraday Virtual Machine (FVM) is a QEMU based emulator which is designed for early stage software development (e.g., IPL, SPL).

Please check the link bellow for details:
https://github.com/dantesu1218/qemu/blob/qemu-1.5.1/hw/arm/faraday_fvm.c

---
Changes for v9:
- Initial commit

 arch/arm/cpu/faraday/fvm/Makefile        |    8 ++++
 arch/arm/include/asm/arch-fvm/hardware.h |   76 ++++++++++++++++++++++++++++++
 board/faraday/fvm/Makefile               |    9 ++++
 board/faraday/fvm/board.c                |   60 +++++++++++++++++++++++
 board/faraday/fvm/clock.c                |   49 +++++++++++++++++++
 board/faraday/fvm/lowlevel_init.S        |   15 ++++++
 boards.cfg                               |    1 +
 include/configs/fvm.h                    |   61 ++++++++++++++++++++++++
 8 files changed, 279 insertions(+)
 create mode 100644 arch/arm/cpu/faraday/fvm/Makefile
 create mode 100644 arch/arm/include/asm/arch-fvm/hardware.h
 create mode 100644 board/faraday/fvm/Makefile
 create mode 100644 board/faraday/fvm/board.c
 create mode 100644 board/faraday/fvm/clock.c
 create mode 100644 board/faraday/fvm/lowlevel_init.S
 create mode 100644 include/configs/fvm.h

new file mode 100644
index 0000000..1081c06
@@ -0,0 +1,8 @@
+#
+# (C) Copyright 2000-2003
+# Wolfgang Denk, DENX Software Engineering, wd at denx.de.
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+obj-y :=

new file mode 100644
index 0000000..42fef70
@@ -0,0 +1,9 @@
+#
+# (C) Copyright 2000-2006
+# Wolfgang Denk, DENX Software Engineering, wd at denx.de.
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+obj-y	:= board.o clock.o
+obj-y	+= lowlevel_init.o

new file mode 100644
index 0000000..cbc006d
@@ -0,0 +1,15 @@
+/*
+ * (C) Copyright 2013
+ * Faraday Technology Corporation. <http://www.faraday-tech.com/tw/>
+ * Kuo-Jung Su <[email protected]>
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <config.h>
+#include <version.h>
+
+/* Set up the platform, once the cpu has been initialized */
+.globl lowlevel_init
+lowlevel_init:
+	mov	pc,lr

index a998452..089f539 100644
@@ -60,6 +60,7 @@ Active  arm         arm920t        -           armltd          integrator
 Active  arm         arm920t        -           armltd          integrator          integratorcp_cm920t                  integratorcp:CM920T                                                                                                               Linus Walleij <[email protected]>
 Active  arm         arm920t        a320        faraday         -                   a320evb                              -                                                                                                                                 Po-Yu Chuang <[email protected]>
 Active  arm         faraday        a369        faraday         a369evb             a369evb                              a369                                                                                                                              Kuo-Jung Su <[email protected]>
+Active  arm         faraday        fvm         faraday         -                   fvm                                  -                                                                                                                                 Kuo-Jung Su <[email protected]>
 Active  arm         arm920t        at91        atmel           at91rm9200ek        at91rm9200ek                         at91rm9200ek                                                                                                                      Andreas Bie?mann <[email protected]>
 Active  arm         arm920t        at91        atmel           at91rm9200ek        at91rm9200ek_ram                     at91rm9200ek:RAMBOOT                                                                                                              Andreas Bie?mann <[email protected]>
 Active  arm         arm920t        at91        BuS             eb_cpux9k2          eb_cpux9k2                           eb_cpux9k2                                                                                                                        Jens Scharsig <[email protected]>

--
1.7.9.5

From: Kuo-Jung Su <[email protected]>

These patches introduce Faraday A369 & Virtual SoC platform support.

Here are some public documents for your reference.

http://www.faraday-tech.com/html/Product/SoCPlatform/SoCreativeIII.htm
http://www.faraday-tech.com/html/documentation/index.html

There is also a QEMU based A369 emulator available at my github:

https://github.com/dantesu1218/qemu.git

Here is a quick start for QEMU + U-Boot:

1. Download the QEMU source tree

   $ git clone -b qemu-1.5.1 https://github.com/dantesu1218/qemu.git

2. Build & Install the QEMU:

   $ ./configure --target-list=arm-softmmu
   $ make
   $ make install

3. Launch u-boot with QEMU:

   $ qemu-system-arm -M a369 -m 512M -nographic -kernel ~/u-boot-2014.01/u-boot

Changes for v10:
- As per Albert's request, merge patch 1, 2 and patch 5, 6
- Add missing header file for FTSDC021

Changes for v9:
- Shrink the patch by dropping MMU/D-cache support, and see if we could get this patch accepted ASAP.
- Replace the out-of-date A360 EVB with Faraday Virtual Machine (FVM).
- Build 'arch_preboot_os()' only when CONFIG_CMD_BOOTM is defined.
- Add do_go_exec() to override the default behavior of 'go' command.
- Make Faraday SoC helper files & ftsmc020 standalone changesets.
- Coding style cleanup.

Changes for v8:
- Revise MMU/D-cache support
- Revise Faraday SoC common configurations.
- Drop FTINTC020 interrupt controller support.
- Drop FTLCDC200 LCD controller support.
- Drop FTNANDC021 NAND flash controller support, it would be latter submitted as a standalone patch set.
- Drop proprietary Faraday SPL support, the u-boot-spl would be adapted instead. However because it depends on the FTNANDC021 patch set, so it would be submitted after the FTNANDC021 patch set get committed.

Changes for v7:
- Update license to use SPDX identifiers.
- cfi_flash: drop the patch to unmap_physmem(), because it's already applied.
- ftnandc021: put_unaligned() -> memcpy()
- ftnandc021: update ecc relatived function prototypes to fix compile warnnings.

Changes for v6:
- Drop ethernet driver updates for ftmac110&ftgmac100, because they are already commited.
- arch/arm/cpu/faraday/cpu.c:

     struct ftwdt010_wdt __iomem *regs -> struct ftwdt010_wdt *regs

- arch/arm/cpu/faraday/cmd_bootfa.c: fix compiler warnning
- arch/arm/cpu/faraday/cmd_bootfa.c: use shorter paragraph in commit message, and move the original statement into the top of source file.
- ftnandc021: update README for CONFIG_SYS_FTNANDC021_TIMING
- ftnandc021: remove illegal type-punning

Changes for v5:
- Coding Style cleanup:
1. struct chip_regs __iomem *regs -> struct chip_regs *regs
2. Move Faraday specific APIs into asm/arch-faraday/*.h
- Fix Copyright notices (dates) throughout the patch
- Make 'arm: dma_alloc_coherent: malloc() -> memalign()' as a separate patch
- Make 'cfi_flash: use buffer length in unmap_physmem()' as a separate patch
- Define Faraday machine type in board's config header file
- Add the rationale to the command 'bootfa'
- Add myself as the maintainer for Faraday A360/A369 in MAINTAINERS.
- Chain the video:FTLCDC200 back to this patch series.
- Chain the nand:FTNANDC021 back to this patch series.
- Chain the net:FTGMAC100 & FTMAC110 back to this patch series.
- Update Faraday Firmware Image Format:
1. Drop u-boot image support to simplify the design.
Since it's not possible for the hard-wired ROM code of A360/A369 to support U-boot images. And the real bootloader for A360/A369 is actually Faraday bootcode2, rather than U-Boot.
2. Add image creation timestamp
- Update 'arch/arm/cpu/faraday/start.S' with the new design, which move relocation into 'arch/arm/lib/relocate.S'
- Drop i2c:FTI2C010 & spi:FTSSP010_SPI support. The corresponding patch would restart after this patch series have been accepted.
- Revise IRQ & MMU design: Now the exception table would be mapped to

     0x00000000 as a small page(4KB), rather than runtime adjust after
     relocation finished.

- Revise irq:FTINTC020 design, now the irq is always enabled inside irq_install_handler().
- Revise clock management system
- Revise FTPWMTMR010 & FTTMR010 timer design:
1. Drop IRQ dependant implementation
2. Use gd->arch.timer_rate_hz for timer clock source
3. Use gd->arch.tbl for timestamp

Changes for v4:
- Coding Style cleanup.
- Break down the patch series:
- Patches without hard dependency to this series are now seperate patches.
- Split up the patch into more logical changesets (i.e. interrupt & timers are now split up)
- Drop the faraday/nand.h to remove dependency to ftnandc021
- Drop the faraday/mmc.h to remove dependency to ftsdc010
- Add change logs to each part of the patch series to make patchwork be able to grab comments.

Changes for v3:
- Coding Style cleanup.
There is still one warnning reported by checkpatch.pl, however it's too deep for me to fix it.
Here is the shapshot for it:
-----------------------------------------------------
WARNING: do not add new typedefs
#9735: FILE: include/lcd.h:258:
+typedef struct vidinfo {
-----------------------------------------------------
- Drop bit fields from c struct.
- Drop macros for wirtel()/readl(), call them directly.
- Always insert a blank line between declarations and code.
- Replace all the infinite wait loop with a timeout.
- Add '__iomem' to all the declaration of HW register pointers.
- cmd_boot.c: Make it a separate stand-alone patch.
- ftspi020: Make it a separate stand-alone patch.
- dma-mapping.h: Have the global data ptr declared outside functions.
- dma-mapping.h: Add #if...#else...#endif to dma_free_coherent().
- MMU/D-Cache: Drop static non-cached region, now we use map_physmem()/unmap_physmem() for dynamic mappings.
- ftmac110: Make a correction to multi-line comment style
- ftmac110: Use random MAC address while having trouble to get one from environment variables.
- ftmac110: Add comments to timing control registers.
- ftnandc021: Re-write this driver with ECC enabled and correct column address handling for OOB read/write,
and fixing issused addressed by Scott.
- a36x_config: No more static global network configurations.
- a36x_config: Add a common file for the redundant configurations.

Changes for v2:
- Coding Style cleanup.
- Use readl(), writel(), clrsetbits_le32() to replace REG() macros.
- Use structure based hardware registers to replace the macro constants.
- Replace BIT() with BIT_MASK().
- echi-faraday: Remove debug codes.
- ftmac110: Remove debug codes.
- cache-cp15: Enable write buffer in write-through mode.

Kuo-Jung Su (6):
arm: add Faraday ARMv5TE cores support
arm: faraday: add FTTMR010 timer support
arm: faraday: add FTPWMTMR010 timer support
arm: faraday: add A369 evaluation board support
arm: faraday: add missing header file for FTSDC021
arm: faraday: add virtual machine support

 arch/arm/cpu/faraday/Makefile             |   13 +
 arch/arm/cpu/faraday/a369/Makefile        |    8 +
 arch/arm/cpu/faraday/cache.c              |  164 ++++++++++++
 arch/arm/cpu/faraday/config.mk            |   15 ++
 arch/arm/cpu/faraday/cpu.c                |  115 ++++++++
 arch/arm/cpu/faraday/ftpwmtmr010.c        |  112 ++++++++
 arch/arm/cpu/faraday/fttmr010.c           |  123 +++++++++
 arch/arm/cpu/faraday/fvm/Makefile         |    8 +
 arch/arm/cpu/faraday/start.S              |  407 +++++++++++++++++++++++++++++
 arch/arm/include/asm/arch-a369/hardware.h |   88 +++++++
 arch/arm/include/asm/arch-a369/sysc.h     |  211 +++++++++++++++
 arch/arm/include/asm/arch-fvm/hardware.h  |   76 ++++++
 arch/arm/include/asm/faraday.h            |   13 +
 board/faraday/a369evb/Makefile            |    9 +
 board/faraday/a369evb/board.c             |  122 +++++++++
 board/faraday/a369evb/clock.c             |   68 +++++
 board/faraday/a369evb/lowlevel_init.S     |   15 ++
 board/faraday/fvm/Makefile                |    9 +
 board/faraday/fvm/board.c                 |   60 +++++
 board/faraday/fvm/clock.c                 |   49 ++++
 board/faraday/fvm/lowlevel_init.S         |   15 ++
 boards.cfg                                |    2 +
 include/common.h                          |    3 +
 include/configs/a369.h                    |  111 ++++++++
 include/configs/faraday-common.h          |  314 ++++++++++++++++++++++
 include/configs/fvm.h                     |   61 +++++
 include/faraday/ftpwmtmr010.h             |   41 +++
 include/faraday/ftsdc021.h                |   13 +
 include/faraday/ftsmc020.h                |    1 +
 include/faraday/fttmr010.h                |   17 ++
 30 files changed, 2263 insertions(+)
 create mode 100644 arch/arm/cpu/faraday/Makefile
 create mode 100644 arch/arm/cpu/faraday/a369/Makefile
 create mode 100644 arch/arm/cpu/faraday/cache.c
 create mode 100644 arch/arm/cpu/faraday/config.mk
 create mode 100644 arch/arm/cpu/faraday/cpu.c
 create mode 100644 arch/arm/cpu/faraday/ftpwmtmr010.c
 create mode 100644 arch/arm/cpu/faraday/fttmr010.c
 create mode 100644 arch/arm/cpu/faraday/fvm/Makefile
 create mode 100644 arch/arm/cpu/faraday/start.S
 create mode 100644 arch/arm/include/asm/arch-a369/hardware.h
 create mode 100644 arch/arm/include/asm/arch-a369/sysc.h
 create mode 100644 arch/arm/include/asm/arch-fvm/hardware.h
 create mode 100644 arch/arm/include/asm/faraday.h
 create mode 100644 board/faraday/a369evb/Makefile
 create mode 100644 board/faraday/a369evb/board.c
 create mode 100644 board/faraday/a369evb/clock.c
 create mode 100644 board/faraday/a369evb/lowlevel_init.S
 create mode 100644 board/faraday/fvm/Makefile
 create mode 100644 board/faraday/fvm/board.c
 create mode 100644 board/faraday/fvm/clock.c
 create mode 100644 board/faraday/fvm/lowlevel_init.S
 create mode 100644 include/configs/a369.h
 create mode 100644 include/configs/faraday-common.h
 create mode 100644 include/configs/fvm.h
 create mode 100644 include/faraday/ftpwmtmr010.h
 create mode 100644 include/faraday/ftsdc021.h

--
1.7.9.5

From: Kuo-Jung Su <[email protected]>

Here is the list of verified cores:

1. FA606TE (ARMv5TE, no mmu)
2. FA626TE (ARMv5TE)

---
Changes for v10:
- Merge [arm: add Faraday SoC helper files]

Changes for v9:
- Build 'arch_preboot_os()' only when CONFIG_CMD_BOOTM is defined.
- Add do_go_exec() to override the default behavior of 'go' command.

Changes for v8:
- add arm_init_before_mmu() & mmu_page_table_flush()

Changes for v7:
- Update license to use SPDX identifiers.

Changes for v6:
- Nothing updates

Changes for v5:
- Initial commit

 arch/arm/cpu/faraday/Makefile    |   10 +
 arch/arm/cpu/faraday/cache.c     |  164 +++++++++++++++
 arch/arm/cpu/faraday/config.mk   |   15 ++
 arch/arm/cpu/faraday/cpu.c       |  115 +++++++++++
 arch/arm/cpu/faraday/start.S     |  407 ++++++++++++++++++++++++++++++++++++++
 arch/arm/include/asm/faraday.h   |   13 ++
 include/common.h                 |    3 +
 include/configs/faraday-common.h |  314 +++++++++++++++++++++++++++++
 8 files changed, 1041 insertions(+)
 create mode 100644 arch/arm/cpu/faraday/Makefile
 create mode 100644 arch/arm/cpu/faraday/cache.c
 create mode 100644 arch/arm/cpu/faraday/config.mk
 create mode 100644 arch/arm/cpu/faraday/cpu.c
 create mode 100644 arch/arm/cpu/faraday/start.S
 create mode 100644 arch/arm/include/asm/faraday.h
 create mode 100644 include/configs/faraday-common.h

new file mode 100644
index 0000000..c859238
@@ -0,0 +1,10 @@
+#
+# (C) Copyright 2000-2003
+# Wolfgang Denk, DENX Software Engineering, wd at denx.de.
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+extra-y := start.o
+
+obj-y   += cpu.o cache.o

new file mode 100644
index 0000000..f39e70b
@@ -0,0 +1,15 @@
+#
+# (C) Copyright 2000-2003
+# Wolfgang Denk, DENX Software Engineering, wd at denx.de.
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+PLATFORM_CPPFLAGS += -march=armv5te
+# =========================================================================
+#
+# Supply options according to compiler version
+#
+# =========================================================================
+PF_RELFLAGS_SLB_AT := $(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,))
+PLATFORM_RELFLAGS += $(PF_RELFLAGS_SLB_AT)

new file mode 100644
index 0000000..2b59af1
@@ -0,0 +1,13 @@
+/*
+ * (C) Copyright 2013 Faraday Technology
+ * Dante Su <[email protected]>
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#ifndef _ASM_FARADAY_H
+#define _ASM_FARADAY_H
+
+ulong clk_get_rate(const char *id);
+
+#endif	/* EOF */

index ea3e5ed..faae212 100644
@@ -91,6 +91,9 @@ typedef volatile unsigned char	vu_char;
 #ifdef CONFIG_SOC_DA8XX
 #include <asm/arch/hardware.h>
 #endif
+#ifdef CONFIG_SOC_FARADAY
+#include <asm/faraday.h>
+#endif
 
 #include <part.h>
 #include <flash.h>

--
1.7.9.5

From: Kuo-Jung Su <[email protected]>

Faraday FTTMR010 is a simple APB device which supports generic timer functions.

---
Changes for v8, v9, v10:
- Nothing updates

Changes for v7:
- Update license to use SPDX identifiers.

Changes for v6:
- Nothing updates

Changes for v5:
- Drop IRQ dependant implementation
- Use gd->arch.timer_rate_hz for timer clock source
- Use gd->arch.tbl for timestamp

Changes for v4:
- Coding Style cleanup.
- Break up from [arm: add Faraday A36x SoC platform support]

Changes for v3:
- Coding Style cleanup.
- Drop macros for wirtel()/readl(), call them directly.
- Always insert a blank line between declarations and code.
- Add '__iomem' to all the declaration of HW register pointers.

Changes for v2:
- Coding Style cleanup.
- Use readl(), writel(), clrsetbits_le32() to replace REG() macros.
- Use structure based hardware registers to replace the macro constants.
- Replace BIT() with BIT_MASK().

 arch/arm/cpu/faraday/Makefile   |    2 +
 arch/arm/cpu/faraday/fttmr010.c |  123 +++++++++++++++++++++++++++++++++++++++
 include/faraday/fttmr010.h      |   17 ++++++
 3 files changed, 142 insertions(+)
 create mode 100644 arch/arm/cpu/faraday/fttmr010.c

index c859238..73f6934 100644
@@ -8,3 +8,5 @@
 extra-y := start.o
 
 obj-y   += cpu.o cache.o
+
+obj-$(CONFIG_FTTMR010)    += fttmr010.o

index 2ab68d1..21ab113 100644
@@ -45,6 +45,16 @@ struct fttmr010 {
 #define FTTMR010_TM1_CLOCK	(1 << 1)
 #define FTTMR010_TM1_ENABLE	(1 << 0)
 
+#define FTTMR010_TM1_CRMASK \
+	(FTTMR010_TM1_UPDOWN | FTTMR010_TM1_OFENABLE \
+	| FTTMR010_TM1_CLOCK | FTTMR010_TM1_ENABLE)
+#define FTTMR010_TM2_CRMASK \
+	(FTTMR010_TM2_UPDOWN | FTTMR010_TM2_OFENABLE \
+	| FTTMR010_TM2_CLOCK | FTTMR010_TM2_ENABLE)
+#define FTTMR010_TM3_CRMASK \
+	(FTTMR010_TM3_UPDOWN | FTTMR010_TM3_OFENABLE \
+	| FTTMR010_TM3_CLOCK | FTTMR010_TM3_ENABLE)
+
 /*
  * Timer Interrupt State & Mask Registers
  */

@@ -58,4 +68,11 @@ struct fttmr010 {
 #define FTTMR010_TM1_MATCH2	(1 << 1)
 #define FTTMR010_TM1_MATCH1	(1 << 0)
 
+#define FTTMR010_TM1_ISRMASK \
+	(FTTMR010_TM1_OVERFLOW | FTTMR010_TM1_MATCH2 | FTTMR010_TM1_MATCH1)
+#define FTTMR010_TM2_ISRMASK \
+	(FTTMR010_TM2_OVERFLOW | FTTMR010_TM2_MATCH2 | FTTMR010_TM2_MATCH1)
+#define FTTMR010_TM3_ISRMASK \
+	(FTTMR010_TM3_OVERFLOW | FTTMR010_TM3_MATCH2 | FTTMR010_TM3_MATCH1)
+
 #endif	/* __FTTMR010_H */

--
1.7.9.5

From: Kuo-Jung Su <[email protected]>

Faraday FTPWMTMR010 is a simple APB device which supports both timer and pwm functions.

---
Changes for v8, v9, v10:
- Nothing updates

Changes for v7:
- Update license to use SPDX identifiers.

Changes for v6:
- Nothing updates

Changes for v5:
- Drop IRQ dependant implementation
- Use gd->arch.timer_rate_hz for timer clock source
- Use gd->arch.tbl for timestamp

Changes for v4:
- Coding Style cleanup.
- Break up from [arm: add Faraday A36x SoC platform support]

Changes for v3:
- Coding Style cleanup.
- Drop macros for wirtel()/readl(), call them directly.
- Always insert a blank line between declarations and code.
- Add '__iomem' to all the declaration of HW register pointers.

Changes for v2:
- Coding Style cleanup.
- Use readl(), writel(), clrsetbits_le32() to replace REG() macros.
- Use structure based hardware registers to replace the macro constants.
- Replace BIT() with BIT_MASK().

 arch/arm/cpu/faraday/Makefile      |    1 +
 arch/arm/cpu/faraday/ftpwmtmr010.c |  112 ++++++++++++++++++++++++++++++++++++
 include/faraday/ftpwmtmr010.h      |   41 +++++++++++++
 3 files changed, 154 insertions(+)
 create mode 100644 arch/arm/cpu/faraday/ftpwmtmr010.c
 create mode 100644 include/faraday/ftpwmtmr010.h

index 73f6934..19c5796 100644
@@ -10,3 +10,4 @@ extra-y := start.o
 obj-y   += cpu.o cache.o
 
 obj-$(CONFIG_FTTMR010)    += fttmr010.o
+obj-$(CONFIG_FTPWMTMR010) += ftpwmtmr010.o

--
1.7.9.5

From: Kuo-Jung Su <[email protected]>

The A369 is an ARM CPU-based SoC with rich SoC features and convenient FPGA link for building fast system prototyping and mass production.

More information about this hardware can be found at:
http://www.faraday-tech.com/html/Product/SoCPlatform/SoCreativeIII.htm

---
Changes for v10:
- Merge [arm: faraday: ftsmc020: add a fail-safe macro constant]

Changes for v9:
- Revise the commit message.

Changes for v8:
- Make A369 a standalong changeset.

Changes for v7:
- Update license to use SPDX identifiers.

Changes for v6:

	- arch/arm/cpu/faraday/cpu.c:
	  struct ftwdt010_wdt __iomem *regs -> struct ftwdt010_wdt *regs

Changes for v5:
- Coding Style cleanup:
1. struct chip_regs __iomem *regs -> struct chip_regs *regs
2. Move Faraday specific APIs into asm/arch-faraday/*.h
- Fix Copyright notices (dates) throughout the patch
- Define Faraday machine type in board's config header file
- Add myself as the maintainer for Faraday A360/A369 in MAINTAINERS.
- Drop i2c:FTI2C010 & spi:FTSSP010_SPI support. The corresponding patch would restart after this patch series have been accepted.
- Revise clock management system

Changes for v4:
- Coding Style cleanup.
- Break-down the interrupt, timers and common utilties.

Changes for v3:
- Coding Style cleanup.
- Drop macros for wirtel()/readl(), call them directly.
- Always insert a blank line between declarations and code.
- Add '__iomem' to all the declaration of HW register pointers.
- a36x_config: No more static global network configurations.
- a36x_config: Add a common file for the redundant configurations.

Changes for v2:
- Coding Style cleanup.
- Use readl(), writel(), clrsetbits_le32() to replace REG() macros.
- Use structure based hardware registers to replace the macro constants.
- Replace BIT() with BIT_MASK().

 arch/arm/cpu/faraday/a369/Makefile        |    8 ++
 arch/arm/include/asm/arch-a369/hardware.h |   88 ++++++++++++
 arch/arm/include/asm/arch-a369/sysc.h     |  211 +++++++++++++++++++++++++++++
 board/faraday/a369evb/Makefile            |    9 ++
 board/faraday/a369evb/board.c             |  122 +++++++++++++++++
 board/faraday/a369evb/clock.c             |   68 ++++++++++
 board/faraday/a369evb/lowlevel_init.S     |   15 ++
 boards.cfg                                |    1 +
 include/configs/a369.h                    |  111 +++++++++++++++
 include/faraday/ftsmc020.h                |    1 +
 10 files changed, 634 insertions(+)
 create mode 100644 arch/arm/cpu/faraday/a369/Makefile
 create mode 100644 arch/arm/include/asm/arch-a369/hardware.h
 create mode 100644 arch/arm/include/asm/arch-a369/sysc.h
 create mode 100644 board/faraday/a369evb/Makefile
 create mode 100644 board/faraday/a369evb/board.c
 create mode 100644 board/faraday/a369evb/clock.c
 create mode 100644 board/faraday/a369evb/lowlevel_init.S
 create mode 100644 include/configs/a369.h

new file mode 100644
index 0000000..1081c06
@@ -0,0 +1,8 @@
+#
+# (C) Copyright 2000-2003
+# Wolfgang Denk, DENX Software Engineering, wd at denx.de.
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+obj-y :=

new file mode 100644
index 0000000..42fef70
@@ -0,0 +1,9 @@
+#
+# (C) Copyright 2000-2006
+# Wolfgang Denk, DENX Software Engineering, [email protected].
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+obj-y	:= board.o clock.o
+obj-y	+= lowlevel_init.o

new file mode 100644
index 0000000..2085760
@@ -0,0 +1,15 @@
+/*
+ * (C) Copyright 2013
+ * Faraday Technology Corporation. <http://www.faraday-tech.com/>
+ * Kuo-Jung Su <[email protected]>
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <config.h>
+#include <version.h>
+
+/* Set up the platform, once the cpu has been initialized */
+.globl lowlevel_init
+lowlevel_init:
+	mov	pc,lr

index 0e663d9..194dffe 100644
@@ -60,6 +60,7 @@ Active  arm         arm720t        -           armltd          integrator
 Active  arm         arm920t        -           armltd          integrator          integratorap_cm920t                  integratorap:CM920T                                                                                                               Linus Walleij <[email protected]>
 Active  arm         arm920t        -           armltd          integrator          integratorcp_cm920t                  integratorcp:CM920T                                                                                                               Linus Walleij <[email protected]>
 Active  arm         arm920t        a320        faraday         -                   a320evb                              -                                                                                                                                 Po-Yu Chuang <[email protected]>
+Active  arm         faraday        a369        faraday         a369evb             a369evb                              a369                                                                                                                              Kuo-Jung Su <[email protected]>
 Active  arm         arm920t        at91        atmel           at91rm9200ek        at91rm9200ek                         at91rm9200ek                                                                                                                      Andreas Bie?mann <[email protected]>
 Active  arm         arm920t        at91        atmel           at91rm9200ek        at91rm9200ek_ram                     at91rm9200ek:RAMBOOT                                                                                                              Andreas Bie?mann <[email protected]>
 Active  arm         arm920t        at91        BuS             eb_cpux9k2          eb_cpux9k2                           eb_cpux9k2                                                                                                                        Jens Scharsig <[email protected]>

index 54120ab..485d7c2 100644
@@ -70,5 +70,6 @@ void ftsmc020_init(void);
 #define FTSMC020_TPR_WTC(x)	(((x) & 0x3) << 6)
 #define FTSMC020_TPR_AHT(x)	(((x) & 0x3) << 4)
 #define FTSMC020_TPR_TRNA(x)	(((x) & 0xf) << 0)
+#define FTSMC020_TPR_FAILSAFE	0x0f1ff3ff /* fail-safe timing */
 
 #endif	/* __FTSMC020_H */

--
1.7.9.5

From: Kuo-Jung Su <[email protected]>

For the Faraday FTSDC021 (SDHCI) controller driver source is sent out before the patches for Faraday Virtual Machine (FVM) which actually uses this chip.

The header file (ftsdc021.h) has been accidentally removed by commit: 3b98b57fa - include: delete unused header files

This patch simply rollback this removal.

---
Changes for v10:
- Initial commit

 include/faraday/ftsdc021.h |   13 +++++++++++++
 1 file changed, 13 insertions(+)
 create mode 100644 include/faraday/ftsdc021.h

new file mode 100644
index 0000000..de8e250
@@ -0,0 +1,13 @@
+/*
+ * (C) Copyright 2013 Faraday Technology
+ * Dante Su <[email protected]>
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#ifndef __FTSDC021_H
+#define __FTSDC021_H
+
+int ftsdc021_sdhci_init(u32 regbase);
+
+#endif /* __FTSDC021_H */

--
1.7.9.5

From: Kuo-Jung Su <[email protected]>

Faraday Virtual Machine (FVM) is a QEMU based emulator which is designed for early stage software development (i.e., IPL, SPL development).

Please check the link bellow for details:
https://github.com/dantesu1218/qemu/blob/qemu-1.5.1/hw/arm/faraday_fvm.c

---
Changes for v10:
- Nothing updates

Changes for v9:
- Initial commit

 arch/arm/cpu/faraday/fvm/Makefile        |    8 ++++
 arch/arm/include/asm/arch-fvm/hardware.h |   76 ++++++++++++++++++++++++++++++
 board/faraday/fvm/Makefile               |    9 ++++
 board/faraday/fvm/board.c                |   60 +++++++++++++++++++++++
 board/faraday/fvm/clock.c                |   49 +++++++++++++++++++
 board/faraday/fvm/lowlevel_init.S        |   15 ++++++
 boards.cfg                               |    1 +
 include/configs/fvm.h                    |   61 ++++++++++++++++++++++++
 8 files changed, 279 insertions(+)
 create mode 100644 arch/arm/cpu/faraday/fvm/Makefile
 create mode 100644 arch/arm/include/asm/arch-fvm/hardware.h
 create mode 100644 board/faraday/fvm/Makefile
 create mode 100644 board/faraday/fvm/board.c
 create mode 100644 board/faraday/fvm/clock.c
 create mode 100644 board/faraday/fvm/lowlevel_init.S
 create mode 100644 include/configs/fvm.h

new file mode 100644
index 0000000..1081c06
@@ -0,0 +1,8 @@
+#
+# (C) Copyright 2000-2003
+# Wolfgang Denk, DENX Software Engineering, wd at denx.de.
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+obj-y :=

new file mode 100644
index 0000000..42fef70
@@ -0,0 +1,9 @@
+#
+# (C) Copyright 2000-2006
+# Wolfgang Denk, DENX Software Engineering, wd at denx.de.
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+obj-y	:= board.o clock.o
+obj-y	+= lowlevel_init.o

new file mode 100644
index 0000000..cbc006d
@@ -0,0 +1,15 @@
+/*
+ * (C) Copyright 2013
+ * Faraday Technology Corporation. <http://www.faraday-tech.com/tw/>
+ * Kuo-Jung Su <[email protected]>
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <config.h>
+#include <version.h>
+
+/* Set up the platform, once the cpu has been initialized */
+.globl lowlevel_init
+lowlevel_init:
+	mov	pc,lr

index 194dffe..e783231 100644
@@ -61,6 +61,7 @@ Active  arm         arm920t        -           armltd          integrator
 Active  arm         arm920t        -           armltd          integrator          integratorcp_cm920t                  integratorcp:CM920T                                                                                                               Linus Walleij <[email protected]>
 Active  arm         arm920t        a320        faraday         -                   a320evb                              -                                                                                                                                 Po-Yu Chuang <[email protected]>
 Active  arm         faraday        a369        faraday         a369evb             a369evb                              a369                                                                                                                              Kuo-Jung Su <[email protected]>
+Active  arm         faraday        fvm         faraday         -                   fvm                                  -                                                                                                                                 Kuo-Jung Su <[email protected]>
 Active  arm         arm920t        at91        atmel           at91rm9200ek        at91rm9200ek                         at91rm9200ek                                                                                                                      Andreas Bie?mann <[email protected]>
 Active  arm         arm920t        at91        atmel           at91rm9200ek        at91rm9200ek_ram                     at91rm9200ek:RAMBOOT                                                                                                              Andreas Bie?mann <[email protected]>
 Active  arm         arm920t        at91        BuS             eb_cpux9k2          eb_cpux9k2                           eb_cpux9k2                                                                                                                        Jens Scharsig <[email protected]>

--
1.7.9.5

Hi Kuo-Jung,

Except for patches 4/6 and 6/6 in which boards.cfg needed manual fixing (due to commit 3fa67050), the series applies to current u-boot-arm/master, but building fails for both a369evb and fvm with multiple instances of this error:

include/asm/arch/hardware.h:14:23: fatal error: asm/sizes.h: No such file or directory

Can you please rebase (for boards.cfg) and diagnose?

Amicalement,

Albert.

2014-03-25 20:41 GMT+08:00 Albert ARIBAUD <[email protected]>:

It's because that the 'asm/sizes.h' has been moved to 'linux/sizes.h' by commit 1ace4022394.

Sure, the updated patches are on the way.

Best wishes,
Kuo-Jung Su

From: Kuo-Jung Su <[email protected]>

These patches introduce Faraday A369 & Virtual SoC platform support.

Here are some public documents for your reference.

http://www.faraday-tech.com/html/Product/SoCPlatform/SoCreativeIII.htm
http://www.faraday-tech.com/html/documentation/index.html

There is also a QEMU based A369 emulator available at my github:

https://github.com/dantesu1218/qemu.git

Here is a quick start for QEMU + U-Boot:

1. Download the QEMU source tree

   $ git clone -b qemu-1.5.1 https://github.com/dantesu1218/qemu.git

2. Build & Install the QEMU:

   $ ./configure --target-list=arm-softmmu
   $ make
   $ make install

3. Launch u-boot with QEMU:

   $ qemu-system-arm -M a369 -m 512M -nographic -kernel ~/u-boot-2014.01/u-boot

Changes for v11:
- Fix boards.cfg (due to commit 3fa67050)
- Rename <asm/sizes.h> to <linux/sizes.h> (due to commit 1ace4022)
- Directly specify the timer object in 'arch/arm/cpu/faraday/<soc>/Makefile' instead of using CONFIG_FTTMR010 in 'arch/arm/cpu/faraday/Makefile'
- Directly specify the timer object in 'arch/arm/cpu/faraday/<soc>/Makefile' instead of using CONFIG_FTPWMTMR010 in 'arch/arm/cpu/faraday/Makefile'

Changes for v10:
- As per Albert's request, merge patch 1, 2 and patch 5, 6
- Add missing header file for FTSDC021

Changes for v9:
- Shrink the patch by dropping MMU/D-cache support, and see if we could get this patch accepted ASAP.
- Replace the out-of-date A360 EVB with Faraday Virtual Machine (FVM).
- Build 'arch_preboot_os()' only when CONFIG_CMD_BOOTM is defined.
- Add do_go_exec() to override the default behavior of 'go' command.
- Make Faraday SoC helper files & ftsmc020 standalone changesets.
- Coding style cleanup.

Changes for v8:
- Revise MMU/D-cache support
- Revise Faraday SoC common configurations.
- Drop FTINTC020 interrupt controller support.
- Drop FTLCDC200 LCD controller support.
- Drop FTNANDC021 NAND flash controller support, it would be latter submitted as a standalone patch set.
- Drop proprietary Faraday SPL support, the u-boot-spl would be adapted instead. However because it depends on the FTNANDC021 patch set, so it would be submitted after the FTNANDC021 patch set get committed.

Changes for v7:
- Update license to use SPDX identifiers.
- cfi_flash: drop the patch to unmap_physmem(), because it's already applied.
- ftnandc021: put_unaligned() -> memcpy()
- ftnandc021: update ecc relatived function prototypes to fix compile warnnings.

Changes for v6:
- Drop ethernet driver updates for ftmac110&ftgmac100, because they are already commited.
- arch/arm/cpu/faraday/cpu.c:

     struct ftwdt010_wdt __iomem *regs -> struct ftwdt010_wdt *regs

- arch/arm/cpu/faraday/cmd_bootfa.c: fix compiler warnning
- arch/arm/cpu/faraday/cmd_bootfa.c: use shorter paragraph in commit message, and move the original statement into the top of source file.
- ftnandc021: update README for CONFIG_SYS_FTNANDC021_TIMING
- ftnandc021: remove illegal type-punning

Changes for v5:
- Coding Style cleanup:
1. struct chip_regs __iomem *regs -> struct chip_regs *regs
2. Move Faraday specific APIs into asm/arch-faraday/*.h
- Fix Copyright notices (dates) throughout the patch
- Make 'arm: dma_alloc_coherent: malloc() -> memalign()' as a separate patch
- Make 'cfi_flash: use buffer length in unmap_physmem()' as a separate patch
- Define Faraday machine type in board's config header file
- Add the rationale to the command 'bootfa'
- Add myself as the maintainer for Faraday A360/A369 in MAINTAINERS.
- Chain the video:FTLCDC200 back to this patch series.
- Chain the nand:FTNANDC021 back to this patch series.
- Chain the net:FTGMAC100 & FTMAC110 back to this patch series.
- Update Faraday Firmware Image Format:
1. Drop u-boot image support to simplify the design.
Since it's not possible for the hard-wired ROM code of A360/A369 to support U-boot images. And the real bootloader for A360/A369 is actually Faraday bootcode2, rather than U-Boot.
2. Add image creation timestamp
- Update 'arch/arm/cpu/faraday/start.S' with the new design, which move relocation into 'arch/arm/lib/relocate.S'
- Drop i2c:FTI2C010 & spi:FTSSP010_SPI support. The corresponding patch would restart after this patch series have been accepted.
- Revise IRQ & MMU design: Now the exception table would be mapped to

     0x00000000 as a small page(4KB), rather than runtime adjust after
     relocation finished.

- Revise irq:FTINTC020 design, now the irq is always enabled inside irq_install_handler().
- Revise clock management system
- Revise FTPWMTMR010 & FTTMR010 timer design:
1. Drop IRQ dependant implementation
2. Use gd->arch.timer_rate_hz for timer clock source
3. Use gd->arch.tbl for timestamp

Changes for v4:
- Coding Style cleanup.
- Break down the patch series:
- Patches without hard dependency to this series are now seperate patches.
- Split up the patch into more logical changesets (i.e. interrupt & timers are now split up)
- Drop the faraday/nand.h to remove dependency to ftnandc021
- Drop the faraday/mmc.h to remove dependency to ftsdc010
- Add change logs to each part of the patch series to make patchwork be able to grab comments.

Changes for v3:
- Coding Style cleanup.
There is still one warnning reported by checkpatch.pl, however it's too deep for me to fix it.
Here is the shapshot for it:
-----------------------------------------------------
WARNING: do not add new typedefs
#9735: FILE: include/lcd.h:258:
+typedef struct vidinfo {
-----------------------------------------------------
- Drop bit fields from c struct.
- Drop macros for wirtel()/readl(), call them directly.
- Always insert a blank line between declarations and code.
- Replace all the infinite wait loop with a timeout.
- Add '__iomem' to all the declaration of HW register pointers.
- cmd_boot.c: Make it a separate stand-alone patch.
- ftspi020: Make it a separate stand-alone patch.
- dma-mapping.h: Have the global data ptr declared outside functions.
- dma-mapping.h: Add #if...#else...#endif to dma_free_coherent().
- MMU/D-Cache: Drop static non-cached region, now we use map_physmem()/unmap_physmem() for dynamic mappings.
- ftmac110: Make a correction to multi-line comment style
- ftmac110: Use random MAC address while having trouble to get one from environment variables.
- ftmac110: Add comments to timing control registers.
- ftnandc021: Re-write this driver with ECC enabled and correct column address handling for OOB read/write,
and fixing issused addressed by Scott.
- a36x_config: No more static global network configurations.
- a36x_config: Add a common file for the redundant configurations.

Changes for v2:
- Coding Style cleanup.
- Use readl(), writel(), clrsetbits_le32() to replace REG() macros.
- Use structure based hardware registers to replace the macro constants.
- Replace BIT() with BIT_MASK().
- echi-faraday: Remove debug codes.
- ftmac110: Remove debug codes.
- cache-cp15: Enable write buffer in write-through mode.