Add Qualcomm BAM dmaengine driver
Subsystems (3)
v7 cover Add Qualcomm BAM dmaengine driver
This patch set introduces the dmaengine driver for the Qualcomm Bus Access Manager (BAM) DMA controller present on MSM 8x74 devices. A number of the on-chip devices have their own BAM DMA controller and use it to move data between system memory and peripherals or between two peripherals.
The initial version of this driver will only support slave DMA operations between system memory and peripherals.
Changes from v6:
- Changed KConfig dependency from ARCH_MSM_DT to ARCH_QCOM.
- Incorporated comments on DT binding.
- Changed driver source file to accomodate DT changes.
Changes from v5:
- Separated copyright from BAM description
- Removed usage of slave dma direction
- Reworked slave config interface
- Removed max segment size restriction in slave_sg
- Added acked-by on DT patch
- Fixed nit comments
Changes from v4:
- Add devm_free_irq() to .remove to avoid race condition
- Free FIFO memory in .remove
Changes from v3:
- Remove unused bam_channel_dir.
- Remove incorrect write to BAM_IRQ_SRCS_EE (read only).
- Remove dma direction from DT binding and revise driver to use direction from prep_slave_sg.
- Remove unnecessary channel reset from channel_init. This could affect channels controlled from other execution environments.
- Change terminate_all to also take care of the current active descriptor.
- Rework .remove function to correctly mask interrupts and clean up resources and tasklets.
Changes from v2:
- Corrected Kconfig dependencies
- Moved execution environment ID to controller DT binding. The EE is a global setting across all of the channels on the controller.
- Combined header into source file.
- Corrected copyright date.
- Moved channel hardware initialization to occur when channel is used for the first time.
- Converted dma_alloc_coherent to dma_alloc_writecombine
- Removed unecessary reset of channel from the dma terminate_all
- Corrected usage of EE in irq handler and channel configuration functions.
- Changed resource functions inside probe to use correct APIs.
- Removed dma filter function and modified dma_xlate to use dma_get_slave_channel API
- Fixed various nit comments
Changes from v1:
- Converted driver to use virt-dma
- Reworked probe function per review comments
- tx_status function now computes and returns residuals
- Removed proprietary slave config. Removed associated include file.
- Renamed files to reflect vendor name instead of specific device
- Converted to use (readl|writel)_relaxed w/ appropriate barriers
- Removed unions in favor of standard types.
Andy Gross (2):
dmaengine: qcom_bam_dma: Add device tree binding
dmaengine: add Qualcomm BAM dma driver
.../devicetree/bindings/dma/qcom_bam_dma.txt | 41 + drivers/dma/Kconfig | 9 + drivers/dma/Makefile | 1 + drivers/dma/qcom_bam_dma.c | 1106 ++++++++++++++++++++ 4 files changed, 1157 insertions(+) create mode 100644 Documentation/devicetree/bindings/dma/qcom_bam_dma.txt create mode 100644 drivers/dma/qcom_bam_dma.c
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PATCH v7 1/2 dmaengine: qcom_bam_dma: Add device tree binding
Add device tree binding support for the QCOM BAM DMA driver.
--- .../devicetree/bindings/dma/qcom_bam_dma.txt | 41 ++++++++++++++++++++ 1 file changed, 41 insertions(+) create mode 100644 Documentation/devicetree/bindings/dma/qcom_bam_dma.txt
Documentation/devicetree/bindings/dma/qcom_bam_dma.txt new file +41 -0
@@ -0,0 +1,41 @@ +QCOM BAM DMA controller + +Required properties: +- compatible: must contain "qcom,bam-v1.4.0" for MSM8974 +- reg: Address range for DMA registers +- interrupts: Should contain the one interrupt shared by all channels +- #dma-cells: must be <1>, the cell in the dmas property of the client device + represents the channel number +- clocks: required clock +- clock-names: must contain "bam_clk" entry +- qcom,ee : indicates the active Execution Environment identifier (0-7) used in + the secure world. + +Example: + + uart-bam: dma at f9984000 = { + compatible = "qcom,bam-v1.4.0"; + reg = <0xf9984000 0x15000>; + interrupts = <0 94 0>; + clocks = <&gcc GCC_BAM_DMA_AHB_CLK>; + clock-names = "bam_clk"; + #dma-cells = <1>; + qcom,ee = <0>; + }; + +DMA clients must use the format described in the dma.txt file, using a two cell +specifier for each channel. + +Example: + serial at f991e000 { + compatible = "qcom,msm-uart"; + reg = <0xf991e000 0x1000> + <0xf9944000 0x19000>; + interrupts = <0 108 0>; + clocks = <&gcc GCC_BLSP1_UART2_APPS_CLK>, + <&gcc GCC_BLSP1_AHB_CLK>; + clock-names = "core", "iface"; + + dmas = <&uart-bam 0>, <&uart-bam 1>; + dma-names = "rx", "tx"; + };
Signature · 2 lines
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PATCH v7 2/2 dmaengine: add Qualcomm BAM dma driver
In reply to Andy GrossAdd the DMA engine driver for the QCOM Bus Access Manager (BAM) DMA controller found in the MSM 8x74 platforms.
Each BAM DMA device is associated with a specific on-chip peripheral. Each channel provides a uni-directional data transfer engine that is capable of transferring data between the peripheral and system memory (System mode), or between two peripherals (BAM2BAM).
The initial release of this driver only supports slave transfers between peripherals and system memory.
--- drivers/dma/Kconfig | 9 + drivers/dma/Makefile | 1 + drivers/dma/qcom_bam_dma.c | 1106 ++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 1116 insertions(+) create mode 100644 drivers/dma/qcom_bam_dma.c
drivers/dma/Kconfig +9 -0
@@ -401,4 +401,13 @@ config DMATEST config DMA_ENGINE_RAID bool +config QCOM_BAM_DMA + tristate "QCOM BAM DMA support" + depends on ARCH_QCOM || (COMPILE_TEST && OF && ARM) + select DMA_ENGINE + select DMA_VIRTUAL_CHANNELS + ---help--- + Enable support for the QCOM BAM DMA controller. This controller + provides DMA capabilities for a variety of on-chip devices. + endif
drivers/dma/Makefile +1 -0
@@ -44,3 +44,4 @@ obj-$(CONFIG_DMA_JZ4740) += dma-jz4740.o obj-$(CONFIG_TI_CPPI41) += cppi41.o obj-$(CONFIG_K3_DMA) += k3dma.o obj-$(CONFIG_MOXART_DMA) += moxart-dma.o +obj-$(CONFIG_QCOM_BAM_DMA) += qcom_bam_dma.o
drivers/dma/qcom_bam_dma.c new file +1106 -0
1,106 lines not on this page · raw message
Signature · 2 lines
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, hosted by The Linux Foundation
Re: [Patch v7 2/2] dmaengine: add Qualcomm BAM dma driver
Hi,
drivers/dma/Kconfig config DMATEST · line 406
Quoted 11 lines · Andy Gross
drivers/dma/Kconfig +3
-0@@ -401,4 +401,13 @@ config DMATEST config DMA_ENGINE_RAID bool +config QCOM_BAM_DMA + tristate "QCOM BAM DMA support" + depends on ARCH_QCOM || (COMPILE_TEST && OF && ARM)
do you really want to make it depend on ARM even when COMPILE_TEST=y ?
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Re: [Patch v7 2/2] dmaengine: add Qualcomm BAM dma driver
Quoted 3 lines · Felipe Balbi
drivers/dma/Kconfig config DMATEST · line 406
Quoted 1 line
drivers/dma/Kconfig +1
-0+ depends on ARCH_QCOM || (COMPILE_TEST && OF && ARM)do you really want to make it depend on ARM even when COMPILE_TEST=y ?
writel_relaxed() is unfortunately not generally available so it'd fail
to build on platforms like x86.
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Re: [Patch v7 2/2] dmaengine: add Qualcomm BAM dma driver
Quoted 8 lines · Mark Brown
Quoted 3 lines · Felipe Balbi
drivers/dma/Kconfig config DMATEST · line 406
Quoted 1 line
drivers/dma/Kconfig +1
-0+ depends on ARCH_QCOM || (COMPILE_TEST && OF && ARM)do you really want to make it depend on ARM even when COMPILE_TEST=y ?
writel_relaxed()is unfortunately not generally available so it'd fail to build on platforms like x86.
bummer
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Re: [Patch v7 2/2] dmaengine: add Qualcomm BAM dma driver
In reply to Andy GrossHi Andy,
Thanks for the patch.
Quoted 18 lines · Andy Gross
Add the DMA engine driver for the QCOM Bus Access Manager (BAM) DMA controller found in the MSM 8x74 platforms.
Each BAM DMA device is associated with a specific on-chip peripheral. Each channel provides a uni-directional data transfer engine that is capable of transferring data between the peripheral and system memory (System mode), or between two peripherals (BAM2BAM).
The initial release of this driver only supports slave transfers between peripherals and system memory.
Signed-off-by Andy Gross <[email protected]>--- drivers/dma/Kconfig | 9 + drivers/dma/Makefile | 1 + drivers/dma/qcom_bam_dma.c | 1106 ++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 1116 insertions(+) create mode 100644 drivers/dma/qcom_bam_dma.c
<snip>
Quoted 4 lines
drivers/dma/qcom_bam_dma.c new file +4
-0+ +/** +* bam_init +* @bdev: bam device
drivers/dma/qcom_bam_dma.c line 905
Quoted 10 lines
drivers/dma/qcom_bam_dma.c new file +10
-0+* +* Initialization helper for global bam registers +*/ +static int bam_init (struct bam_device *bdev) +{ +u32 val; + +/* read revision and configuration information */ + val =readl_relaxed (bdev->regs +BAM_REVISION ) &NUM_EES_MASK ; +
The ees shit is not zero and you got wrong ee. Could you add the line below or something similar:
val = (val >> NUM_EES_SHIFT) & NUM_EES_MASK;
drivers/dma/qcom_bam_dma.c line 909
Quoted 4 lines
drivers/dma/qcom_bam_dma.c new file +4
-0+/* check that configured EE is within range */ +if (bdev->ee >= val) +return -EINVAL ; +
regards,
Stan
Re: [Patch v7 2/2] dmaengine: add Qualcomm BAM dma driver
Quoted 9 lines · Stanimir Varbanov
drivers/dma/qcom_bam_dma.c line 905
Quoted 3 lines
drivers/dma/qcom_bam_dma.c new file +3
-0+/* read revision and configuration information */ + val =readl_relaxed (bdev->regs +BAM_REVISION ) &NUM_EES_MASK ; +The ees shit is not zero and you got wrong ee. Could you add the line below or something similar:
val = (val >>
NUM_EES_SHIFT) &NUM_EES_MASK;
Good catch. I missed the shift when I reworked and got lucky that the revision is in the lower 8 bits and is non-zero.
Signature · 3 lines
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