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ARM: tegra: Re-add removed SoC id macro to tegra_resume()

PATCH Superseded Dmitry Osipenko 2 participants 5 messages Oct 8, 2014 – Oct 9, 2014

Subsystems (4)
Stable branch Arm (32-bit) Arm sub-architectures Tegra architecture support

v1 of 3 Superseded Latest is v3 →

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Dmitry Osipenko

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#0 lore raw

PATCH 1/1 ARM: tegra: Re-add removed SoC id macro to tegra_resume()

Commit d127e9c5c5bc1ee22a7b1fe804397cddd132f756 ("ARM: tegra: make tegra_resume can work with current and later chips") removed tegra_get_soc_id macro leaving used cpu register unassigned and as result causing execution of unintended code on tegra20. Fix it by re-adding macro.

Signed-off-by Dmitry Osipenko <[email protected]>
---
 arch/arm/mach-tegra/reset-handler.S | 1 +
 1 file changed, 1 insertion(+)
arch/arm/mach-tegra/reset-handler.S +1 -0
index 7b2baab..71be4af 100644
@@ -51,6 +51,7 @@ ENTRY(tegra_resume)
  THUMB(	it	ne )
 	bne	cpu_resume			@ no
 
+	tegra_get_soc_id TEGRA_APB_MISC_BASE, r6
 	/* Are we on Tegra20? */
 	cmp	r6, #TEGRA20
 	beq	1f				@ Yes
Signature · 1 line
2.1.1
Reviewed-by on v1 1/1
#1 lore raw

Hi,

Quoted 4 lines · Dmitry Osipenko

Commit d127e9c5c5bc1ee22a7b1fe804397cddd132f756 ("ARM: tegra: make tegra_resume can work with current and later chips") removed tegra_get_soc_id macro leaving used cpu register unassigned and as result causing execution of unintended code on tegra20. Fix it by re-adding macro.

you should add:

Fixes d127e9c (ARM: tegra: make tegra_resume can work with current and later chips)
Cc <[email protected]> # v3.13+

here. With that:

Reviewed-by Felipe Balbi <[email protected]>
Quoted 25 lines
Signed-off-by Dmitry Osipenko <[email protected]>
---
 arch/arm/mach-tegra/reset-handler.S | 1 +
 1 file changed, 1 insertion(+)
arch/arm/mach-tegra/reset-handler.S +1 -0
index 7b2baab..71be4af 100644
@@ -51,6 +51,7 @@ ENTRY(tegra_resume)
  THUMB(	it	ne )
 	bne	cpu_resume			@ no
 
+	tegra_get_soc_id TEGRA_APB_MISC_BASE, r6
 	/* Are we on Tegra20? */
 	cmp	r6, #TEGRA20
 	beq	1f				@ Yes
Signature · 7 lines
2.1.1

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Signature · 1 line
balbi
#2 lore raw
Quoted 8 lines · Felipe Balbi

Hi,

Quoted 4 lines · Dmitry Osipenko

Commit d127e9c5c5bc1ee22a7b1fe804397cddd132f756 ("ARM: tegra: make tegra_resume can work with current and later chips") removed tegra_get_soc_id macro leaving used cpu register unassigned and as result causing execution of unintended code on tegra20. Fix it by re-adding macro.

Quoted 8 lines

you should add:

Fixes d127e9c (ARM: tegra: make tegra_resume can work with current and later chips)
Cc <[email protected]> # v3.13+

here. With that:

Reviewed-by Felipe Balbi <[email protected]>

oh, and you should probably Cc lakml.

Signature · 1 line
balbi
author
#3 lore raw

PATCH v2 1/1 ARM: tegra: Re-add removed SoC id macro to tegra_resume()

Commit d127e9c5c5bc1ee22a7b1fe804397cddd132f756 ("ARM: tegra: make tegra_resume can work with current and later chips") removed tegra_get_soc_id macro leaving used cpu register unassigned and as result causing execution of unintended code on tegra20. Fix it by re-adding macro.

Fixes d127e9c (ARM: tegra: make tegra_resume can work with current and later chips)
Cc <[email protected]> # v3.13+
Reviewed-by Felipe Balbi <[email protected]>
Signed-off-by Dmitry Osipenko <[email protected]>

---
V2: added Cc's for lakml and stable, added "Reviewed-by:" Felipe Balbi

 arch/arm/mach-tegra/reset-handler.S | 1 +
 1 file changed, 1 insertion(+)
arch/arm/mach-tegra/reset-handler.S +1 -0
index 7b2baab..71be4af 100644
@@ -51,6 +51,7 @@ ENTRY(tegra_resume)
  THUMB(	it	ne )
 	bne	cpu_resume			@ no
 
+	tegra_get_soc_id TEGRA_APB_MISC_BASE, r6
 	/* Are we on Tegra20? */
 	cmp	r6, #TEGRA20
 	beq	1f				@ Yes
Signature · 1 line
2.1.1
author
#4 lore raw

08.10.2014 23:24, Dmitry Osipenko ?????:

Quoted 21 lines

Commit d127e9c5c5bc1ee22a7b1fe804397cddd132f756 ("ARM: tegra: make tegra_resume can work with current and later chips") removed tegra_get_soc_id macro leaving used cpu register unassigned and as result causing execution of unintended code on tegra20. Fix it by re-adding macro.

Fixes d127e9c (ARM: tegra: make tegra_resume can work with current and later chips)
Cc <[email protected]> # v3.13+
Reviewed-by Felipe Balbi <[email protected]>
Signed-off-by Dmitry Osipenko <[email protected]>

---
V2: added Cc's for lakml and stable, added "Reviewed-by:" Felipe Balbi

 arch/arm/mach-tegra/reset-handler.S | 1 +
 1 file changed, 1 insertion(+)
arch/arm/mach-tegra/reset-handler.S +0 -0
index 7b2baab..71be4af 100644

arch/arm/mach-tegra/reset-handler.S ENTRY(tegra_resume) · line 57

Quoted 7 lines
arch/arm/mach-tegra/reset-handler.S +1 -0
@@ -51,6 +51,7 @@ ENTRY(tegra_resume)
  THUMB(	it	ne )
 	bne	cpu_resume			@ no
 
+	tegra_get_soc_id TEGRA_APB_MISC_BASE, r6
 	/* Are we on Tegra20? */
 	cmp	r6, #TEGRA20
 	beq	1f				@ Yes

Ugh, I just noticed that r6 is expected to be SoC id func argument. It was bug in my emulator that blinded me, so please drop that patch.
But, seems tegra20_lp1_reset() doesn't set r6, at least for now I don't see where. I'll check it on real hw and send patch if needed.

Signature · 1 line
Dmitry