xen: arm: xgene bug fixes + support for McDivitt

Signed-off-by Ian Campbell <[email protected]>

---
v2: Remove pointless/unused baud rate setting.

A bunch of other entries have these, but cleaning them up is out of scope here I think.

---
 xen/arch/arm/Rules.mk |    5 +++++
 1 file changed, 5 insertions(+)

xen/arch/arm/Rules.mk +5 -0

index 572d854..30c7823 100644
@@ -95,6 +95,11 @@ EARLY_PRINTK_BAUD := 115200
 EARLY_UART_BASE_ADDRESS := 0x1c020000
 EARLY_UART_REG_SHIFT := 2
 endif
+ifeq ($(CONFIG_EARLY_PRINTK), xgene-mcdivitt)
+EARLY_PRINTK_INC := 8250
+EARLY_UART_BASE_ADDRESS := 0x1c021000
+EARLY_UART_REG_SHIFT := 2
+endif
 ifeq ($(CONFIG_EARLY_PRINTK), juno)
 EARLY_PRINTK_INC := pl011
 EARLY_PRINTK_BAUD := 115200

EARLY_PRINTK_BAUD doesn't do anything unless EARLY_PRINTK_INIT_UART is set.

Furthermore only the pl011 driver implements the init routine at all, so the entries which use 8250 and specified a BAUD were doubly wrong.

Signed-off-by Ian Campbell <[email protected]>

---
v2: New patch.

---
 xen/arch/arm/Rules.mk |    7 -------
 1 file changed, 7 deletions(-)

xen/arch/arm/Rules.mk +0 -7

index 30c7823..4ee51a9 100644
@@ -45,7 +45,6 @@ ifeq ($(debug),y)
 # Early printk for versatile express
 ifeq ($(CONFIG_EARLY_PRINTK), vexpress)
 EARLY_PRINTK_INC := pl011
-EARLY_PRINTK_BAUD := 38400
 EARLY_UART_BASE_ADDRESS := 0x1c090000
 endif
 ifeq ($(CONFIG_EARLY_PRINTK), fastmodel)

@@ -56,12 +55,10 @@ EARLY_UART_BASE_ADDRESS := 0x1c090000
 endif
 ifeq ($(CONFIG_EARLY_PRINTK), exynos5250)
 EARLY_PRINTK_INC := exynos4210
-EARLY_PRINTK_BAUD := 115200
 EARLY_UART_BASE_ADDRESS := 0x12c20000
 endif
 ifeq ($(CONFIG_EARLY_PRINTK), midway)
 EARLY_PRINTK_INC := pl011
-EARLY_PRINTK_BAUD := 115200
 EARLY_UART_BASE_ADDRESS := 0xfff36000
 endif
 ifeq ($(CONFIG_EARLY_PRINTK), omap5432)

@@ -91,7 +88,6 @@ EARLY_UART_REG_SHIFT := 2
 endif
 ifeq ($(CONFIG_EARLY_PRINTK), xgene-storm)
 EARLY_PRINTK_INC := 8250
-EARLY_PRINTK_BAUD := 115200
 EARLY_UART_BASE_ADDRESS := 0x1c020000
 EARLY_UART_REG_SHIFT := 2
 endif

@@ -102,18 +98,15 @@ EARLY_UART_REG_SHIFT := 2
 endif
 ifeq ($(CONFIG_EARLY_PRINTK), juno)
 EARLY_PRINTK_INC := pl011
-EARLY_PRINTK_BAUD := 115200
 EARLY_UART_BASE_ADDRESS := 0x7ff80000
 endif
 ifeq ($(CONFIG_EARLY_PRINTK), hip04-d01)
 EARLY_PRINTK_INC := 8250
-EARLY_PRINTK_BAUD := 115200
 EARLY_UART_BASE_ADDRESS := 0xE4007000
 EARLY_UART_REG_SHIFT := 2
 endif
 ifeq ($(CONFIG_EARLY_PRINTK), seattle)
 EARLY_PRINTK_INC := pl011
-EARLY_PRINTK_BAUD := 115200
 EARLY_UART_BASE_ADDRESS := 0xe1010000
 endif
 

The callers pass the end as the pfn immediately *after* the last page to be mapped, therefore adding one is incorrect and causes an additional page to be mapped.

At the same time correct the printing of the mfn values, zero-padding them to 16 digits as for a paddr when they are frame numbers is just confusing.

Signed-off-by Ian Campbell <[email protected]>

---
v2: Fix the other printk format string too.

---
 xen/arch/arm/platforms/xgene-storm.c |    6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

xen/arch/arm/platforms/xgene-storm.c +3 -3

index 29c4752..8685c93 100644
@@ -45,11 +45,11 @@ static int map_one_mmio(struct domain *d, const char *what,
 {
     int ret;
 
-    printk("Additional MMIO %"PRIpaddr"-%"PRIpaddr" (%s)\n",
+    printk("Additional MMIO %lx-%lx (%s)\n",
            start, end, what);
-    ret = map_mmio_regions(d, start, end - start + 1, start);
+    ret = map_mmio_regions(d, start, end - start, start);
     if ( ret )
-        printk("Failed to map %s @ %"PRIpaddr" to dom%d\n",
+        printk("Failed to map %s @ %lx to dom%d\n",
                what, start, d->domain_id);
     return ret;
 }

Currently we only establish specific mappings for pcie0, which is used on the Mustang platform. However at least McDivitt uses pcie3. So wire up all the others, based on whether the corresponding DT node is marked as available.

This results in no change for Mustang.

Signed-off-by Ian Campbell <[email protected]>

---
v2: - Didn't constify dt node pointer -- dt_find_compatible_node needs a
non-const

- Print a message when ignoring an unknown bus
- Log with dt node full anme instead of CFG space address.
- Log at start of xgene_storm_pcie_specific_mapping instead of in the caller after the fact.

---
 xen/arch/arm/platforms/xgene-storm.c |   89 +++++++++++++++++++++++++++++-----
 1 file changed, 76 insertions(+), 13 deletions(-)

xen/arch/arm/platforms/xgene-storm.c +76 -13

index 8c27f24..0b3492d 100644
@@ -78,35 +78,35 @@ static int map_one_spi(struct domain *d, const char *what,
     return ret;
 }
 
-/*
- * Xen does not currently support mapping MMIO regions and interrupt
- * for bus child devices (referenced via the "ranges" and
- * "interrupt-map" properties to domain 0). Instead for now map the
- * necessary resources manually.
- */
-static int xgene_storm_specific_mapping(struct domain *d)
+/* Creates MMIO mappings base..end as well as 4 SPIs from the given base. */
+static int xgene_storm_pcie_specific_mapping(struct domain *d,
+                                             const struct dt_device_node *node,
+                                             paddr_t base, paddr_t end,
+                                             int base_spi)
 {
     int ret;
 
+    printk("Mapping additional regions for PCIe device %s\n",
+           dt_node_full_name(node));
+
     /* Map the PCIe bus resources */
-    ret = map_one_mmio(d, "PCI MEMORY", paddr_to_pfn(0x0e000000000UL),
-                                        paddr_to_pfn(0x01000000000UL));
+    ret = map_one_mmio(d, "PCI MEMORY", paddr_to_pfn(base), paddr_to_pfn(end));
     if ( ret )
         goto err;
 
-    ret = map_one_spi(d, "PCI#INTA", 0xc2, DT_IRQ_TYPE_LEVEL_HIGH);
+    ret = map_one_spi(d, "PCI#INTA", base_spi+0, DT_IRQ_TYPE_LEVEL_HIGH);
     if ( ret )
         goto err;
 
-    ret = map_one_spi(d, "PCI#INTB", 0xc3, DT_IRQ_TYPE_LEVEL_HIGH);
+    ret = map_one_spi(d, "PCI#INTB", base_spi+1, DT_IRQ_TYPE_LEVEL_HIGH);
     if ( ret )
         goto err;
 
-    ret = map_one_spi(d, "PCI#INTC", 0xc4, DT_IRQ_TYPE_LEVEL_HIGH);
+    ret = map_one_spi(d, "PCI#INTC", base_spi+2, DT_IRQ_TYPE_LEVEL_HIGH);
     if ( ret )
         goto err;
 
-    ret = map_one_spi(d, "PCI#INTD", 0xc5, DT_IRQ_TYPE_LEVEL_HIGH);
+    ret = map_one_spi(d, "PCI#INTD", base_spi+3, DT_IRQ_TYPE_LEVEL_HIGH);
     if ( ret )
         goto err;
 

@@ -115,6 +115,69 @@ err:
     return ret;
 }
 
+/*
+ * Xen does not currently support mapping MMIO regions and interrupt
+ * for bus child devices (referenced via the "ranges" and
+ * "interrupt-map" properties to domain 0). Instead for now map the
+ * necessary resources manually.
+ */
+static int xgene_storm_specific_mapping(struct domain *d)
+{
+    struct dt_device_node *node = NULL;
+    int ret;
+
+    while ( (node = dt_find_compatible_node(node, "pci", "apm,xgene-pcie")) )
+    {
+        u64 addr;
+
+        /* Identify the bus via it's control register address */
+        ret = dt_device_get_address(node, 0, &addr, NULL);
+        if ( ret < 0 )
+            return ret;
+
+        if ( !dt_device_is_available(node) )
+            continue;
+
+       switch ( addr )
+        {
+        case 0x1f2b0000: /* PCIe0 */
+            ret = xgene_storm_pcie_specific_mapping(d,
+                node,
+                0x0e000000000UL, 0x10000000000UL, 0xc2);
+            break;
+        case 0x1f2c0000: /* PCIe1 */
+            ret = xgene_storm_pcie_specific_mapping(d,
+                node,
+                0x0d000000000UL, 0x0e000000000UL, 0xc8);
+            break;
+        case 0x1f2d0000: /* PCIe2 */
+            ret = xgene_storm_pcie_specific_mapping(d,
+                node,
+                0x09000000000UL, 0x0a000000000UL, 0xce);
+            break;
+        case 0x1f500000: /* PCIe3 */
+            ret = xgene_storm_pcie_specific_mapping(d,
+                node,
+                0x0a000000000UL, 0x0c000000000UL, 0xd4);
+            break;
+        case 0x1f510000: /* PCIe4 */
+            ret = xgene_storm_pcie_specific_mapping(d,
+                node,
+                0x0c000000000UL, 0x0d000000000UL, 0xda);
+            break;
+
+        default:
+            printk("Ignoring unknown PCI bus %s\n", dt_node_full_name(node));
+            continue;
+        }
+
+        if ( ret < 0 )
+            return ret;
+    }
+
+    return 0;
+}
+
 static void xgene_storm_reset(void)
 {
     void __iomem *addr;

Currently we only establish specific mappings for pcie0, which is used on the Mustang platform. However at least McDivitt uses pcie3. So wire up all the others, based on whether the corresponding DT node is marked as available.

This results in no change for Mustang.

Signed-off-by Ian Campbell <[email protected]>

---
v2: - Didn't constify dt node pointer -- dt_find_compatible_node needs a
non-const
- Print a message when ignoring an unknown bus
- Log with dt node full anme instead of CFG space address.
- Log at start of xgene_storm_pcie_specific_mapping instead of in the caller after the fact.

---
 xen/arch/arm/platforms/xgene-storm.c |   89 +++++++++++++++++++++++++++++-----
 1 file changed, 76 insertions(+), 13 deletions(-)

xen/arch/arm/platforms/xgene-storm.c +76 -14

index 8c27f24..0b3492d 100644
@@ -78,35 +78,35 @@ static int map_one_spi(struct domain *d, const char *what,
     return ret;
 }
 
-/*
- * Xen does not currently support mapping MMIO regions and interrupt
- * for bus child devices (referenced via the "ranges" and
- * "interrupt-map" properties to domain 0). Instead for now map the
- * necessary resources manually.
- */
-static int xgene_storm_specific_mapping(struct domain *d)
+/* Creates MMIO mappings base..end as well as 4 SPIs from the given base. */
+static int xgene_storm_pcie_specific_mapping(struct domain *d,
+                                             const struct dt_device_node *node,
+                                             paddr_t base, paddr_t end,
+                                             int base_spi)
 {
     int ret;
 
+    printk("Mapping additional regions for PCIe device %s\n",
+           dt_node_full_name(node));
+
     /* Map the PCIe bus resources */
-    ret = map_one_mmio(d, "PCI MEMORY", paddr_to_pfn(0x0e000000000UL),
-                                        paddr_to_pfn(0x01000000000UL));
+    ret = map_one_mmio(d, "PCI MEMORY", paddr_to_pfn(base), paddr_to_pfn(end));
     if ( ret )
         goto err;
 
-    ret = map_one_spi(d, "PCI#INTA", 0xc2, DT_IRQ_TYPE_LEVEL_HIGH);
+    ret = map_one_spi(d, "PCI#INTA", base_spi+0, DT_IRQ_TYPE_LEVEL_HIGH);
     if ( ret )
         goto err;
 
-    ret = map_one_spi(d, "PCI#INTB", 0xc3, DT_IRQ_TYPE_LEVEL_HIGH);
+    ret = map_one_spi(d, "PCI#INTB", base_spi+1, DT_IRQ_TYPE_LEVEL_HIGH);
     if ( ret )
         goto err;
 
-    ret = map_one_spi(d, "PCI#INTC", 0xc4, DT_IRQ_TYPE_LEVEL_HIGH);
+    ret = map_one_spi(d, "PCI#INTC", base_spi+2, DT_IRQ_TYPE_LEVEL_HIGH);
     if ( ret )
         goto err;
 
-    ret = map_one_spi(d, "PCI#INTD", 0xc5, DT_IRQ_TYPE_LEVEL_HIGH);
+    ret = map_one_spi(d, "PCI#INTD", base_spi+3, DT_IRQ_TYPE_LEVEL_HIGH);
     if ( ret )
         goto err;
 

@@ -115,6 +115,69 @@ err:
     return ret;
 }
 
+/*
+ * Xen does not currently support mapping MMIO regions and interrupt
+ * for bus child devices (referenced via the "ranges" and
+ * "interrupt-map" properties to domain 0). Instead for now map the
+ * necessary resources manually.
+ */
+static int xgene_storm_specific_mapping(struct domain *d)
+{
+    struct dt_device_node *node = NULL;
+    int ret;
+
+    while ( (node = dt_find_compatible_node(node, "pci", "apm,xgene-pcie")) )
+    {
+        u64 addr;
+
+        /* Identify the bus via it's control register address */
+        ret = dt_device_get_address(node, 0, &addr, NULL);
+        if ( ret < 0 )
+            return ret;
+
+        if ( !dt_device_is_available(node) )
+            continue;
+
+       switch ( addr )
+        {
+        case 0x1f2b0000: /* PCIe0 */
+            ret = xgene_storm_pcie_specific_mapping(d,
+                node,
+                0x0e000000000UL, 0x10000000000UL, 0xc2);
+            break;
+        case 0x1f2c0000: /* PCIe1 */
+            ret = xgene_storm_pcie_specific_mapping(d,
+                node,
+                0x0d000000000UL, 0x0e000000000UL, 0xc8);
+            break;
+        case 0x1f2d0000: /* PCIe2 */
+            ret = xgene_storm_pcie_specific_mapping(d,
+                node,
+                0x09000000000UL, 0x0a000000000UL, 0xce);
+            break;
+        case 0x1f500000: /* PCIe3 */
+            ret = xgene_storm_pcie_specific_mapping(d,
+                node,
+                0x0a000000000UL, 0x0c000000000UL, 0xd4);
+            break;
+        case 0x1f510000: /* PCIe4 */
+            ret = xgene_storm_pcie_specific_mapping(d,
+                node,
+                0x0c000000000UL, 0x0d000000000UL, 0xda);
+            break;
+
+        default:
+            printk("Ignoring unknown PCI bus %s\n", dt_node_full_name(node));
+            continue;
+        }
+
+        if ( ret < 0 )
+            return ret;
+    }
+
+    return 0;
+}
+
 static void xgene_storm_reset(void)
 {
     void __iomem *addr;
--

1.7.10.4

Patch looks good.

Acked-by Pranavkumar Sawargaonkar <[email protected]>

These patches:

* fix up an off by one bug in the xgene mapping of additional PCI bus resources, which would cause an additional extra page to be mapped
* correct the size of the mapped regions to match the docs
* adds support for the other 4 PCI buses on the chip, which enables mcdivitt and presumably most other Xgene based platforms which uses PCI buses other than pcie0.
* adds earlyprintk for the mcdivitt platform

They can also be found at:
git://xenbits.xen.org/people/ianc/xen.git mcdivitt-v2

Quoted 11 lines · Ian Campbell

These patches:

* fix up an off by one bug in the xgene mapping of additional PCI bus resources, which would cause an additional extra page to be mapped
* correct the size of the mapped regions to match the docs
* adds support for the other 4 PCI buses on the chip, which enables mcdivitt and presumably most other Xgene based platforms which uses PCI buses other than pcie0.
* adds earlyprintk for the mcdivitt platform

Quoted 2 lines

They can also be found at:
git://xenbits.xen.org/people/ianc/xen.git mcdivitt-v2

#1-#4 can go in - aka Release-Acked-by: Konrad Rzeszutek Wilk <[email protected]>

For #5 I would appreciate an ARM knowledgeble person to review it.

Quoted 15 lines · Konrad Rzeszutek Wilk

Quoted 13 lines · Ian Campbell

These patches:

* fix up an off by one bug in the xgene mapping of additional PCI bus resources, which would cause an additional extra page to be mapped
* correct the size of the mapped regions to match the docs
* adds support for the other 4 PCI buses on the chip, which enables mcdivitt and presumably most other Xgene based platforms which uses PCI buses other than pcie0.
* adds earlyprintk for the mcdivitt platform

They can also be found at:
git://xenbits.xen.org/people/ianc/xen.git mcdivitt-v2

Quoted 1 line

#1-#4 can go in - aka Release-Acked-by: Konrad Rzeszutek Wilk <[email protected]>

Applied, with a tweak to one of the ocmmit message suggested by Julien.

Quoted 1 line

For #5 I would appreciate an ARM knowledgeble person to review it.

Acked by Julien now, are you ok for it to go in?