Enable hierarchy irqdomian on x86 platforms
Subsystems (8)
v4 cover Enable hierarchy irqdomian on x86 platforms
This is the last part to enable support of hierarchy domain on x86 platforms.
It first converts IOAPIC to support hierarchy irqdomain, then cleans up all unused code and interfaces. It also introduces a kernel boot parameter to configure CPU vector allocation policies.
It's based on my previous patch set at:
http://lkml.org/lkml/2014/11/25/10
And you may access it at:
https://github.com/jiangliu/linux.git irqdomain/p3v4
It has been tested on Intel 64-bit server and 32-bit laptop. Joerg has helped to test on AMD platforms. It also passes Fengguang's 0day tests. Helps are welcomed for testing:
1) Intel MID platform
2) Intel CE or OLPC platforms
Patch 1-3 kills pre_init_apic_IRQ0().
Patch 4-9 convert IOAPIC to use hierarch irqdomain
Patch 10-36 clean up code, unused interfaces etc.
Patch 37-38 introduces a mechanism to configure CPU vector allocation
policies.
V3->V4:
1) Rebase onto latest prerequisition patch sets
Jiang Liu (37):
x86, intel-mid, trivial: Refine code syntax for sfi_parse_mtmr() x86, irq: Kill unused pre_init_apic_IRQ0()
x86, irq: Prepare IOAPIC interfaces to support hierarchy irqdomain x86, irq: Implement callbacks to enable hierarchy irqdomain on
IOAPICs
x86, irq: Refine the way to allocate irq_cfg for legacy IRQs x86, irq: Simplify the way to print IOAPIC entry
x86, irq: Introduce helper functions to support hierarchy irqdomain
for IOAPIC
x86, irq: Convert IOAPIC to use hierarchy irqdomain interfaces x86, irq: Kill unused old IOAPIC irqdomain interfaces x86, irq: Kill unused struct mp_pin_info
x86, irq: Kill x86_io_apic_ops.print_entries and related interfaces x86, irq: Kill x86_io_apic_ops.setup_entry and related interfaces x86, irq: Kill x86_io_apic_ops.set_affinity and related interfaces x86, irq: Kill x86_io_apic_ops.eoi_ioapic_pin and related interfaces x86, irq: Kill GENERIC_IRQ_LEGACY_ALLOC_HWIRQ
x86: Clean up unused forward declarations in x86_init.h
x86: irq_remapping: Clean up unsued code
iommu/vt-d: Clean up unsued code
iommu/amd: Clean up unsued code
x86: irq_remapping: Clean up unused interfaces
x86, irq: Kill irq_cfg.irq_remapped
iommu/vt-d: Move struct irq_2_iommu into intel_irq_remapping.c iommu/amd: Move struct irq_2_irte into amd_iommu.c
x86, irq: Move irq_cfg.irq_2_pin into io_apic.c
x86, irq: Kill struct io_apic_irq_attr
x86, irq: Kill x86_io_apic_ops.write and x86_io_apic_ops.modify x86, irq: Clean up io_apic.h
x86, irq: Use cached IOAPIC entry instead of reading from hardware x86, irq: Kill unused alloc_irq_and_cfg_at()
x86, irq: Change functions only used in vector.c as static x86, irq: Kill function apic_set_affinity()
x86, irq: Move check of cfg->move_in_progress into
send_cleanup_vector()
x86, irq: Move private data in struct irq_cfg into dedicated data
structure
x86, irq: Refine the way to calculate NR_IRQS
ACPI, irq, x86: Kill private function mp_register_gsi()/
mp_unregister_gsi()
x86, irq: Introduce mechanism to support different vector allocation
policies
x86, irq: Add kernel parameter vector_alloc to set CPU vector
allocation policy
Thomas Gleixner (1):
x86, intel-mid: Delay initialization of APB timer
Documentation/kernel-parameters.txt | 6 + arch/x86/Kconfig | 1 - arch/x86/include/asm/hw_irq.h | 51 +- arch/x86/include/asm/io_apic.h | 81 +- arch/x86/include/asm/irq_remapping.h | 36 - arch/x86/include/asm/irq_vectors.h | 18 +- arch/x86/include/asm/x86_init.h | 16 - arch/x86/kernel/acpi/boot.c | 69 +- arch/x86/kernel/apb_timer.c | 4 - arch/x86/kernel/apic/io_apic.c | 1071 +++++++++----------- arch/x86/kernel/apic/vector.c | 416 ++++---- arch/x86/kernel/devicetree.c | 37 +- arch/x86/kernel/mpparse.c | 6 +- arch/x86/kernel/x86_init.c | 6 - arch/x86/pci/intel_mid_pci.c | 6 +- .../platform/intel-mid/device_libs/platform_wdt.c | 5 +- arch/x86/platform/intel-mid/intel-mid.c | 18 +- arch/x86/platform/intel-mid/sfi.c | 30 +- arch/x86/platform/sfi/sfi.c | 5 +- arch/x86/platform/uv/uv_irq.c | 3 +- drivers/iommu/amd_iommu.c | 153 +-- drivers/iommu/intel_irq_remapping.c | 206 +--- drivers/iommu/irq_remapping.c | 84 -- drivers/iommu/irq_remapping.h | 16 - 24 files changed, 874 insertions(+), 1470 deletions(-)
Signature · 1 line
1.7.10.4
PATCH v4 1/38 x86, intel-mid: Delay initialization of APB timer
From: Thomas Gleixner <[email protected]>
MID has no PIC, but depending on the platform it requires the abt_timer, which is connected to irq0. The timer is set up at late_time_init().
But, looking at the MID code it seems, that there is no reason to do so. The only code which might need the timer working is the TSC calibration code, but thats a non issue on MID as that is using its own empty calibration function. And check_timer() is not invoked either because MID has no PIC and therefor no legacy irqs.
So if you look at intel_mid_time_init() then you'll see that in the ARAT case the timer setup is skipped already. So until the point where x86_init.timers.setup_percpu_clockev() is called for the boot cpu nothing really needs a timer on MID.
According to the MID code the apbt horror is only used for moorestown. Medfield and later use the local apic timer without the apbt nonsense.
The best thing we can do is to drop moorestown support and get rid of that apbt nonsense alltogether.
I don't think anyone deeply cares about it not being supported from 3.18 on. The number of devices which sport a moorestown should be pretty limited and the only relevant use case of those is to act as a pocket heater with short battery life time. Its pretty pointless to update kernels on pocket heaters except for bragging reasons.
If someone at Intel really thinks that we need to keep moorestown alive for other than documentary and sentimental reasons, then we can move the apbt setup to x86_init.timers.setup_percpu_clockev(). At that point the IOAPIC is setup already, so it should just work.
Signed-off-by Thomas Gleixner <[email protected]>
Signed-off-by Jiang Liu <[email protected]>
Tested-by Andy Shevchenko <[email protected]>
--- arch/x86/kernel/apb_timer.c | 4 ---- arch/x86/platform/intel-mid/intel-mid.c | 18 +++++++++++++----- arch/x86/platform/intel-mid/sfi.c | 2 -- 3 files changed, 13 insertions(+), 11 deletions(-)
arch/x86/kernel/apb_timer.c +0 -4
@@ -179,10 +179,6 @@ static int __init apbt_clockevent_register(void)static void apbt_setup_irq (struct apbt_dev *adev) { -/* timer0 irq has been setup early */ -if (adev->irq ==0 ) -return ; -irq_modify_status (adev->irq,0 ,IRQ_MOVE_PCNTXT );irq_set_affinity (adev->irq,cpumask_of (adev->cpu)); }
arch/x86/platform/intel-mid/intel-mid.c +13 -5
@@ -81,26 +81,34 @@ static unsigned long __init intel_mid_calibrate_tsc(void)return 0 ; } +static void __init intel_mid_setup_bp_timer (void ) +{ +apbt_time_init (); +setup_boot_APIC_clock (); +} +static void __init intel_mid_time_init (void ) {sfi_table_parse (SFI_SIG_MTMR ,NULL ,NULL , sfi_parse_mtmr); +switch (intel_mid_timer_options) {case INTEL_MID_TIMER_APBT_ONLY :break ;case INTEL_MID_TIMER_LAPIC_APBT : - x86_init.timers.setup_percpu_clockev = setup_boot_APIC_clock; +/* Use apbt and local apic */ + x86_init.timers.setup_percpu_clockev = intel_mid_setup_bp_timer; x86_cpuinit.setup_percpu_clockev = setup_secondary_APIC_clock; -break ; +return ;default :if (!boot_cpu_has (X86_FEATURE_ARAT ))break ; +/* Lapic only, no apbt */ x86_init.timers.setup_percpu_clockev = setup_boot_APIC_clock; x86_cpuinit.setup_percpu_clockev = setup_secondary_APIC_clock;return ; } -/* we need at least one APB timer */ -pre_init_apic_IRQ0 (); -apbt_time_init (); + + x86_init.timers.setup_percpu_clockev = apbt_time_init; }static void intel_mid_arch_setup (void )
arch/x86/platform/intel-mid/sfi.c +0 -2
@@ -95,8 +95,6 @@ int __init sfi_parse_mtmr(struct sfi_table_header *table)pr_debug ("timer[%d]: paddr = 0x%08x, freq = %dHz, irq = %d\n" , totallen, (u32 )pentry->phys_addr, pentry->freq_hz, pentry->irq); -if (!pentry->irq) -continue ; mp_irq.type =MP_INTSRC ; mp_irq.irqtype = mp_INT;/* triggering mode edge bit 2-3, active high polarity bit 0-1 */
Signature · 1 line
1.7.10.4
tip-bot for Thomas Gleixner
merge bot[tip:x86/apic] x86, intel-mid: Delay initialization of APB timer
x86, intel-mid: Delay initialization of APB timer
Commit-ID: b1f0b70db8679a0e4fa456cd7c12fbb42050c190 Gitweb: http://git.kernel.org/tip/b1f0b70db8679a0e4fa456cd7c12fbb42050c190 Author: Thomas Gleixner <[email protected]> AuthorDate: Tue, 25 Nov 2014 15:49:25 +0800 Committer: Thomas Gleixner <[email protected]> CommitDate: Wed, 26 Nov 2014 23:52:46 +0100
x86, intel-mid: Delay initialization of APB timer
MID has no PIC, but depending on the platform it requires the abt_timer, which is connected to irq0. The timer is set up at late_time_init().
But, looking at the MID code it seems, that there is no reason to do so. The only code which might need the timer working is the TSC calibration code, but thats a non issue on MID as that is using its own empty calibration function. And check_timer() is not invoked either because MID has no PIC and therefor no legacy irqs.
So if you look at intel_mid_time_init() then you'll see that in the ARAT case the timer setup is skipped already. So until the point where x86_init.timers.setup_percpu_clockev() is called for the boot cpu nothing really needs a timer on MID.
According to the MID code the apbt horror is only used for moorestown. Medfield and later use the local apic timer without the apbt nonsense.
The best thing we can do is to drop moorestown support and get rid of that apbt nonsense alltogether.
I don't think anyone deeply cares about it not being supported from 3.18 on. The number of devices which sport a moorestown should be pretty limited and the only relevant use case of those is to act as a pocket heater with short battery life time. Its pretty pointless to update kernels on pocket heaters except for bragging reasons.
If someone at Intel really thinks that we need to keep moorestown alive for other than documentary and sentimental reasons, then we can move the apbt setup to x86_init.timers.setup_percpu_clockev(). At that point the IOAPIC is setup already, so it should just work.
Signed-off-by Thomas Gleixner <[email protected]>
Signed-off-by Jiang Liu <[email protected]>
Cc Konrad Rzeszutek Wilk <[email protected]>
Cc Tony Luck <[email protected]>
Cc Joerg Roedel <[email protected]>
Cc Greg Kroah-Hartman <[email protected]>
Cc H. Peter Anvin <[email protected]>
Cc Bjorn Helgaas <[email protected]>
Cc Benjamin Herrenschmidt <[email protected]>
Cc Rafael J. Wysocki <[email protected]>
Cc Randy Dunlap <[email protected]>
Cc Yinghai Lu <[email protected]>
Cc Borislav Petkov <[email protected]>
Cc David Cohen <[email protected]>
Cc Kuppuswamy Sathyanarayanan <[email protected]>
Signed-off-by Thomas Gleixner <[email protected]>
Tested-by Andy Shevchenko <[email protected]>
--- arch/x86/kernel/apb_timer.c | 4 ---- arch/x86/platform/intel-mid/intel-mid.c | 18 +++++++++++++----- arch/x86/platform/intel-mid/sfi.c | 2 -- 3 files changed, 13 insertions(+), 11 deletions(-)
arch/x86/kernel/apb_timer.c +0 -4
@@ -179,10 +179,6 @@ static int __init apbt_clockevent_register(void)static void apbt_setup_irq (struct apbt_dev *adev) { -/* timer0 irq has been setup early */ -if (adev->irq ==0 ) -return ; -irq_modify_status (adev->irq,0 ,IRQ_MOVE_PCNTXT );irq_set_affinity (adev->irq,cpumask_of (adev->cpu)); }
arch/x86/platform/intel-mid/intel-mid.c +13 -5
@@ -81,26 +81,34 @@ static unsigned long __init intel_mid_calibrate_tsc(void)return 0 ; } +static void __init intel_mid_setup_bp_timer (void ) +{ +apbt_time_init (); +setup_boot_APIC_clock (); +} +static void __init intel_mid_time_init (void ) {sfi_table_parse (SFI_SIG_MTMR ,NULL ,NULL , sfi_parse_mtmr); +switch (intel_mid_timer_options) {case INTEL_MID_TIMER_APBT_ONLY :break ;case INTEL_MID_TIMER_LAPIC_APBT : - x86_init.timers.setup_percpu_clockev = setup_boot_APIC_clock; +/* Use apbt and local apic */ + x86_init.timers.setup_percpu_clockev = intel_mid_setup_bp_timer; x86_cpuinit.setup_percpu_clockev = setup_secondary_APIC_clock; -break ; +return ;default :if (!boot_cpu_has (X86_FEATURE_ARAT ))break ; +/* Lapic only, no apbt */ x86_init.timers.setup_percpu_clockev = setup_boot_APIC_clock; x86_cpuinit.setup_percpu_clockev = setup_secondary_APIC_clock;return ; } -/* we need at least one APB timer */ -pre_init_apic_IRQ0 (); -apbt_time_init (); + + x86_init.timers.setup_percpu_clockev = apbt_time_init; }static void intel_mid_arch_setup (void )
arch/x86/platform/intel-mid/sfi.c +0 -2
@@ -95,8 +95,6 @@ int __init sfi_parse_mtmr(struct sfi_table_header *table)pr_debug ("timer[%d]: paddr = 0x%08x, freq = %dHz, irq = %d\n" , totallen, (u32 )pentry->phys_addr, pentry->freq_hz, pentry->irq); -if (!pentry->irq) -continue ; mp_irq.type =MP_INTSRC ; mp_irq.irqtype = mp_INT;/* triggering mode edge bit 2-3, active high polarity bit 0-1 */
PATCH v4 2/38 x86, intel-mid, trivial: Refine code syntax for sfi_parse_mtmr()
In reply to Jiang LiuCorrectly indent code in function sfi_parse_mtmr().
Signed-off-by Jiang Liu <[email protected]>
Tested-by Andy Shevchenko <[email protected]>
--- arch/x86/platform/intel-mid/sfi.c | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-)
arch/x86/platform/intel-mid/sfi.c +10 -10
@@ -95,16 +95,16 @@ int __init sfi_parse_mtmr(struct sfi_table_header *table)pr_debug ("timer[%d]: paddr = 0x%08x, freq = %dHz, irq = %d\n" , totallen, (u32 )pentry->phys_addr, pentry->freq_hz, pentry->irq); - mp_irq.type =MP_INTSRC ; - mp_irq.irqtype = mp_INT; -/* triggering mode edge bit 2-3, active high polarity bit 0-1 */ - mp_irq.irqflag =5 ; - mp_irq.srcbus =MP_BUS_ISA ; - mp_irq.srcbusirq = pentry->irq;/* IRQ */ - mp_irq.dstapic =MP_APIC_ALL ; - mp_irq.dstirq = pentry->irq; -mp_save_irq (&mp_irq); -mp_map_gsi_to_irq (pentry->irq,IOAPIC_MAP_ALLOC ); + mp_irq.type =MP_INTSRC ; + mp_irq.irqtype = mp_INT; +/* triggering mode edge bit 2-3, active high polarity bit 0-1 */ + mp_irq.irqflag =5 ; + mp_irq.srcbus =MP_BUS_ISA ; + mp_irq.srcbusirq = pentry->irq;/* IRQ */ + mp_irq.dstapic =MP_APIC_ALL ; + mp_irq.dstirq = pentry->irq; +mp_save_irq (&mp_irq); +mp_map_gsi_to_irq (pentry->irq,IOAPIC_MAP_ALLOC ); }return 0 ;
Signature · 1 line
1.7.10.4
tip-bot for Jiang Liu
merge bot[tip:x86/apic] x86, intel-mid, trivial: Refine code syntax for sfi_parse_mtmr()
x86, intel-mid, trivial: Refine code syntax for sfi_parse_mtmr()
Commit-ID: 11ed0c3f6fc7a0adac92b21b2a5a8e31943fcd42 Gitweb: http://git.kernel.org/tip/11ed0c3f6fc7a0adac92b21b2a5a8e31943fcd42 Author: Jiang Liu <[email protected]> AuthorDate: Tue, 25 Nov 2014 15:49:26 +0800 Committer: Thomas Gleixner <[email protected]> CommitDate: Wed, 26 Nov 2014 23:52:46 +0100
x86, intel-mid, trivial: Refine code syntax for sfi_parse_mtmr()
Correctly indent code in function sfi_parse_mtmr().
Signed-off-by Jiang Liu <[email protected]>
Cc Konrad Rzeszutek Wilk <[email protected]>
Cc Tony Luck <[email protected]>
Cc Joerg Roedel <[email protected]>
Cc Greg Kroah-Hartman <[email protected]>
Cc H. Peter Anvin <[email protected]>
Cc Bjorn Helgaas <[email protected]>
Cc Benjamin Herrenschmidt <[email protected]>
Cc Rafael J. Wysocki <[email protected]>
Cc Randy Dunlap <[email protected]>
Cc Yinghai Lu <[email protected]>
Cc Borislav Petkov <[email protected]>
Cc Jiri Kosina <[email protected]>
Cc David Cohen <[email protected]>
Signed-off-by Thomas Gleixner <[email protected]>
Tested-by Andy Shevchenko <[email protected]>
--- arch/x86/platform/intel-mid/sfi.c | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-)
arch/x86/platform/intel-mid/sfi.c +10 -10
@@ -95,16 +95,16 @@ int __init sfi_parse_mtmr(struct sfi_table_header *table)pr_debug ("timer[%d]: paddr = 0x%08x, freq = %dHz, irq = %d\n" , totallen, (u32 )pentry->phys_addr, pentry->freq_hz, pentry->irq); - mp_irq.type =MP_INTSRC ; - mp_irq.irqtype = mp_INT; -/* triggering mode edge bit 2-3, active high polarity bit 0-1 */ - mp_irq.irqflag =5 ; - mp_irq.srcbus =MP_BUS_ISA ; - mp_irq.srcbusirq = pentry->irq;/* IRQ */ - mp_irq.dstapic =MP_APIC_ALL ; - mp_irq.dstirq = pentry->irq; -mp_save_irq (&mp_irq); -mp_map_gsi_to_irq (pentry->irq,IOAPIC_MAP_ALLOC ); + mp_irq.type =MP_INTSRC ; + mp_irq.irqtype = mp_INT; +/* triggering mode edge bit 2-3, active high polarity bit 0-1 */ + mp_irq.irqflag =5 ; + mp_irq.srcbus =MP_BUS_ISA ; + mp_irq.srcbusirq = pentry->irq;/* IRQ */ + mp_irq.dstapic =MP_APIC_ALL ; + mp_irq.dstirq = pentry->irq; +mp_save_irq (&mp_irq); +mp_map_gsi_to_irq (pentry->irq,IOAPIC_MAP_ALLOC ); }return 0 ;
PATCH v4 3/38 x86, irq: Kill unused pre_init_apic_IRQ0()
In reply to Jiang LiuNow there's no user of pre_init_apic_IRQ0(), so kill it.
Signed-off-by Jiang Liu <[email protected]>
Tested-by Andy Shevchenko <[email protected]>
--- arch/x86/include/asm/io_apic.h | 1 - arch/x86/kernel/apic/io_apic.c | 17 ----------------- 2 files changed, 18 deletions(-)
arch/x86/include/asm/io_apic.h +0 -1
@@ -204,7 +204,6 @@ extern int mp_irqdomain_map(struct irq_domain *domain, unsigned int virq, irq_hw_number_t hwirq);extern void mp_irqdomain_unmap (struct irq_domain *domain,unsigned int virq);extern int mp_set_gsi_attr (u32 gsi,int trigger,int polarity,int node); -extern void __init pre_init_apic_IRQ0 (void );extern void mp_save_irq (struct mpc_intsrc *m);
arch/x86/kernel/apic/io_apic.c +0 -17
@@ -3088,20 +3088,3 @@ int mp_set_gsi_attr(u32 gsi, int trigger, int polarity, int node)return ret; } - -/* Enable IOAPIC early just for system timer */ -void __init pre_init_apic_IRQ0 (void ) -{ -struct io_apic_irq_attr attr = {0 ,0 ,0 ,0 }; - -printk (KERN_INFO "Early APIC setup for system timer0\n" ); -#ifndef CONFIG_SMP -physid_set_mask_of_physid (boot_cpu_physical_apicid, - &phys_cpu_present_map); -#endif -setup_local_APIC (); - -io_apic_setup_irq_pin (0 ,0 , &attr); -irq_set_chip_and_handler_name (0 , &ioapic_chip, handle_edge_irq, -"edge" ); -}
Signature · 1 line
1.7.10.4
tip-bot for Jiang Liu
merge bot[tip:x86/apic] x86, irq: Kill unused pre_init_apic_IRQ0()
x86, irq: Kill unused pre_init_apic_IRQ0()
Commit-ID: afc1bcbe31c10f5ae16df532398f1bb164448558 Gitweb: http://git.kernel.org/tip/afc1bcbe31c10f5ae16df532398f1bb164448558 Author: Jiang Liu <[email protected]> AuthorDate: Tue, 25 Nov 2014 15:49:27 +0800 Committer: Thomas Gleixner <[email protected]> CommitDate: Wed, 26 Nov 2014 23:52:46 +0100
x86, irq: Kill unused pre_init_apic_IRQ0()
Now there's no user of pre_init_apic_IRQ0(), so kill it.
Signed-off-by Jiang Liu <[email protected]>
Cc Konrad Rzeszutek Wilk <[email protected]>
Cc Tony Luck <[email protected]>
Cc Joerg Roedel <[email protected]>
Cc Greg Kroah-Hartman <[email protected]>
Cc Bjorn Helgaas <[email protected]>
Cc Benjamin Herrenschmidt <[email protected]>
Cc Rafael J. Wysocki <[email protected]>
Cc Randy Dunlap <[email protected]>
Cc Yinghai Lu <[email protected]>
Cc Borislav Petkov <[email protected]>
Cc Grant Likely <[email protected]>
Signed-off-by Thomas Gleixner <[email protected]>
Tested-by Andy Shevchenko <[email protected]>
--- arch/x86/include/asm/io_apic.h | 1 - arch/x86/kernel/apic/io_apic.c | 17 ----------------- 2 files changed, 18 deletions(-)
arch/x86/include/asm/io_apic.h +0 -1
@@ -204,7 +204,6 @@ extern int mp_irqdomain_map(struct irq_domain *domain, unsigned int virq, irq_hw_number_t hwirq);extern void mp_irqdomain_unmap (struct irq_domain *domain,unsigned int virq);extern int mp_set_gsi_attr (u32 gsi,int trigger,int polarity,int node); -extern void __init pre_init_apic_IRQ0 (void );extern void mp_save_irq (struct mpc_intsrc *m);
arch/x86/kernel/apic/io_apic.c +0 -17
@@ -3088,20 +3088,3 @@ int mp_set_gsi_attr(u32 gsi, int trigger, int polarity, int node)return ret; } - -/* Enable IOAPIC early just for system timer */ -void __init pre_init_apic_IRQ0 (void ) -{ -struct io_apic_irq_attr attr = {0 ,0 ,0 ,0 }; - -printk (KERN_INFO "Early APIC setup for system timer0\n" ); -#ifndef CONFIG_SMP -physid_set_mask_of_physid (boot_cpu_physical_apicid, - &phys_cpu_present_map); -#endif -setup_local_APIC (); - -io_apic_setup_irq_pin (0 ,0 , &attr); -irq_set_chip_and_handler_name (0 , &ioapic_chip, handle_edge_irq, -"edge" ); -}
PATCH v4 4/38 x86, irq: Prepare IOAPIC interfaces to support hierarchy irqdomain
In reply to Jiang LiuIntroduce helper functions to manipulate struct irq_alloc_info for IOAPIC. Also add extra parameter to IOAPIC interfaces to prepare for hierarchy irqdomain. Function mp_set_gsi_attr() will be killed once we have switched to hierarchy irqdomain.
Signed-off-by Jiang Liu <[email protected]>
Tested-by Joerg Roedel <[email protected]>
--- arch/x86/include/asm/io_apic.h | 14 ++++++- arch/x86/kernel/acpi/boot.c | 9 +++-- arch/x86/kernel/apic/io_apic.c | 39 +++++++++++++------- arch/x86/pci/intel_mid_pci.c | 4 +- .../platform/intel-mid/device_libs/platform_wdt.c | 4 +- arch/x86/platform/intel-mid/sfi.c | 9 +++-- 6 files changed, 56 insertions(+), 23 deletions(-)
arch/x86/include/asm/io_apic.h +12 -2
@@ -95,6 +95,8 @@ struct IR_IO_APIC_route_entry { index :15 ; } __attribute__ ((packed)); +struct irq_alloc_info ; +#define IOAPIC_AUTO -1#define IOAPIC_EDGE 0#define IOAPIC_LEVEL 1
@@ -194,7 +196,8 @@ extern u32 gsi_top;extern int mp_find_ioapic (u32 gsi);extern int mp_find_ioapic_pin (int ioapic,u32 gsi);extern u32 mp_pin_to_gsi (int ioapic,int pin); -extern int mp_map_gsi_to_irq (u32 gsi,unsigned int flags); +extern int mp_map_gsi_to_irq (u32 gsi,unsigned int flags, +struct irq_alloc_info *info);extern void mp_unmap_irq (int irq);extern int mp_register_ioapic (int id,u32 address,u32 gsi_base,struct ioapic_domain_cfg *cfg);
@@ -203,6 +206,8 @@ extern int mp_ioapic_registered(u32 gsi_base);extern int mp_irqdomain_map (struct irq_domain *domain,unsigned int virq,irq_hw_number_t hwirq);extern void mp_irqdomain_unmap (struct irq_domain *domain,unsigned int virq); +extern void ioapic_set_alloc_attr (struct irq_alloc_info *info, +int node,int trigger,int polarity);extern int mp_set_gsi_attr (u32 gsi,int trigger,int polarity,int node);extern void mp_save_irq (struct mpc_intsrc *m);
@@ -253,7 +258,12 @@ static inline void print_IO_APICs(void) {}#define gsi_top (NR_IRQS_LEGACY)static inline int mp_find_ioapic (u32 gsi) {return 0 ; }static inline u32 mp_pin_to_gsi (int ioapic,int pin) {return UINT_MAX ; } -static inline int mp_map_gsi_to_irq (u32 gsi,unsigned int flags) {return gsi; } +static inline int mp_map_gsi_to_irq (u32 gsi,unsigned int flags, +struct irq_alloc_info *info) +{ +return gsi; +} +static inline void mp_unmap_irq (int irq) { }static inline int save_ioapic_entries (void )
arch/x86/kernel/acpi/boot.c +6 -3
@@ -404,6 +404,7 @@ static int mp_register_gsi(struct device *dev, u32 gsi, int trigger, int polarity) {int irq, node; +struct irq_alloc_info info;if (acpi_irq_model !=ACPI_IRQ_MODEL_IOAPIC )return gsi;
@@ -416,7 +417,8 @@ static int mp_register_gsi(struct device *dev, u32 gsi, int trigger,return -1 ; } - irq =mp_map_gsi_to_irq (gsi,IOAPIC_MAP_ALLOC ); +ioapic_set_alloc_attr (&info, node, trigger, polarity); + irq =mp_map_gsi_to_irq (gsi,IOAPIC_MAP_ALLOC , &info);if (irq <0 )return irq;
@@ -434,7 +436,7 @@ static void mp_unregister_gsi(u32 gsi)if (acpi_irq_model !=ACPI_IRQ_MODEL_IOAPIC )return ; - irq =mp_map_gsi_to_irq (gsi,0 ); + irq =mp_map_gsi_to_irq (gsi,0 ,NULL );if (irq >0 )mp_unmap_irq (irq); }
@@ -618,7 +620,8 @@ int acpi_gsi_to_irq(u32 gsi, unsigned int *irqp) }else {mutex_lock (&acpi_ioapic_lock); irq =mp_map_gsi_to_irq (gsi, -IOAPIC_MAP_ALLOC |IOAPIC_MAP_CHECK ); +IOAPIC_MAP_ALLOC |IOAPIC_MAP_CHECK , +NULL );mutex_unlock (&acpi_ioapic_lock);if (irq <0 )return -1 ;
arch/x86/kernel/apic/io_apic.c +26 -13
@@ -938,7 +938,19 @@ static int irq_trigger(int idx)return trigger; } -static int alloc_irq_from_domain (struct irq_domain *domain,u32 gsi,int pin) +void ioapic_set_alloc_attr (struct irq_alloc_info *info,int node, +int trigger,int polarity) +{ +init_irq_alloc_info (info,NULL ); + info->type =X86_IRQ_ALLOC_TYPE_IOAPIC ; + info->ioapic_node = node; + info->ioapic_trigger = trigger; + info->ioapic_polarity = polarity; + info->ioapic_valid =1 ; +} + +static int alloc_irq_from_domain (struct irq_domain *domain,u32 gsi,int pin, +struct irq_alloc_info *info) {int irq =-1 ;int ioapic = (int )(long )domain->host_data;
@@ -971,11 +983,11 @@ static int alloc_irq_from_domain(struct irq_domain *domain, u32 gsi, int pin) }static int mp_map_pin_to_irq (u32 gsi,int idx,int ioapic,int pin, -unsigned int flags) +unsigned int flags,struct irq_alloc_info *info) {int irq;struct irq_domain *domain =mp_ioapic_irqdomain (ioapic); -struct mp_pin_info *info =mp_pin_info (ioapic, pin); +struct mp_pin_info *pinfo =mp_pin_info (ioapic, pin);if (!domain)return -1 ;
@@ -997,30 +1009,30 @@ static int mp_map_pin_to_irq(u32 gsi, int idx, int ioapic, int pin,if (idx >=0 &&test_bit (mp_irqs[idx].srcbus, mp_bus_not_pci)) { irq = mp_irqs[idx].srcbusirq;if (flags &IOAPIC_MAP_ALLOC ) { -if (info->count ==0 && +if (pinfo->count ==0 &&mp_irqdomain_map (domain, irq, pin) !=0 ) irq =-1 ;/* special handling for timer IRQ0 */ if (irq ==0 ) - info->count++; + pinfo->count++; } }else { irq =irq_find_mapping (domain, pin);if (irq <=0 && (flags &IOAPIC_MAP_ALLOC )) - irq =alloc_irq_from_domain (domain, gsi, pin); + irq =alloc_irq_from_domain (domain, gsi, pin, info); }if (flags &IOAPIC_MAP_ALLOC ) {/* special handling for legacy IRQs */ -if (irq <nr_legacy_irqs () && info->count ==1 && +if (irq <nr_legacy_irqs () && pinfo->count ==1 &&mp_irqdomain_map (domain, irq, pin) !=0 ) irq =-1 ;if (irq >0 ) - info->count++; -else if (info->count ==0 ) - info->set =0 ; + pinfo->count++; +else if (pinfo->count ==0 ) + pinfo->set =0 ; }mutex_unlock (&ioapic_mutex);
@@ -1058,10 +1070,11 @@ static int pin_2_irq(int idx, int ioapic, int pin, unsigned int flags) }#endif -return mp_map_pin_to_irq (gsi, idx, ioapic, pin, flags); +return mp_map_pin_to_irq (gsi, idx, ioapic, pin, flags,NULL ); } -int mp_map_gsi_to_irq (u32 gsi,unsigned int flags) +int mp_map_gsi_to_irq (u32 gsi,unsigned int flags, +struct irq_alloc_info *info) {int ioapic, pin, idx;
@@ -1074,7 +1087,7 @@ int mp_map_gsi_to_irq(u32 gsi, unsigned int flags)if ((flags &IOAPIC_MAP_CHECK ) && idx <0 )return -1 ; -return mp_map_pin_to_irq (gsi, idx, ioapic, pin, flags); +return mp_map_pin_to_irq (gsi, idx, ioapic, pin, flags, info); }void mp_unmap_irq (int irq)
arch/x86/pci/intel_mid_pci.c +3 -1
@@ -208,6 +208,7 @@ static int pci_write(struct pci_bus *bus, unsigned int devfn, int where,static int intel_mid_pci_irq_enable (struct pci_dev *dev) { +struct irq_alloc_info info;int polarity;if (dev->irq_managed && dev->irq >0 )
@@ -217,6 +218,7 @@ static int intel_mid_pci_irq_enable(struct pci_dev *dev) polarity =0 ;/* active high */ else polarity =1 ;/* active low */ +ioapic_set_alloc_attr (&info,dev_to_node (&dev->dev),1 , polarity);/* * MRST only have IOAPIC, the PCI irq lines are 1:1 mapped to
@@ -224,7 +226,7 @@ static int intel_mid_pci_irq_enable(struct pci_dev *dev)*/ if (mp_set_gsi_attr (dev->irq,1 , polarity,dev_to_node (&dev->dev)))return -EBUSY ; -if (mp_map_gsi_to_irq (dev->irq,IOAPIC_MAP_ALLOC ) <0 ) +if (mp_map_gsi_to_irq (dev->irq,IOAPIC_MAP_ALLOC , &info) <0 )return -EBUSY ; dev->irq_managed =1 ;
arch/x86/platform/intel-mid/device_libs/platform_wdt.c +3 -1
@@ -27,6 +27,7 @@ static struct platform_device wdt_dev = {static int tangier_probe (struct platform_device *pdev) {int gsi; +struct irq_alloc_info info;struct intel_mid_wdt_pdata *pdata = pdev->dev.platform_data;if (!pdata)
@@ -34,8 +35,9 @@ static int tangier_probe(struct platform_device *pdev)/* IOAPIC builds identity mapping between GSI and IRQ on MID */ gsi = pdata->irq; +ioapic_set_alloc_attr (&info,cpu_to_node (0 ),1 ,0 );if (mp_set_gsi_attr (gsi,1 ,0 ,cpu_to_node (0 )) || -mp_map_gsi_to_irq (gsi,IOAPIC_MAP_ALLOC ) <=0 ) { +mp_map_gsi_to_irq (gsi,IOAPIC_MAP_ALLOC , &info) <=0 ) {dev_warn (&pdev->dev,"cannot find interrupt %d in ioapic\n" , gsi);return -EINVAL ;
arch/x86/platform/intel-mid/sfi.c +6 -3
@@ -104,7 +104,7 @@ int __init sfi_parse_mtmr(struct sfi_table_header *table) mp_irq.dstapic =MP_APIC_ALL ; mp_irq.dstirq = pentry->irq;mp_save_irq (&mp_irq); -mp_map_gsi_to_irq (pentry->irq,IOAPIC_MAP_ALLOC ); +mp_map_gsi_to_irq (pentry->irq,IOAPIC_MAP_ALLOC ,NULL ); }return 0 ;
@@ -175,7 +175,7 @@ int __init sfi_parse_mrtc(struct sfi_table_header *table) mp_irq.dstapic =MP_APIC_ALL ; mp_irq.dstirq = pentry->irq;mp_save_irq (&mp_irq); -mp_map_gsi_to_irq (pentry->irq,IOAPIC_MAP_ALLOC ); +mp_map_gsi_to_irq (pentry->irq,IOAPIC_MAP_ALLOC ,NULL ); }return 0 ; }
@@ -434,6 +434,7 @@ static int __init sfi_parse_devs(struct sfi_table_header *table)struct devs_id *dev =NULL ;int num, i, ret;int polarity; +struct irq_alloc_info info; sb = (struct sfi_table_simple *)table; num = SFI_GET_NUM_ENTRIES(sb, struct sfi_device_table_entry);
@@ -467,9 +468,11 @@ static int __init sfi_parse_devs(struct sfi_table_header *table) polarity =1 ; } +ioapic_set_alloc_attr (&info,NUMA_NO_NODE ,1 , polarity); ret =mp_set_gsi_attr (irq,1 , polarity,NUMA_NO_NODE );if (ret ==0 ) - ret =mp_map_gsi_to_irq (irq,IOAPIC_MAP_ALLOC ); + ret =mp_map_gsi_to_irq (irq,IOAPIC_MAP_ALLOC , + &info);WARN_ON (ret <0 ); }
Signature · 1 line
1.7.10.4
tip-bot for Jiang Liu
merge bot[tip:x86/apic] x86, irq: Prepare IOAPIC interfaces to support hierarchy irqdomain
x86, irq: Prepare IOAPIC interfaces to support hierarchy irqdomain
Commit-ID: d1f3023e7be5a11ad7ad5cd8a6eaca2ba4d45615 Gitweb: http://git.kernel.org/tip/d1f3023e7be5a11ad7ad5cd8a6eaca2ba4d45615 Author: Jiang Liu <[email protected]> AuthorDate: Tue, 25 Nov 2014 15:49:28 +0800 Committer: Thomas Gleixner <[email protected]> CommitDate: Wed, 26 Nov 2014 23:52:46 +0100
x86, irq: Prepare IOAPIC interfaces to support hierarchy irqdomain
Introduce helper functions to manipulate struct irq_alloc_info for IOAPIC. Also add extra parameter to IOAPIC interfaces to prepare for hierarchy irqdomain. Function mp_set_gsi_attr() will be killed once we have switched to hierarchy irqdomain.
Signed-off-by Jiang Liu <[email protected]>
Cc Konrad Rzeszutek Wilk <[email protected]>
Cc Tony Luck <[email protected]>
Cc Joerg Roedel <[email protected]>
Cc Greg Kroah-Hartman <[email protected]>
Cc Bjorn Helgaas <[email protected]>
Cc Benjamin Herrenschmidt <[email protected]>
Cc Rafael J. Wysocki <[email protected]>
Cc Randy Dunlap <[email protected]>
Cc Yinghai Lu <[email protected]>
Cc Borislav Petkov <[email protected]>
Cc Len Brown <[email protected]>
Cc Pavel Machek <[email protected]>
Cc Grant Likely <[email protected]>
Cc David Cohen <[email protected]>
Signed-off-by Thomas Gleixner <[email protected]>
Tested-by Joerg Roedel <[email protected]>
--- arch/x86/include/asm/io_apic.h | 14 ++++++-- arch/x86/kernel/acpi/boot.c | 9 +++-- arch/x86/kernel/apic/io_apic.c | 39 ++++++++++++++-------- arch/x86/pci/intel_mid_pci.c | 4 ++- .../platform/intel-mid/device_libs/platform_wdt.c | 4 ++- arch/x86/platform/intel-mid/sfi.c | 9 +++-- 6 files changed, 56 insertions(+), 23 deletions(-)
arch/x86/include/asm/io_apic.h +12 -2
@@ -95,6 +95,8 @@ struct IR_IO_APIC_route_entry { index :15 ; } __attribute__ ((packed)); +struct irq_alloc_info ; +#define IOAPIC_AUTO -1#define IOAPIC_EDGE 0#define IOAPIC_LEVEL 1
@@ -194,7 +196,8 @@ extern u32 gsi_top;extern int mp_find_ioapic (u32 gsi);extern int mp_find_ioapic_pin (int ioapic,u32 gsi);extern u32 mp_pin_to_gsi (int ioapic,int pin); -extern int mp_map_gsi_to_irq (u32 gsi,unsigned int flags); +extern int mp_map_gsi_to_irq (u32 gsi,unsigned int flags, +struct irq_alloc_info *info);extern void mp_unmap_irq (int irq);extern int mp_register_ioapic (int id,u32 address,u32 gsi_base,struct ioapic_domain_cfg *cfg);
@@ -203,6 +206,8 @@ extern int mp_ioapic_registered(u32 gsi_base);extern int mp_irqdomain_map (struct irq_domain *domain,unsigned int virq,irq_hw_number_t hwirq);extern void mp_irqdomain_unmap (struct irq_domain *domain,unsigned int virq); +extern void ioapic_set_alloc_attr (struct irq_alloc_info *info, +int node,int trigger,int polarity);extern int mp_set_gsi_attr (u32 gsi,int trigger,int polarity,int node);extern void mp_save_irq (struct mpc_intsrc *m);
@@ -253,7 +258,12 @@ static inline void print_IO_APICs(void) {}#define gsi_top (NR_IRQS_LEGACY)static inline int mp_find_ioapic (u32 gsi) {return 0 ; }static inline u32 mp_pin_to_gsi (int ioapic,int pin) {return UINT_MAX ; } -static inline int mp_map_gsi_to_irq (u32 gsi,unsigned int flags) {return gsi; } +static inline int mp_map_gsi_to_irq (u32 gsi,unsigned int flags, +struct irq_alloc_info *info) +{ +return gsi; +} +static inline void mp_unmap_irq (int irq) { }static inline int save_ioapic_entries (void )
arch/x86/kernel/acpi/boot.c +6 -3
@@ -404,6 +404,7 @@ static int mp_register_gsi(struct device *dev, u32 gsi, int trigger, int polarity) {int irq, node; +struct irq_alloc_info info;if (acpi_irq_model !=ACPI_IRQ_MODEL_IOAPIC )return gsi;
@@ -416,7 +417,8 @@ static int mp_register_gsi(struct device *dev, u32 gsi, int trigger,return -1 ; } - irq =mp_map_gsi_to_irq (gsi,IOAPIC_MAP_ALLOC ); +ioapic_set_alloc_attr (&info, node, trigger, polarity); + irq =mp_map_gsi_to_irq (gsi,IOAPIC_MAP_ALLOC , &info);if (irq <0 )return irq;
@@ -434,7 +436,7 @@ static void mp_unregister_gsi(u32 gsi)if (acpi_irq_model !=ACPI_IRQ_MODEL_IOAPIC )return ; - irq =mp_map_gsi_to_irq (gsi,0 ); + irq =mp_map_gsi_to_irq (gsi,0 ,NULL );if (irq >0 )mp_unmap_irq (irq); }
@@ -618,7 +620,8 @@ int acpi_gsi_to_irq(u32 gsi, unsigned int *irqp) }else {mutex_lock (&acpi_ioapic_lock); irq =mp_map_gsi_to_irq (gsi, -IOAPIC_MAP_ALLOC |IOAPIC_MAP_CHECK ); +IOAPIC_MAP_ALLOC |IOAPIC_MAP_CHECK , +NULL );mutex_unlock (&acpi_ioapic_lock);if (irq <0 )return -1 ;
arch/x86/kernel/apic/io_apic.c +26 -13
@@ -938,7 +938,19 @@ static int irq_trigger(int idx)return trigger; } -static int alloc_irq_from_domain (struct irq_domain *domain,u32 gsi,int pin) +void ioapic_set_alloc_attr (struct irq_alloc_info *info,int node, +int trigger,int polarity) +{ +init_irq_alloc_info (info,NULL ); + info->type =X86_IRQ_ALLOC_TYPE_IOAPIC ; + info->ioapic_node = node; + info->ioapic_trigger = trigger; + info->ioapic_polarity = polarity; + info->ioapic_valid =1 ; +} + +static int alloc_irq_from_domain (struct irq_domain *domain,u32 gsi,int pin, +struct irq_alloc_info *info) {int irq =-1 ;int ioapic = (int )(long )domain->host_data;
@@ -971,11 +983,11 @@ static int alloc_irq_from_domain(struct irq_domain *domain, u32 gsi, int pin) }static int mp_map_pin_to_irq (u32 gsi,int idx,int ioapic,int pin, -unsigned int flags) +unsigned int flags,struct irq_alloc_info *info) {int irq;struct irq_domain *domain =mp_ioapic_irqdomain (ioapic); -struct mp_pin_info *info =mp_pin_info (ioapic, pin); +struct mp_pin_info *pinfo =mp_pin_info (ioapic, pin);if (!domain)return -1 ;
@@ -997,30 +1009,30 @@ static int mp_map_pin_to_irq(u32 gsi, int idx, int ioapic, int pin,if (idx >=0 &&test_bit (mp_irqs[idx].srcbus, mp_bus_not_pci)) { irq = mp_irqs[idx].srcbusirq;if (flags &IOAPIC_MAP_ALLOC ) { -if (info->count ==0 && +if (pinfo->count ==0 &&mp_irqdomain_map (domain, irq, pin) !=0 ) irq =-1 ;/* special handling for timer IRQ0 */ if (irq ==0 ) - info->count++; + pinfo->count++; } }else { irq =irq_find_mapping (domain, pin);if (irq <=0 && (flags &IOAPIC_MAP_ALLOC )) - irq =alloc_irq_from_domain (domain, gsi, pin); + irq =alloc_irq_from_domain (domain, gsi, pin, info); }if (flags &IOAPIC_MAP_ALLOC ) {/* special handling for legacy IRQs */ -if (irq <nr_legacy_irqs () && info->count ==1 && +if (irq <nr_legacy_irqs () && pinfo->count ==1 &&mp_irqdomain_map (domain, irq, pin) !=0 ) irq =-1 ;if (irq >0 ) - info->count++; -else if (info->count ==0 ) - info->set =0 ; + pinfo->count++; +else if (pinfo->count ==0 ) + pinfo->set =0 ; }mutex_unlock (&ioapic_mutex);
@@ -1058,10 +1070,11 @@ static int pin_2_irq(int idx, int ioapic, int pin, unsigned int flags) }#endif -return mp_map_pin_to_irq (gsi, idx, ioapic, pin, flags); +return mp_map_pin_to_irq (gsi, idx, ioapic, pin, flags,NULL ); } -int mp_map_gsi_to_irq (u32 gsi,unsigned int flags) +int mp_map_gsi_to_irq (u32 gsi,unsigned int flags, +struct irq_alloc_info *info) {int ioapic, pin, idx;
@@ -1074,7 +1087,7 @@ int mp_map_gsi_to_irq(u32 gsi, unsigned int flags)if ((flags &IOAPIC_MAP_CHECK ) && idx <0 )return -1 ; -return mp_map_pin_to_irq (gsi, idx, ioapic, pin, flags); +return mp_map_pin_to_irq (gsi, idx, ioapic, pin, flags, info); }void mp_unmap_irq (int irq)
arch/x86/pci/intel_mid_pci.c +3 -1
@@ -208,6 +208,7 @@ static int pci_write(struct pci_bus *bus, unsigned int devfn, int where,static int intel_mid_pci_irq_enable (struct pci_dev *dev) { +struct irq_alloc_info info;int polarity;if (dev->irq_managed && dev->irq >0 )
@@ -217,6 +218,7 @@ static int intel_mid_pci_irq_enable(struct pci_dev *dev) polarity =0 ;/* active high */ else polarity =1 ;/* active low */ +ioapic_set_alloc_attr (&info,dev_to_node (&dev->dev),1 , polarity);/* * MRST only have IOAPIC, the PCI irq lines are 1:1 mapped to
@@ -224,7 +226,7 @@ static int intel_mid_pci_irq_enable(struct pci_dev *dev)*/ if (mp_set_gsi_attr (dev->irq,1 , polarity,dev_to_node (&dev->dev)))return -EBUSY ; -if (mp_map_gsi_to_irq (dev->irq,IOAPIC_MAP_ALLOC ) <0 ) +if (mp_map_gsi_to_irq (dev->irq,IOAPIC_MAP_ALLOC , &info) <0 )return -EBUSY ; dev->irq_managed =1 ;
arch/x86/platform/intel-mid/device_libs/platform_wdt.c +3 -1
@@ -27,6 +27,7 @@ static struct platform_device wdt_dev = {static int tangier_probe (struct platform_device *pdev) {int gsi; +struct irq_alloc_info info;struct intel_mid_wdt_pdata *pdata = pdev->dev.platform_data;if (!pdata)
@@ -34,8 +35,9 @@ static int tangier_probe(struct platform_device *pdev)/* IOAPIC builds identity mapping between GSI and IRQ on MID */ gsi = pdata->irq; +ioapic_set_alloc_attr (&info,cpu_to_node (0 ),1 ,0 );if (mp_set_gsi_attr (gsi,1 ,0 ,cpu_to_node (0 )) || -mp_map_gsi_to_irq (gsi,IOAPIC_MAP_ALLOC ) <=0 ) { +mp_map_gsi_to_irq (gsi,IOAPIC_MAP_ALLOC , &info) <=0 ) {dev_warn (&pdev->dev,"cannot find interrupt %d in ioapic\n" , gsi);return -EINVAL ;
arch/x86/platform/intel-mid/sfi.c +6 -3
@@ -104,7 +104,7 @@ int __init sfi_parse_mtmr(struct sfi_table_header *table) mp_irq.dstapic =MP_APIC_ALL ; mp_irq.dstirq = pentry->irq;mp_save_irq (&mp_irq); -mp_map_gsi_to_irq (pentry->irq,IOAPIC_MAP_ALLOC ); +mp_map_gsi_to_irq (pentry->irq,IOAPIC_MAP_ALLOC ,NULL ); }return 0 ;
@@ -175,7 +175,7 @@ int __init sfi_parse_mrtc(struct sfi_table_header *table) mp_irq.dstapic =MP_APIC_ALL ; mp_irq.dstirq = pentry->irq;mp_save_irq (&mp_irq); -mp_map_gsi_to_irq (pentry->irq,IOAPIC_MAP_ALLOC ); +mp_map_gsi_to_irq (pentry->irq,IOAPIC_MAP_ALLOC ,NULL ); }return 0 ; }
@@ -434,6 +434,7 @@ static int __init sfi_parse_devs(struct sfi_table_header *table)struct devs_id *dev =NULL ;int num, i, ret;int polarity; +struct irq_alloc_info info; sb = (struct sfi_table_simple *)table; num = SFI_GET_NUM_ENTRIES(sb, struct sfi_device_table_entry);
@@ -467,9 +468,11 @@ static int __init sfi_parse_devs(struct sfi_table_header *table) polarity =1 ; } +ioapic_set_alloc_attr (&info,NUMA_NO_NODE ,1 , polarity); ret =mp_set_gsi_attr (irq,1 , polarity,NUMA_NO_NODE );if (ret ==0 ) - ret =mp_map_gsi_to_irq (irq,IOAPIC_MAP_ALLOC ); + ret =mp_map_gsi_to_irq (irq,IOAPIC_MAP_ALLOC , + &info);WARN_ON (ret <0 ); }
PATCH v4 5/38 x86, irq: Implement callbacks to enable hierarchy irqdomain on IOAPICs
In reply to Jiang LiuImplement required callbacks to prepare for enabling hierarchy irqdomain on IOAPICs. Later we will clean up IOAPIC code a lot by using hierarchy irqdomain framework.
Signed-off-by Jiang Liu <[email protected]>
Tested-by Joerg Roedel <[email protected]>
--- arch/x86/include/asm/io_apic.h | 10 +++ arch/x86/kernel/apic/io_apic.c | 159 +++++++++++++++++++++++++++++++++++++++- 2 files changed, 166 insertions(+), 3 deletions(-)
arch/x86/include/asm/io_apic.h +10 -0
@@ -96,6 +96,7 @@ struct IR_IO_APIC_route_entry { } __attribute__ ((packed));struct irq_alloc_info ; +struct irq_data ;#define IOAPIC_AUTO -1#define IOAPIC_EDGE 0
@@ -206,6 +207,15 @@ extern int mp_ioapic_registered(u32 gsi_base);extern int mp_irqdomain_map (struct irq_domain *domain,unsigned int virq,irq_hw_number_t hwirq);extern void mp_irqdomain_unmap (struct irq_domain *domain,unsigned int virq); +extern int mp_irqdomain_alloc (struct irq_domain *domain,unsigned int virq, +unsigned int nr_irqs,void *arg); +extern void mp_irqdomain_free (struct irq_domain *domain,unsigned int virq, +unsigned int nr_irqs); +extern void mp_irqdomain_activate (struct irq_domain *domain, +struct irq_data *irq_data); +extern void mp_irqdomain_deactivate (struct irq_domain *domain, +struct irq_data *irq_data); +extern int mp_irqdomain_ioapic_idx (struct irq_domain *domain);extern void ioapic_set_alloc_attr (struct irq_alloc_info *info,int node,int trigger,int polarity);extern int mp_set_gsi_attr (u32 gsi,int trigger,int polarity,int node);
arch/x86/kernel/apic/io_apic.c +156 -3
196 lines not on this page · raw message
Signature · 1 line
1.7.10.4
tip-bot for Jiang Liu
merge bot[tip:x86/apic] x86, irq: Implement callbacks to enable hierarchy irqdomain on IOAPICs
x86, irq: Implement callbacks to enable hierarchy irqdomain on IOAPICs
Commit-ID: 653c4a3437aa1c857bb2b121cbbf8c8b67ff51cd Gitweb: http://git.kernel.org/tip/653c4a3437aa1c857bb2b121cbbf8c8b67ff51cd Author: Jiang Liu <[email protected]> AuthorDate: Tue, 25 Nov 2014 15:49:29 +0800 Committer: Thomas Gleixner <[email protected]> CommitDate: Wed, 26 Nov 2014 23:52:46 +0100
x86, irq: Implement callbacks to enable hierarchy irqdomain on IOAPICs
Implement required callbacks to prepare for enabling hierarchy irqdomain on IOAPICs. Later we will clean up IOAPIC code a lot by using hierarchy irqdomain framework.
Signed-off-by Jiang Liu <[email protected]>
Cc Konrad Rzeszutek Wilk <[email protected]>
Cc Tony Luck <[email protected]>
Cc Joerg Roedel <[email protected]>
Cc Greg Kroah-Hartman <[email protected]>
Cc Bjorn Helgaas <[email protected]>
Cc Benjamin Herrenschmidt <[email protected]>
Cc Rafael J. Wysocki <[email protected]>
Cc Randy Dunlap <[email protected]>
Cc Yinghai Lu <[email protected]>
Cc Borislav Petkov <[email protected]>
Cc Grant Likely <[email protected]>
Signed-off-by Thomas Gleixner <[email protected]>
Tested-by Joerg Roedel <[email protected]>
--- arch/x86/include/asm/io_apic.h | 10 +++ arch/x86/kernel/apic/io_apic.c | 159 ++++++++++++++++++++++++++++++++++++++++- 2 files changed, 166 insertions(+), 3 deletions(-)
arch/x86/include/asm/io_apic.h +10 -0
@@ -96,6 +96,7 @@ struct IR_IO_APIC_route_entry { } __attribute__ ((packed));struct irq_alloc_info ; +struct irq_data ;#define IOAPIC_AUTO -1#define IOAPIC_EDGE 0
@@ -206,6 +207,15 @@ extern int mp_ioapic_registered(u32 gsi_base);extern int mp_irqdomain_map (struct irq_domain *domain,unsigned int virq,irq_hw_number_t hwirq);extern void mp_irqdomain_unmap (struct irq_domain *domain,unsigned int virq); +extern int mp_irqdomain_alloc (struct irq_domain *domain,unsigned int virq, +unsigned int nr_irqs,void *arg); +extern void mp_irqdomain_free (struct irq_domain *domain,unsigned int virq, +unsigned int nr_irqs); +extern void mp_irqdomain_activate (struct irq_domain *domain, +struct irq_data *irq_data); +extern void mp_irqdomain_deactivate (struct irq_domain *domain, +struct irq_data *irq_data); +extern int mp_irqdomain_ioapic_idx (struct irq_domain *domain);extern void ioapic_set_alloc_attr (struct irq_alloc_info *info,int node,int trigger,int polarity);extern int mp_set_gsi_attr (u32 gsi,int trigger,int polarity,int node);
arch/x86/kernel/apic/io_apic.c +156 -3
196 lines not on this page · raw message
PATCH v4 6/38 x86, irq: Refine the way to allocate irq_cfg for legacy IRQs
In reply to Jiang LiuTo support legacy ISA IRQs, we need to preallocate irq_cfg structures for legacy ISA IRQs. Refine the way to allocate irq_cfg for legacy ISA IRQs, so it's more friend to hierarchy irqdomain implementation.
Signed-off-by Jiang Liu <[email protected]>
Tested-by Joerg Roedel <[email protected]>
--- arch/x86/kernel/apic/io_apic.c | 13 +------------ arch/x86/kernel/apic/vector.c | 42 +++++++++++++++++++++++++++++++++++++++- 2 files changed, 42 insertions(+), 13 deletions(-)
arch/x86/kernel/apic/io_apic.c +1 -12
@@ -254,8 +254,7 @@ static void free_ioapic_saved_registers(int idx)int __init arch_early_ioapic_init (void ) { -struct irq_cfg *cfg; -int i, node =cpu_to_node (0 ); +int i;if (!nr_legacy_irqs ()) io_apic_irqs = ~0UL ;
@@ -263,16 +262,6 @@ int __init arch_early_ioapic_init(void)for_each_ioapic (i)alloc_ioapic_saved_registers (i); -/* -* For legacy IRQ's, start with assigning irq0 to irq15 to -* IRQ0_VECTOR to IRQ15_VECTOR for all cpu's. -*/ -for (i =0 ; i <nr_legacy_irqs (); i++) { - cfg =alloc_irq_and_cfg_at (i, node); - cfg->vector =IRQ0_VECTOR + i; -cpumask_setall (cfg->domain); - } -return 0 ; }
arch/x86/kernel/apic/vector.c +41 -1
68 lines not on this page · raw message
Signature · 1 line
1.7.10.4
tip-bot for Jiang Liu
merge bot[tip:x86/apic] x86, irq: Refine the way to allocate irq_cfg for legacy IRQs
x86, irq: Refine the way to allocate irq_cfg for legacy IRQs
Commit-ID: 30ba6dedce8de6816f9c7b7b5992566c9e357574 Gitweb: http://git.kernel.org/tip/30ba6dedce8de6816f9c7b7b5992566c9e357574 Author: Jiang Liu <[email protected]> AuthorDate: Tue, 25 Nov 2014 15:49:30 +0800 Committer: Thomas Gleixner <[email protected]> CommitDate: Wed, 26 Nov 2014 23:52:46 +0100
x86, irq: Refine the way to allocate irq_cfg for legacy IRQs
To support legacy ISA IRQs, we need to preallocate irq_cfg structures for legacy ISA IRQs. Refine the way to allocate irq_cfg for legacy ISA IRQs, so it's more friend to hierarchy irqdomain implementation.
Signed-off-by Jiang Liu <[email protected]>
Cc Konrad Rzeszutek Wilk <[email protected]>
Cc Tony Luck <[email protected]>
Cc Joerg Roedel <[email protected]>
Cc Greg Kroah-Hartman <[email protected]>
Cc Bjorn Helgaas <[email protected]>
Cc Benjamin Herrenschmidt <[email protected]>
Cc Rafael J. Wysocki <[email protected]>
Cc Randy Dunlap <[email protected]>
Cc Yinghai Lu <[email protected]>
Cc Borislav Petkov <[email protected]>
Cc Grant Likely <[email protected]>
Signed-off-by Thomas Gleixner <[email protected]>
Tested-by Joerg Roedel <[email protected]>
--- arch/x86/kernel/apic/io_apic.c | 13 +------------ arch/x86/kernel/apic/vector.c | 42 +++++++++++++++++++++++++++++++++++++++++- 2 files changed, 42 insertions(+), 13 deletions(-)
arch/x86/kernel/apic/io_apic.c +1 -12
@@ -254,8 +254,7 @@ static void free_ioapic_saved_registers(int idx)int __init arch_early_ioapic_init (void ) { -struct irq_cfg *cfg; -int i, node =cpu_to_node (0 ); +int i;if (!nr_legacy_irqs ()) io_apic_irqs = ~0UL ;
@@ -263,16 +262,6 @@ int __init arch_early_ioapic_init(void)for_each_ioapic (i)alloc_ioapic_saved_registers (i); -/* -* For legacy IRQ's, start with assigning irq0 to irq15 to -* IRQ0_VECTOR to IRQ15_VECTOR for all cpu's. -*/ -for (i =0 ; i <nr_legacy_irqs (); i++) { - cfg =alloc_irq_and_cfg_at (i, node); - cfg->vector =IRQ0_VECTOR + i; -cpumask_setall (cfg->domain); - } -return 0 ; }
arch/x86/kernel/apic/vector.c +41 -1
68 lines not on this page · raw message
PATCH v4 7/38 x86, irq: Simplify the way to print IOAPIC entry
In reply to Jiang LiuSimplify the way to print IOAPIC entry content, so we could kill native_io_apic_print_entries(), intel_ir_io_apic_print_entries() and x86_io_apic_ops.print_entries() later.
Signed-off-by Jiang Liu <[email protected]>
Tested-by Joerg Roedel <[email protected]>
--- arch/x86/kernel/apic/io_apic.c | 30 ++++++++++++++++++++++++++++-- 1 file changed, 28 insertions(+), 2 deletions(-)
arch/x86/kernel/apic/io_apic.c +28 -2
@@ -1424,6 +1424,33 @@ void ioapic_zap_locks(void)raw_spin_lock_init (&ioapic_lock); } +static void io_apic_print_entries (unsigned int apic,unsigned int nr_entries) +{ +int i; +char buf[256 ]; +struct IO_APIC_route_entry entry; +struct IR_IO_APIC_route_entry *ir_entry = (void *)&entry; + +printk (KERN_DEBUG "IOAPIC %d:\n" , apic); +for (i =0 ; i <= nr_entries; i++) { + entry =ioapic_read_entry (apic, i); +snprintf (buf,sizeof (buf), +" pin%02x, %s, %s, %s, V(%02X), IRR(%1d), S(%1d)" , + i, entry.mask ?"enabled" :"disabled" , + entry.trigger ?"level" :"edge" , + entry.polarity ?"high" :"low" , + entry.vector, entry.irr, entry.delivery_status); +if (ir_entry->format) +printk (KERN_DEBUG "%s, remapped, I(%04X), Z(%X)\n" , + buf, (ir_entry->index <<15 ) | ir_entry->index, + ir_entry->zero); +else +printk (KERN_DEBUG "%s, %s, D(%02X), M(%1d)\n" , + buf, entry.dest_mode ?"logical" :"physical" , + entry.dest, entry.delivery_mode); + } +} +static void __init print_IO_APIC (int ioapic_idx) {union IO_APIC_reg_00 reg_00;
@@ -1477,8 +1504,7 @@ static void __init print_IO_APIC(int ioapic_idx) }printk (KERN_DEBUG ".... IRQ redirection table:\n" ); - - x86_io_apic_ops.print_entries (ioapic_idx, reg_01.bits.entries); +io_apic_print_entries (ioapic_idx, reg_01.bits.entries); }void __init print_IO_APICs (void )
Signature · 1 line
1.7.10.4
tip-bot for Jiang Liu
merge bot[tip:x86/apic] x86, irq: Simplify the way to print IOAPIC entry
x86, irq: Simplify the way to print IOAPIC entry
Commit-ID: 5c1eb3863d080848e04f196f9af30d8d70ab0fe6 Gitweb: http://git.kernel.org/tip/5c1eb3863d080848e04f196f9af30d8d70ab0fe6 Author: Jiang Liu <[email protected]> AuthorDate: Tue, 25 Nov 2014 15:49:31 +0800 Committer: Thomas Gleixner <[email protected]> CommitDate: Wed, 26 Nov 2014 23:52:46 +0100
x86, irq: Simplify the way to print IOAPIC entry
Simplify the way to print IOAPIC entry content, so we could kill native_io_apic_print_entries(), intel_ir_io_apic_print_entries() and x86_io_apic_ops.print_entries() later.
Signed-off-by Jiang Liu <[email protected]>
Cc Konrad Rzeszutek Wilk <[email protected]>
Cc Tony Luck <[email protected]>
Cc Joerg Roedel <[email protected]>
Cc Greg Kroah-Hartman <[email protected]>
Cc Bjorn Helgaas <[email protected]>
Cc Benjamin Herrenschmidt <[email protected]>
Cc Rafael J. Wysocki <[email protected]>
Cc Randy Dunlap <[email protected]>
Cc Yinghai Lu <[email protected]>
Cc Borislav Petkov <[email protected]>
Cc Grant Likely <[email protected]>
Signed-off-by Thomas Gleixner <[email protected]>
Tested-by Joerg Roedel <[email protected]>
--- arch/x86/kernel/apic/io_apic.c | 30 ++++++++++++++++++++++++++++-- 1 file changed, 28 insertions(+), 2 deletions(-)
arch/x86/kernel/apic/io_apic.c +28 -2
@@ -1424,6 +1424,33 @@ void ioapic_zap_locks(void)raw_spin_lock_init (&ioapic_lock); } +static void io_apic_print_entries (unsigned int apic,unsigned int nr_entries) +{ +int i; +char buf[256 ]; +struct IO_APIC_route_entry entry; +struct IR_IO_APIC_route_entry *ir_entry = (void *)&entry; + +printk (KERN_DEBUG "IOAPIC %d:\n" , apic); +for (i =0 ; i <= nr_entries; i++) { + entry =ioapic_read_entry (apic, i); +snprintf (buf,sizeof (buf), +" pin%02x, %s, %s, %s, V(%02X), IRR(%1d), S(%1d)" , + i, entry.mask ?"enabled" :"disabled" , + entry.trigger ?"level" :"edge" , + entry.polarity ?"high" :"low" , + entry.vector, entry.irr, entry.delivery_status); +if (ir_entry->format) +printk (KERN_DEBUG "%s, remapped, I(%04X), Z(%X)\n" , + buf, (ir_entry->index <<15 ) | ir_entry->index, + ir_entry->zero); +else +printk (KERN_DEBUG "%s, %s, D(%02X), M(%1d)\n" , + buf, entry.dest_mode ?"logical" :"physical" , + entry.dest, entry.delivery_mode); + } +} +static void __init print_IO_APIC (int ioapic_idx) {union IO_APIC_reg_00 reg_00;
@@ -1477,8 +1504,7 @@ static void __init print_IO_APIC(int ioapic_idx) }printk (KERN_DEBUG ".... IRQ redirection table:\n" ); - - x86_io_apic_ops.print_entries (ioapic_idx, reg_01.bits.entries); +io_apic_print_entries (ioapic_idx, reg_01.bits.entries); }void __init print_IO_APICs (void )
PATCH v4 8/38 x86, irq: Introduce helper functions to support hierarchy irqdomain for IOAPIC
In reply to Jiang LiuIntroduce several helper functions, which will be used to enable hierarchy irqdomain for IOAPIC.
Signed-off-by Jiang Liu <[email protected]>
Tested-by Joerg Roedel <[email protected]>
--- arch/x86/kernel/apic/io_apic.c | 59 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 59 insertions(+)
arch/x86/kernel/apic/io_apic.c +59 -0
@@ -67,6 +67,8 @@#define for_each_irq_pin (entry, head) \ list_for_each_entry(entry, &head, list) +int acpi_get_override_irq (u32 gsi,int *trigger,int *polarity); +/* * Is the SiS APIC rmw bug present ? * -1 = don't know, 0 = no, 1 = yes
@@ -82,6 +84,7 @@ struct mp_chip_data {struct IO_APIC_route_entry entry;int trigger;int polarity; +u32 count;bool isa_irq; };
@@ -945,6 +948,42 @@ void ioapic_set_alloc_attr(struct irq_alloc_info *info, int node, info->ioapic_valid =1 ; } +static void ioapic_copy_alloc_attr (struct irq_alloc_info *dst, +struct irq_alloc_info *src, +u32 gsi,int ioapic_idx,int pin) +{ +int trigger, polarity; + +copy_irq_alloc_info (dst, src); + dst->type =X86_IRQ_ALLOC_TYPE_IOAPIC ; + dst->ioapic_id =mpc_ioapic_id (ioapic_idx); + dst->ioapic_pin = pin; + dst->ioapic_valid =1 ; +if (src && src->ioapic_valid) { + dst->ioapic_node = src->ioapic_node; + dst->ioapic_trigger = src->ioapic_trigger; + dst->ioapic_polarity = src->ioapic_polarity; + }else { + dst->ioapic_node =NUMA_NO_NODE ; +if (acpi_get_override_irq (gsi, &trigger, &polarity) >=0 ) { + dst->ioapic_trigger = trigger; + dst->ioapic_polarity = polarity; + }else { +/* +* PCI interrupts are always polarity one level +* triggered. +*/ + dst->ioapic_trigger =1 ; + dst->ioapic_polarity =1 ; + } + } +} + +static int ioapic_alloc_attr_node (struct irq_alloc_info *info) +{ +return (info && info->ioapic_valid) ? info->ioapic_node :NUMA_NO_NODE ; +} +static void mp_register_handler (unsigned int irq,unsigned long trigger) {irq_flow_handler_t hdl;
@@ -962,6 +1001,26 @@ static void mp_register_handler(unsigned int irq, unsigned long trigger)__irq_set_handler (irq, hdl,0 , fasteoi ?"fasteoi" :"edge" ); } +static bool mp_check_pin_attr (int irq,struct irq_alloc_info *info) +{ +struct mp_chip_data *data =irq_get_chip_data (irq); + +/* +* setup_IO_APIC_irqs() programs all legacy IRQs with default trigger +* and polarity attirbutes. So allow the first user to reprogram the +* pin with real trigger and polarity attributes. +*/ +if (irq <nr_legacy_irqs () && data->count ==1 ) { +if (info->ioapic_trigger != data->trigger) +mp_register_handler (irq, data->trigger); + data->entry.trigger = data->trigger = info->ioapic_trigger; + data->entry.polarity = data->polarity = info->ioapic_polarity; + } + +return data->trigger == info->ioapic_trigger && + data->polarity == info->ioapic_polarity; +} +static int alloc_irq_from_domain (struct irq_domain *domain,u32 gsi,int pin,struct irq_alloc_info *info) {
Signature · 1 line
1.7.10.4
tip-bot for Jiang Liu
merge bot[tip:x86/apic] x86, irq: Introduce helper functions to support hierarchy irqdomain for IOAPIC
x86, irq: Introduce helper functions to support hierarchy irqdomain for IOAPIC
Commit-ID: ca088857c213f42ad2a0a8ea2088f8f95a2fb5ad Gitweb: http://git.kernel.org/tip/ca088857c213f42ad2a0a8ea2088f8f95a2fb5ad Author: Jiang Liu <[email protected]> AuthorDate: Tue, 25 Nov 2014 15:49:32 +0800 Committer: Thomas Gleixner <[email protected]> CommitDate: Wed, 26 Nov 2014 23:52:46 +0100
x86, irq: Introduce helper functions to support hierarchy irqdomain for IOAPIC
Introduce several helper functions, which will be used to enable hierarchy irqdomain for IOAPIC.
Signed-off-by Jiang Liu <[email protected]>
Cc Konrad Rzeszutek Wilk <[email protected]>
Cc Tony Luck <[email protected]>
Cc Joerg Roedel <[email protected]>
Cc Greg Kroah-Hartman <[email protected]>
Cc Bjorn Helgaas <[email protected]>
Cc Benjamin Herrenschmidt <[email protected]>
Cc Rafael J. Wysocki <[email protected]>
Cc Randy Dunlap <[email protected]>
Cc Yinghai Lu <[email protected]>
Cc Borislav Petkov <[email protected]>
Cc Grant Likely <[email protected]>
Signed-off-by Thomas Gleixner <[email protected]>
Tested-by Joerg Roedel <[email protected]>
--- arch/x86/kernel/apic/io_apic.c | 59 ++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 59 insertions(+)
arch/x86/kernel/apic/io_apic.c +59 -0
@@ -67,6 +67,8 @@#define for_each_irq_pin (entry, head) \ list_for_each_entry(entry, &head, list) +int acpi_get_override_irq (u32 gsi,int *trigger,int *polarity); +/* * Is the SiS APIC rmw bug present ? * -1 = don't know, 0 = no, 1 = yes
@@ -82,6 +84,7 @@ struct mp_chip_data {struct IO_APIC_route_entry entry;int trigger;int polarity; +u32 count;bool isa_irq; };
@@ -945,6 +948,42 @@ void ioapic_set_alloc_attr(struct irq_alloc_info *info, int node, info->ioapic_valid =1 ; } +static void ioapic_copy_alloc_attr (struct irq_alloc_info *dst, +struct irq_alloc_info *src, +u32 gsi,int ioapic_idx,int pin) +{ +int trigger, polarity; + +copy_irq_alloc_info (dst, src); + dst->type =X86_IRQ_ALLOC_TYPE_IOAPIC ; + dst->ioapic_id =mpc_ioapic_id (ioapic_idx); + dst->ioapic_pin = pin; + dst->ioapic_valid =1 ; +if (src && src->ioapic_valid) { + dst->ioapic_node = src->ioapic_node; + dst->ioapic_trigger = src->ioapic_trigger; + dst->ioapic_polarity = src->ioapic_polarity; + }else { + dst->ioapic_node =NUMA_NO_NODE ; +if (acpi_get_override_irq (gsi, &trigger, &polarity) >=0 ) { + dst->ioapic_trigger = trigger; + dst->ioapic_polarity = polarity; + }else { +/* +* PCI interrupts are always polarity one level +* triggered. +*/ + dst->ioapic_trigger =1 ; + dst->ioapic_polarity =1 ; + } + } +} + +static int ioapic_alloc_attr_node (struct irq_alloc_info *info) +{ +return (info && info->ioapic_valid) ? info->ioapic_node :NUMA_NO_NODE ; +} +static void mp_register_handler (unsigned int irq,unsigned long trigger) {irq_flow_handler_t hdl;
@@ -962,6 +1001,26 @@ static void mp_register_handler(unsigned int irq, unsigned long trigger)__irq_set_handler (irq, hdl,0 , fasteoi ?"fasteoi" :"edge" ); } +static bool mp_check_pin_attr (int irq,struct irq_alloc_info *info) +{ +struct mp_chip_data *data =irq_get_chip_data (irq); + +/* +* setup_IO_APIC_irqs() programs all legacy IRQs with default trigger +* and polarity attirbutes. So allow the first user to reprogram the +* pin with real trigger and polarity attributes. +*/ +if (irq <nr_legacy_irqs () && data->count ==1 ) { +if (info->ioapic_trigger != data->trigger) +mp_register_handler (irq, data->trigger); + data->entry.trigger = data->trigger = info->ioapic_trigger; + data->entry.polarity = data->polarity = info->ioapic_polarity; + } + +return data->trigger == info->ioapic_trigger && + data->polarity == info->ioapic_polarity; +} +static int alloc_irq_from_domain (struct irq_domain *domain,u32 gsi,int pin,struct irq_alloc_info *info) {
PATCH v4 9/38 x86, irq: Convert IOAPIC to use hierarchy irqdomain interfaces
In reply to Jiang LiuConvert IOAPIC driver to support and use hierarchy irqdomain interfaces. It's a little big, but it always break bisectings if we split it into multiple patches.
Signed-off-by Jiang Liu <[email protected]>
Tested-by Joerg Roedel <[email protected]>
--- arch/x86/kernel/acpi/boot.c | 11 +- arch/x86/kernel/apic/io_apic.c | 301 +++++++++++++------- arch/x86/kernel/devicetree.c | 37 +-- arch/x86/kernel/mpparse.c | 6 +- arch/x86/pci/intel_mid_pci.c | 2 - .../platform/intel-mid/device_libs/platform_wdt.c | 3 +- arch/x86/platform/intel-mid/sfi.c | 5 +- arch/x86/platform/sfi/sfi.c | 5 +- 8 files changed, 234 insertions(+), 136 deletions(-)
arch/x86/kernel/acpi/boot.c +4 -7
@@ -412,11 +412,6 @@ static int mp_register_gsi(struct device *dev, u32 gsi, int trigger, trigger = trigger ==ACPI_EDGE_SENSITIVE ?0 :1 ; polarity = polarity ==ACPI_ACTIVE_HIGH ?0 :1 ; node = dev ?dev_to_node (dev) :NUMA_NO_NODE ; -if (mp_set_gsi_attr (gsi, trigger, polarity, node)) { -pr_warn ("Failed to set pin attr for GSI%d\n" , gsi); -return -1 ; - } -ioapic_set_alloc_attr (&info, node, trigger, polarity); irq =mp_map_gsi_to_irq (gsi,IOAPIC_MAP_ALLOC , &info);if (irq <0 )
@@ -442,8 +437,10 @@ static void mp_unregister_gsi(u32 gsi) }static struct irq_domain_ops acpi_irqdomain_ops = { - .map = mp_irqdomain_map, - .unmap = mp_irqdomain_unmap, + .alloc = mp_irqdomain_alloc, + .free = mp_irqdomain_free, + .activate = mp_irqdomain_activate, + .deactivate = mp_irqdomain_deactivate, }; static int __init
arch/x86/kernel/apic/io_apic.c +205 -96
477 lines not on this page · raw message
arch/x86/kernel/devicetree.c +15 -22
@@ -196,38 +196,31 @@ static struct of_ioapic_type of_ioapic_type[] = }, }; -static int ioapic_xlate (struct irq_domain *domain, -struct device_node *controller, -const u32 *intspec,u32 intsize, -irq_hw_number_t *out_hwirq,u32 *out_type) +static int dt_irqdomain_alloc (struct irq_domain *domain,unsigned int virq, +unsigned int nr_irqs,void *arg) { +struct of_phandle_args *irq_data = (void *)arg;struct of_ioapic_type *it; -u32 line, idx, gsi; +struct irq_alloc_info tmp; -if (WARN_ON (intsize <2 )) +if (WARN_ON (irq_data->args_count <2 ))return -EINVAL ; - - line = intspec[0 ]; - -if (intspec[1 ] >=ARRAY_SIZE (of_ioapic_type)) +if (irq_data->args[1 ] >=ARRAY_SIZE (of_ioapic_type))return -EINVAL ; - it = &of_ioapic_type[intspec[1 ]]; + it = &of_ioapic_type[irq_data->args[1 ]]; +ioapic_set_alloc_attr (&tmp,NUMA_NO_NODE , it->trigger, it->polarity); + tmp.ioapic_id =mpc_ioapic_id (mp_irqdomain_ioapic_idx (domain)); + tmp.ioapic_pin = irq_data->args[0 ]; - idx = (u32 )(long )domain->host_data; - gsi =mp_pin_to_gsi (idx, line); -if (mp_set_gsi_attr (gsi, it->trigger, it->polarity,cpu_to_node (0 ))) -return -EBUSY ; - - *out_hwirq = line; - *out_type = it->out_type; -return 0 ; +return mp_irqdomain_alloc (domain, virq, nr_irqs, &tmp); }const struct irq_domain_ops ioapic_irq_domain_ops = { - .map = mp_irqdomain_map, - .unmap = mp_irqdomain_unmap, - .xlate = ioapic_xlate, + .alloc = dt_irqdomain_alloc, + .free = mp_irqdomain_free, + .activate = mp_irqdomain_activate, + .deactivate = mp_irqdomain_deactivate, };static void __init dtb_add_ioapic (struct device_node *dn)
arch/x86/kernel/mpparse.c +4 -2
@@ -114,8 +114,10 @@ static void __init MP_bus_info(struct mpc_bus *m) }static struct irq_domain_ops mp_ioapic_irqdomain_ops = { - .map = mp_irqdomain_map, - .unmap = mp_irqdomain_unmap, + .alloc = mp_irqdomain_alloc, + .free = mp_irqdomain_free, + .activate = mp_irqdomain_activate, + .deactivate = mp_irqdomain_deactivate, };static void __init MP_ioapic_info (struct mpc_ioapic *m)
arch/x86/pci/intel_mid_pci.c +0 -2
@@ -224,8 +224,6 @@ static int intel_mid_pci_irq_enable(struct pci_dev *dev)* MRST only have IOAPIC, the PCI irq lines are 1:1 mapped to * IOAPIC RTE entries, so we just enable RTE for the device. */ -if (mp_set_gsi_attr (dev->irq,1 , polarity,dev_to_node (&dev->dev))) -return -EBUSY ;if (mp_map_gsi_to_irq (dev->irq,IOAPIC_MAP_ALLOC , &info) <0 )return -EBUSY ;
arch/x86/platform/intel-mid/device_libs/platform_wdt.c +1 -2
@@ -36,8 +36,7 @@ static int tangier_probe(struct platform_device *pdev)/* IOAPIC builds identity mapping between GSI and IRQ on MID */ gsi = pdata->irq;ioapic_set_alloc_attr (&info,cpu_to_node (0 ),1 ,0 ); -if (mp_set_gsi_attr (gsi,1 ,0 ,cpu_to_node (0 )) || -mp_map_gsi_to_irq (gsi,IOAPIC_MAP_ALLOC , &info) <=0 ) { +if (mp_map_gsi_to_irq (gsi,IOAPIC_MAP_ALLOC , &info) <=0 ) {dev_warn (&pdev->dev,"cannot find interrupt %d in ioapic\n" , gsi);return -EINVAL ;
arch/x86/platform/intel-mid/sfi.c +1 -4
@@ -469,10 +469,7 @@ static int __init sfi_parse_devs(struct sfi_table_header *table) }ioapic_set_alloc_attr (&info,NUMA_NO_NODE ,1 , polarity); - ret =mp_set_gsi_attr (irq,1 , polarity,NUMA_NO_NODE ); -if (ret ==0 ) - ret =mp_map_gsi_to_irq (irq,IOAPIC_MAP_ALLOC , - &info); + ret =mp_map_gsi_to_irq (irq,IOAPIC_MAP_ALLOC , &info);WARN_ON (ret <0 ); }
arch/x86/platform/sfi/sfi.c +4 -1
@@ -72,7 +72,10 @@ static int __init sfi_parse_cpus(struct sfi_table_header *table)#ifdef CONFIG_X86_IO_APIC static struct irq_domain_ops sfi_ioapic_irqdomain_ops = { - .map = mp_irqdomain_map, + .alloc = mp_irqdomain_alloc, + .free = mp_irqdomain_free, + .activate = mp_irqdomain_activate, + .deactivate = mp_irqdomain_deactivate, };static int __init sfi_parse_ioapic (struct sfi_table_header *table)
Signature · 1 line
1.7.10.4
tip-bot for Jiang Liu
merge bot[tip:x86/apic] x86, irq: Convert IOAPIC to use hierarchy irqdomain interfaces
x86, irq: Convert IOAPIC to use hierarchy irqdomain interfaces
Commit-ID: bfa644bfa9e35b9325bc47ffac1f00f82bcb6e19 Gitweb: http://git.kernel.org/tip/bfa644bfa9e35b9325bc47ffac1f00f82bcb6e19 Author: Jiang Liu <[email protected]> AuthorDate: Tue, 25 Nov 2014 15:49:33 +0800 Committer: Thomas Gleixner <[email protected]> CommitDate: Wed, 26 Nov 2014 23:52:46 +0100
x86, irq: Convert IOAPIC to use hierarchy irqdomain interfaces
Convert IOAPIC driver to support and use hierarchy irqdomain interfaces. It's a little big, but it always break bisectings if we split it into multiple patches.
Signed-off-by Jiang Liu <[email protected]>
Cc Konrad Rzeszutek Wilk <[email protected]>
Cc Tony Luck <[email protected]>
Cc Joerg Roedel <[email protected]>
Cc Greg Kroah-Hartman <[email protected]>
Cc Bjorn Helgaas <[email protected]>
Cc Benjamin Herrenschmidt <[email protected]>
Cc Rafael J. Wysocki <[email protected]>
Cc Randy Dunlap <[email protected]>
Cc Yinghai Lu <[email protected]>
Cc Borislav Petkov <[email protected]>
Cc Len Brown <[email protected]>
Cc Pavel Machek <[email protected]>
Cc Grant Likely <[email protected]>
Cc Rob Herring <[email protected]>
Cc David Rientjes <[email protected]>
Cc David Cohen <[email protected]>
Signed-off-by Thomas Gleixner <[email protected]>
Tested-by Joerg Roedel <[email protected]>
--- arch/x86/kernel/acpi/boot.c | 11 +- arch/x86/kernel/apic/io_apic.c | 301 ++++++++++++++------- arch/x86/kernel/devicetree.c | 37 +-- arch/x86/kernel/mpparse.c | 6 +- arch/x86/pci/intel_mid_pci.c | 2 - .../platform/intel-mid/device_libs/platform_wdt.c | 3 +- arch/x86/platform/intel-mid/sfi.c | 5 +- arch/x86/platform/sfi/sfi.c | 5 +- 8 files changed, 234 insertions(+), 136 deletions(-)
arch/x86/kernel/acpi/boot.c +4 -7
@@ -412,11 +412,6 @@ static int mp_register_gsi(struct device *dev, u32 gsi, int trigger, trigger = trigger ==ACPI_EDGE_SENSITIVE ?0 :1 ; polarity = polarity ==ACPI_ACTIVE_HIGH ?0 :1 ; node = dev ?dev_to_node (dev) :NUMA_NO_NODE ; -if (mp_set_gsi_attr (gsi, trigger, polarity, node)) { -pr_warn ("Failed to set pin attr for GSI%d\n" , gsi); -return -1 ; - } -ioapic_set_alloc_attr (&info, node, trigger, polarity); irq =mp_map_gsi_to_irq (gsi,IOAPIC_MAP_ALLOC , &info);if (irq <0 )
@@ -442,8 +437,10 @@ static void mp_unregister_gsi(u32 gsi) }static struct irq_domain_ops acpi_irqdomain_ops = { - .map = mp_irqdomain_map, - .unmap = mp_irqdomain_unmap, + .alloc = mp_irqdomain_alloc, + .free = mp_irqdomain_free, + .activate = mp_irqdomain_activate, + .deactivate = mp_irqdomain_deactivate, }; static int __init
arch/x86/kernel/apic/io_apic.c +205 -96
477 lines not on this page · raw message
arch/x86/kernel/devicetree.c +15 -22
@@ -196,38 +196,31 @@ static struct of_ioapic_type of_ioapic_type[] = }, }; -static int ioapic_xlate (struct irq_domain *domain, -struct device_node *controller, -const u32 *intspec,u32 intsize, -irq_hw_number_t *out_hwirq,u32 *out_type) +static int dt_irqdomain_alloc (struct irq_domain *domain,unsigned int virq, +unsigned int nr_irqs,void *arg) { +struct of_phandle_args *irq_data = (void *)arg;struct of_ioapic_type *it; -u32 line, idx, gsi; +struct irq_alloc_info tmp; -if (WARN_ON (intsize <2 )) +if (WARN_ON (irq_data->args_count <2 ))return -EINVAL ; - - line = intspec[0 ]; - -if (intspec[1 ] >=ARRAY_SIZE (of_ioapic_type)) +if (irq_data->args[1 ] >=ARRAY_SIZE (of_ioapic_type))return -EINVAL ; - it = &of_ioapic_type[intspec[1 ]]; + it = &of_ioapic_type[irq_data->args[1 ]]; +ioapic_set_alloc_attr (&tmp,NUMA_NO_NODE , it->trigger, it->polarity); + tmp.ioapic_id =mpc_ioapic_id (mp_irqdomain_ioapic_idx (domain)); + tmp.ioapic_pin = irq_data->args[0 ]; - idx = (u32 )(long )domain->host_data; - gsi =mp_pin_to_gsi (idx, line); -if (mp_set_gsi_attr (gsi, it->trigger, it->polarity,cpu_to_node (0 ))) -return -EBUSY ; - - *out_hwirq = line; - *out_type = it->out_type; -return 0 ; +return mp_irqdomain_alloc (domain, virq, nr_irqs, &tmp); }const struct irq_domain_ops ioapic_irq_domain_ops = { - .map = mp_irqdomain_map, - .unmap = mp_irqdomain_unmap, - .xlate = ioapic_xlate, + .alloc = dt_irqdomain_alloc, + .free = mp_irqdomain_free, + .activate = mp_irqdomain_activate, + .deactivate = mp_irqdomain_deactivate, };static void __init dtb_add_ioapic (struct device_node *dn)
arch/x86/kernel/mpparse.c +4 -2
@@ -114,8 +114,10 @@ static void __init MP_bus_info(struct mpc_bus *m) }static struct irq_domain_ops mp_ioapic_irqdomain_ops = { - .map = mp_irqdomain_map, - .unmap = mp_irqdomain_unmap, + .alloc = mp_irqdomain_alloc, + .free = mp_irqdomain_free, + .activate = mp_irqdomain_activate, + .deactivate = mp_irqdomain_deactivate, };static void __init MP_ioapic_info (struct mpc_ioapic *m)
arch/x86/pci/intel_mid_pci.c +0 -2
@@ -224,8 +224,6 @@ static int intel_mid_pci_irq_enable(struct pci_dev *dev)* MRST only have IOAPIC, the PCI irq lines are 1:1 mapped to * IOAPIC RTE entries, so we just enable RTE for the device. */ -if (mp_set_gsi_attr (dev->irq,1 , polarity,dev_to_node (&dev->dev))) -return -EBUSY ;if (mp_map_gsi_to_irq (dev->irq,IOAPIC_MAP_ALLOC , &info) <0 )return -EBUSY ;
arch/x86/platform/intel-mid/device_libs/platform_wdt.c +1 -2
@@ -36,8 +36,7 @@ static int tangier_probe(struct platform_device *pdev)/* IOAPIC builds identity mapping between GSI and IRQ on MID */ gsi = pdata->irq;ioapic_set_alloc_attr (&info,cpu_to_node (0 ),1 ,0 ); -if (mp_set_gsi_attr (gsi,1 ,0 ,cpu_to_node (0 )) || -mp_map_gsi_to_irq (gsi,IOAPIC_MAP_ALLOC , &info) <=0 ) { +if (mp_map_gsi_to_irq (gsi,IOAPIC_MAP_ALLOC , &info) <=0 ) {dev_warn (&pdev->dev,"cannot find interrupt %d in ioapic\n" , gsi);return -EINVAL ;
arch/x86/platform/intel-mid/sfi.c +1 -4
@@ -469,10 +469,7 @@ static int __init sfi_parse_devs(struct sfi_table_header *table) }ioapic_set_alloc_attr (&info,NUMA_NO_NODE ,1 , polarity); - ret =mp_set_gsi_attr (irq,1 , polarity,NUMA_NO_NODE ); -if (ret ==0 ) - ret =mp_map_gsi_to_irq (irq,IOAPIC_MAP_ALLOC , - &info); + ret =mp_map_gsi_to_irq (irq,IOAPIC_MAP_ALLOC , &info);WARN_ON (ret <0 ); }
arch/x86/platform/sfi/sfi.c +4 -1
@@ -72,7 +72,10 @@ static int __init sfi_parse_cpus(struct sfi_table_header *table)#ifdef CONFIG_X86_IO_APIC static struct irq_domain_ops sfi_ioapic_irqdomain_ops = { - .map = mp_irqdomain_map, + .alloc = mp_irqdomain_alloc, + .free = mp_irqdomain_free, + .activate = mp_irqdomain_activate, + .deactivate = mp_irqdomain_deactivate, };static int __init sfi_parse_ioapic (struct sfi_table_header *table)
PATCH v4 10/38 x86, irq: Kill unused old IOAPIC irqdomain interfaces
In reply to Jiang LiuNow we have converted to hierarchy irqdomain, so kill unused old IOAPIC irqdomain interfaces and code.
Signed-off-by Jiang Liu <[email protected]>
Tested-by Joerg Roedel <[email protected]>
--- arch/x86/include/asm/io_apic.h | 4 - arch/x86/kernel/apic/io_apic.c | 202 +--------------------------------------- 2 files changed, 1 insertion(+), 205 deletions(-)
arch/x86/include/asm/io_apic.h +0 -4
@@ -204,9 +204,6 @@ extern int mp_register_ioapic(int id, u32 address, u32 gsi_base, struct ioapic_domain_cfg *cfg);extern int mp_unregister_ioapic (u32 gsi_base);extern int mp_ioapic_registered (u32 gsi_base); -extern int mp_irqdomain_map (struct irq_domain *domain,unsigned int virq, -irq_hw_number_t hwirq); -extern void mp_irqdomain_unmap (struct irq_domain *domain,unsigned int virq);extern int mp_irqdomain_alloc (struct irq_domain *domain,unsigned int virq,unsigned int nr_irqs,void *arg); extern void mp_irqdomain_free(struct irq_domain *domain, unsigned int virq,
@@ -218,7 +215,6 @@ extern void mp_irqdomain_deactivate(struct irq_domain *domain,extern int mp_irqdomain_ioapic_idx (struct irq_domain *domain);extern void ioapic_set_alloc_attr (struct irq_alloc_info *info,int node,int trigger,int polarity); -extern int mp_set_gsi_attr (u32 gsi,int trigger,int polarity,int node);extern void mp_save_irq (struct mpc_intsrc *m);
arch/x86/kernel/apic/io_apic.c +1 -201
245 lines not on this page · raw message
Signature · 1 line
1.7.10.4
tip-bot for Jiang Liu
merge bot[tip:x86/apic] x86, irq: Kill unused old IOAPIC irqdomain interfaces
x86, irq: Kill unused old IOAPIC irqdomain interfaces
Commit-ID: cbe4a374ef233e97b164f4efdddef5b8b0e95245 Gitweb: http://git.kernel.org/tip/cbe4a374ef233e97b164f4efdddef5b8b0e95245 Author: Jiang Liu <[email protected]> AuthorDate: Tue, 25 Nov 2014 15:49:34 +0800 Committer: Thomas Gleixner <[email protected]> CommitDate: Wed, 26 Nov 2014 23:52:47 +0100
x86, irq: Kill unused old IOAPIC irqdomain interfaces
Now we have converted to hierarchy irqdomain, so kill unused old IOAPIC irqdomain interfaces and code.
Signed-off-by Jiang Liu <[email protected]>
Cc Konrad Rzeszutek Wilk <[email protected]>
Cc Tony Luck <[email protected]>
Cc Joerg Roedel <[email protected]>
Cc Greg Kroah-Hartman <[email protected]>
Cc Bjorn Helgaas <[email protected]>
Cc Benjamin Herrenschmidt <[email protected]>
Cc Rafael J. Wysocki <[email protected]>
Cc Randy Dunlap <[email protected]>
Cc Yinghai Lu <[email protected]>
Cc Borislav Petkov <[email protected]>
Cc Grant Likely <[email protected]>
Signed-off-by Thomas Gleixner <[email protected]>
Tested-by Joerg Roedel <[email protected]>
--- arch/x86/include/asm/io_apic.h | 4 - arch/x86/kernel/apic/io_apic.c | 202 +---------------------------------------- 2 files changed, 1 insertion(+), 205 deletions(-)
arch/x86/include/asm/io_apic.h +0 -4
@@ -204,9 +204,6 @@ extern int mp_register_ioapic(int id, u32 address, u32 gsi_base, struct ioapic_domain_cfg *cfg);extern int mp_unregister_ioapic (u32 gsi_base);extern int mp_ioapic_registered (u32 gsi_base); -extern int mp_irqdomain_map (struct irq_domain *domain,unsigned int virq, -irq_hw_number_t hwirq); -extern void mp_irqdomain_unmap (struct irq_domain *domain,unsigned int virq);extern int mp_irqdomain_alloc (struct irq_domain *domain,unsigned int virq,unsigned int nr_irqs,void *arg); extern void mp_irqdomain_free(struct irq_domain *domain, unsigned int virq,
@@ -218,7 +215,6 @@ extern void mp_irqdomain_deactivate(struct irq_domain *domain,extern int mp_irqdomain_ioapic_idx (struct irq_domain *domain);extern void ioapic_set_alloc_attr (struct irq_alloc_info *info,int node,int trigger,int polarity); -extern int mp_set_gsi_attr (u32 gsi,int trigger,int polarity,int node);extern void mp_save_irq (struct mpc_intsrc *m);
arch/x86/kernel/apic/io_apic.c +1 -201
245 lines not on this page · raw message
PATCH v4 11/38 x86, irq: Kill unused struct mp_pin_info
In reply to Jiang LiuNow nobody makes use of struct mp_pin_info, so kill it.
Signed-off-by Jiang Liu <[email protected]>
Tested-by Joerg Roedel <[email protected]>
--- arch/x86/kernel/apic/io_apic.c | 30 +++--------------------------- 1 file changed, 3 insertions(+), 27 deletions(-)
arch/x86/kernel/apic/io_apic.c +3 -27
@@ -88,13 +88,6 @@ struct mp_chip_data {bool isa_irq; }; -struct mp_pin_info { -int trigger; -int polarity; -int set; -u32 count; -}; - static struct ioapic { /* * # of IRQ routing registers
@@ -110,7 +103,6 @@ static struct ioapic {struct mp_ioapic_gsi gsi_config;struct ioapic_domain_cfg irqdomain_cfg;struct irq_domain *irqdomain; -struct mp_pin_info *pin_info;struct resource *iomem_res; } ioapics[MAX_IO_APICS ];
@@ -156,11 +148,6 @@ static inline int mp_init_irq_at_boot(int ioapic, int irq)return ioapic ==0 || (irq >=0 && irq <nr_legacy_irqs ()); } -static inline struct mp_pin_info *mp_pin_info (int ioapic_idx,int pin) -{ -return ioapics[ioapic_idx].pin_info + pin; -} -static inline struct irq_domain *mp_ioapic_irqdomain (int ioapic) {return ioapics[ioapic].irqdomain;
@@ -2422,7 +2409,6 @@ out:static int mp_irqdomain_create (int ioapic) { -size_t size;struct irq_alloc_info info;struct irq_domain *parent;int hwirqs =mp_ioapic_pin_count (ioapic);
@@ -2430,11 +2416,6 @@ static int mp_irqdomain_create(int ioapic)struct ioapic_domain_cfg *cfg = &ip->irqdomain_cfg;struct mp_ioapic_gsi *gsi_cfg =mp_ioapic_gsi_routing (ioapic); - size =sizeof (struct mp_pin_info ) *mp_ioapic_pin_count (ioapic); - ip->pin_info =kzalloc (size,GFP_KERNEL ); -if (!ip->pin_info) -return -ENOMEM ; -if (cfg->type ==IOAPIC_DOMAIN_INVALID )return 0 ;
@@ -2447,13 +2428,10 @@ static int mp_irqdomain_create(int ioapic) ip->irqdomain =irq_domain_add_linear (cfg->dev, hwirqs, cfg->ops, (void *)(long )ioapic); -if (ip->irqdomain) { - ip->irqdomain->parent = parent; - }else { -kfree (ip->pin_info); - ip->pin_info =NULL ; +if (!ip->irqdomain)return -ENOMEM ; - } + + ip->irqdomain->parent = parent;if (cfg->type ==IOAPIC_DOMAIN_LEGACY || cfg->type ==IOAPIC_DOMAIN_STRICT )
@@ -2469,8 +2447,6 @@ static void ioapic_destroy_irqdomain(int idx)irq_domain_remove (ioapics[idx].irqdomain); ioapics[idx].irqdomain =NULL ; } -kfree (ioapics[idx].pin_info); - ioapics[idx].pin_info =NULL ; }void __init setup_IO_APIC (void )
Signature · 1 line
1.7.10.4
tip-bot for Jiang Liu
merge bot[tip:x86/apic] x86, irq: Kill unused struct mp_pin_info
x86, irq: Kill unused struct mp_pin_info
Commit-ID: cc133128b0ed028b580a5e44ae6f414ede18f762 Gitweb: http://git.kernel.org/tip/cc133128b0ed028b580a5e44ae6f414ede18f762 Author: Jiang Liu <[email protected]> AuthorDate: Tue, 25 Nov 2014 15:49:35 +0800 Committer: Thomas Gleixner <[email protected]> CommitDate: Wed, 26 Nov 2014 23:52:47 +0100
x86, irq: Kill unused struct mp_pin_info
Now nobody makes use of struct mp_pin_info, so kill it.
Signed-off-by Jiang Liu <[email protected]>
Cc Konrad Rzeszutek Wilk <[email protected]>
Cc Tony Luck <[email protected]>
Cc Joerg Roedel <[email protected]>
Cc Greg Kroah-Hartman <[email protected]>
Cc Bjorn Helgaas <[email protected]>
Cc Benjamin Herrenschmidt <[email protected]>
Cc Rafael J. Wysocki <[email protected]>
Cc Randy Dunlap <[email protected]>
Cc Yinghai Lu <[email protected]>
Cc Borislav Petkov <[email protected]>
Cc Grant Likely <[email protected]>
Signed-off-by Thomas Gleixner <[email protected]>
Tested-by Joerg Roedel <[email protected]>
--- arch/x86/kernel/apic/io_apic.c | 30 +++--------------------------- 1 file changed, 3 insertions(+), 27 deletions(-)
arch/x86/kernel/apic/io_apic.c +3 -27
@@ -88,13 +88,6 @@ struct mp_chip_data {bool isa_irq; }; -struct mp_pin_info { -int trigger; -int polarity; -int set; -u32 count; -}; - static struct ioapic { /* * # of IRQ routing registers
@@ -110,7 +103,6 @@ static struct ioapic {struct mp_ioapic_gsi gsi_config;struct ioapic_domain_cfg irqdomain_cfg;struct irq_domain *irqdomain; -struct mp_pin_info *pin_info;struct resource *iomem_res; } ioapics[MAX_IO_APICS ];
@@ -156,11 +148,6 @@ static inline int mp_init_irq_at_boot(int ioapic, int irq)return ioapic ==0 || (irq >=0 && irq <nr_legacy_irqs ()); } -static inline struct mp_pin_info *mp_pin_info (int ioapic_idx,int pin) -{ -return ioapics[ioapic_idx].pin_info + pin; -} -static inline struct irq_domain *mp_ioapic_irqdomain (int ioapic) {return ioapics[ioapic].irqdomain;
@@ -2422,7 +2409,6 @@ out:static int mp_irqdomain_create (int ioapic) { -size_t size;struct irq_alloc_info info;struct irq_domain *parent;int hwirqs =mp_ioapic_pin_count (ioapic);
@@ -2430,11 +2416,6 @@ static int mp_irqdomain_create(int ioapic)struct ioapic_domain_cfg *cfg = &ip->irqdomain_cfg;struct mp_ioapic_gsi *gsi_cfg =mp_ioapic_gsi_routing (ioapic); - size =sizeof (struct mp_pin_info ) *mp_ioapic_pin_count (ioapic); - ip->pin_info =kzalloc (size,GFP_KERNEL ); -if (!ip->pin_info) -return -ENOMEM ; -if (cfg->type ==IOAPIC_DOMAIN_INVALID )return 0 ;
@@ -2447,13 +2428,10 @@ static int mp_irqdomain_create(int ioapic) ip->irqdomain =irq_domain_add_linear (cfg->dev, hwirqs, cfg->ops, (void *)(long )ioapic); -if (ip->irqdomain) { - ip->irqdomain->parent = parent; - }else { -kfree (ip->pin_info); - ip->pin_info =NULL ; +if (!ip->irqdomain)return -ENOMEM ; - } + + ip->irqdomain->parent = parent;if (cfg->type ==IOAPIC_DOMAIN_LEGACY || cfg->type ==IOAPIC_DOMAIN_STRICT )
@@ -2469,8 +2447,6 @@ static void ioapic_destroy_irqdomain(int idx)irq_domain_remove (ioapics[idx].irqdomain); ioapics[idx].irqdomain =NULL ; } -kfree (ioapics[idx].pin_info); - ioapics[idx].pin_info =NULL ; }void __init setup_IO_APIC (void )
PATCH v4 12/38 x86, irq: Kill x86_io_apic_ops.print_entries and related interfaces
In reply to Jiang LiuNow there is no user of x86_io_apic_ops.print_entries anymore, so kill it.
Tested-by Joerg Roedel <[email protected]>
--- arch/x86/include/asm/io_apic.h | 3 -- arch/x86/include/asm/x86_init.h | 1 - arch/x86/kernel/apic/io_apic.c | 55 ----------------------------------- arch/x86/kernel/x86_init.c | 1 - drivers/iommu/intel_irq_remapping.c | 7 ----- 5 files changed, 67 deletions(-)
arch/x86/include/asm/io_apic.h +0 -3
@@ -225,8 +225,6 @@ extern unsigned int native_io_apic_read(unsigned int apic, unsigned int reg);extern void native_io_apic_write (unsigned int apic,unsigned int reg,unsigned int val);extern void native_io_apic_modify (unsigned int apic,unsigned int reg,unsigned int val);extern void native_disable_io_apic (void ); -extern void native_io_apic_print_entries (unsigned int apic,unsigned int nr_entries); -extern void intel_ir_io_apic_print_entries (unsigned int apic,unsigned int nr_entries);extern int native_ioapic_set_affinity (struct irq_data *,const struct cpumask *,bool );
@@ -290,7 +288,6 @@ static inline void disable_ioapic_support(void) { }#define native_io_apic_write NULL#define native_io_apic_modify NULL#define native_disable_io_apic NULL -#define native_io_apic_print_entries NULL#define native_ioapic_set_affinity NULL#define native_setup_ioapic_entry NULL#define native_eoi_ioapic_pin NULL
arch/x86/include/asm/x86_init.h +0 -1
@@ -191,7 +191,6 @@ struct x86_io_apic_ops {void (*write) (unsigned int apic,unsigned int reg,unsigned int value);void (*modify) (unsigned int apic,unsigned int reg,unsigned int value);void (*disable)(void ); -void (*print_entries)(unsigned int apic,unsigned int nr_entries);int (*set_affinity)(struct irq_data *data,const struct cpumask *mask,bool force);
arch/x86/kernel/apic/io_apic.c +0 -55
61 lines not on this page · raw message
arch/x86/kernel/x86_init.c +0 -1
@@ -144,7 +144,6 @@ struct x86_io_apic_ops x86_io_apic_ops = { .write = native_io_apic_write, .modify = native_io_apic_modify, .disable = native_disable_io_apic, - .print_entries = native_io_apic_print_entries, .set_affinity = native_ioapic_set_affinity, .setup_entry = native_setup_ioapic_entry, .eoi_ioapic_pin = native_eoi_ioapic_pin,
drivers/iommu/intel_irq_remapping.c +0 -7
@@ -681,13 +681,6 @@ static int __init intel_enable_irq_remapping(void) irq_remapping_enabled =1 ; -/* -* VT-d has a different layout for IO-APIC entries when -* interrupt remapping is enabled. So it needs a special routine -* to print IO-APIC entries for debugging purposes too. -*/ - x86_io_apic_ops.print_entries = intel_ir_io_apic_print_entries; -pr_info ("Enabled IRQ remapping in %s mode\n" , eim ?"x2apic" :"xapic" );return eim ?IRQ_REMAP_X2APIC_MODE :IRQ_REMAP_XAPIC_MODE ;
Signature · 1 line
1.7.10.4
tip-bot for Jiang Liu
merge bot[tip:x86/apic] x86, irq: Kill x86_io_apic_ops.print_entries and related interfaces
x86, irq: Kill x86_io_apic_ops.print_entries and related interfaces
Commit-ID: 49750862a592d9a02de328f6f21ed2037b12e2af Gitweb: http://git.kernel.org/tip/49750862a592d9a02de328f6f21ed2037b12e2af Author: Jiang Liu <[email protected]> AuthorDate: Tue, 25 Nov 2014 15:49:36 +0800 Committer: Thomas Gleixner <[email protected]> CommitDate: Wed, 26 Nov 2014 23:52:47 +0100
x86, irq: Kill x86_io_apic_ops.print_entries and related interfaces
Now there is no user of x86_io_apic_ops.print_entries anymore, so kill it.
Signed-off-by Jiang Liu <[email protected]>
Cc Konrad Rzeszutek Wilk <[email protected]>
Cc Tony Luck <[email protected]>
Cc Greg Kroah-Hartman <[email protected]>
Cc Bjorn Helgaas <[email protected]>
Cc Benjamin Herrenschmidt <[email protected]>
Cc Rafael J. Wysocki <[email protected]>
Cc Randy Dunlap <[email protected]>
Cc Yinghai Lu <[email protected]>
Cc Borislav Petkov <[email protected]>
Cc Joerg Roedel <[email protected]>
Cc Yijing Wang <[email protected]>
Cc Grant Likely <[email protected]>
Signed-off-by Thomas Gleixner <[email protected]>
Tested-by Joerg Roedel <[email protected]>
--- arch/x86/include/asm/io_apic.h | 3 -- arch/x86/include/asm/x86_init.h | 1 - arch/x86/kernel/apic/io_apic.c | 55 ------------------------------------- arch/x86/kernel/x86_init.c | 1 - drivers/iommu/intel_irq_remapping.c | 7 ----- 5 files changed, 67 deletions(-)
arch/x86/include/asm/io_apic.h +0 -3
@@ -225,8 +225,6 @@ extern unsigned int native_io_apic_read(unsigned int apic, unsigned int reg);extern void native_io_apic_write (unsigned int apic,unsigned int reg,unsigned int val);extern void native_io_apic_modify (unsigned int apic,unsigned int reg,unsigned int val);extern void native_disable_io_apic (void ); -extern void native_io_apic_print_entries (unsigned int apic,unsigned int nr_entries); -extern void intel_ir_io_apic_print_entries (unsigned int apic,unsigned int nr_entries);extern int native_ioapic_set_affinity (struct irq_data *,const struct cpumask *,bool );
@@ -290,7 +288,6 @@ static inline void disable_ioapic_support(void) { }#define native_io_apic_write NULL#define native_io_apic_modify NULL#define native_disable_io_apic NULL -#define native_io_apic_print_entries NULL#define native_ioapic_set_affinity NULL#define native_setup_ioapic_entry NULL#define native_eoi_ioapic_pin NULL
arch/x86/include/asm/x86_init.h +0 -1
@@ -191,7 +191,6 @@ struct x86_io_apic_ops {void (*write) (unsigned int apic,unsigned int reg,unsigned int value);void (*modify) (unsigned int apic,unsigned int reg,unsigned int value);void (*disable)(void ); -void (*print_entries)(unsigned int apic,unsigned int nr_entries);int (*set_affinity)(struct irq_data *data,const struct cpumask *mask,bool force);
arch/x86/kernel/apic/io_apic.c +0 -55
61 lines not on this page · raw message
arch/x86/kernel/x86_init.c +0 -1
@@ -144,7 +144,6 @@ struct x86_io_apic_ops x86_io_apic_ops = { .write = native_io_apic_write, .modify = native_io_apic_modify, .disable = native_disable_io_apic, - .print_entries = native_io_apic_print_entries, .set_affinity = native_ioapic_set_affinity, .setup_entry = native_setup_ioapic_entry, .eoi_ioapic_pin = native_eoi_ioapic_pin,
drivers/iommu/intel_irq_remapping.c +0 -7
@@ -681,13 +681,6 @@ static int __init intel_enable_irq_remapping(void) irq_remapping_enabled =1 ; -/* -* VT-d has a different layout for IO-APIC entries when -* interrupt remapping is enabled. So it needs a special routine -* to print IO-APIC entries for debugging purposes too. -*/ - x86_io_apic_ops.print_entries = intel_ir_io_apic_print_entries; -pr_info ("Enabled IRQ remapping in %s mode\n" , eim ?"x2apic" :"xapic" );return eim ?IRQ_REMAP_X2APIC_MODE :IRQ_REMAP_XAPIC_MODE ;
PATCH v4 13/38 x86, irq: Kill x86_io_apic_ops.setup_entry and related interfaces
In reply to Jiang LiuNow there is no user of x86_io_apic_ops.setup_entry anymore, so kill it.
Tested-by Joerg Roedel <[email protected]>
--- arch/x86/include/asm/io_apic.h | 4 ---- arch/x86/include/asm/irq_remapping.h | 13 ------------- arch/x86/include/asm/x86_init.h | 3 --- arch/x86/kernel/apic/io_apic.c | 24 ------------------------ arch/x86/kernel/x86_init.c | 1 - drivers/iommu/irq_remapping.c | 13 ------------- 6 files changed, 58 deletions(-)
arch/x86/include/asm/io_apic.h +0 -4
@@ -150,9 +150,6 @@ struct irq_cfg;extern void ioapic_insert_resources (void );extern int arch_early_ioapic_init (void ); -extern int native_setup_ioapic_entry (int ,struct IO_APIC_route_entry *, -unsigned int ,int , -struct io_apic_irq_attr *);extern void eoi_ioapic_irq (unsigned int irq,struct irq_cfg *cfg);extern void native_eoi_ioapic_pin (int apic,int pin,int vector);
@@ -289,7 +286,6 @@ static inline void disable_ioapic_support(void) { }#define native_io_apic_modify NULL#define native_disable_io_apic NULL#define native_ioapic_set_affinity NULL -#define native_setup_ioapic_entry NULL#define native_eoi_ioapic_pin NULL#endif
arch/x86/include/asm/irq_remapping.h +0 -13
@@ -44,11 +44,6 @@ extern int irq_remapping_enable(void);extern void irq_remapping_disable (void );extern int irq_remapping_reenable (int );extern int irq_remap_enable_fault_handling (void ); -extern int setup_ioapic_remapped_entry (int irq, -struct IO_APIC_route_entry *entry, -unsigned int destination, -int vector, -struct io_apic_irq_attr *attr);extern void free_remapped_irq (int irq);extern void panic_if_irq_remap (const char *msg); extern bool setup_remapped_irq(int irq,
@@ -82,14 +77,6 @@ static inline int irq_remapping_enable(void) { return -ENODEV; }static inline void irq_remapping_disable (void ) { }static inline int irq_remapping_reenable (int eim) {return -ENODEV ; }static inline int irq_remap_enable_fault_handling (void ) {return -ENODEV ; } -static inline int setup_ioapic_remapped_entry (int irq, -struct IO_APIC_route_entry *entry, -unsigned int destination, -int vector, -struct io_apic_irq_attr *attr) -{ -return -ENODEV ; -}static inline void free_remapped_irq (int irq) { }static inline void panic_if_irq_remap (const char *msg)
arch/x86/include/asm/x86_init.h +0 -3
@@ -194,9 +194,6 @@ struct x86_io_apic_ops {int (*set_affinity)(struct irq_data *data,const struct cpumask *mask,bool force); -int (*setup_entry)(int irq,struct IO_APIC_route_entry *entry, -unsigned int destination,int vector, -struct io_apic_irq_attr *attr);void (*eoi_ioapic_pin)(int apic,int pin,int vector); };
arch/x86/kernel/apic/io_apic.c +0 -24
@@ -1289,30 +1289,6 @@ static inline int IO_APIC_irq_trigger(int irq) }#endif -int native_setup_ioapic_entry (int irq,struct IO_APIC_route_entry *entry, -unsigned int destination,int vector, -struct io_apic_irq_attr *attr) -{ -memset (entry,0 ,sizeof (*entry)); - - entry->delivery_mode = apic->irq_delivery_mode; - entry->dest_mode = apic->irq_dest_mode; - entry->dest = destination; - entry->vector = vector; - entry->mask =0 ;/* enable IRQ */ - entry->trigger = attr->trigger; - entry->polarity = attr->polarity; - -/* -* Mask level triggered irqs. -* Use IRQ_DELAYED_DISABLE for edge triggered irqs. -*/ -if (attr->trigger) - entry->mask =1 ; - -return 0 ; -} -static void __init setup_IO_APIC_irqs (void ) {unsigned int ioapic, pin;
arch/x86/kernel/x86_init.c +0 -1
@@ -145,6 +145,5 @@ struct x86_io_apic_ops x86_io_apic_ops = { .modify = native_io_apic_modify, .disable = native_disable_io_apic, .set_affinity = native_ioapic_set_affinity, - .setup_entry = native_setup_ioapic_entry, .eoi_ioapic_pin = native_eoi_ioapic_pin, };
drivers/iommu/irq_remapping.c +0 -13
@@ -63,7 +63,6 @@ static void __init irq_remapping_modify_x86_ops(void) { x86_io_apic_ops.disable = irq_remapping_disable_io_apic; x86_io_apic_ops.set_affinity = set_remapped_irq_affinity; - x86_io_apic_ops.setup_entry = setup_ioapic_remapped_entry; x86_io_apic_ops.eoi_ioapic_pin = eoi_ioapic_pin_remapped; }
@@ -178,18 +177,6 @@ int __init irq_remap_enable_fault_handling(void)return remap_ops->enable_faulting (); } -int setup_ioapic_remapped_entry (int irq, -struct IO_APIC_route_entry *entry, -unsigned int destination,int vector, -struct io_apic_irq_attr *attr) -{ -if (!remap_ops || !remap_ops->setup_ioapic_entry) -return -ENODEV ; - -return remap_ops->setup_ioapic_entry (irq, entry, destination, - vector, attr); -} -static int set_remapped_irq_affinity (struct irq_data *data,const struct cpumask *mask,bool force) {
Signature · 1 line
1.7.10.4
tip-bot for Jiang Liu
merge bot[tip:x86/apic] x86, irq: Kill x86_io_apic_ops.setup_entry and related interfaces
x86, irq: Kill x86_io_apic_ops.setup_entry and related interfaces
Commit-ID: 4f767fa79edcf35dccf12eabd71bd1a796f471c7 Gitweb: http://git.kernel.org/tip/4f767fa79edcf35dccf12eabd71bd1a796f471c7 Author: Jiang Liu <[email protected]> AuthorDate: Tue, 25 Nov 2014 15:49:37 +0800 Committer: Thomas Gleixner <[email protected]> CommitDate: Wed, 26 Nov 2014 23:52:47 +0100
x86, irq: Kill x86_io_apic_ops.setup_entry and related interfaces
Now there is no user of x86_io_apic_ops.setup_entry anymore, so kill it.
Signed-off-by Jiang Liu <[email protected]>
Cc Konrad Rzeszutek Wilk <[email protected]>
Cc Tony Luck <[email protected]>
Cc Greg Kroah-Hartman <[email protected]>
Cc Bjorn Helgaas <[email protected]>
Cc Benjamin Herrenschmidt <[email protected]>
Cc Rafael J. Wysocki <[email protected]>
Cc Randy Dunlap <[email protected]>
Cc Yinghai Lu <[email protected]>
Cc Borislav Petkov <[email protected]>
Cc Joerg Roedel <[email protected]>
Cc Yijing Wang <[email protected]>
Cc Grant Likely <[email protected]>
Signed-off-by Thomas Gleixner <[email protected]>
Tested-by Joerg Roedel <[email protected]>
--- arch/x86/include/asm/io_apic.h | 4 ---- arch/x86/include/asm/irq_remapping.h | 13 ------------- arch/x86/include/asm/x86_init.h | 3 --- arch/x86/kernel/apic/io_apic.c | 24 ------------------------ arch/x86/kernel/x86_init.c | 1 - drivers/iommu/irq_remapping.c | 13 ------------- 6 files changed, 58 deletions(-)
arch/x86/include/asm/io_apic.h +0 -4
@@ -150,9 +150,6 @@ struct irq_cfg;extern void ioapic_insert_resources (void );extern int arch_early_ioapic_init (void ); -extern int native_setup_ioapic_entry (int ,struct IO_APIC_route_entry *, -unsigned int ,int , -struct io_apic_irq_attr *);extern void eoi_ioapic_irq (unsigned int irq,struct irq_cfg *cfg);extern void native_eoi_ioapic_pin (int apic,int pin,int vector);
@@ -289,7 +286,6 @@ static inline void disable_ioapic_support(void) { }#define native_io_apic_modify NULL#define native_disable_io_apic NULL#define native_ioapic_set_affinity NULL -#define native_setup_ioapic_entry NULL#define native_eoi_ioapic_pin NULL#endif
arch/x86/include/asm/irq_remapping.h +0 -13
@@ -44,11 +44,6 @@ extern int irq_remapping_enable(void);extern void irq_remapping_disable (void );extern int irq_remapping_reenable (int );extern int irq_remap_enable_fault_handling (void ); -extern int setup_ioapic_remapped_entry (int irq, -struct IO_APIC_route_entry *entry, -unsigned int destination, -int vector, -struct io_apic_irq_attr *attr);extern void free_remapped_irq (int irq);extern void panic_if_irq_remap (const char *msg); extern bool setup_remapped_irq(int irq,
@@ -82,14 +77,6 @@ static inline int irq_remapping_enable(void) { return -ENODEV; }static inline void irq_remapping_disable (void ) { }static inline int irq_remapping_reenable (int eim) {return -ENODEV ; }static inline int irq_remap_enable_fault_handling (void ) {return -ENODEV ; } -static inline int setup_ioapic_remapped_entry (int irq, -struct IO_APIC_route_entry *entry, -unsigned int destination, -int vector, -struct io_apic_irq_attr *attr) -{ -return -ENODEV ; -}static inline void free_remapped_irq (int irq) { }static inline void panic_if_irq_remap (const char *msg)
arch/x86/include/asm/x86_init.h +0 -3
@@ -194,9 +194,6 @@ struct x86_io_apic_ops {int (*set_affinity)(struct irq_data *data,const struct cpumask *mask,bool force); -int (*setup_entry)(int irq,struct IO_APIC_route_entry *entry, -unsigned int destination,int vector, -struct io_apic_irq_attr *attr);void (*eoi_ioapic_pin)(int apic,int pin,int vector); };
arch/x86/kernel/apic/io_apic.c +0 -24
@@ -1289,30 +1289,6 @@ static inline int IO_APIC_irq_trigger(int irq) }#endif -int native_setup_ioapic_entry (int irq,struct IO_APIC_route_entry *entry, -unsigned int destination,int vector, -struct io_apic_irq_attr *attr) -{ -memset (entry,0 ,sizeof (*entry)); - - entry->delivery_mode = apic->irq_delivery_mode; - entry->dest_mode = apic->irq_dest_mode; - entry->dest = destination; - entry->vector = vector; - entry->mask =0 ;/* enable IRQ */ - entry->trigger = attr->trigger; - entry->polarity = attr->polarity; - -/* -* Mask level triggered irqs. -* Use IRQ_DELAYED_DISABLE for edge triggered irqs. -*/ -if (attr->trigger) - entry->mask =1 ; - -return 0 ; -} -static void __init setup_IO_APIC_irqs (void ) {unsigned int ioapic, pin;
arch/x86/kernel/x86_init.c +0 -1
@@ -145,6 +145,5 @@ struct x86_io_apic_ops x86_io_apic_ops = { .modify = native_io_apic_modify, .disable = native_disable_io_apic, .set_affinity = native_ioapic_set_affinity, - .setup_entry = native_setup_ioapic_entry, .eoi_ioapic_pin = native_eoi_ioapic_pin, };
drivers/iommu/irq_remapping.c +0 -13
@@ -63,7 +63,6 @@ static void __init irq_remapping_modify_x86_ops(void) { x86_io_apic_ops.disable = irq_remapping_disable_io_apic; x86_io_apic_ops.set_affinity = set_remapped_irq_affinity; - x86_io_apic_ops.setup_entry = setup_ioapic_remapped_entry; x86_io_apic_ops.eoi_ioapic_pin = eoi_ioapic_pin_remapped; }
@@ -178,18 +177,6 @@ int __init irq_remap_enable_fault_handling(void)return remap_ops->enable_faulting (); } -int setup_ioapic_remapped_entry (int irq, -struct IO_APIC_route_entry *entry, -unsigned int destination,int vector, -struct io_apic_irq_attr *attr) -{ -if (!remap_ops || !remap_ops->setup_ioapic_entry) -return -ENODEV ; - -return remap_ops->setup_ioapic_entry (irq, entry, destination, - vector, attr); -} -static int set_remapped_irq_affinity (struct irq_data *data,const struct cpumask *mask,bool force) {
PATCH v4 14/38 x86, irq: Kill x86_io_apic_ops.set_affinity and related interfaces
In reply to Jiang LiuNow there is no user of x86_io_apic_ops.set_affinity anymore, so kill it.
Tested-by Joerg Roedel <[email protected]>
--- arch/x86/include/asm/io_apic.h | 4 ---- arch/x86/include/asm/x86_init.h | 3 --- arch/x86/kernel/apic/io_apic.c | 25 +------------------------ arch/x86/kernel/x86_init.c | 1 - drivers/iommu/irq_remapping.c | 16 ---------------- 5 files changed, 1 insertion(+), 48 deletions(-)
arch/x86/include/asm/io_apic.h +0 -4
@@ -222,9 +222,6 @@ extern unsigned int native_io_apic_read(unsigned int apic, unsigned int reg);extern void native_io_apic_write (unsigned int apic,unsigned int reg,unsigned int val);extern void native_io_apic_modify (unsigned int apic,unsigned int reg,unsigned int val);extern void native_disable_io_apic (void ); -extern int native_ioapic_set_affinity (struct irq_data *, -const struct cpumask *, -bool );static inline unsigned int io_apic_read (unsigned int apic,unsigned int reg) {
@@ -285,7 +282,6 @@ static inline void disable_ioapic_support(void) { }#define native_io_apic_write NULL#define native_io_apic_modify NULL#define native_disable_io_apic NULL -#define native_ioapic_set_affinity NULL#define native_eoi_ioapic_pin NULL#endif
arch/x86/include/asm/x86_init.h +0 -3
@@ -191,9 +191,6 @@ struct x86_io_apic_ops {void (*write) (unsigned int apic,unsigned int reg,unsigned int value);void (*modify) (unsigned int apic,unsigned int reg,unsigned int value);void (*disable)(void ); -int (*set_affinity)(struct irq_data *data, -const struct cpumask *mask, -bool force);void (*eoi_ioapic_pin)(int apic,int pin,int vector); };
arch/x86/kernel/apic/io_apic.c +1 -24
@@ -1777,29 +1777,6 @@ static void __target_IO_APIC_irq(unsigned int irq, unsigned int dest, struct irq } } -int native_ioapic_set_affinity (struct irq_data *data, -const struct cpumask *mask, -bool force) -{ -unsigned int dest, irq = data->irq; -unsigned long flags; -int ret; - -if (!config_enabled (CONFIG_SMP )) -return -EPERM ; - -raw_spin_lock_irqsave (&ioapic_lock, flags); - ret =apic_set_affinity (data, mask, &dest); -if (!ret) { -/* Only the high 8 bits are valid. */ - dest =SET_APIC_LOGICAL_ID (dest); -__target_IO_APIC_irq (irq, dest,irqd_cfg (data)); - ret =IRQ_SET_MASK_OK_NOCOPY ; - } -raw_spin_unlock_irqrestore (&ioapic_lock, flags); -return ret; -} -atomic_t irq_mis_count;#ifdef CONFIG_GENERIC_PENDING_IRQ
@@ -2676,7 +2653,7 @@ void __init setup_ioapic_dest(void)else mask = apic->target_cpus (); - x86_io_apic_ops.set_affinity (idata, mask, false); +irq_set_affinity (irq, mask); } }
arch/x86/kernel/x86_init.c +0 -1
@@ -144,6 +144,5 @@ struct x86_io_apic_ops x86_io_apic_ops = { .write = native_io_apic_write, .modify = native_io_apic_modify, .disable = native_disable_io_apic, - .set_affinity = native_ioapic_set_affinity, .eoi_ioapic_pin = native_eoi_ioapic_pin, };
drivers/iommu/irq_remapping.c +0 -16
@@ -26,10 +26,6 @@ int no_x2apic_optout;static struct irq_remap_ops *remap_ops; -static int set_remapped_irq_affinity (struct irq_data *data, -const struct cpumask *mask, -bool force); -static bool irq_remapped (struct irq_cfg *cfg) {return (cfg->remapped ==1 );
@@ -62,7 +58,6 @@ static void eoi_ioapic_pin_remapped(int apic, int pin, int vector)static void __init irq_remapping_modify_x86_ops (void ) { x86_io_apic_ops.disable = irq_remapping_disable_io_apic; - x86_io_apic_ops.set_affinity = set_remapped_irq_affinity; x86_io_apic_ops.eoi_ioapic_pin = eoi_ioapic_pin_remapped; }
@@ -177,16 +172,6 @@ int __init irq_remap_enable_fault_handling(void)return remap_ops->enable_faulting (); } -static int set_remapped_irq_affinity (struct irq_data *data, -const struct cpumask *mask,bool force) -{ -if (!config_enabled (CONFIG_SMP ) || !remap_ops || - !remap_ops->set_affinity) -return 0 ; - -return remap_ops->set_affinity (data, mask, force); -} -void free_remapped_irq (int irq) {struct irq_cfg *cfg =irq_cfg (irq);
@@ -238,7 +223,6 @@ void irq_remap_modify_chip_defaults(struct irq_chip *chip) chip->irq_print_chip = ir_print_prefix; chip->irq_ack = ir_ack_apic_edge; chip->irq_eoi = ir_ack_apic_level; - chip->irq_set_affinity = x86_io_apic_ops.set_affinity; }bool setup_remapped_irq (int irq,struct irq_cfg *cfg,struct irq_chip *chip)
Signature · 1 line
1.7.10.4
tip-bot for Jiang Liu
merge bot[tip:x86/apic] x86, irq: Kill x86_io_apic_ops.set_affinity and related interfaces
x86, irq: Kill x86_io_apic_ops.set_affinity and related interfaces
Commit-ID: 01133ac9d02b341443eb487deff3eb50fd4b5100 Gitweb: http://git.kernel.org/tip/01133ac9d02b341443eb487deff3eb50fd4b5100 Author: Jiang Liu <[email protected]> AuthorDate: Tue, 25 Nov 2014 15:49:38 +0800 Committer: Thomas Gleixner <[email protected]> CommitDate: Wed, 26 Nov 2014 23:52:47 +0100
x86, irq: Kill x86_io_apic_ops.set_affinity and related interfaces
Now there is no user of x86_io_apic_ops.set_affinity anymore, so kill it.
Signed-off-by Jiang Liu <[email protected]>
Cc Konrad Rzeszutek Wilk <[email protected]>
Cc Tony Luck <[email protected]>
Cc Greg Kroah-Hartman <[email protected]>
Cc Bjorn Helgaas <[email protected]>
Cc Benjamin Herrenschmidt <[email protected]>
Cc Rafael J. Wysocki <[email protected]>
Cc Randy Dunlap <[email protected]>
Cc Yinghai Lu <[email protected]>
Cc Borislav Petkov <[email protected]>
Cc Joerg Roedel <[email protected]>
Cc Yijing Wang <[email protected]>
Cc Grant Likely <[email protected]>
Signed-off-by Thomas Gleixner <[email protected]>
Tested-by Joerg Roedel <[email protected]>
--- arch/x86/include/asm/io_apic.h | 4 ---- arch/x86/include/asm/x86_init.h | 3 --- arch/x86/kernel/apic/io_apic.c | 25 +------------------------ arch/x86/kernel/x86_init.c | 1 - drivers/iommu/irq_remapping.c | 16 ---------------- 5 files changed, 1 insertion(+), 48 deletions(-)
arch/x86/include/asm/io_apic.h +0 -4
@@ -222,9 +222,6 @@ extern unsigned int native_io_apic_read(unsigned int apic, unsigned int reg);extern void native_io_apic_write (unsigned int apic,unsigned int reg,unsigned int val);extern void native_io_apic_modify (unsigned int apic,unsigned int reg,unsigned int val);extern void native_disable_io_apic (void ); -extern int native_ioapic_set_affinity (struct irq_data *, -const struct cpumask *, -bool );static inline unsigned int io_apic_read (unsigned int apic,unsigned int reg) {
@@ -285,7 +282,6 @@ static inline void disable_ioapic_support(void) { }#define native_io_apic_write NULL#define native_io_apic_modify NULL#define native_disable_io_apic NULL -#define native_ioapic_set_affinity NULL#define native_eoi_ioapic_pin NULL#endif
arch/x86/include/asm/x86_init.h +0 -3
@@ -191,9 +191,6 @@ struct x86_io_apic_ops {void (*write) (unsigned int apic,unsigned int reg,unsigned int value);void (*modify) (unsigned int apic,unsigned int reg,unsigned int value);void (*disable)(void ); -int (*set_affinity)(struct irq_data *data, -const struct cpumask *mask, -bool force);void (*eoi_ioapic_pin)(int apic,int pin,int vector); };
arch/x86/kernel/apic/io_apic.c +1 -24
@@ -1777,29 +1777,6 @@ static void __target_IO_APIC_irq(unsigned int irq, unsigned int dest, struct irq } } -int native_ioapic_set_affinity (struct irq_data *data, -const struct cpumask *mask, -bool force) -{ -unsigned int dest, irq = data->irq; -unsigned long flags; -int ret; - -if (!config_enabled (CONFIG_SMP )) -return -EPERM ; - -raw_spin_lock_irqsave (&ioapic_lock, flags); - ret =apic_set_affinity (data, mask, &dest); -if (!ret) { -/* Only the high 8 bits are valid. */ - dest =SET_APIC_LOGICAL_ID (dest); -__target_IO_APIC_irq (irq, dest,irqd_cfg (data)); - ret =IRQ_SET_MASK_OK_NOCOPY ; - } -raw_spin_unlock_irqrestore (&ioapic_lock, flags); -return ret; -} -atomic_t irq_mis_count;#ifdef CONFIG_GENERIC_PENDING_IRQ
@@ -2676,7 +2653,7 @@ void __init setup_ioapic_dest(void)else mask = apic->target_cpus (); - x86_io_apic_ops.set_affinity (idata, mask, false); +irq_set_affinity (irq, mask); } }
arch/x86/kernel/x86_init.c +0 -1
@@ -144,6 +144,5 @@ struct x86_io_apic_ops x86_io_apic_ops = { .write = native_io_apic_write, .modify = native_io_apic_modify, .disable = native_disable_io_apic, - .set_affinity = native_ioapic_set_affinity, .eoi_ioapic_pin = native_eoi_ioapic_pin, };
drivers/iommu/irq_remapping.c +0 -16
@@ -26,10 +26,6 @@ int no_x2apic_optout;static struct irq_remap_ops *remap_ops; -static int set_remapped_irq_affinity (struct irq_data *data, -const struct cpumask *mask, -bool force); -static bool irq_remapped (struct irq_cfg *cfg) {return (cfg->remapped ==1 );
@@ -62,7 +58,6 @@ static void eoi_ioapic_pin_remapped(int apic, int pin, int vector)static void __init irq_remapping_modify_x86_ops (void ) { x86_io_apic_ops.disable = irq_remapping_disable_io_apic; - x86_io_apic_ops.set_affinity = set_remapped_irq_affinity; x86_io_apic_ops.eoi_ioapic_pin = eoi_ioapic_pin_remapped; }
@@ -177,16 +172,6 @@ int __init irq_remap_enable_fault_handling(void)return remap_ops->enable_faulting (); } -static int set_remapped_irq_affinity (struct irq_data *data, -const struct cpumask *mask,bool force) -{ -if (!config_enabled (CONFIG_SMP ) || !remap_ops || - !remap_ops->set_affinity) -return 0 ; - -return remap_ops->set_affinity (data, mask, force); -} -void free_remapped_irq (int irq) {struct irq_cfg *cfg =irq_cfg (irq);
@@ -238,7 +223,6 @@ void irq_remap_modify_chip_defaults(struct irq_chip *chip) chip->irq_print_chip = ir_print_prefix; chip->irq_ack = ir_ack_apic_edge; chip->irq_eoi = ir_ack_apic_level; - chip->irq_set_affinity = x86_io_apic_ops.set_affinity; }bool setup_remapped_irq (int irq,struct irq_cfg *cfg,struct irq_chip *chip)
PATCH v4 15/38 x86, irq: Kill x86_io_apic_ops.eoi_ioapic_pin and related interfaces
In reply to Jiang LiuNow there is no user of x86_io_apic_ops.eoi_ioapic_pin anymore, so kill it.
Tested-by Joerg Roedel <[email protected]>
--- arch/x86/include/asm/io_apic.h | 7 ------- arch/x86/include/asm/x86_init.h | 1 - arch/x86/kernel/apic/io_apic.c | 20 ++++---------------- arch/x86/kernel/x86_init.c | 1 - drivers/iommu/irq_remapping.c | 19 ------------------- 5 files changed, 4 insertions(+), 44 deletions(-)
arch/x86/include/asm/io_apic.h +0 -7
@@ -150,10 +150,6 @@ struct irq_cfg;extern void ioapic_insert_resources (void );extern int arch_early_ioapic_init (void ); -extern void eoi_ioapic_irq (unsigned int irq,struct irq_cfg *cfg); - -extern void native_eoi_ioapic_pin (int apic,int pin,int vector); -extern int save_ioapic_entries (void );extern void mask_ioapic_entries (void );extern int restore_ioapic_entries (void );
@@ -237,8 +233,6 @@ static inline void io_apic_modify(unsigned int apic, unsigned int reg, unsigned x86_io_apic_ops.modify (apic, reg, value); } -extern void io_apic_eoi (unsigned int apic,unsigned int vector); -extern void setup_IO_APIC (void );extern void enable_IO_APIC (void );extern void disable_IO_APIC (void );
@@ -282,7 +276,6 @@ static inline void disable_ioapic_support(void) { }#define native_io_apic_write NULL#define native_io_apic_modify NULL#define native_disable_io_apic NULL -#define native_eoi_ioapic_pin NULL#endif #endif /* _ASM_X86_IO_APIC_H */
arch/x86/include/asm/x86_init.h +0 -1
@@ -191,7 +191,6 @@ struct x86_io_apic_ops {void (*write) (unsigned int apic,unsigned int reg,unsigned int value);void (*modify) (unsigned int apic,unsigned int reg,unsigned int value);void (*disable)(void ); -void (*eoi_ioapic_pin)(int apic,int pin,int vector); };extern struct x86_init_ops x86_init;
arch/x86/kernel/apic/io_apic.c +4 -16
@@ -268,7 +268,7 @@ static __attribute_const__ struct io_apic __iomem *io_apic_base(int idx) + (mpc_ioapic_addr (idx) & ~PAGE_MASK ); } -void io_apic_eoi (unsigned int apic,unsigned int vector) +static inline void io_apic_eoi (unsigned int apic,unsigned int vector) {struct io_apic __iomem *io_apic =io_apic_base (apic);writel (vector, &io_apic->eoi);
@@ -524,7 +524,7 @@ static void unmask_ioapic_irq(struct irq_data *data)* Otherwise, we simulate the EOI message manually by changing the trigger * mode to edge and then back to level, with RTE being masked during this. */ -void native_eoi_ioapic_pin (int apic,int pin,int vector) +static void __eoi_ioapic_pin (int apic,int pin,int vector) {if (mpc_ioapic_ver (apic) >=0x20 ) {io_apic_eoi (apic, vector);
@@ -555,19 +555,7 @@ void eoi_ioapic_pin(int vector, struct irq_cfg *cfg)raw_spin_lock_irqsave (&ioapic_lock, flags);for_each_irq_pin (entry, cfg->irq_2_pin) -native_eoi_ioapic_pin (entry->apic, entry->pin, vector); -raw_spin_unlock_irqrestore (&ioapic_lock, flags); -} - -void eoi_ioapic_irq (unsigned int irq,struct irq_cfg *cfg) -{ -struct irq_pin_list *entry; -unsigned long flags; - -raw_spin_lock_irqsave (&ioapic_lock, flags); -for_each_irq_pin (entry, cfg->irq_2_pin) - x86_io_apic_ops.eoi_ioapic_pin (entry->apic, entry->pin, - cfg->vector); +__eoi_ioapic_pin (entry->apic, entry->pin, vector);raw_spin_unlock_irqrestore (&ioapic_lock, flags); }
@@ -603,7 +591,7 @@ static void clear_IO_APIC_pin(unsigned int apic, unsigned int pin)ioapic_write_entry (apic, pin, entry); }raw_spin_lock_irqsave (&ioapic_lock, flags); -native_eoi_ioapic_pin (apic, pin, entry.vector); +__eoi_ioapic_pin (apic, pin, entry.vector);raw_spin_unlock_irqrestore (&ioapic_lock, flags); }
arch/x86/kernel/x86_init.c +0 -1
@@ -144,5 +144,4 @@ struct x86_io_apic_ops x86_io_apic_ops = { .write = native_io_apic_write, .modify = native_io_apic_modify, .disable = native_disable_io_apic, - .eoi_ioapic_pin = native_eoi_ioapic_pin, };
drivers/iommu/irq_remapping.c +0 -19
@@ -44,21 +44,9 @@ static void irq_remapping_disable_io_apic(void)disconnect_bsp_APIC (0 ); } -static void eoi_ioapic_pin_remapped (int apic,int pin,int vector) -{ -/* -* Intr-remapping uses pin number as the virtual vector -* in the RTE. Actual vector is programmed in -* intr-remapping table entry. Hence for the io-apic -* EOI we use the pin number. -*/ -io_apic_eoi (apic, pin); -} -static void __init irq_remapping_modify_x86_ops (void ) { x86_io_apic_ops.disable = irq_remapping_disable_io_apic; - x86_io_apic_ops.eoi_ioapic_pin = eoi_ioapic_pin_remapped; }static __init int setup_nointremap (char *str)
@@ -194,12 +182,6 @@ void ir_ack_apic_edge(struct irq_data *data)ack_APIC_irq (); } -static void ir_ack_apic_level (struct irq_data *data) -{ -ack_APIC_irq (); -eoi_ioapic_irq (data->irq,irqd_cfg (data)); -} -void irq_remapping_print_chip (struct irq_data *data,struct seq_file *p) {/*
@@ -222,7 +204,6 @@ void irq_remap_modify_chip_defaults(struct irq_chip *chip) { chip->irq_print_chip = ir_print_prefix; chip->irq_ack = ir_ack_apic_edge; - chip->irq_eoi = ir_ack_apic_level; }bool setup_remapped_irq (int irq,struct irq_cfg *cfg,struct irq_chip *chip)
Signature · 1 line
1.7.10.4
tip-bot for Jiang Liu
merge bot[tip:x86/apic] x86, irq: Kill x86_io_apic_ops.eoi_ioapic_pin and related interfaces
x86, irq: Kill x86_io_apic_ops.eoi_ioapic_pin and related interfaces
Commit-ID: e89d2293022b55daadbde81b9050eed532d2b7d1 Gitweb: http://git.kernel.org/tip/e89d2293022b55daadbde81b9050eed532d2b7d1 Author: Jiang Liu <[email protected]> AuthorDate: Tue, 25 Nov 2014 15:49:39 +0800 Committer: Thomas Gleixner <[email protected]> CommitDate: Wed, 26 Nov 2014 23:52:47 +0100
x86, irq: Kill x86_io_apic_ops.eoi_ioapic_pin and related interfaces
Now there is no user of x86_io_apic_ops.eoi_ioapic_pin anymore, so kill it.
Signed-off-by Jiang Liu <[email protected]>
Cc Konrad Rzeszutek Wilk <[email protected]>
Cc Tony Luck <[email protected]>
Cc Greg Kroah-Hartman <[email protected]>
Cc Bjorn Helgaas <[email protected]>
Cc Benjamin Herrenschmidt <[email protected]>
Cc Rafael J. Wysocki <[email protected]>
Cc Randy Dunlap <[email protected]>
Cc Yinghai Lu <[email protected]>
Cc Borislav Petkov <[email protected]>
Cc Joerg Roedel <[email protected]>
Cc Yijing Wang <[email protected]>
Cc Grant Likely <[email protected]>
Signed-off-by Thomas Gleixner <[email protected]>
Tested-by Joerg Roedel <[email protected]>
--- arch/x86/include/asm/io_apic.h | 7 ------- arch/x86/include/asm/x86_init.h | 1 - arch/x86/kernel/apic/io_apic.c | 20 ++++---------------- arch/x86/kernel/x86_init.c | 1 - drivers/iommu/irq_remapping.c | 19 ------------------- 5 files changed, 4 insertions(+), 44 deletions(-)
arch/x86/include/asm/io_apic.h +0 -7
@@ -150,10 +150,6 @@ struct irq_cfg;extern void ioapic_insert_resources (void );extern int arch_early_ioapic_init (void ); -extern void eoi_ioapic_irq (unsigned int irq,struct irq_cfg *cfg); - -extern void native_eoi_ioapic_pin (int apic,int pin,int vector); -extern int save_ioapic_entries (void );extern void mask_ioapic_entries (void );extern int restore_ioapic_entries (void );
@@ -237,8 +233,6 @@ static inline void io_apic_modify(unsigned int apic, unsigned int reg, unsigned x86_io_apic_ops.modify (apic, reg, value); } -extern void io_apic_eoi (unsigned int apic,unsigned int vector); -extern void setup_IO_APIC (void );extern void enable_IO_APIC (void );extern void disable_IO_APIC (void );
@@ -282,7 +276,6 @@ static inline void disable_ioapic_support(void) { }#define native_io_apic_write NULL#define native_io_apic_modify NULL#define native_disable_io_apic NULL -#define native_eoi_ioapic_pin NULL#endif #endif /* _ASM_X86_IO_APIC_H */
arch/x86/include/asm/x86_init.h +0 -1
@@ -191,7 +191,6 @@ struct x86_io_apic_ops {void (*write) (unsigned int apic,unsigned int reg,unsigned int value);void (*modify) (unsigned int apic,unsigned int reg,unsigned int value);void (*disable)(void ); -void (*eoi_ioapic_pin)(int apic,int pin,int vector); };extern struct x86_init_ops x86_init;
arch/x86/kernel/apic/io_apic.c +4 -16
@@ -268,7 +268,7 @@ static __attribute_const__ struct io_apic __iomem *io_apic_base(int idx) + (mpc_ioapic_addr (idx) & ~PAGE_MASK ); } -void io_apic_eoi (unsigned int apic,unsigned int vector) +static inline void io_apic_eoi (unsigned int apic,unsigned int vector) {struct io_apic __iomem *io_apic =io_apic_base (apic);writel (vector, &io_apic->eoi);
@@ -524,7 +524,7 @@ static void unmask_ioapic_irq(struct irq_data *data)* Otherwise, we simulate the EOI message manually by changing the trigger * mode to edge and then back to level, with RTE being masked during this. */ -void native_eoi_ioapic_pin (int apic,int pin,int vector) +static void __eoi_ioapic_pin (int apic,int pin,int vector) {if (mpc_ioapic_ver (apic) >=0x20 ) {io_apic_eoi (apic, vector);
@@ -555,19 +555,7 @@ void eoi_ioapic_pin(int vector, struct irq_cfg *cfg)raw_spin_lock_irqsave (&ioapic_lock, flags);for_each_irq_pin (entry, cfg->irq_2_pin) -native_eoi_ioapic_pin (entry->apic, entry->pin, vector); -raw_spin_unlock_irqrestore (&ioapic_lock, flags); -} - -void eoi_ioapic_irq (unsigned int irq,struct irq_cfg *cfg) -{ -struct irq_pin_list *entry; -unsigned long flags; - -raw_spin_lock_irqsave (&ioapic_lock, flags); -for_each_irq_pin (entry, cfg->irq_2_pin) - x86_io_apic_ops.eoi_ioapic_pin (entry->apic, entry->pin, - cfg->vector); +__eoi_ioapic_pin (entry->apic, entry->pin, vector);raw_spin_unlock_irqrestore (&ioapic_lock, flags); }
@@ -603,7 +591,7 @@ static void clear_IO_APIC_pin(unsigned int apic, unsigned int pin)ioapic_write_entry (apic, pin, entry); }raw_spin_lock_irqsave (&ioapic_lock, flags); -native_eoi_ioapic_pin (apic, pin, entry.vector); +__eoi_ioapic_pin (apic, pin, entry.vector);raw_spin_unlock_irqrestore (&ioapic_lock, flags); }
arch/x86/kernel/x86_init.c +0 -1
@@ -144,5 +144,4 @@ struct x86_io_apic_ops x86_io_apic_ops = { .write = native_io_apic_write, .modify = native_io_apic_modify, .disable = native_disable_io_apic, - .eoi_ioapic_pin = native_eoi_ioapic_pin, };
drivers/iommu/irq_remapping.c +0 -19
@@ -44,21 +44,9 @@ static void irq_remapping_disable_io_apic(void)disconnect_bsp_APIC (0 ); } -static void eoi_ioapic_pin_remapped (int apic,int pin,int vector) -{ -/* -* Intr-remapping uses pin number as the virtual vector -* in the RTE. Actual vector is programmed in -* intr-remapping table entry. Hence for the io-apic -* EOI we use the pin number. -*/ -io_apic_eoi (apic, pin); -} -static void __init irq_remapping_modify_x86_ops (void ) { x86_io_apic_ops.disable = irq_remapping_disable_io_apic; - x86_io_apic_ops.eoi_ioapic_pin = eoi_ioapic_pin_remapped; }static __init int setup_nointremap (char *str)
@@ -194,12 +182,6 @@ void ir_ack_apic_edge(struct irq_data *data)ack_APIC_irq (); } -static void ir_ack_apic_level (struct irq_data *data) -{ -ack_APIC_irq (); -eoi_ioapic_irq (data->irq,irqd_cfg (data)); -} -void irq_remapping_print_chip (struct irq_data *data,struct seq_file *p) {/*
@@ -222,7 +204,6 @@ void irq_remap_modify_chip_defaults(struct irq_chip *chip) { chip->irq_print_chip = ir_print_prefix; chip->irq_ack = ir_ack_apic_edge; - chip->irq_eoi = ir_ack_apic_level; }bool setup_remapped_irq (int irq,struct irq_cfg *cfg,struct irq_chip *chip)
PATCH v4 16/38 x86, irq: Kill GENERIC_IRQ_LEGACY_ALLOC_HWIRQ
In reply to Jiang LiuThere's no user of irq_alloc_hwirqs(), irq_alloc_hwirq(), irq_free_hwirqs() and irq_free_hwirq() anymore, so kill GENERIC_IRQ_LEGACY_ALLOC_HWIRQ and related code.
Signed-off-by Jiang Liu <[email protected]>
--- arch/x86/Kconfig | 1 - arch/x86/kernel/apic/vector.c | 34 ---------------------------------- 2 files changed, 35 deletions(-)
arch/x86/Kconfig +0 -1
@@ -881,7 +881,6 @@ config X86_UP_IOAPIC config X86_LOCAL_APIC def_bool y depends on X86_64 || SMP || X86_32_NON_STANDARD || X86_UP_APIC || PCI_MSI - select GENERIC_IRQ_LEGACY_ALLOC_HWIRQ select IRQ_DOMAIN_HIERARCHY select PCI_MSI_IRQ_DOMAIN if PCI_MSI
arch/x86/kernel/apic/vector.c +0 -34
@@ -660,40 +660,6 @@ void irq_force_complete_move(int irq) }#endif -/* -* Dynamic irq allocate and deallocation. Should be replaced by irq domains! -*/ -int arch_setup_hwirq (unsigned int irq,int node) -{ -struct irq_cfg *cfg; -unsigned long flags; -int ret; - - cfg =alloc_irq_cfg (node); -if (!cfg) -return -ENOMEM ; - -raw_spin_lock_irqsave (&vector_lock, flags); - ret =__assign_irq_vector (irq, cfg, apic->target_cpus ()); -raw_spin_unlock_irqrestore (&vector_lock, flags); - -if (!ret) -irq_set_chip_data (irq, cfg); -else -free_irq_cfg (cfg); -return ret; -} - -void arch_teardown_hwirq (unsigned int irq) -{ -struct irq_cfg *cfg =irq_cfg (irq); - -free_remapped_irq (irq); -clear_irq_vector (irq, cfg); -irq_set_chip_data (irq,NULL ); -free_irq_cfg (cfg); -} -static void __init print_APIC_field (int base) {int i;
Signature · 1 line
1.7.10.4
tip-bot for Jiang Liu
merge bot[tip:x86/apic] x86, irq: Kill GENERIC_IRQ_LEGACY_ALLOC_HWIRQ
x86, irq: Kill GENERIC_IRQ_LEGACY_ALLOC_HWIRQ
Commit-ID: 66cb4424740b7584d8ffe22d5c2850f7c773a840 Gitweb: http://git.kernel.org/tip/66cb4424740b7584d8ffe22d5c2850f7c773a840 Author: Jiang Liu <[email protected]> AuthorDate: Tue, 25 Nov 2014 15:49:40 +0800 Committer: Thomas Gleixner <[email protected]> CommitDate: Wed, 26 Nov 2014 23:52:47 +0100
x86, irq: Kill GENERIC_IRQ_LEGACY_ALLOC_HWIRQ
There's no user of irq_alloc_hwirqs(), irq_alloc_hwirq(), irq_free_hwirqs() and irq_free_hwirq() anymore, so kill GENERIC_IRQ_LEGACY_ALLOC_HWIRQ and related code.
Signed-off-by Jiang Liu <[email protected]>
Cc Konrad Rzeszutek Wilk <[email protected]>
Cc Tony Luck <[email protected]>
Cc Joerg Roedel <[email protected]>
Cc Greg Kroah-Hartman <[email protected]>
Cc Bjorn Helgaas <[email protected]>
Cc Benjamin Herrenschmidt <[email protected]>
Cc Rafael J. Wysocki <[email protected]>
Cc Randy Dunlap <[email protected]>
Cc Yinghai Lu <[email protected]>
Cc Borislav Petkov <[email protected]>
Signed-off-by Thomas Gleixner <[email protected]>
--- arch/x86/Kconfig | 1 - arch/x86/kernel/apic/vector.c | 34 ---------------------------------- 2 files changed, 35 deletions(-)
arch/x86/Kconfig +0 -1
@@ -881,7 +881,6 @@ config X86_UP_IOAPIC config X86_LOCAL_APIC def_bool y depends on X86_64 || SMP || X86_32_NON_STANDARD || X86_UP_APIC || PCI_MSI - select GENERIC_IRQ_LEGACY_ALLOC_HWIRQ select IRQ_DOMAIN_HIERARCHY select PCI_MSI_IRQ_DOMAIN if PCI_MSI
arch/x86/kernel/apic/vector.c +0 -34
@@ -660,40 +660,6 @@ void irq_force_complete_move(int irq) }#endif -/* -* Dynamic irq allocate and deallocation. Should be replaced by irq domains! -*/ -int arch_setup_hwirq (unsigned int irq,int node) -{ -struct irq_cfg *cfg; -unsigned long flags; -int ret; - - cfg =alloc_irq_cfg (node); -if (!cfg) -return -ENOMEM ; - -raw_spin_lock_irqsave (&vector_lock, flags); - ret =__assign_irq_vector (irq, cfg, apic->target_cpus ()); -raw_spin_unlock_irqrestore (&vector_lock, flags); - -if (!ret) -irq_set_chip_data (irq, cfg); -else -free_irq_cfg (cfg); -return ret; -} - -void arch_teardown_hwirq (unsigned int irq) -{ -struct irq_cfg *cfg =irq_cfg (irq); - -free_remapped_irq (irq); -clear_irq_vector (irq, cfg); -irq_set_chip_data (irq,NULL ); -free_irq_cfg (cfg); -} -static void __init print_APIC_field (int base) {int i;
PATCH v4 17/38 x86: Clean up unused forward declarations in x86_init.h
In reply to Jiang LiuClean up unused forward declarations in x86_init.h.
Signed-off-by Jiang Liu <[email protected]>
Tested-by Joerg Roedel <[email protected]>
--- arch/x86/include/asm/x86_init.h | 6 ------ 1 file changed, 6 deletions(-)
arch/x86/include/asm/x86_init.h +0 -6
@@ -171,7 +171,6 @@ struct x86_platform_ops { };struct pci_dev ; -struct msi_msg ;struct x86_msi_ops {int (*setup_msi_irqs)(struct pci_dev *dev,int nvec,int type);
@@ -180,11 +179,6 @@ struct x86_msi_ops {void (*restore_msi_irqs)(struct pci_dev *dev); }; -struct IO_APIC_route_entry ; -struct io_apic_irq_attr ; -struct irq_data ; -struct cpumask ; -struct x86_io_apic_ops {void (*init) (void );unsigned int (*read) (unsigned int apic,unsigned int reg);
Signature · 1 line
1.7.10.4
tip-bot for Jiang Liu
merge bot[tip:x86/apic] x86: Clean up unused forward declarations in x86_init.h
x86: Clean up unused forward declarations in x86_init.h
Commit-ID: c36733f66f522a73cfb1a74e00f25eac841da5f4 Gitweb: http://git.kernel.org/tip/c36733f66f522a73cfb1a74e00f25eac841da5f4 Author: Jiang Liu <[email protected]> AuthorDate: Tue, 25 Nov 2014 15:49:41 +0800 Committer: Thomas Gleixner <[email protected]> CommitDate: Wed, 26 Nov 2014 23:52:47 +0100
x86: Clean up unused forward declarations in x86_init.h
Clean up unused forward declarations in x86_init.h.
Signed-off-by Jiang Liu <[email protected]>
Cc Konrad Rzeszutek Wilk <[email protected]>
Cc Tony Luck <[email protected]>
Cc Joerg Roedel <[email protected]>
Cc Greg Kroah-Hartman <[email protected]>
Cc Bjorn Helgaas <[email protected]>
Cc Benjamin Herrenschmidt <[email protected]>
Cc Rafael J. Wysocki <[email protected]>
Cc Randy Dunlap <[email protected]>
Cc Yinghai Lu <[email protected]>
Cc Borislav Petkov <[email protected]>
Cc Yijing Wang <[email protected]>
Signed-off-by Thomas Gleixner <[email protected]>
Tested-by Joerg Roedel <[email protected]>
--- arch/x86/include/asm/x86_init.h | 6 ------ 1 file changed, 6 deletions(-)
arch/x86/include/asm/x86_init.h +0 -6
@@ -171,7 +171,6 @@ struct x86_platform_ops { };struct pci_dev ; -struct msi_msg ;struct x86_msi_ops {int (*setup_msi_irqs)(struct pci_dev *dev,int nvec,int type);
@@ -180,11 +179,6 @@ struct x86_msi_ops {void (*restore_msi_irqs)(struct pci_dev *dev); }; -struct IO_APIC_route_entry ; -struct io_apic_irq_attr ; -struct irq_data ; -struct cpumask ; -struct x86_io_apic_ops {void (*init) (void );unsigned int (*read) (unsigned int apic,unsigned int reg);
PATCH v4 18/38 x86: irq_remapping: Clean up unsued code
In reply to Jiang LiuNow we have converted to hierarchy irqdomain, so clean up unused code.
Tested-by Joerg Roedel <[email protected]>
--- arch/x86/include/asm/irq_remapping.h | 23 ---------------------- arch/x86/kernel/apic/vector.c | 1 - drivers/iommu/irq_remapping.c | 36 ---------------------------------- 3 files changed, 60 deletions(-)
arch/x86/include/asm/irq_remapping.h +0 -23
@@ -26,12 +26,7 @@#include <asm/hw_irq.h> #include <asm/io_apic.h> -struct IO_APIC_route_entry ; -struct io_apic_irq_attr ; -struct irq_chip ;struct msi_msg ; -struct pci_dev ; -struct irq_cfg ;struct irq_alloc_info ;#ifdef CONFIG_IRQ_REMAP
@@ -44,13 +39,7 @@ extern int irq_remapping_enable(void);extern void irq_remapping_disable (void );extern int irq_remapping_reenable (int );extern int irq_remap_enable_fault_handling (void ); -extern void free_remapped_irq (int irq);extern void panic_if_irq_remap (const char *msg); -extern bool setup_remapped_irq (int irq, -struct irq_cfg *cfg, -struct irq_chip *chip); - -void irq_remap_modify_chip_defaults (struct irq_chip *chip);extern struct irq_domain *irq_remapping_get_ir_irq_domain (struct irq_alloc_info *info);
@@ -77,23 +66,11 @@ static inline int irq_remapping_enable(void) { return -ENODEV; }static inline void irq_remapping_disable (void ) { }static inline int irq_remapping_reenable (int eim) {return -ENODEV ; }static inline int irq_remap_enable_fault_handling (void ) {return -ENODEV ; } -static inline void free_remapped_irq (int irq) { }static inline void panic_if_irq_remap (const char *msg) { } -static inline void irq_remap_modify_chip_defaults (struct irq_chip *chip) -{ -} - -static inline bool setup_remapped_irq (int irq, -struct irq_cfg *cfg, -struct irq_chip *chip) -{ -return false; -} -static inline struct irq_domain *irq_remapping_get_ir_irq_domain (struct irq_alloc_info *info) {
arch/x86/kernel/apic/vector.c +0 -1
@@ -283,7 +283,6 @@ static void x86_vector_free_irqs(struct irq_domain *domain,for (i =0 ; i < nr_irqs; i++) { irq_data =irq_domain_get_irq_data (x86_vector_domain, virq + i);if (irq_data && irq_data->chip_data) { -free_remapped_irq (virq);clear_irq_vector (virq + i, irq_data->chip_data);free_irq_cfg (irq_data->chip_data);#ifdef CONFIG_X86_IO_APIC
drivers/iommu/irq_remapping.c +0 -36
@@ -26,11 +26,6 @@ int no_x2apic_optout;static struct irq_remap_ops *remap_ops; -static bool irq_remapped (struct irq_cfg *cfg) -{ -return (cfg->remapped ==1 ); -} -static void irq_remapping_disable_io_apic (void ) {/*
@@ -160,17 +155,6 @@ int __init irq_remap_enable_fault_handling(void)return remap_ops->enable_faulting (); } -void free_remapped_irq (int irq) -{ -struct irq_cfg *cfg =irq_cfg (irq); - -if (!remap_ops || !remap_ops->free_irq) -return ; - -if (irq_remapped (cfg)) - remap_ops->free_irq (irq); -} -void panic_if_irq_remap (const char *msg) {if (irq_remapping_enabled)
@@ -195,26 +179,6 @@ void irq_remapping_print_chip(struct irq_data *data, struct seq_file *p)seq_printf (p," %s" , data->chip->name); } -static void ir_print_prefix (struct irq_data *data,struct seq_file *p) -{ -seq_printf (p," IR-%s" , data->chip->name); -} - -void irq_remap_modify_chip_defaults (struct irq_chip *chip) -{ - chip->irq_print_chip = ir_print_prefix; - chip->irq_ack = ir_ack_apic_edge; -} - -bool setup_remapped_irq (int irq,struct irq_cfg *cfg,struct irq_chip *chip) -{ -if (!irq_remapped (cfg)) -return false; -irq_set_status_flags (irq,IRQ_MOVE_PCNTXT ); -irq_remap_modify_chip_defaults (chip); -return true; -} -/** * irq_remapping_get_ir_irq_domain - Get the irqdomain associated with the IOMMU * device serving request @info
Signature · 1 line
1.7.10.4
tip-bot for Jiang Liu
merge bot[tip:x86/apic] x86: irq_remapping: Clean up unsued code
x86: irq_remapping: Clean up unsued code
Commit-ID: f505e06c6e0926999e3cdd4be496bb394ecb6dfd Gitweb: http://git.kernel.org/tip/f505e06c6e0926999e3cdd4be496bb394ecb6dfd Author: Jiang Liu <[email protected]> AuthorDate: Tue, 25 Nov 2014 15:49:42 +0800 Committer: Thomas Gleixner <[email protected]> CommitDate: Wed, 26 Nov 2014 23:52:47 +0100
x86: irq_remapping: Clean up unsued code
Now we have converted to hierarchy irqdomain, so clean up unused code.
Signed-off-by Jiang Liu <[email protected]>
Cc Konrad Rzeszutek Wilk <[email protected]>
Cc Tony Luck <[email protected]>
Cc Greg Kroah-Hartman <[email protected]>
Cc Bjorn Helgaas <[email protected]>
Cc Benjamin Herrenschmidt <[email protected]>
Cc Rafael J. Wysocki <[email protected]>
Cc Randy Dunlap <[email protected]>
Cc Yinghai Lu <[email protected]>
Cc Borislav Petkov <[email protected]>
Cc Joerg Roedel <[email protected]>
Signed-off-by Thomas Gleixner <[email protected]>
Tested-by Joerg Roedel <[email protected]>
--- arch/x86/include/asm/irq_remapping.h | 23 ----------------------- arch/x86/kernel/apic/vector.c | 1 - drivers/iommu/irq_remapping.c | 36 ------------------------------------ 3 files changed, 60 deletions(-)
arch/x86/include/asm/irq_remapping.h +0 -23
@@ -26,12 +26,7 @@#include <asm/hw_irq.h> #include <asm/io_apic.h> -struct IO_APIC_route_entry ; -struct io_apic_irq_attr ; -struct irq_chip ;struct msi_msg ; -struct pci_dev ; -struct irq_cfg ;struct irq_alloc_info ;#ifdef CONFIG_IRQ_REMAP
@@ -44,13 +39,7 @@ extern int irq_remapping_enable(void);extern void irq_remapping_disable (void );extern int irq_remapping_reenable (int );extern int irq_remap_enable_fault_handling (void ); -extern void free_remapped_irq (int irq);extern void panic_if_irq_remap (const char *msg); -extern bool setup_remapped_irq (int irq, -struct irq_cfg *cfg, -struct irq_chip *chip); - -void irq_remap_modify_chip_defaults (struct irq_chip *chip);extern struct irq_domain *irq_remapping_get_ir_irq_domain (struct irq_alloc_info *info);
@@ -77,23 +66,11 @@ static inline int irq_remapping_enable(void) { return -ENODEV; }static inline void irq_remapping_disable (void ) { }static inline int irq_remapping_reenable (int eim) {return -ENODEV ; }static inline int irq_remap_enable_fault_handling (void ) {return -ENODEV ; } -static inline void free_remapped_irq (int irq) { }static inline void panic_if_irq_remap (const char *msg) { } -static inline void irq_remap_modify_chip_defaults (struct irq_chip *chip) -{ -} - -static inline bool setup_remapped_irq (int irq, -struct irq_cfg *cfg, -struct irq_chip *chip) -{ -return false; -} -static inline struct irq_domain *irq_remapping_get_ir_irq_domain (struct irq_alloc_info *info) {
arch/x86/kernel/apic/vector.c +0 -1
@@ -283,7 +283,6 @@ static void x86_vector_free_irqs(struct irq_domain *domain,for (i =0 ; i < nr_irqs; i++) { irq_data =irq_domain_get_irq_data (x86_vector_domain, virq + i);if (irq_data && irq_data->chip_data) { -free_remapped_irq (virq);clear_irq_vector (virq + i, irq_data->chip_data);free_irq_cfg (irq_data->chip_data);#ifdef CONFIG_X86_IO_APIC
drivers/iommu/irq_remapping.c +0 -36
@@ -26,11 +26,6 @@ int no_x2apic_optout;static struct irq_remap_ops *remap_ops; -static bool irq_remapped (struct irq_cfg *cfg) -{ -return (cfg->remapped ==1 ); -} -static void irq_remapping_disable_io_apic (void ) {/*
@@ -160,17 +155,6 @@ int __init irq_remap_enable_fault_handling(void)return remap_ops->enable_faulting (); } -void free_remapped_irq (int irq) -{ -struct irq_cfg *cfg =irq_cfg (irq); - -if (!remap_ops || !remap_ops->free_irq) -return ; - -if (irq_remapped (cfg)) - remap_ops->free_irq (irq); -} -void panic_if_irq_remap (const char *msg) {if (irq_remapping_enabled)
@@ -195,26 +179,6 @@ void irq_remapping_print_chip(struct irq_data *data, struct seq_file *p)seq_printf (p," %s" , data->chip->name); } -static void ir_print_prefix (struct irq_data *data,struct seq_file *p) -{ -seq_printf (p," IR-%s" , data->chip->name); -} - -void irq_remap_modify_chip_defaults (struct irq_chip *chip) -{ - chip->irq_print_chip = ir_print_prefix; - chip->irq_ack = ir_ack_apic_edge; -} - -bool setup_remapped_irq (int irq,struct irq_cfg *cfg,struct irq_chip *chip) -{ -if (!irq_remapped (cfg)) -return false; -irq_set_status_flags (irq,IRQ_MOVE_PCNTXT ); -irq_remap_modify_chip_defaults (chip); -return true; -} -/** * irq_remapping_get_ir_irq_domain - Get the irqdomain associated with the IOMMU * device serving request @info
Bjorn Helgaas
maintainerRe: [Patch Part3 v4 18/38] x86: irq_remapping: Clean up unsued code
In reply to Jiang Lius/unsued/unused/ in subject (here and other patches).
"Clean up" is slightly ambiguous; it could mean either "make better" or "remove." "Remove unused code" would be less ambiguous.
Quoted 141 lines · Jiang Liu
Now we have converted to hierarchy irqdomain, so clean up unused code.
Tested-by Joerg Roedel <[email protected]>--- arch/x86/include/asm/irq_remapping.h | 23 ---------------------- arch/x86/kernel/apic/vector.c | 1 - drivers/iommu/irq_remapping.c | 36 ---------------------------------- 3 files changed, 60 deletions(-)arch/x86/include/asm/irq_remapping.h +0
-23@@ -26,12 +26,7 @@#include <asm/hw_irq.h> #include <asm/io_apic.h> -struct IO_APIC_route_entry ; -struct io_apic_irq_attr ; -struct irq_chip ;struct msi_msg ; -struct pci_dev ; -struct irq_cfg ;struct irq_alloc_info ;#ifdef CONFIG_IRQ_REMAP @@ -44,13 +39,7 @@ extern int irq_remapping_enable(void);extern void irq_remapping_disable (void );extern int irq_remapping_reenable (int );extern int irq_remap_enable_fault_handling (void ); -extern void free_remapped_irq (int irq);extern void panic_if_irq_remap (const char *msg); -extern bool setup_remapped_irq (int irq, -struct irq_cfg *cfg, -struct irq_chip *chip); - -void irq_remap_modify_chip_defaults (struct irq_chip *chip);extern struct irq_domain *irq_remapping_get_ir_irq_domain (struct irq_alloc_info *info);@@ -77,23 +66,11 @@ static inline int irq_remapping_enable(void) { return -ENODEV; }static inline void irq_remapping_disable (void ) { }static inline int irq_remapping_reenable (int eim) {return -ENODEV ; }static inline int irq_remap_enable_fault_handling (void ) {return -ENODEV ; } -static inline void free_remapped_irq (int irq) { }static inline void panic_if_irq_remap (const char *msg) { } -static inline void irq_remap_modify_chip_defaults (struct irq_chip *chip) -{ -} - -static inline bool setup_remapped_irq (int irq, -struct irq_cfg *cfg, -struct irq_chip *chip) -{ -return false; -} -static inline struct irq_domain *irq_remapping_get_ir_irq_domain (struct irq_alloc_info *info) {arch/x86/kernel/apic/vector.c +0
-1@@ -283,7 +283,6 @@ static void x86_vector_free_irqs(struct irq_domain *domain,for (i =0 ; i < nr_irqs; i++) { irq_data =irq_domain_get_irq_data (x86_vector_domain, virq + i);if (irq_data && irq_data->chip_data) { -free_remapped_irq (virq);clear_irq_vector (virq + i, irq_data->chip_data);free_irq_cfg (irq_data->chip_data);#ifdef CONFIG_X86_IO_APIC drivers/iommu/irq_remapping.c +0
-36@@ -26,11 +26,6 @@ int no_x2apic_optout;static struct irq_remap_ops *remap_ops; -static bool irq_remapped (struct irq_cfg *cfg) -{ -return (cfg->remapped ==1 ); -} -static void irq_remapping_disable_io_apic (void ) {/* @@ -160,17 +155,6 @@ int __init irq_remap_enable_fault_handling(void)return remap_ops->enable_faulting (); } -void free_remapped_irq (int irq) -{ -struct irq_cfg *cfg =irq_cfg (irq); - -if (!remap_ops || !remap_ops->free_irq) -return ; - -if (irq_remapped (cfg)) - remap_ops->free_irq (irq); -} -void panic_if_irq_remap (const char *msg) {if (irq_remapping_enabled)@@ -195,26 +179,6 @@ void irq_remapping_print_chip(struct irq_data *data, struct seq_file *p)seq_printf (p," %s" , data->chip->name); } -static void ir_print_prefix (struct irq_data *data,struct seq_file *p) -{ -seq_printf (p," IR-%s" , data->chip->name); -} - -void irq_remap_modify_chip_defaults (struct irq_chip *chip) -{ - chip->irq_print_chip = ir_print_prefix; - chip->irq_ack = ir_ack_apic_edge; -} - -bool setup_remapped_irq (int irq,struct irq_cfg *cfg,struct irq_chip *chip) -{ -if (!irq_remapped (cfg)) -return false; -irq_set_status_flags (irq,IRQ_MOVE_PCNTXT ); -irq_remap_modify_chip_defaults (chip); -return true; -} -/** * irq_remapping_get_ir_irq_domain - Get the irqdomain associated with the IOMMU * device serving request @info Signature · 1 line
1.7.10.4
PATCH v4 19/38 iommu/vt-d: Clean up unsued code
In reply to Jiang LiuNow we have converted to hierarchy irqdomain, so clean up unused code.
Tested-by Joerg Roedel <[email protected]>
--- drivers/iommu/intel_irq_remapping.c | 187 +---------------------------------- 1 file changed, 1 insertion(+), 186 deletions(-)
drivers/iommu/intel_irq_remapping.c +1 -186
@@ -62,35 +62,6 @@ static struct irq_domain_ops intel_ir_domain_ops;static int __init parse_ioapics_under_ir (void ); -static struct irq_2_iommu *irq_2_iommu (unsigned int irq) -{ -struct irq_cfg *cfg =irq_cfg (irq); -return cfg ? &cfg->irq_2_iommu :NULL ; -} - -static int get_irte (int irq,struct irte *entry) -{ -struct irq_2_iommu *irq_iommu =irq_2_iommu (irq); -unsigned long flags; -int index; - -if (!entry || !irq_iommu) -return -1 ; - -raw_spin_lock_irqsave (&irq_2_ir_lock, flags); - -if (unlikely (!irq_iommu->iommu)) { -raw_spin_unlock_irqrestore (&irq_2_ir_lock, flags); -return -1 ; - } - - index = irq_iommu->irte_index + irq_iommu->sub_handle; - *entry = *(irq_iommu->iommu->ir_table->base + index); - -raw_spin_unlock_irqrestore (&irq_2_ir_lock, flags); -return 0 ; -} -static int alloc_irte (struct intel_iommu *iommu,int irq,struct irq_2_iommu *irq_iommu,u16 count) {
@@ -228,29 +199,6 @@ static int clear_entries(struct irq_2_iommu *irq_iommu)return qi_flush_iec (iommu, index, irq_iommu->irte_mask); } -static int free_irte (int irq) -{ -struct irq_2_iommu *irq_iommu =irq_2_iommu (irq); -unsigned long flags; -int rc; - -if (!irq_iommu || irq_iommu->iommu ==NULL ) -return -1 ; - -raw_spin_lock_irqsave (&irq_2_ir_lock, flags); - - rc =clear_entries (irq_iommu); - - irq_iommu->iommu =NULL ; - irq_iommu->irte_index =0 ; - irq_iommu->sub_handle =0 ; - irq_iommu->irte_mask =0 ; - -raw_spin_unlock_irqrestore (&irq_2_ir_lock, flags); - -return rc; -} -/* * source validation type */
@@ -925,8 +873,7 @@ error:return -1 ; } -static void prepare_irte (struct irte *irte,int vector, -unsigned int dest) +static void prepare_irte (struct irte *irte,int vector,unsigned int dest) {memset (irte,0 ,sizeof (*irte));
@@ -946,135 +893,6 @@ static void prepare_irte(struct irte *irte, int vector, irte->redir_hint =1 ; } -static int intel_setup_ioapic_entry (int irq, -struct IO_APIC_route_entry *route_entry, -unsigned int destination,int vector, -struct io_apic_irq_attr *attr) -{ -int ioapic_id =mpc_ioapic_id (attr->ioapic); -struct intel_iommu *iommu; -struct IR_IO_APIC_route_entry *entry; -struct irte irte; -int index; - -down_read (&dmar_global_lock); - iommu =map_ioapic_to_ir (ioapic_id); -if (!iommu) { -pr_warn ("No mapping iommu for ioapic %d\n" , ioapic_id); - index = -ENODEV ; - }else { - index =alloc_irte (iommu, irq,irq_2_iommu (irq),1 ); -if (index <0 ) { -pr_warn ("Failed to allocate IRTE for ioapic %d\n" , - ioapic_id); - index = -ENOMEM ; - } - } -up_read (&dmar_global_lock); -if (index <0 ) -return index; - -prepare_irte (&irte, vector, destination); - -/* Set source-id of interrupt request */ -set_ioapic_sid (&irte, ioapic_id); - -modify_irte (irq_2_iommu (irq), &irte); - -apic_printk (APIC_VERBOSE ,KERN_DEBUG "IOAPIC[%d]: " -"Set IRTE entry (P:%d FPD:%d Dst_Mode:%d " -"Redir_hint:%d Trig_Mode:%d Dlvry_Mode:%X " -"Avail:%X Vector:%02X Dest:%08X " -"SID:%04X SQ:%X SVT:%X)\n" , - attr->ioapic, irte.present, irte.fpd, irte.dst_mode, - irte.redir_hint, irte.trigger_mode, irte.dlvry_mode, - irte.avail, irte.vector, irte.dest_id, - irte.sid, irte.sq, irte.svt); - - entry = (struct IR_IO_APIC_route_entry *)route_entry; -memset (entry,0 ,sizeof (*entry)); - - entry->index2 = (index >>15 ) &0x1 ; - entry->zero =0 ; - entry->format =1 ; - entry->index = (index &0x7fff ); -/* -* IO-APIC RTE will be configured with virtual vector. -* irq handler will do the explicit EOI to the io-apic. -*/ - entry->vector = attr->ioapic_pin; - entry->mask =0 ;/* enable IRQ */ - entry->trigger = attr->trigger; - entry->polarity = attr->polarity; - -/* Mask level triggered irqs. -* Use IRQ_DELAYED_DISABLE for edge triggered irqs. -*/ -if (attr->trigger) - entry->mask =1 ; - -return 0 ; -} - -/* -* Migrate the IO-APIC irq in the presence of intr-remapping. -* -* For both level and edge triggered, irq migration is a simple atomic -* update(of vector and cpu destination) of IRTE and flush the hardware cache. -* -* For level triggered, we eliminate the io-apic RTE modification (with the -* updated vector information), by using a virtual vector (io-apic pin number). -* Real vector that is used for interrupting cpu will be coming from -* the interrupt-remapping table entry. -* -* As the migration is a simple atomic update of IRTE, the same mechanism -* is used to migrate MSI irq's in the presence of interrupt-remapping. -*/ -static int -intel_ioapic_set_affinity (struct irq_data *data,const struct cpumask *mask, -bool force) -{ -struct irq_cfg *cfg =irqd_cfg (data); -unsigned int dest, irq = data->irq; -struct irte irte; -int err; - -if (get_irte (irq, &irte)) -return -EBUSY ; - - err =assign_irq_vector (irq, cfg, mask); -if (err) -return err; - - err = apic->cpu_mask_to_apicid_and (cfg->domain, mask, &dest); -if (err) { -if (assign_irq_vector (irq, cfg, data->affinity)) -pr_err ("Failed to recover vector for irq %d\n" , irq); -return err; - } - - irte.vector = cfg->vector; - irte.dest_id =IRTE_DEST (dest); - -/* -* Atomically updates the IRTE with the new destination, vector -* and flushes the interrupt entry cache. -*/ -modify_irte (irq_2_iommu (irq), &irte); - -/* -* After this point, all the interrupts will start arriving -* at the new destination. So, time to cleanup the previous -* vector allocation. -*/ -if (cfg->move_in_progress) -send_cleanup_vector (cfg); - -cpumask_copy (data->affinity, mask); - -return 0 ; -} -static struct irq_domain *intel_get_ir_irq_domain (struct irq_alloc_info *info) {struct intel_iommu *iommu =NULL ;
@@ -1129,9 +947,6 @@ struct irq_remap_ops intel_irq_remap_ops = { .disable = disable_irq_remapping, .reenable = reenable_irq_remapping, .enable_faulting = enable_drhd_fault_handling, - .setup_ioapic_entry = intel_setup_ioapic_entry, - .set_affinity = intel_ioapic_set_affinity, - .free_irq = free_irte, .get_ir_irq_domain = intel_get_ir_irq_domain, .get_irq_domain = intel_get_irq_domain, };
Signature · 1 line
1.7.10.4
tip-bot for Jiang Liu
merge bot[tip:x86/apic] iommu/vt-d: Clean up unsued code
iommu/vt-d: Clean up unsued code
Commit-ID: eda28e7c9786bf35dbd94cf820f60f82b1c574ec Gitweb: http://git.kernel.org/tip/eda28e7c9786bf35dbd94cf820f60f82b1c574ec Author: Jiang Liu <[email protected]> AuthorDate: Tue, 25 Nov 2014 15:49:43 +0800 Committer: Thomas Gleixner <[email protected]> CommitDate: Wed, 26 Nov 2014 23:52:48 +0100
iommu/vt-d: Clean up unsued code
Now we have converted to hierarchy irqdomain, so clean up unused code.
Signed-off-by Jiang Liu <[email protected]>
Cc Konrad Rzeszutek Wilk <[email protected]>
Cc Tony Luck <[email protected]>
Cc Greg Kroah-Hartman <[email protected]>
Cc Bjorn Helgaas <[email protected]>
Cc Benjamin Herrenschmidt <[email protected]>
Cc Rafael J. Wysocki <[email protected]>
Cc Randy Dunlap <[email protected]>
Cc Yinghai Lu <[email protected]>
Cc Borislav Petkov <[email protected]>
Cc Joerg Roedel <[email protected]>
Signed-off-by Thomas Gleixner <[email protected]>
Tested-by Joerg Roedel <[email protected]>
--- drivers/iommu/intel_irq_remapping.c | 187 +----------------------------------- 1 file changed, 1 insertion(+), 186 deletions(-)
drivers/iommu/intel_irq_remapping.c +1 -186
@@ -62,35 +62,6 @@ static struct irq_domain_ops intel_ir_domain_ops;static int __init parse_ioapics_under_ir (void ); -static struct irq_2_iommu *irq_2_iommu (unsigned int irq) -{ -struct irq_cfg *cfg =irq_cfg (irq); -return cfg ? &cfg->irq_2_iommu :NULL ; -} - -static int get_irte (int irq,struct irte *entry) -{ -struct irq_2_iommu *irq_iommu =irq_2_iommu (irq); -unsigned long flags; -int index; - -if (!entry || !irq_iommu) -return -1 ; - -raw_spin_lock_irqsave (&irq_2_ir_lock, flags); - -if (unlikely (!irq_iommu->iommu)) { -raw_spin_unlock_irqrestore (&irq_2_ir_lock, flags); -return -1 ; - } - - index = irq_iommu->irte_index + irq_iommu->sub_handle; - *entry = *(irq_iommu->iommu->ir_table->base + index); - -raw_spin_unlock_irqrestore (&irq_2_ir_lock, flags); -return 0 ; -} -static int alloc_irte (struct intel_iommu *iommu,int irq,struct irq_2_iommu *irq_iommu,u16 count) {
@@ -228,29 +199,6 @@ static int clear_entries(struct irq_2_iommu *irq_iommu)return qi_flush_iec (iommu, index, irq_iommu->irte_mask); } -static int free_irte (int irq) -{ -struct irq_2_iommu *irq_iommu =irq_2_iommu (irq); -unsigned long flags; -int rc; - -if (!irq_iommu || irq_iommu->iommu ==NULL ) -return -1 ; - -raw_spin_lock_irqsave (&irq_2_ir_lock, flags); - - rc =clear_entries (irq_iommu); - - irq_iommu->iommu =NULL ; - irq_iommu->irte_index =0 ; - irq_iommu->sub_handle =0 ; - irq_iommu->irte_mask =0 ; - -raw_spin_unlock_irqrestore (&irq_2_ir_lock, flags); - -return rc; -} -/* * source validation type */
@@ -925,8 +873,7 @@ error:return -1 ; } -static void prepare_irte (struct irte *irte,int vector, -unsigned int dest) +static void prepare_irte (struct irte *irte,int vector,unsigned int dest) {memset (irte,0 ,sizeof (*irte));
@@ -946,135 +893,6 @@ static void prepare_irte(struct irte *irte, int vector, irte->redir_hint =1 ; } -static int intel_setup_ioapic_entry (int irq, -struct IO_APIC_route_entry *route_entry, -unsigned int destination,int vector, -struct io_apic_irq_attr *attr) -{ -int ioapic_id =mpc_ioapic_id (attr->ioapic); -struct intel_iommu *iommu; -struct IR_IO_APIC_route_entry *entry; -struct irte irte; -int index; - -down_read (&dmar_global_lock); - iommu =map_ioapic_to_ir (ioapic_id); -if (!iommu) { -pr_warn ("No mapping iommu for ioapic %d\n" , ioapic_id); - index = -ENODEV ; - }else { - index =alloc_irte (iommu, irq,irq_2_iommu (irq),1 ); -if (index <0 ) { -pr_warn ("Failed to allocate IRTE for ioapic %d\n" , - ioapic_id); - index = -ENOMEM ; - } - } -up_read (&dmar_global_lock); -if (index <0 ) -return index; - -prepare_irte (&irte, vector, destination); - -/* Set source-id of interrupt request */ -set_ioapic_sid (&irte, ioapic_id); - -modify_irte (irq_2_iommu (irq), &irte); - -apic_printk (APIC_VERBOSE ,KERN_DEBUG "IOAPIC[%d]: " -"Set IRTE entry (P:%d FPD:%d Dst_Mode:%d " -"Redir_hint:%d Trig_Mode:%d Dlvry_Mode:%X " -"Avail:%X Vector:%02X Dest:%08X " -"SID:%04X SQ:%X SVT:%X)\n" , - attr->ioapic, irte.present, irte.fpd, irte.dst_mode, - irte.redir_hint, irte.trigger_mode, irte.dlvry_mode, - irte.avail, irte.vector, irte.dest_id, - irte.sid, irte.sq, irte.svt); - - entry = (struct IR_IO_APIC_route_entry *)route_entry; -memset (entry,0 ,sizeof (*entry)); - - entry->index2 = (index >>15 ) &0x1 ; - entry->zero =0 ; - entry->format =1 ; - entry->index = (index &0x7fff ); -/* -* IO-APIC RTE will be configured with virtual vector. -* irq handler will do the explicit EOI to the io-apic. -*/ - entry->vector = attr->ioapic_pin; - entry->mask =0 ;/* enable IRQ */ - entry->trigger = attr->trigger; - entry->polarity = attr->polarity; - -/* Mask level triggered irqs. -* Use IRQ_DELAYED_DISABLE for edge triggered irqs. -*/ -if (attr->trigger) - entry->mask =1 ; - -return 0 ; -} - -/* -* Migrate the IO-APIC irq in the presence of intr-remapping. -* -* For both level and edge triggered, irq migration is a simple atomic -* update(of vector and cpu destination) of IRTE and flush the hardware cache. -* -* For level triggered, we eliminate the io-apic RTE modification (with the -* updated vector information), by using a virtual vector (io-apic pin number). -* Real vector that is used for interrupting cpu will be coming from -* the interrupt-remapping table entry. -* -* As the migration is a simple atomic update of IRTE, the same mechanism -* is used to migrate MSI irq's in the presence of interrupt-remapping. -*/ -static int -intel_ioapic_set_affinity (struct irq_data *data,const struct cpumask *mask, -bool force) -{ -struct irq_cfg *cfg =irqd_cfg (data); -unsigned int dest, irq = data->irq; -struct irte irte; -int err; - -if (get_irte (irq, &irte)) -return -EBUSY ; - - err =assign_irq_vector (irq, cfg, mask); -if (err) -return err; - - err = apic->cpu_mask_to_apicid_and (cfg->domain, mask, &dest); -if (err) { -if (assign_irq_vector (irq, cfg, data->affinity)) -pr_err ("Failed to recover vector for irq %d\n" , irq); -return err; - } - - irte.vector = cfg->vector; - irte.dest_id =IRTE_DEST (dest); - -/* -* Atomically updates the IRTE with the new destination, vector -* and flushes the interrupt entry cache. -*/ -modify_irte (irq_2_iommu (irq), &irte); - -/* -* After this point, all the interrupts will start arriving -* at the new destination. So, time to cleanup the previous -* vector allocation. -*/ -if (cfg->move_in_progress) -send_cleanup_vector (cfg); - -cpumask_copy (data->affinity, mask); - -return 0 ; -} -static struct irq_domain *intel_get_ir_irq_domain (struct irq_alloc_info *info) {struct intel_iommu *iommu =NULL ;
@@ -1129,9 +947,6 @@ struct irq_remap_ops intel_irq_remap_ops = { .disable = disable_irq_remapping, .reenable = reenable_irq_remapping, .enable_faulting = enable_drhd_fault_handling, - .setup_ioapic_entry = intel_setup_ioapic_entry, - .set_affinity = intel_ioapic_set_affinity, - .free_irq = free_irte, .get_ir_irq_domain = intel_get_ir_irq_domain, .get_irq_domain = intel_get_irq_domain, };
PATCH v4 20/38 iommu/amd: Clean up unsued code
In reply to Jiang LiuNow we have converted to hierarchy irqdomain, so clean up unused code.
Tested-by Joerg Roedel <[email protected]>
--- drivers/iommu/amd_iommu.c | 144 --------------------------------------------- 1 file changed, 144 deletions(-)
drivers/iommu/amd_iommu.c +0 -144
@@ -3996,22 +3996,6 @@ out:return index; } -static int get_irte (u16 devid,int index,union irte *irte) -{ -struct irq_remap_table *table; -unsigned long flags; - - table =get_irq_table (devid, false); -if (!table) -return -ENOMEM ; - -spin_lock_irqsave (&table->lock, flags); - irte->val = table->table[index]; -spin_unlock_irqrestore (&table->lock, flags); - -return 0 ; -} -static int modify_irte (u16 devid,int index,union irte irte) {struct irq_remap_table *table;
@@ -4058,131 +4042,6 @@ static void free_irte(u16 devid, int index)iommu_completion_wait (iommu); } -static int setup_ioapic_entry (int irq,struct IO_APIC_route_entry *entry, -unsigned int destination,int vector, -struct io_apic_irq_attr *attr) -{ -struct irq_remap_table *table; -struct irq_2_irte *irte_info; -struct irq_cfg *cfg; -union irte irte; -int ioapic_id; -int index; -int devid; -int ret; - - cfg =irq_cfg (irq); -if (!cfg) -return -EINVAL ; - - irte_info = &cfg->irq_2_irte; - ioapic_id =mpc_ioapic_id (attr->ioapic); - devid =get_ioapic_devid (ioapic_id); - -if (devid <0 ) -return devid; - - table =get_irq_table (devid, true); -if (table ==NULL ) -return -ENOMEM ; - - index = attr->ioapic_pin; - -/* Setup IRQ remapping info */ - cfg->remapped =1 ; - irte_info->devid = devid; - irte_info->index = index; - -/* Setup IRTE for IOMMU */ - irte.val =0 ; - irte.fields.vector = vector; - irte.fields.int_type = apic->irq_delivery_mode; - irte.fields.destination = destination; - irte.fields.dm = apic->irq_dest_mode; - irte.fields.valid =1 ; - - ret =modify_irte (devid, index, irte); -if (ret) -return ret; - -/* Setup IOAPIC entry */ -memset (entry,0 ,sizeof (*entry)); - - entry->vector = index; - entry->mask =0 ; - entry->trigger = attr->trigger; - entry->polarity = attr->polarity; - -/* -* Mask level triggered irqs. -*/ -if (attr->trigger) - entry->mask =1 ; - -return 0 ; -} - -static int set_affinity (struct irq_data *data,const struct cpumask *mask, -bool force) -{ -struct irq_2_irte *irte_info; -unsigned int dest, irq; -struct irq_cfg *cfg; -union irte irte; -int err; - -if (!config_enabled (CONFIG_SMP )) -return -1 ; - - cfg =irqd_cfg (data); - irq = data->irq; - irte_info = &cfg->irq_2_irte; - -if (!cpumask_intersects (mask, cpu_online_mask)) -return -EINVAL ; - -if (get_irte (irte_info->devid, irte_info->index, &irte)) -return -EBUSY ; - -if (assign_irq_vector (irq, cfg, mask)) -return -EBUSY ; - - err = apic->cpu_mask_to_apicid_and (cfg->domain, mask, &dest); -if (err) { -if (assign_irq_vector (irq, cfg, data->affinity)) -pr_err ("AMD-Vi: Failed to recover vector for irq %d\n" , irq); -return err; - } - - irte.fields.vector = cfg->vector; - irte.fields.destination = dest; - -modify_irte (irte_info->devid, irte_info->index, irte); - -if (cfg->move_in_progress) -send_cleanup_vector (cfg); - -cpumask_copy (data->affinity, mask); - -return 0 ; -} - -static int free_irq (int irq) -{ -struct irq_2_irte *irte_info; -struct irq_cfg *cfg; - - cfg =irq_cfg (irq); -if (!cfg) -return -EINVAL ; - - irte_info = &cfg->irq_2_irte; - -free_irte (irte_info->devid, irte_info->index); - -return 0 ; -} -static int get_devid (struct irq_alloc_info *info) {int devid =-1 ;
@@ -4256,9 +4115,6 @@ struct irq_remap_ops amd_iommu_irq_ops = { .disable = amd_iommu_disable, .reenable = amd_iommu_reenable, .enable_faulting = amd_iommu_enable_faulting, - .setup_ioapic_entry = setup_ioapic_entry, - .set_affinity = set_affinity, - .free_irq = free_irq, .get_ir_irq_domain = get_ir_irq_domain, .get_irq_domain = get_irq_domain, };
Signature · 1 line
1.7.10.4
tip-bot for Jiang Liu
merge bot[tip:x86/apic] iommu/amd: Clean up unsued code
iommu/amd: Clean up unsued code
Commit-ID: 7aad9b7c36feee80ddf83e049057258a5cf4402c Gitweb: http://git.kernel.org/tip/7aad9b7c36feee80ddf83e049057258a5cf4402c Author: Jiang Liu <[email protected]> AuthorDate: Tue, 25 Nov 2014 15:49:44 +0800 Committer: Thomas Gleixner <[email protected]> CommitDate: Wed, 26 Nov 2014 23:52:48 +0100
iommu/amd: Clean up unsued code
Now we have converted to hierarchy irqdomain, so clean up unused code.
Signed-off-by Jiang Liu <[email protected]>
Cc Konrad Rzeszutek Wilk <[email protected]>
Cc Tony Luck <[email protected]>
Cc Greg Kroah-Hartman <[email protected]>
Cc Bjorn Helgaas <[email protected]>
Cc Benjamin Herrenschmidt <[email protected]>
Cc Rafael J. Wysocki <[email protected]>
Cc Randy Dunlap <[email protected]>
Cc Yinghai Lu <[email protected]>
Cc Borislav Petkov <[email protected]>
Cc Joerg Roedel <[email protected]>
Signed-off-by Thomas Gleixner <[email protected]>
Tested-by Joerg Roedel <[email protected]>
--- drivers/iommu/amd_iommu.c | 144 ---------------------------------------------- 1 file changed, 144 deletions(-)
drivers/iommu/amd_iommu.c +0 -144
@@ -3996,22 +3996,6 @@ out:return index; } -static int get_irte (u16 devid,int index,union irte *irte) -{ -struct irq_remap_table *table; -unsigned long flags; - - table =get_irq_table (devid, false); -if (!table) -return -ENOMEM ; - -spin_lock_irqsave (&table->lock, flags); - irte->val = table->table[index]; -spin_unlock_irqrestore (&table->lock, flags); - -return 0 ; -} -static int modify_irte (u16 devid,int index,union irte irte) {struct irq_remap_table *table;
@@ -4058,131 +4042,6 @@ static void free_irte(u16 devid, int index)iommu_completion_wait (iommu); } -static int setup_ioapic_entry (int irq,struct IO_APIC_route_entry *entry, -unsigned int destination,int vector, -struct io_apic_irq_attr *attr) -{ -struct irq_remap_table *table; -struct irq_2_irte *irte_info; -struct irq_cfg *cfg; -union irte irte; -int ioapic_id; -int index; -int devid; -int ret; - - cfg =irq_cfg (irq); -if (!cfg) -return -EINVAL ; - - irte_info = &cfg->irq_2_irte; - ioapic_id =mpc_ioapic_id (attr->ioapic); - devid =get_ioapic_devid (ioapic_id); - -if (devid <0 ) -return devid; - - table =get_irq_table (devid, true); -if (table ==NULL ) -return -ENOMEM ; - - index = attr->ioapic_pin; - -/* Setup IRQ remapping info */ - cfg->remapped =1 ; - irte_info->devid = devid; - irte_info->index = index; - -/* Setup IRTE for IOMMU */ - irte.val =0 ; - irte.fields.vector = vector; - irte.fields.int_type = apic->irq_delivery_mode; - irte.fields.destination = destination; - irte.fields.dm = apic->irq_dest_mode; - irte.fields.valid =1 ; - - ret =modify_irte (devid, index, irte); -if (ret) -return ret; - -/* Setup IOAPIC entry */ -memset (entry,0 ,sizeof (*entry)); - - entry->vector = index; - entry->mask =0 ; - entry->trigger = attr->trigger; - entry->polarity = attr->polarity; - -/* -* Mask level triggered irqs. -*/ -if (attr->trigger) - entry->mask =1 ; - -return 0 ; -} - -static int set_affinity (struct irq_data *data,const struct cpumask *mask, -bool force) -{ -struct irq_2_irte *irte_info; -unsigned int dest, irq; -struct irq_cfg *cfg; -union irte irte; -int err; - -if (!config_enabled (CONFIG_SMP )) -return -1 ; - - cfg =irqd_cfg (data); - irq = data->irq; - irte_info = &cfg->irq_2_irte; - -if (!cpumask_intersects (mask, cpu_online_mask)) -return -EINVAL ; - -if (get_irte (irte_info->devid, irte_info->index, &irte)) -return -EBUSY ; - -if (assign_irq_vector (irq, cfg, mask)) -return -EBUSY ; - - err = apic->cpu_mask_to_apicid_and (cfg->domain, mask, &dest); -if (err) { -if (assign_irq_vector (irq, cfg, data->affinity)) -pr_err ("AMD-Vi: Failed to recover vector for irq %d\n" , irq); -return err; - } - - irte.fields.vector = cfg->vector; - irte.fields.destination = dest; - -modify_irte (irte_info->devid, irte_info->index, irte); - -if (cfg->move_in_progress) -send_cleanup_vector (cfg); - -cpumask_copy (data->affinity, mask); - -return 0 ; -} - -static int free_irq (int irq) -{ -struct irq_2_irte *irte_info; -struct irq_cfg *cfg; - - cfg =irq_cfg (irq); -if (!cfg) -return -EINVAL ; - - irte_info = &cfg->irq_2_irte; - -free_irte (irte_info->devid, irte_info->index); - -return 0 ; -} -static int get_devid (struct irq_alloc_info *info) {int devid =-1 ;
@@ -4256,9 +4115,6 @@ struct irq_remap_ops amd_iommu_irq_ops = { .disable = amd_iommu_disable, .reenable = amd_iommu_reenable, .enable_faulting = amd_iommu_enable_faulting, - .setup_ioapic_entry = setup_ioapic_entry, - .set_affinity = set_affinity, - .free_irq = free_irq, .get_ir_irq_domain = get_ir_irq_domain, .get_irq_domain = get_irq_domain, };
PATCH v4 21/38 x86: irq_remapping: Clean up unused interfaces
In reply to Jiang LiuNow we have converted to hierarchy irqdomain, so clean up unused interfaces.
Tested-by Joerg Roedel <[email protected]>
--- drivers/iommu/irq_remapping.h | 16 ---------------- 1 file changed, 16 deletions(-)
drivers/iommu/irq_remapping.h +0 -16
@@ -24,11 +24,7 @@#ifdef CONFIG_IRQ_REMAP -struct IO_APIC_route_entry ; -struct io_apic_irq_attr ;struct irq_data ; -struct cpumask ; -struct pci_dev ;struct msi_msg ;struct irq_domain ;struct irq_alloc_info ;
@@ -58,18 +54,6 @@ struct irq_remap_ops {/* Enable fault handling */ int (*enable_faulting)(void ); -/* IO-APIC setup routine */ -int (*setup_ioapic_entry)(int irq,struct IO_APIC_route_entry *, -unsigned int ,int , -struct io_apic_irq_attr *); - -/* Set the CPU affinity of a remapped interrupt */ -int (*set_affinity)(struct irq_data *data,const struct cpumask *mask, -bool force); - -/* Free an IRQ */ -int (*free_irq)(int ); -/* Get the irqdomain associated the IOMMU device */ struct irq_domain *(*get_ir_irq_domain)(struct irq_alloc_info *);
Signature · 1 line
1.7.10.4
tip-bot for Jiang Liu
merge bot[tip:x86/apic] x86: irq_remapping: Clean up unused interfaces
x86: irq_remapping: Clean up unused interfaces
Commit-ID: f67c81a69eb96be3e1679785764a3df9bc1c5502 Gitweb: http://git.kernel.org/tip/f67c81a69eb96be3e1679785764a3df9bc1c5502 Author: Jiang Liu <[email protected]> AuthorDate: Tue, 25 Nov 2014 15:49:45 +0800 Committer: Thomas Gleixner <[email protected]> CommitDate: Wed, 26 Nov 2014 23:52:48 +0100
x86: irq_remapping: Clean up unused interfaces
Now we have converted to hierarchy irqdomain, so clean up unused interfaces.
Signed-off-by Jiang Liu <[email protected]>
Cc Konrad Rzeszutek Wilk <[email protected]>
Cc Tony Luck <[email protected]>
Cc Greg Kroah-Hartman <[email protected]>
Cc Bjorn Helgaas <[email protected]>
Cc Benjamin Herrenschmidt <[email protected]>
Cc Rafael J. Wysocki <[email protected]>
Cc Randy Dunlap <[email protected]>
Cc Yinghai Lu <[email protected]>
Cc Borislav Petkov <[email protected]>
Cc Joerg Roedel <[email protected]>
Signed-off-by Thomas Gleixner <[email protected]>
Tested-by Joerg Roedel <[email protected]>
--- drivers/iommu/irq_remapping.h | 16 ---------------- 1 file changed, 16 deletions(-)
drivers/iommu/irq_remapping.h +0 -16
@@ -24,11 +24,7 @@#ifdef CONFIG_IRQ_REMAP -struct IO_APIC_route_entry ; -struct io_apic_irq_attr ;struct irq_data ; -struct cpumask ; -struct pci_dev ;struct msi_msg ;struct irq_domain ;struct irq_alloc_info ;
@@ -58,18 +54,6 @@ struct irq_remap_ops {/* Enable fault handling */ int (*enable_faulting)(void ); -/* IO-APIC setup routine */ -int (*setup_ioapic_entry)(int irq,struct IO_APIC_route_entry *, -unsigned int ,int , -struct io_apic_irq_attr *); - -/* Set the CPU affinity of a remapped interrupt */ -int (*set_affinity)(struct irq_data *data,const struct cpumask *mask, -bool force); - -/* Free an IRQ */ -int (*free_irq)(int ); -/* Get the irqdomain associated the IOMMU device */ struct irq_domain *(*get_ir_irq_domain)(struct irq_alloc_info *);
PATCH v4 22/38 x86, irq: Kill irq_cfg.irq_remapped
In reply to Jiang LiuNow there is no user of irq_cfg.irq_remapped, so kill it.
Tested-by Joerg Roedel <[email protected]>
--- arch/x86/include/asm/hw_irq.h | 1 - drivers/iommu/amd_iommu.c | 1 - drivers/iommu/intel_irq_remapping.c | 2 -- 3 files changed, 4 deletions(-)
arch/x86/include/asm/hw_irq.h +0 -1
@@ -193,7 +193,6 @@ struct irq_cfg {u8 vector; u8 move_in_progress : 1; #ifdef CONFIG_IRQ_REMAP - u8 remapped : 1; union { struct irq_2_iommu irq_2_iommu; struct irq_2_irte irq_2_irte;
drivers/iommu/amd_iommu.c +0 -1
@@ -4129,7 +4129,6 @@ static void irq_remapping_prepare_irte(struct amd_ir_data *data,struct msi_msg *msg = &data->msi_entry;struct IO_APIC_route_entry *entry; - irq_cfg->remapped =1 ; data->irq_2_irte.devid = devid; data->irq_2_irte.index = index + sub_handle;
drivers/iommu/intel_irq_remapping.c +0 -2
@@ -66,7 +66,6 @@ static int alloc_irte(struct intel_iommu *iommu, int irq, struct irq_2_iommu *irq_iommu, u16 count) {struct ir_table *table = iommu->ir_table; -struct irq_cfg *cfg =irq_cfg (irq);unsigned int mask =0 ;unsigned long flags;int index;
@@ -93,7 +92,6 @@ static int alloc_irte(struct intel_iommu *iommu, int irq,if (index <0 ) {pr_warn ("IR%d: can't allocate an IRTE\n" , iommu->seq_id); }else { - cfg->remapped =1 ; irq_iommu->iommu = iommu; irq_iommu->irte_index = index; irq_iommu->sub_handle =0 ;
Signature · 1 line
1.7.10.4
tip-bot for Jiang Liu
merge bot[tip:x86/apic] x86, irq: Kill irq_cfg.irq_remapped
x86, irq: Kill irq_cfg.irq_remapped
Commit-ID: 507e02f58f0c889077b74fc748a921f5e4abc82b Gitweb: http://git.kernel.org/tip/507e02f58f0c889077b74fc748a921f5e4abc82b Author: Jiang Liu <[email protected]> AuthorDate: Tue, 25 Nov 2014 15:49:46 +0800 Committer: Thomas Gleixner <[email protected]> CommitDate: Wed, 26 Nov 2014 23:52:48 +0100
x86, irq: Kill irq_cfg.irq_remapped
Now there is no user of irq_cfg.irq_remapped, so kill it.
Signed-off-by Jiang Liu <[email protected]>
Cc Konrad Rzeszutek Wilk <[email protected]>
Cc Tony Luck <[email protected]>
Cc Greg Kroah-Hartman <[email protected]>
Cc Bjorn Helgaas <[email protected]>
Cc Benjamin Herrenschmidt <[email protected]>
Cc Rafael J. Wysocki <[email protected]>
Cc Randy Dunlap <[email protected]>
Cc Yinghai Lu <[email protected]>
Cc Borislav Petkov <[email protected]>
Cc Joerg Roedel <[email protected]>
Signed-off-by Thomas Gleixner <[email protected]>
Tested-by Joerg Roedel <[email protected]>
--- arch/x86/include/asm/hw_irq.h | 1 - drivers/iommu/amd_iommu.c | 1 - drivers/iommu/intel_irq_remapping.c | 2 -- 3 files changed, 4 deletions(-)
arch/x86/include/asm/hw_irq.h +0 -1
@@ -193,7 +193,6 @@ struct irq_cfg {u8 vector; u8 move_in_progress : 1; #ifdef CONFIG_IRQ_REMAP - u8 remapped : 1; union { struct irq_2_iommu irq_2_iommu; struct irq_2_irte irq_2_irte;
drivers/iommu/amd_iommu.c +0 -1
@@ -4129,7 +4129,6 @@ static void irq_remapping_prepare_irte(struct amd_ir_data *data,struct msi_msg *msg = &data->msi_entry;struct IO_APIC_route_entry *entry; - irq_cfg->remapped =1 ; data->irq_2_irte.devid = devid; data->irq_2_irte.index = index + sub_handle;
drivers/iommu/intel_irq_remapping.c +0 -2
@@ -66,7 +66,6 @@ static int alloc_irte(struct intel_iommu *iommu, int irq, struct irq_2_iommu *irq_iommu, u16 count) {struct ir_table *table = iommu->ir_table; -struct irq_cfg *cfg =irq_cfg (irq);unsigned int mask =0 ;unsigned long flags;int index;
@@ -93,7 +92,6 @@ static int alloc_irte(struct intel_iommu *iommu, int irq,if (index <0 ) {pr_warn ("IR%d: can't allocate an IRTE\n" , iommu->seq_id); }else { - cfg->remapped =1 ; irq_iommu->iommu = iommu; irq_iommu->irte_index = index; irq_iommu->sub_handle =0 ;
PATCH v4 23/38 iommu/vt-d: Move struct irq_2_iommu into intel_irq_remapping.c
In reply to Jiang LiuNow only intel_irq_remapping.c access irq_2_iommu, so move it from hw_irq.h into intel_irq_remapping.c.
Tested-by Joerg Roedel <[email protected]>
--- arch/x86/include/asm/hw_irq.h | 9 --------- drivers/iommu/intel_irq_remapping.c | 7 +++++++ 2 files changed, 7 insertions(+), 9 deletions(-)
arch/x86/include/asm/hw_irq.h +0 -9
@@ -95,14 +95,6 @@ extern void trace_call_function_single_interrupt(void);#endif /* CONFIG_TRACING */ #ifdef CONFIG_IRQ_REMAP -/* Intel specific interrupt remapping information */ -struct irq_2_iommu { - struct intel_iommu *iommu; - u16 irte_index; - u16 sub_handle; - u8 irte_mask; -}; - /* AMD specific interrupt remapping information */ struct irq_2_irte { u16 devid; /* Device ID for IRTE table */
@@ -194,7 +186,6 @@ struct irq_cfg { u8 move_in_progress : 1;#ifdef CONFIG_IRQ_REMAP union { -struct irq_2_iommu irq_2_iommu;struct irq_2_irte irq_2_irte; };#endif
drivers/iommu/intel_irq_remapping.c +7 -0
@@ -32,6 +32,13 @@ struct hpet_scope {unsigned int devfn; }; +struct irq_2_iommu { +struct intel_iommu *iommu; +u16 irte_index; +u16 sub_handle; +u8 irte_mask; +}; +struct intel_ir_data {struct irq_2_iommu irq_2_iommu;struct irte irte_entry;
Signature · 1 line
1.7.10.4
tip-bot for Jiang Liu
merge bot[tip:x86/apic] iommu/vt-d: Move struct irq_2_iommu into intel_irq_remapping.c
iommu/vt-d: Move struct irq_2_iommu into intel_irq_remapping.c
Commit-ID: f77d545bdd26566a2ecdda216730d6334402ad93 Gitweb: http://git.kernel.org/tip/f77d545bdd26566a2ecdda216730d6334402ad93 Author: Jiang Liu <[email protected]> AuthorDate: Tue, 25 Nov 2014 15:49:47 +0800 Committer: Thomas Gleixner <[email protected]> CommitDate: Wed, 26 Nov 2014 23:52:48 +0100
iommu/vt-d: Move struct irq_2_iommu into intel_irq_remapping.c
Now only intel_irq_remapping.c access irq_2_iommu, so move it from hw_irq.h into intel_irq_remapping.c.
Signed-off-by Jiang Liu <[email protected]>
Cc Konrad Rzeszutek Wilk <[email protected]>
Cc Tony Luck <[email protected]>
Cc Greg Kroah-Hartman <[email protected]>
Cc Bjorn Helgaas <[email protected]>
Cc Benjamin Herrenschmidt <[email protected]>
Cc Rafael J. Wysocki <[email protected]>
Cc Randy Dunlap <[email protected]>
Cc Yinghai Lu <[email protected]>
Cc Borislav Petkov <[email protected]>
Cc Joerg Roedel <[email protected]>
Signed-off-by Thomas Gleixner <[email protected]>
Tested-by Joerg Roedel <[email protected]>
--- arch/x86/include/asm/hw_irq.h | 9 --------- drivers/iommu/intel_irq_remapping.c | 7 +++++++ 2 files changed, 7 insertions(+), 9 deletions(-)
arch/x86/include/asm/hw_irq.h +0 -9
@@ -95,14 +95,6 @@ extern void trace_call_function_single_interrupt(void);#endif /* CONFIG_TRACING */ #ifdef CONFIG_IRQ_REMAP -/* Intel specific interrupt remapping information */ -struct irq_2_iommu { - struct intel_iommu *iommu; - u16 irte_index; - u16 sub_handle; - u8 irte_mask; -}; - /* AMD specific interrupt remapping information */ struct irq_2_irte { u16 devid; /* Device ID for IRTE table */
@@ -194,7 +186,6 @@ struct irq_cfg { u8 move_in_progress : 1;#ifdef CONFIG_IRQ_REMAP union { -struct irq_2_iommu irq_2_iommu;struct irq_2_irte irq_2_irte; };#endif
drivers/iommu/intel_irq_remapping.c +7 -0
@@ -32,6 +32,13 @@ struct hpet_scope {unsigned int devfn; }; +struct irq_2_iommu { +struct intel_iommu *iommu; +u16 irte_index; +u16 sub_handle; +u8 irte_mask; +}; +struct intel_ir_data {struct irq_2_iommu irq_2_iommu;struct irte irte_entry;
PATCH v4 24/38 iommu/amd: Move struct irq_2_irte into amd_iommu.c
In reply to Jiang LiuNow only amd_iommu.c access irq_2_irte, so move it from hw_irq.h into amd_iommu.c.
Tested-by Joerg Roedel <[email protected]>
--- arch/x86/include/asm/hw_irq.h | 13 ------------- drivers/iommu/amd_iommu.c | 5 +++++ 2 files changed, 5 insertions(+), 13 deletions(-)
arch/x86/include/asm/hw_irq.h +0 -13
@@ -94,14 +94,6 @@ extern void trace_call_function_single_interrupt(void);#define trace_kvm_posted_intr_ipi kvm_posted_intr_ipi#endif /* CONFIG_TRACING */ -#ifdef CONFIG_IRQ_REMAP -/* AMD specific interrupt remapping information */ -struct irq_2_irte { -u16 devid;/* Device ID for IRTE table */ -u16 index;/* Index into IRTE table*/ -}; -#endif /* CONFIG_IRQ_REMAP */ -struct irq_domain ;#ifdef CONFIG_X86_LOCAL_APIC
@@ -184,11 +176,6 @@ struct irq_cfg {unsigned int dest_apicid;u8 vector; u8 move_in_progress : 1; -#ifdef CONFIG_IRQ_REMAP -union { -struct irq_2_irte irq_2_irte; - }; -#endif union { #ifdef CONFIG_X86_IO_APIC struct {
drivers/iommu/amd_iommu.c +5 -0
@@ -3855,6 +3855,11 @@ union irte { } fields; }; +struct irq_2_irte { +u16 devid;/* Device ID for IRTE table */ +u16 index;/* Index into IRTE table*/ +}; +struct amd_ir_data {struct irq_2_irte irq_2_irte;union irte irte_entry;
Signature · 1 line
1.7.10.4
tip-bot for Jiang Liu
merge bot[tip:x86/apic] iommu/amd: Move struct irq_2_irte into amd_iommu.c
iommu/amd: Move struct irq_2_irte into amd_iommu.c
Commit-ID: a266cd087cb237c796927ad4399ad29a9250f94a Gitweb: http://git.kernel.org/tip/a266cd087cb237c796927ad4399ad29a9250f94a Author: Jiang Liu <[email protected]> AuthorDate: Tue, 25 Nov 2014 15:49:48 +0800 Committer: Thomas Gleixner <[email protected]> CommitDate: Wed, 26 Nov 2014 23:52:48 +0100
iommu/amd: Move struct irq_2_irte into amd_iommu.c
Now only amd_iommu.c access irq_2_irte, so move it from hw_irq.h into amd_iommu.c.
Signed-off-by Jiang Liu <[email protected]>
Cc Konrad Rzeszutek Wilk <[email protected]>
Cc Tony Luck <[email protected]>
Cc Greg Kroah-Hartman <[email protected]>
Cc Bjorn Helgaas <[email protected]>
Cc Benjamin Herrenschmidt <[email protected]>
Cc Rafael J. Wysocki <[email protected]>
Cc Randy Dunlap <[email protected]>
Cc Yinghai Lu <[email protected]>
Cc Borislav Petkov <[email protected]>
Cc Joerg Roedel <[email protected]>
Signed-off-by Thomas Gleixner <[email protected]>
Tested-by Joerg Roedel <[email protected]>
--- arch/x86/include/asm/hw_irq.h | 13 ------------- drivers/iommu/amd_iommu.c | 5 +++++ 2 files changed, 5 insertions(+), 13 deletions(-)
arch/x86/include/asm/hw_irq.h +0 -13
@@ -94,14 +94,6 @@ extern void trace_call_function_single_interrupt(void);#define trace_kvm_posted_intr_ipi kvm_posted_intr_ipi#endif /* CONFIG_TRACING */ -#ifdef CONFIG_IRQ_REMAP -/* AMD specific interrupt remapping information */ -struct irq_2_irte { -u16 devid;/* Device ID for IRTE table */ -u16 index;/* Index into IRTE table*/ -}; -#endif /* CONFIG_IRQ_REMAP */ -struct irq_domain ;#ifdef CONFIG_X86_LOCAL_APIC
@@ -184,11 +176,6 @@ struct irq_cfg {unsigned int dest_apicid;u8 vector; u8 move_in_progress : 1; -#ifdef CONFIG_IRQ_REMAP -union { -struct irq_2_irte irq_2_irte; - }; -#endif union { #ifdef CONFIG_X86_IO_APIC struct {
drivers/iommu/amd_iommu.c +5 -0
@@ -3855,6 +3855,11 @@ union irte { } fields; }; +struct irq_2_irte { +u16 devid;/* Device ID for IRTE table */ +u16 index;/* Index into IRTE table*/ +}; +struct amd_ir_data {struct irq_2_irte irq_2_irte;union irte irte_entry;
PATCH v4 25/38 x86, irq: Move irq_cfg.irq_2_pin into io_apic.c
In reply to Jiang LiuNow only io_apic.c accesses struct irq_cfg.irq_2_pin, so move irq_2_pin into struct mp_chip_data in io_apic.c to clean up struct irq_cfg further.
Signed-off-by Jiang Liu <[email protected]>
Tested-by Joerg Roedel <[email protected]>
--- arch/x86/include/asm/hw_irq.h | 7 -- arch/x86/kernel/apic/io_apic.c | 164 +++++++++++++++++++--------------------- arch/x86/kernel/apic/vector.c | 3 - 3 files changed, 77 insertions(+), 97 deletions(-)
arch/x86/include/asm/hw_irq.h +0 -7
@@ -176,13 +176,6 @@ struct irq_cfg {unsigned int dest_apicid;u8 vector; u8 move_in_progress : 1; -union { -#ifdef CONFIG_X86_IO_APIC -struct { -struct list_head irq_2_pin; - }; -#endif - }; };extern struct irq_domain *x86_vector_domain;
arch/x86/kernel/apic/io_apic.c +77 -87
451 lines not on this page · raw message
arch/x86/kernel/apic/vector.c +0 -3
@@ -68,9 +68,6 @@ static struct irq_cfg *alloc_irq_cfg(int node) goto out_cfg;if (!zalloc_cpumask_var_node (&cfg->old_domain,GFP_KERNEL , node)) goto out_domain; -#ifdef CONFIG_X86_IO_APIC -INIT_LIST_HEAD (&cfg->irq_2_pin); -#endif return cfg; out_domain:free_cpumask_var (cfg->domain);
Signature · 1 line
1.7.10.4
tip-bot for Jiang Liu
merge bot[tip:x86/apic] x86, irq: Move irq_cfg.irq_2_pin into io_apic.c
x86, irq: Move irq_cfg.irq_2_pin into io_apic.c
Commit-ID: 61736ef031f4771bf3a63929535c46486b076220 Gitweb: http://git.kernel.org/tip/61736ef031f4771bf3a63929535c46486b076220 Author: Jiang Liu <[email protected]> AuthorDate: Tue, 25 Nov 2014 15:49:49 +0800 Committer: Thomas Gleixner <[email protected]> CommitDate: Wed, 26 Nov 2014 23:52:48 +0100
x86, irq: Move irq_cfg.irq_2_pin into io_apic.c
Now only io_apic.c accesses struct irq_cfg.irq_2_pin, so move irq_2_pin into struct mp_chip_data in io_apic.c to clean up struct irq_cfg further.
Signed-off-by Jiang Liu <[email protected]>
Cc Konrad Rzeszutek Wilk <[email protected]>
Cc Tony Luck <[email protected]>
Cc Joerg Roedel <[email protected]>
Cc Greg Kroah-Hartman <[email protected]>
Cc Bjorn Helgaas <[email protected]>
Cc Benjamin Herrenschmidt <[email protected]>
Cc Rafael J. Wysocki <[email protected]>
Cc Randy Dunlap <[email protected]>
Cc Yinghai Lu <[email protected]>
Cc Borislav Petkov <[email protected]>
Cc Grant Likely <[email protected]>
Signed-off-by Thomas Gleixner <[email protected]>
Tested-by Joerg Roedel <[email protected]>
--- arch/x86/include/asm/hw_irq.h | 7 -- arch/x86/kernel/apic/io_apic.c | 164 +++++++++++++++++++---------------------- arch/x86/kernel/apic/vector.c | 3 - 3 files changed, 77 insertions(+), 97 deletions(-)
arch/x86/include/asm/hw_irq.h +0 -7
@@ -176,13 +176,6 @@ struct irq_cfg {unsigned int dest_apicid;u8 vector; u8 move_in_progress : 1; -union { -#ifdef CONFIG_X86_IO_APIC -struct { -struct list_head irq_2_pin; - }; -#endif - }; };extern struct irq_domain *x86_vector_domain;
arch/x86/kernel/apic/io_apic.c +77 -87
451 lines not on this page · raw message
arch/x86/kernel/apic/vector.c +0 -3
@@ -68,9 +68,6 @@ static struct irq_cfg *alloc_irq_cfg(int node) goto out_cfg;if (!zalloc_cpumask_var_node (&cfg->old_domain,GFP_KERNEL , node)) goto out_domain; -#ifdef CONFIG_X86_IO_APIC -INIT_LIST_HEAD (&cfg->irq_2_pin); -#endif return cfg; out_domain:free_cpumask_var (cfg->domain);
PATCH v4 26/38 x86, irq: Kill struct io_apic_irq_attr
In reply to Jiang LiuNow there's no user of struct io_apic_irq_attr anymore, so kill it.
Signed-off-by Jiang Liu <[email protected]>
Tested-by Joerg Roedel <[email protected]>
--- arch/x86/include/asm/io_apic.h | 7 ------- arch/x86/kernel/apic/io_apic.c | 10 ---------- 2 files changed, 17 deletions(-)
arch/x86/include/asm/io_apic.h +0 -7
@@ -157,13 +157,6 @@ extern int restore_ioapic_entries(void);extern void setup_ioapic_ids_from_mpc (void );extern void setup_ioapic_ids_from_mpc_nocheck (void ); -struct io_apic_irq_attr { -int ioapic; -int ioapic_pin; -int trigger; -int polarity; -}; -enum ioapic_domain_type {IOAPIC_DOMAIN_INVALID ,IOAPIC_DOMAIN_LEGACY ,
arch/x86/kernel/apic/io_apic.c +0 -10
@@ -2949,16 +2949,6 @@ int mp_ioapic_registered(u32 gsi_base)return 0 ; } -static inline void set_io_apic_irq_attr (struct io_apic_irq_attr *irq_attr, -int ioapic,int ioapic_pin, -int trigger,int polarity) -{ - irq_attr->ioapic = ioapic; - irq_attr->ioapic_pin = ioapic_pin; - irq_attr->trigger = trigger; - irq_attr->polarity = polarity; -} -static void mp_irqdomain_get_attr (u32 gsi,struct mp_chip_data *data,struct irq_alloc_info *info) {
Signature · 1 line
1.7.10.4
tip-bot for Jiang Liu
merge bot[tip:x86/apic] x86, irq: Kill struct io_apic_irq_attr
x86, irq: Kill struct io_apic_irq_attr
Commit-ID: 6de39aa81a72cb41c25497fe8ccfb05873ab862a Gitweb: http://git.kernel.org/tip/6de39aa81a72cb41c25497fe8ccfb05873ab862a Author: Jiang Liu <[email protected]> AuthorDate: Tue, 25 Nov 2014 15:49:50 +0800 Committer: Thomas Gleixner <[email protected]> CommitDate: Wed, 26 Nov 2014 23:52:48 +0100
x86, irq: Kill struct io_apic_irq_attr
Now there's no user of struct io_apic_irq_attr anymore, so kill it.
Signed-off-by Jiang Liu <[email protected]>
Cc Konrad Rzeszutek Wilk <[email protected]>
Cc Tony Luck <[email protected]>
Cc Joerg Roedel <[email protected]>
Cc Greg Kroah-Hartman <[email protected]>
Cc Bjorn Helgaas <[email protected]>
Cc Benjamin Herrenschmidt <[email protected]>
Cc Rafael J. Wysocki <[email protected]>
Cc Randy Dunlap <[email protected]>
Cc Yinghai Lu <[email protected]>
Cc Borislav Petkov <[email protected]>
Cc Grant Likely <[email protected]>
Signed-off-by Thomas Gleixner <[email protected]>
Tested-by Joerg Roedel <[email protected]>
--- arch/x86/include/asm/io_apic.h | 7 ------- arch/x86/kernel/apic/io_apic.c | 10 ---------- 2 files changed, 17 deletions(-)
arch/x86/include/asm/io_apic.h +0 -7
@@ -157,13 +157,6 @@ extern int restore_ioapic_entries(void);extern void setup_ioapic_ids_from_mpc (void );extern void setup_ioapic_ids_from_mpc_nocheck (void ); -struct io_apic_irq_attr { -int ioapic; -int ioapic_pin; -int trigger; -int polarity; -}; -enum ioapic_domain_type {IOAPIC_DOMAIN_INVALID ,IOAPIC_DOMAIN_LEGACY ,
arch/x86/kernel/apic/io_apic.c +0 -10
@@ -2949,16 +2949,6 @@ int mp_ioapic_registered(u32 gsi_base)return 0 ; } -static inline void set_io_apic_irq_attr (struct io_apic_irq_attr *irq_attr, -int ioapic,int ioapic_pin, -int trigger,int polarity) -{ - irq_attr->ioapic = ioapic; - irq_attr->ioapic_pin = ioapic_pin; - irq_attr->trigger = trigger; - irq_attr->polarity = polarity; -} -static void mp_irqdomain_get_attr (u32 gsi,struct mp_chip_data *data,struct irq_alloc_info *info) {
PATCH v4 27/38 x86, irq: Kill x86_io_apic_ops.write and x86_io_apic_ops.modify
In reply to Jiang Liux86_io_apic_ops.write is always set to native_io_apic_write(), and nobody overrides it. So get rid of the indirection by changing native_io_apic_write() as io_apic_write() and killing x86_io_apic_ops.write.
Do the same for x86_io_apic_ops.modify and native_io_apic_modify().
Signed-off-by Jiang Liu <[email protected]>
Tested-by Joerg Roedel <[email protected]>
--- arch/x86/include/asm/io_apic.h | 13 ------------- arch/x86/include/asm/x86_init.h | 2 -- arch/x86/kernel/apic/io_apic.c | 6 ++++-- arch/x86/kernel/x86_init.c | 2 -- 4 files changed, 4 insertions(+), 19 deletions(-)
arch/x86/include/asm/io_apic.h +0 -13
@@ -208,8 +208,6 @@ extern void disable_ioapic_support(void);extern void __init native_io_apic_init_mappings (void );extern unsigned int native_io_apic_read (unsigned int apic,unsigned int reg); -extern void native_io_apic_write (unsigned int apic,unsigned int reg,unsigned int val); -extern void native_io_apic_modify (unsigned int apic,unsigned int reg,unsigned int val);extern void native_disable_io_apic (void );static inline unsigned int io_apic_read (unsigned int apic,unsigned int reg)
@@ -217,15 +215,6 @@ static inline unsigned int io_apic_read(unsigned int apic, unsigned int reg)return x86_io_apic_ops.read (apic, reg); } -static inline void io_apic_write (unsigned int apic,unsigned int reg,unsigned int value) -{ - x86_io_apic_ops.write (apic, reg, value); -} -static inline void io_apic_modify (unsigned int apic,unsigned int reg,unsigned int value) -{ - x86_io_apic_ops.modify (apic, reg, value); -} -extern void setup_IO_APIC (void );extern void enable_IO_APIC (void );extern void disable_IO_APIC (void );
@@ -266,8 +255,6 @@ static inline void mp_save_irq(struct mpc_intsrc *m) { };static inline void disable_ioapic_support (void ) { }#define native_io_apic_init_mappings NULL#define native_io_apic_read NULL -#define native_io_apic_write NULL -#define native_io_apic_modify NULL#define native_disable_io_apic NULL#endif
arch/x86/include/asm/x86_init.h +0 -2
@@ -182,8 +182,6 @@ struct x86_msi_ops {struct x86_io_apic_ops {void (*init) (void );unsigned int (*read) (unsigned int apic,unsigned int reg); -void (*write) (unsigned int apic,unsigned int reg,unsigned int value); -void (*modify) (unsigned int apic,unsigned int reg,unsigned int value);void (*disable)(void ); };
arch/x86/kernel/apic/io_apic.c +4 -2
@@ -277,7 +277,8 @@ unsigned int native_io_apic_read(unsigned int apic, unsigned int reg)return readl (&io_apic->data); } -void native_io_apic_write (unsigned int apic,unsigned int reg,unsigned int value) +static void io_apic_write (unsigned int apic,unsigned int reg, +unsigned int value) {struct io_apic __iomem *io_apic =io_apic_base (apic);
@@ -291,7 +292,8 @@ void native_io_apic_write(unsigned int apic, unsigned int reg, unsigned int valu* * Older SiS APIC requires we rewrite the index register */ -void native_io_apic_modify (unsigned int apic,unsigned int reg,unsigned int value) +static void io_apic_modify (unsigned int apic,unsigned int reg, +unsigned int value) {struct io_apic __iomem *io_apic =io_apic_base (apic);
arch/x86/kernel/x86_init.c +0 -2
@@ -141,7 +141,5 @@ void arch_restore_msi_irqs(struct pci_dev *dev)struct x86_io_apic_ops x86_io_apic_ops = { .init = native_io_apic_init_mappings, .read = native_io_apic_read, - .write = native_io_apic_write, - .modify = native_io_apic_modify, .disable = native_disable_io_apic, };
Signature · 1 line
1.7.10.4
tip-bot for Jiang Liu
merge bot[tip:x86/apic] x86, irq: Kill x86_io_apic_ops.write and x86_io_apic_ops.modify
x86, irq: Kill x86_io_apic_ops.write and x86_io_apic_ops.modify
Commit-ID: 73bfd6eb8955d7a68d9e93d86eaa7b4f36f0ff04 Gitweb: http://git.kernel.org/tip/73bfd6eb8955d7a68d9e93d86eaa7b4f36f0ff04 Author: Jiang Liu <[email protected]> AuthorDate: Tue, 25 Nov 2014 15:49:51 +0800 Committer: Thomas Gleixner <[email protected]> CommitDate: Wed, 26 Nov 2014 23:52:48 +0100
x86, irq: Kill x86_io_apic_ops.write and x86_io_apic_ops.modify
x86_io_apic_ops.write is always set to native_io_apic_write(), and nobody overrides it. So get rid of the indirection by changing native_io_apic_write() as io_apic_write() and killing x86_io_apic_ops.write.
Do the same for x86_io_apic_ops.modify and native_io_apic_modify().
Signed-off-by Jiang Liu <[email protected]>
Cc Konrad Rzeszutek Wilk <[email protected]>
Cc Tony Luck <[email protected]>
Cc Joerg Roedel <[email protected]>
Cc Greg Kroah-Hartman <[email protected]>
Cc Bjorn Helgaas <[email protected]>
Cc Benjamin Herrenschmidt <[email protected]>
Cc Rafael J. Wysocki <[email protected]>
Cc Randy Dunlap <[email protected]>
Cc Yinghai Lu <[email protected]>
Cc Borislav Petkov <[email protected]>
Cc Yijing Wang <[email protected]>
Cc Grant Likely <[email protected]>
Signed-off-by Thomas Gleixner <[email protected]>
Tested-by Joerg Roedel <[email protected]>
--- arch/x86/include/asm/io_apic.h | 13 ------------- arch/x86/include/asm/x86_init.h | 2 -- arch/x86/kernel/apic/io_apic.c | 6 ++++-- arch/x86/kernel/x86_init.c | 2 -- 4 files changed, 4 insertions(+), 19 deletions(-)
arch/x86/include/asm/io_apic.h +0 -13
@@ -208,8 +208,6 @@ extern void disable_ioapic_support(void);extern void __init native_io_apic_init_mappings (void );extern unsigned int native_io_apic_read (unsigned int apic,unsigned int reg); -extern void native_io_apic_write (unsigned int apic,unsigned int reg,unsigned int val); -extern void native_io_apic_modify (unsigned int apic,unsigned int reg,unsigned int val);extern void native_disable_io_apic (void );static inline unsigned int io_apic_read (unsigned int apic,unsigned int reg)
@@ -217,15 +215,6 @@ static inline unsigned int io_apic_read(unsigned int apic, unsigned int reg)return x86_io_apic_ops.read (apic, reg); } -static inline void io_apic_write (unsigned int apic,unsigned int reg,unsigned int value) -{ - x86_io_apic_ops.write (apic, reg, value); -} -static inline void io_apic_modify (unsigned int apic,unsigned int reg,unsigned int value) -{ - x86_io_apic_ops.modify (apic, reg, value); -} -extern void setup_IO_APIC (void );extern void enable_IO_APIC (void );extern void disable_IO_APIC (void );
@@ -266,8 +255,6 @@ static inline void mp_save_irq(struct mpc_intsrc *m) { };static inline void disable_ioapic_support (void ) { }#define native_io_apic_init_mappings NULL#define native_io_apic_read NULL -#define native_io_apic_write NULL -#define native_io_apic_modify NULL#define native_disable_io_apic NULL#endif
arch/x86/include/asm/x86_init.h +0 -2
@@ -182,8 +182,6 @@ struct x86_msi_ops {struct x86_io_apic_ops {void (*init) (void );unsigned int (*read) (unsigned int apic,unsigned int reg); -void (*write) (unsigned int apic,unsigned int reg,unsigned int value); -void (*modify) (unsigned int apic,unsigned int reg,unsigned int value);void (*disable)(void ); };
arch/x86/kernel/apic/io_apic.c +4 -2
@@ -277,7 +277,8 @@ unsigned int native_io_apic_read(unsigned int apic, unsigned int reg)return readl (&io_apic->data); } -void native_io_apic_write (unsigned int apic,unsigned int reg,unsigned int value) +static void io_apic_write (unsigned int apic,unsigned int reg, +unsigned int value) {struct io_apic __iomem *io_apic =io_apic_base (apic);
@@ -291,7 +292,8 @@ void native_io_apic_write(unsigned int apic, unsigned int reg, unsigned int valu* * Older SiS APIC requires we rewrite the index register */ -void native_io_apic_modify (unsigned int apic,unsigned int reg,unsigned int value) +static void io_apic_modify (unsigned int apic,unsigned int reg, +unsigned int value) {struct io_apic __iomem *io_apic =io_apic_base (apic);
arch/x86/kernel/x86_init.c +0 -2
@@ -141,7 +141,5 @@ void arch_restore_msi_irqs(struct pci_dev *dev)struct x86_io_apic_ops x86_io_apic_ops = { .init = native_io_apic_init_mappings, .read = native_io_apic_read, - .write = native_io_apic_write, - .modify = native_io_apic_modify, .disable = native_disable_io_apic, };
PATCH v4 28/38 x86, irq: Clean up io_apic.h
In reply to Jiang LiuClean up io_apic.h by:
1) moving definition of struct mp_ioapic_gsi into io_apic.c
2) changing mp_pin_to_gsi() and mp_ioapic_gsi_routing() as static
3) killing unused MP_MAX_IOAPIC_PIN
4) killing useless forward declaration
5) killing useless comments
Signed-off-by Jiang Liu <[email protected]>
Tested-by Joerg Roedel <[email protected]>
--- arch/x86/include/asm/io_apic.h | 14 ++------------ arch/x86/kernel/apic/io_apic.c | 23 ++++++++--------------- 2 files changed, 10 insertions(+), 27 deletions(-)
arch/x86/include/asm/io_apic.h +2 -12
@@ -113,9 +113,6 @@ extern int nr_ioapics;extern int mpc_ioapic_id (int ioapic);extern unsigned int mpc_ioapic_addr (int ioapic); -extern struct mp_ioapic_gsi *mp_ioapic_gsi_routing (int ioapic); - -#define MP_MAX_IOAPIC_PIN 127/* # of MP IRQ source entries */ extern int mp_irq_entries;
@@ -135,6 +132,8 @@ extern int noioapicquirk;/* -1 if "noapic" boot option passed */ extern int noioapicreroute; +extern u32 gsi_top; +extern unsigned long io_apic_irqs;#define IO_APIC_IRQ (x) (((x) >= NR_IRQS_LEGACY) || ((1 << (x)) & io_apic_irqs))
@@ -146,7 +145,6 @@ extern unsigned long io_apic_irqs;#define io_apic_assign_pci_irqs \ (mp_irq_entries && !skip_ioapic_setup && io_apic_irqs) -struct irq_cfg ;extern void ioapic_insert_resources (void );extern int arch_early_ioapic_init (void );
@@ -174,15 +172,8 @@ struct ioapic_domain_cfg {struct device_node *dev; }; -struct mp_ioapic_gsi { -u32 gsi_base; -u32 gsi_end; -}; -extern u32 gsi_top; -extern int mp_find_ioapic (u32 gsi);extern int mp_find_ioapic_pin (int ioapic,u32 gsi); -extern u32 mp_pin_to_gsi (int ioapic,int pin);extern int mp_map_gsi_to_irq (u32 gsi,unsigned int flags,struct irq_alloc_info *info);extern void mp_unmap_irq (int irq);
@@ -231,7 +222,6 @@ static inline int arch_early_ioapic_init(void) { return 0; }static inline void print_IO_APICs (void ) {}#define gsi_top (NR_IRQS_LEGACY)static inline int mp_find_ioapic (u32 gsi) {return 0 ; } -static inline u32 mp_pin_to_gsi (int ioapic,int pin) {return UINT_MAX ; }static inline int mp_map_gsi_to_irq (u32 gsi,unsigned int flags,struct irq_alloc_info *info) {
arch/x86/kernel/apic/io_apic.c +8 -15
@@ -63,7 +63,6 @@#define for_each_ioapic_pin (idx, pin) \ for_each_ioapic((idx)) \ for_each_pin((idx), (pin)) -#define for_each_irq_pin (entry, head) \ list_for_each_entry(entry, &head, list)
@@ -94,6 +93,11 @@ struct mp_chip_data {bool isa_irq; }; +struct mp_ioapic_gsi { +u32 gsi_base; +u32 gsi_end; +}; + static struct ioapic { /* * # of IRQ routing registers
@@ -124,7 +128,7 @@ unsigned int mpc_ioapic_addr(int ioapic_idx)return ioapics[ioapic_idx].mp_config.apicaddr; } -struct mp_ioapic_gsi *mp_ioapic_gsi_routing (int ioapic_idx) +static inline struct mp_ioapic_gsi *mp_ioapic_gsi_routing (int ioapic_idx) {return &ioapics[ioapic_idx].gsi_config; }
@@ -136,7 +140,7 @@ static inline int mp_ioapic_pin_count(int ioapic)return gsi_cfg->gsi_end - gsi_cfg->gsi_base +1 ; } -u32 mp_pin_to_gsi (int ioapic,int pin) +static inline u32 mp_pin_to_gsi (int ioapic,int pin) {return mp_ioapic_gsi_routing (ioapic)->gsi_base + pin; }
@@ -1146,8 +1150,7 @@ static int pin_2_irq(int idx, int ioapic, int pin, unsigned int flags)return mp_map_pin_to_irq (gsi, idx, ioapic, pin, flags,NULL ); } -int mp_map_gsi_to_irq (u32 gsi,unsigned int flags, -struct irq_alloc_info *info) +int mp_map_gsi_to_irq (u32 gsi,unsigned int flags,struct irq_alloc_info *info) {int ioapic, pin, idx;
@@ -1709,7 +1712,6 @@ static int __init timer_irq_works(void)* This is not complete - we should be able to fake * an edge even if it isn't on the 8259A... */ -static unsigned int startup_ioapic_irq (struct irq_data *data) {int was_pending =0 , irq = data->irq;
@@ -1727,15 +1729,6 @@ static unsigned int startup_ioapic_irq(struct irq_data *data)return was_pending; } -/* -* Level and edge triggered IO-APIC interrupts need different handling, -* so we use two separate IRQ descriptors. Edge triggered IRQs can be -* handled with the level-triggered descriptor, but that one has slightly -* more overhead. Level-triggered interrupts cannot be handled with the -* edge-triggered handler, without risking IRQ storms and other ugly -* races. -*/ -static void __target_IO_APIC_irq (unsigned int irq,struct irq_cfg *cfg,struct mp_chip_data *data) {
Signature · 1 line
1.7.10.4
tip-bot for Jiang Liu
merge bot[tip:x86/apic] x86, irq: Clean up io_apic.h
x86, irq: Clean up io_apic.h
Commit-ID: 80c34e37c15ab8f98c6b20900d74e04bf99fee99 Gitweb: http://git.kernel.org/tip/80c34e37c15ab8f98c6b20900d74e04bf99fee99 Author: Jiang Liu <[email protected]> AuthorDate: Tue, 25 Nov 2014 15:49:52 +0800 Committer: Thomas Gleixner <[email protected]> CommitDate: Wed, 26 Nov 2014 23:52:49 +0100
x86, irq: Clean up io_apic.h
Clean up io_apic.h by:
1) moving definition of struct mp_ioapic_gsi into io_apic.c
2) changing mp_pin_to_gsi() and mp_ioapic_gsi_routing() as static
3) killing unused MP_MAX_IOAPIC_PIN
4) killing useless forward declaration
5) killing useless comments
Signed-off-by Jiang Liu <[email protected]>
Cc Konrad Rzeszutek Wilk <[email protected]>
Cc Tony Luck <[email protected]>
Cc Joerg Roedel <[email protected]>
Cc Greg Kroah-Hartman <[email protected]>
Cc Bjorn Helgaas <[email protected]>
Cc Benjamin Herrenschmidt <[email protected]>
Cc Rafael J. Wysocki <[email protected]>
Cc Randy Dunlap <[email protected]>
Cc Yinghai Lu <[email protected]>
Cc Borislav Petkov <[email protected]>
Cc Grant Likely <[email protected]>
Signed-off-by Thomas Gleixner <[email protected]>
Tested-by Joerg Roedel <[email protected]>
--- arch/x86/include/asm/io_apic.h | 14 ++------------ arch/x86/kernel/apic/io_apic.c | 23 ++++++++--------------- 2 files changed, 10 insertions(+), 27 deletions(-)
arch/x86/include/asm/io_apic.h +2 -12
@@ -113,9 +113,6 @@ extern int nr_ioapics;extern int mpc_ioapic_id (int ioapic);extern unsigned int mpc_ioapic_addr (int ioapic); -extern struct mp_ioapic_gsi *mp_ioapic_gsi_routing (int ioapic); - -#define MP_MAX_IOAPIC_PIN 127/* # of MP IRQ source entries */ extern int mp_irq_entries;
@@ -135,6 +132,8 @@ extern int noioapicquirk;/* -1 if "noapic" boot option passed */ extern int noioapicreroute; +extern u32 gsi_top; +extern unsigned long io_apic_irqs;#define IO_APIC_IRQ (x) (((x) >= NR_IRQS_LEGACY) || ((1 << (x)) & io_apic_irqs))
@@ -146,7 +145,6 @@ extern unsigned long io_apic_irqs;#define io_apic_assign_pci_irqs \ (mp_irq_entries && !skip_ioapic_setup && io_apic_irqs) -struct irq_cfg ;extern void ioapic_insert_resources (void );extern int arch_early_ioapic_init (void );
@@ -174,15 +172,8 @@ struct ioapic_domain_cfg {struct device_node *dev; }; -struct mp_ioapic_gsi { -u32 gsi_base; -u32 gsi_end; -}; -extern u32 gsi_top; -extern int mp_find_ioapic (u32 gsi);extern int mp_find_ioapic_pin (int ioapic,u32 gsi); -extern u32 mp_pin_to_gsi (int ioapic,int pin);extern int mp_map_gsi_to_irq (u32 gsi,unsigned int flags,struct irq_alloc_info *info);extern void mp_unmap_irq (int irq);
@@ -231,7 +222,6 @@ static inline int arch_early_ioapic_init(void) { return 0; }static inline void print_IO_APICs (void ) {}#define gsi_top (NR_IRQS_LEGACY)static inline int mp_find_ioapic (u32 gsi) {return 0 ; } -static inline u32 mp_pin_to_gsi (int ioapic,int pin) {return UINT_MAX ; }static inline int mp_map_gsi_to_irq (u32 gsi,unsigned int flags,struct irq_alloc_info *info) {
arch/x86/kernel/apic/io_apic.c +8 -15
@@ -63,7 +63,6 @@#define for_each_ioapic_pin (idx, pin) \ for_each_ioapic((idx)) \ for_each_pin((idx), (pin)) -#define for_each_irq_pin (entry, head) \ list_for_each_entry(entry, &head, list)
@@ -94,6 +93,11 @@ struct mp_chip_data {bool isa_irq; }; +struct mp_ioapic_gsi { +u32 gsi_base; +u32 gsi_end; +}; + static struct ioapic { /* * # of IRQ routing registers
@@ -124,7 +128,7 @@ unsigned int mpc_ioapic_addr(int ioapic_idx)return ioapics[ioapic_idx].mp_config.apicaddr; } -struct mp_ioapic_gsi *mp_ioapic_gsi_routing (int ioapic_idx) +static inline struct mp_ioapic_gsi *mp_ioapic_gsi_routing (int ioapic_idx) {return &ioapics[ioapic_idx].gsi_config; }
@@ -136,7 +140,7 @@ static inline int mp_ioapic_pin_count(int ioapic)return gsi_cfg->gsi_end - gsi_cfg->gsi_base +1 ; } -u32 mp_pin_to_gsi (int ioapic,int pin) +static inline u32 mp_pin_to_gsi (int ioapic,int pin) {return mp_ioapic_gsi_routing (ioapic)->gsi_base + pin; }
@@ -1146,8 +1150,7 @@ static int pin_2_irq(int idx, int ioapic, int pin, unsigned int flags)return mp_map_pin_to_irq (gsi, idx, ioapic, pin, flags,NULL ); } -int mp_map_gsi_to_irq (u32 gsi,unsigned int flags, -struct irq_alloc_info *info) +int mp_map_gsi_to_irq (u32 gsi,unsigned int flags,struct irq_alloc_info *info) {int ioapic, pin, idx;
@@ -1709,7 +1712,6 @@ static int __init timer_irq_works(void)* This is not complete - we should be able to fake * an edge even if it isn't on the 8259A... */ -static unsigned int startup_ioapic_irq (struct irq_data *data) {int was_pending =0 , irq = data->irq;
@@ -1727,15 +1729,6 @@ static unsigned int startup_ioapic_irq(struct irq_data *data)return was_pending; } -/* -* Level and edge triggered IO-APIC interrupts need different handling, -* so we use two separate IRQ descriptors. Edge triggered IRQs can be -* handled with the level-triggered descriptor, but that one has slightly -* more overhead. Level-triggered interrupts cannot be handled with the -* edge-triggered handler, without risking IRQ storms and other ugly -* races. -*/ -static void __target_IO_APIC_irq (unsigned int irq,struct irq_cfg *cfg,struct mp_chip_data *data) {
PATCH v4 29/38 x86, irq: Use cached IOAPIC entry instead of reading from hardware
In reply to Jiang LiuUse cahced IOAPIC entry instead of reading data from IOAPIC hardware registers to improve performance.
Signed-off-by Jiang Liu <[email protected]>
Tested-by Joerg Roedel <[email protected]>
--- arch/x86/kernel/apic/io_apic.c | 78 +++++++++++----------------------------- 1 file changed, 21 insertions(+), 57 deletions(-)
arch/x86/kernel/apic/io_apic.c +21 -57
@@ -69,8 +69,13 @@int acpi_get_override_irq (u32 gsi,int *trigger,int *polarity);/* -* Is the SiS APIC rmw bug present ? +* Is the SiS APIC rmw bug present ? * -1 = don't know, 0 = no, 1 = yes +* When doing a read-modify-write operation on IOAPIC registers, older SiS APIC +* requires we rewrite the index register again where the read already set up +* the index register. +* The code to make use of sis_apic_bug has been removed, but we don't want to +* loss this knowledge. */ int sis_apic_bug =-1 ;
@@ -290,22 +295,6 @@ static void io_apic_write(unsigned int apic, unsigned int reg,writel (value, &io_apic->data); } -/* -* Re-write a value: to be used for read-modify-write -* cycles where the read already set up the index register. -* -* Older SiS APIC requires we rewrite the index register -*/ -static void io_apic_modify (unsigned int apic,unsigned int reg, -unsigned int value) -{ -struct io_apic __iomem *io_apic =io_apic_base (apic); - -if (sis_apic_bug) -writel (reg, &io_apic->index); -writel (value, &io_apic->data); -} -union entry_union {struct {u32 w1, w2; };struct IO_APIC_route_entry entry;
@@ -442,29 +431,23 @@ static void __init replace_pin_at_irq_node(struct mp_chip_data *data, int node,add_pin_to_irq_node (data, node, newapic, newpin); } -static void __io_apic_modify_irq (struct irq_pin_list *entry, -int mask_and,int mask_or, -void (*final)(struct irq_pin_list *entry)) -{ -unsigned int reg, pin; - - pin = entry->pin; - reg =io_apic_read (entry->apic,0x10 + pin *2 ); - reg &= mask_and; - reg |= mask_or; -io_apic_modify (entry->apic,0x10 + pin *2 , reg); -if (final) -final (entry); -} -static void io_apic_modify_irq (struct mp_chip_data *data,int mask_and,int mask_or,void (*final)(struct irq_pin_list *entry)) { +union entry_union eu;struct irq_pin_list *entry; -for_each_irq_pin (entry, data->irq_2_pin) -__io_apic_modify_irq (entry, mask_and, mask_or, final); + eu.entry = data->entry; + eu.w1 &= mask_and; + eu.w1 |= mask_or; + data->entry = eu.entry; + +for_each_irq_pin (entry, data->irq_2_pin) { +io_apic_write (entry->apic,0x10 +2 * entry->pin, eu.w1); +if (final) +final (entry); + } }static void io_apic_sync (struct irq_pin_list *entry)
@@ -1729,28 +1712,6 @@ static unsigned int startup_ioapic_irq(struct irq_data *data)return was_pending; } -static void __target_IO_APIC_irq (unsigned int irq,struct irq_cfg *cfg, -struct mp_chip_data *data) -{ -int apic, pin; -struct irq_pin_list *entry; -u8 vector = cfg->vector; -unsigned int dest =SET_APIC_LOGICAL_ID (cfg->dest_apicid); - -for_each_irq_pin (entry, data->irq_2_pin) { -unsigned int reg; - - apic = entry->apic; - pin = entry->pin; - -io_apic_write (apic,0x11 + pin*2 , dest); - reg =io_apic_read (apic,0x10 + pin*2 ); - reg &= ~IO_APIC_REDIR_VECTOR_MASK ; - reg |= vector; -io_apic_modify (apic,0x10 + pin*2 , reg); - } -} -atomic_t irq_mis_count;#ifdef CONFIG_GENERIC_PENDING_IRQ
@@ -1916,6 +1877,7 @@ static int ioapic_set_affinity(struct irq_data *irq_data, {struct irq_data *parent = irq_data->parent_data;struct mp_chip_data *data = irq_data->chip_data; +struct irq_pin_list *entry;struct irq_cfg *cfg;unsigned long flags;int ret;
@@ -1926,7 +1888,9 @@ static int ioapic_set_affinity(struct irq_data *irq_data, cfg =irqd_cfg (irq_data); data->entry.dest =SET_APIC_LOGICAL_ID (cfg->dest_apicid); data->entry.vector = cfg->vector; -__target_IO_APIC_irq (irq_data->irq, cfg, irq_data->chip_data); +for_each_irq_pin (entry, data->irq_2_pin) +__ioapic_write_entry (entry->apic, entry->pin, + data->entry); }raw_spin_unlock_irqrestore (&ioapic_lock, flags);
Signature · 1 line
1.7.10.4
tip-bot for Jiang Liu
merge bot[tip:x86/apic] x86, irq: Use cached IOAPIC entry instead of reading from hardware
x86, irq: Use cached IOAPIC entry instead of reading from hardware
Commit-ID: fda7c08b1349cc4c65f8a5240b10f7e9938604b8 Gitweb: http://git.kernel.org/tip/fda7c08b1349cc4c65f8a5240b10f7e9938604b8 Author: Jiang Liu <[email protected]> AuthorDate: Tue, 25 Nov 2014 15:49:53 +0800 Committer: Thomas Gleixner <[email protected]> CommitDate: Wed, 26 Nov 2014 23:52:49 +0100
x86, irq: Use cached IOAPIC entry instead of reading from hardware
Use cached IOAPIC entry instead of reading data from IOAPIC hardware registers to improve performance.
Signed-off-by Jiang Liu <[email protected]>
Cc Konrad Rzeszutek Wilk <[email protected]>
Cc Tony Luck <[email protected]>
Cc Joerg Roedel <[email protected]>
Cc Greg Kroah-Hartman <[email protected]>
Cc Bjorn Helgaas <[email protected]>
Cc Benjamin Herrenschmidt <[email protected]>
Cc Rafael J. Wysocki <[email protected]>
Cc Randy Dunlap <[email protected]>
Cc Yinghai Lu <[email protected]>
Cc Borislav Petkov <[email protected]>
Cc Grant Likely <[email protected]>
Signed-off-by Thomas Gleixner <[email protected]>
Tested-by Joerg Roedel <[email protected]>
--- arch/x86/kernel/apic/io_apic.c | 78 ++++++++++++------------------------------ 1 file changed, 21 insertions(+), 57 deletions(-)
arch/x86/kernel/apic/io_apic.c +21 -57
@@ -69,8 +69,13 @@int acpi_get_override_irq (u32 gsi,int *trigger,int *polarity);/* -* Is the SiS APIC rmw bug present ? +* Is the SiS APIC rmw bug present ? * -1 = don't know, 0 = no, 1 = yes +* When doing a read-modify-write operation on IOAPIC registers, older SiS APIC +* requires we rewrite the index register again where the read already set up +* the index register. +* The code to make use of sis_apic_bug has been removed, but we don't want to +* loss this knowledge. */ int sis_apic_bug =-1 ;
@@ -290,22 +295,6 @@ static void io_apic_write(unsigned int apic, unsigned int reg,writel (value, &io_apic->data); } -/* -* Re-write a value: to be used for read-modify-write -* cycles where the read already set up the index register. -* -* Older SiS APIC requires we rewrite the index register -*/ -static void io_apic_modify (unsigned int apic,unsigned int reg, -unsigned int value) -{ -struct io_apic __iomem *io_apic =io_apic_base (apic); - -if (sis_apic_bug) -writel (reg, &io_apic->index); -writel (value, &io_apic->data); -} -union entry_union {struct {u32 w1, w2; };struct IO_APIC_route_entry entry;
@@ -442,29 +431,23 @@ static void __init replace_pin_at_irq_node(struct mp_chip_data *data, int node,add_pin_to_irq_node (data, node, newapic, newpin); } -static void __io_apic_modify_irq (struct irq_pin_list *entry, -int mask_and,int mask_or, -void (*final)(struct irq_pin_list *entry)) -{ -unsigned int reg, pin; - - pin = entry->pin; - reg =io_apic_read (entry->apic,0x10 + pin *2 ); - reg &= mask_and; - reg |= mask_or; -io_apic_modify (entry->apic,0x10 + pin *2 , reg); -if (final) -final (entry); -} -static void io_apic_modify_irq (struct mp_chip_data *data,int mask_and,int mask_or,void (*final)(struct irq_pin_list *entry)) { +union entry_union eu;struct irq_pin_list *entry; -for_each_irq_pin (entry, data->irq_2_pin) -__io_apic_modify_irq (entry, mask_and, mask_or, final); + eu.entry = data->entry; + eu.w1 &= mask_and; + eu.w1 |= mask_or; + data->entry = eu.entry; + +for_each_irq_pin (entry, data->irq_2_pin) { +io_apic_write (entry->apic,0x10 +2 * entry->pin, eu.w1); +if (final) +final (entry); + } }static void io_apic_sync (struct irq_pin_list *entry)
@@ -1729,28 +1712,6 @@ static unsigned int startup_ioapic_irq(struct irq_data *data)return was_pending; } -static void __target_IO_APIC_irq (unsigned int irq,struct irq_cfg *cfg, -struct mp_chip_data *data) -{ -int apic, pin; -struct irq_pin_list *entry; -u8 vector = cfg->vector; -unsigned int dest =SET_APIC_LOGICAL_ID (cfg->dest_apicid); - -for_each_irq_pin (entry, data->irq_2_pin) { -unsigned int reg; - - apic = entry->apic; - pin = entry->pin; - -io_apic_write (apic,0x11 + pin*2 , dest); - reg =io_apic_read (apic,0x10 + pin*2 ); - reg &= ~IO_APIC_REDIR_VECTOR_MASK ; - reg |= vector; -io_apic_modify (apic,0x10 + pin*2 , reg); - } -} -atomic_t irq_mis_count;#ifdef CONFIG_GENERIC_PENDING_IRQ
@@ -1916,6 +1877,7 @@ static int ioapic_set_affinity(struct irq_data *irq_data, {struct irq_data *parent = irq_data->parent_data;struct mp_chip_data *data = irq_data->chip_data; +struct irq_pin_list *entry;struct irq_cfg *cfg;unsigned long flags;int ret;
@@ -1926,7 +1888,9 @@ static int ioapic_set_affinity(struct irq_data *irq_data, cfg =irqd_cfg (irq_data); data->entry.dest =SET_APIC_LOGICAL_ID (cfg->dest_apicid); data->entry.vector = cfg->vector; -__target_IO_APIC_irq (irq_data->irq, cfg, irq_data->chip_data); +for_each_irq_pin (entry, data->irq_2_pin) +__ioapic_write_entry (entry->apic, entry->pin, + data->entry); }raw_spin_unlock_irqrestore (&ioapic_lock, flags);
Borislav Petkov
maintainerRe: [tip:x86/apic] x86, irq: Use cached IOAPIC entry instead of reading from hardware
Quoted 152 lines · tip-bot for Jiang Liu
Commit-ID: fda7c08b1349cc4c65f8a5240b10f7e9938604b8 Gitweb: http://git.kernel.org/tip/fda7c08b1349cc4c65f8a5240b10f7e9938604b8 Author: Jiang Liu <[email protected]> AuthorDate: Tue, 25 Nov 2014 15:49:53 +0800 Committer: Thomas Gleixner <[email protected]> CommitDate: Wed, 26 Nov 2014 23:52:49 +0100x86, irq: Use cached IOAPIC entry instead of reading from hardware
Use cached IOAPIC entry instead of reading data from IOAPIC hardware registers to improve performance.
Signed-off-by Jiang Liu <[email protected]>Cc Konrad Rzeszutek Wilk <[email protected]>Cc Tony Luck <[email protected]>Cc Joerg Roedel <[email protected]>Cc Greg Kroah-Hartman <[email protected]>Cc Bjorn Helgaas <[email protected]>Cc Benjamin Herrenschmidt <[email protected]>Cc Rafael J. Wysocki <[email protected]>Cc Randy Dunlap <[email protected]>Cc Yinghai Lu <[email protected]>Cc Borislav Petkov <[email protected]>Cc Grant Likely <[email protected]>Signed-off-by Thomas Gleixner <[email protected]>Tested-by Joerg Roedel <[email protected]>--- arch/x86/kernel/apic/io_apic.c | 78 ++++++++++++------------------------------ 1 file changed, 21 insertions(+), 57 deletions(-)arch/x86/kernel/apic/io_apic.c +18
-56@@ -69,8 +69,13 @@int acpi_get_override_irq (u32 gsi,int *trigger,int *polarity);/* -* Is the SiS APIC rmw bug present ? +* Is the SiS APIC rmw bug present ? * -1 = don't know, 0 = no, 1 = yes +* When doing a read-modify-write operation on IOAPIC registers, older SiS APIC +* requires we rewrite the index register again where the read already set up +* the index register. +* The code to make use of sis_apic_bug has been removed, but we don't want to +* loss this knowledge. */ int sis_apic_bug =-1 ;@@ -290,22 +295,6 @@ static void io_apic_write(unsigned int apic, unsigned int reg,writel (value, &io_apic->data); } -/* -* Re-write a value: to be used for read-modify-write -* cycles where the read already set up the index register. -* -* Older SiS APIC requires we rewrite the index register -*/ -static void io_apic_modify (unsigned int apic,unsigned int reg, -unsigned int value) -{ -struct io_apic __iomem *io_apic =io_apic_base (apic); - -if (sis_apic_bug) -writel (reg, &io_apic->index); -writel (value, &io_apic->data); -} -union entry_union {struct {u32 w1, w2; };struct IO_APIC_route_entry entry;@@ -442,29 +431,23 @@ static void __init replace_pin_at_irq_node(struct mp_chip_data *data, int node,add_pin_to_irq_node (data, node, newapic, newpin); } -static void __io_apic_modify_irq (struct irq_pin_list *entry, -int mask_and,int mask_or, -void (*final)(struct irq_pin_list *entry)) -{ -unsigned int reg, pin; - - pin = entry->pin; - reg =io_apic_read (entry->apic,0x10 + pin *2 ); - reg &= mask_and; - reg |= mask_or; -io_apic_modify (entry->apic,0x10 + pin *2 , reg); -if (final) -final (entry); -} -static void io_apic_modify_irq (struct mp_chip_data *data,int mask_and,int mask_or,void (*final)(struct irq_pin_list *entry)) { +union entry_union eu;struct irq_pin_list *entry; -for_each_irq_pin (entry, data->irq_2_pin) -__io_apic_modify_irq (entry, mask_and, mask_or, final); + eu.entry = data->entry; + eu.w1 &= mask_and; + eu.w1 |= mask_or; + data->entry = eu.entry; + +for_each_irq_pin (entry, data->irq_2_pin) { +io_apic_write (entry->apic,0x10 +2 * entry->pin, eu.w1); +if (final) +final (entry); + } }static void io_apic_sync (struct irq_pin_list *entry)@@ -1729,28 +1712,6 @@ static unsigned int startup_ioapic_irq(struct irq_data *data)return was_pending; } -static void __target_IO_APIC_irq (unsigned int irq,struct irq_cfg *cfg, -struct mp_chip_data *data) -{ -int apic, pin; -struct irq_pin_list *entry; -u8 vector = cfg->vector; -unsigned int dest =SET_APIC_LOGICAL_ID (cfg->dest_apicid); - -for_each_irq_pin (entry, data->irq_2_pin) { -unsigned int reg; - - apic = entry->apic; - pin = entry->pin; - -io_apic_write (apic,0x11 + pin*2 , dest); - reg =io_apic_read (apic,0x10 + pin*2 ); - reg &= ~IO_APIC_REDIR_VECTOR_MASK ; - reg |= vector; -io_apic_modify (apic,0x10 + pin*2 , reg); - } -} -atomic_t irq_mis_count;#ifdef CONFIG_GENERIC_PENDING_IRQ @@ -1916,6 +1877,7 @@ static int ioapic_set_affinity(struct irq_data *irq_data, {struct irq_data *parent = irq_data->parent_data;struct mp_chip_data *data = irq_data->chip_data; +struct irq_pin_list *entry;struct irq_cfg *cfg;unsigned long flags;int ret;
arch/x86/kernel/apic/io_apic.c static int ioapic_set_affinity(struct irq_data *irq_data, · line 1894
Quoted 8 lines
arch/x86/kernel/apic/io_apic.c +3
-1@@ -1926,7 +1888,9 @@ static int ioapic_set_affinity(struct irq_data *irq_data, cfg =irqd_cfg (irq_data); data->entry.dest =SET_APIC_LOGICAL_ID (cfg->dest_apicid); data->entry.vector = cfg->vector; -__target_IO_APIC_irq (irq_data->irq, cfg, irq_data->chip_data); +for_each_irq_pin (entry, data->irq_2_pin) +__ioapic_write_entry (entry->apic, entry->pin, + data->entry); }
So let me hold down what tglx and I have been staring at a whole day today. This commit breaks booting my AMD laptop with the error messages below. The machine ends up in the emergency shell, completely unusable.
When I revert the commit, x86/apic boots fine again. Btw, I was able to reproduce the same issue in a kvm guest so something's definitely wrong.
If I revert only the last hunk and do
__target_IO_APIC_irq(irq_data->irq, cfg, irq_data->chip_data);
instead and leave the loop over the irq pins in that function as the old icode did t, the problem disappears.
I've been trying different things but nothing helped so far as to pinpoint where the problem lies. Thus this mail to hold down the current situation. More staring later, on a clear head.
[ 3.465391] PM: Checking hibernation image partition /dev/sda2 [ 3.497559] PM: Hibernation image partition 8:2 present [ 3.501859] PM: Looking for hibernation image. [ 6.600378] usb 1-1: New USB device found, idVendor=0627, idProduct=0001 [ 6.608098] usb 1-1: New USB device strings: Mfr=1, Product=3, SerialNumber=5 [ 6.614747] usb 1-1: Product: QEMU USB Tablet [ 6.617966] usb 1-1: Manufacturer: QEMU [ 6.632779] usb 1-1: SerialNumber: 42 [ 7.648783] ata2.00: qc timeout (cmd 0xa0) [ 7.655222] ata2.00: TEST_UNIT_READY failed (err_mask=0x5) [ 7.818934] ata2.01: NODEV after polling detection [ 7.849882] ata2.00: configured for MWDMA2 [ 8.585096] input: QEMU QEMU USB Tablet as /devices/pci0000:00/0000:00:01.2/usb1/1-1/1-1:1.0/0003:0627:0001.0001/input/input1 [ 8.598044] hid-generic 0003:0627:0001.0001: input,hidraw0: USB HID v0.01 Pointer [QEMU QEMU USB Tablet] on usb-0000:00:01.2-1/input0 [ 12.852654] ata2.00: qc timeout (cmd 0xa0) [ 12.855798] ata2.00: TEST_UNIT_READY failed (err_mask=0x5) [ 12.859555] ata2.00: limiting speed to MWDMA2:PIO3 [ 13.017632] ata2.01: NODEV after polling detection [ 13.024501] ata2.00: configured for MWDMA2 [ 18.028681] ata2.00: qc timeout (cmd 0xa0) [ 18.035697] ata2.00: TEST_UNIT_READY failed (err_mask=0x5) [ 18.042919] ata2.00: disabled [ 18.045671] ata2: soft resetting link [ 18.206824] ata2.01: NODEV after polling detection [ 18.211174] ata2: EH complete [ 32.873120] ata1: lost interrupt (Status 0x50) [ 32.881800] ata1.00: exception Emask 0x0 SAct 0x0 SErr 0x0 action 0x6 frozen [ 32.886772] ata1.00: failed command: READ DMA
Signature · 5 lines
Regards/Gruss,
Boris.
Sent from a fat crate under my desk. Formatting is fine.
--Re: [tip:x86/apic] x86, irq: Use cached IOAPIC entry instead of reading from hardware
Quoted 8 lines · Borislav Petkov
Quoted 7 lines · tip-bot for Jiang Liu
Commit-ID: fda7c08b1349cc4c65f8a5240b10f7e9938604b8 Gitweb: http://git.kernel.org/tip/fda7c08b1349cc4c65f8a5240b10f7e9938604b8 Author: Jiang Liu <[email protected]> AuthorDate: Tue, 25 Nov 2014 15:49:53 +0800 Committer: Thomas Gleixner <[email protected]> CommitDate: Wed, 26 Nov 2014 23:52:49 +0100
Quoted 6 lines
Quoted 6 lines
x86, irq: Use cached IOAPIC entry instead of reading from hardware
Use cached IOAPIC entry instead of reading data from IOAPIC hardware registers to improve performance.
Signed-off-by Jiang Liu <[email protected]>
<snit>
Quoted 54 lines
Quoted 38 lines
(quoted diff) +1
-22@@ -1729,28 +1712,6 @@ static unsigned int startup_ioapic_irq(struct irq_data *data) return was_pending; } -static void __target_IO_APIC_irq(unsigned int irq, struct irq_cfg *cfg, - struct mp_chip_data *data) -{ - int apic, pin; - struct irq_pin_list *entry; - u8 vector = cfg->vector; - unsigned int dest = SET_APIC_LOGICAL_ID(cfg->dest_apicid); - - for_each_irq_pin(entry, data->irq_2_pin) { - unsigned int reg; - - apic = entry->apic; - pin = entry->pin; - - io_apic_write(apic, 0x11 + pin*2, dest); - reg = io_apic_read(apic, 0x10 + pin*2); - reg &= ~IO_APIC_REDIR_VECTOR_MASK; - reg |= vector; - io_apic_modify(apic, 0x10 + pin*2, reg); - } -} - atomic_t irq_mis_count; #ifdef CONFIG_GENERIC_PENDING_IRQ@@ -1916,6 +1877,7 @@ static int ioapic_set_affinity(struct irq_data *irq_data, { struct irq_data *parent = irq_data->parent_data; struct mp_chip_data *data = irq_data->chip_data; + struct irq_pin_list *entry; struct irq_cfg *cfg; unsigned long flags; int ret;Review static int ioapic_set_affinity(struct irq_data *irq_data, · line 1894
Quoted 8 lines
(quoted diff) +3
-1@@ -1926,7 +1888,9 @@ static int ioapic_set_affinity(struct irq_data *irq_data, cfg = irqd_cfg(irq_data); data->entry.dest = SET_APIC_LOGICAL_ID(cfg->dest_apicid); data->entry.vector = cfg->vector; - __target_IO_APIC_irq(irq_data->irq, cfg, irq_data->chip_data); + for_each_irq_pin(entry, data->irq_2_pin) + __ioapic_write_entry(entry->apic, entry->pin, + data->entry); }So let me hold down what tglx and I have been staring at a whole day today. This commit breaks booting my AMD laptop with the error messages below. The machine ends up in the emergency shell, completely unusable.
When I revert the commit, x86/apic boots fine again. Btw, I was able to reproduce the same issue in a kvm guest so something's definitely wrong.
Quoted 6 lines
If I revert only the last hunk and do
__target_IO_APIC_irq(irq_data->irq, cfg, irq_data->chip_data);instead and leave the loop over the irq pins in that function as the old icode did t, the problem disappears.
Hi Borislav,
Thanks for tracking down to this line of change. I have no
platform to reproduce this bug, so could you please help to revert this commit and apply following patch to get some data about IOAPIC entry? Thanks!
Gerry
arch/x86/kernel/apic/io_apic.c +0 -0
@@ -1736,7 +1736,9 @@ static void __target_IO_APIC_irq(unsigned int irq,
struct irq_cfg *cfg,
struct irq_pin_list *entry;
u8 vector = cfg->vector;
unsigned int dest = SET_APIC_LOGICAL_ID(cfg->dest_apicid);+ union entry_union eu;
+ eu.entry = data->entry;
for_each_irq_pin(entry, data->irq_2_pin) {
unsigned int reg;@@ -1748,6 +1750,7 @@ static void __target_IO_APIC_irq(unsigned int irq, struct irq_cfg *cfg,
reg &= ~IO_APIC_REDIR_VECTOR_MASK;
reg |= vector;
io_apic_modify(apic, 0x10 + pin*2, reg);
+ pr_warn("ioapic%d pin%d, hardware reg %x, cached data
%x\n", apic, pin, reg, eu.w1);
}}
Quoted 34 lines
I've been trying different things but nothing helped so far as to pinpoint where the problem lies. Thus this mail to hold down the current situation. More staring later, on a clear head.
[ 3.465391] PM: Checking hibernation image partition /dev/sda2 [ 3.497559] PM: Hibernation image partition 8:2 present [ 3.501859] PM: Looking for hibernation image. [ 6.600378] usb 1-1: New USB device found, idVendor=0627, idProduct=0001 [ 6.608098] usb 1-1: New USB device strings: Mfr=1, Product=3, SerialNumber=5 [ 6.614747] usb 1-1: Product: QEMU USB Tablet [ 6.617966] usb 1-1: Manufacturer: QEMU [ 6.632779] usb 1-1: SerialNumber: 42 [ 7.648783] ata2.00: qc timeout (cmd 0xa0) [ 7.655222] ata2.00: TEST_UNIT_READY failed (err_mask=0x5) [ 7.818934] ata2.01: NODEV after polling detection [ 7.849882] ata2.00: configured for MWDMA2 [ 8.585096] input: QEMU QEMU USB Tablet as /devices/pci0000:00/0000:00:01.2/usb1/1-1/1-1:1.0/0003:0627:0001.0001/input/input1 [ 8.598044] hid-generic 0003:0627:0001.0001: input,hidraw0: USB HID v0.01 Pointer [QEMU QEMU USB Tablet] on usb-0000:00:01.2-1/input0 [ 12.852654] ata2.00: qc timeout (cmd 0xa0) [ 12.855798] ata2.00: TEST_UNIT_READY failed (err_mask=0x5) [ 12.859555] ata2.00: limiting speed to MWDMA2:PIO3 [ 13.017632] ata2.01: NODEV after polling detection [ 13.024501] ata2.00: configured for MWDMA2 [ 18.028681] ata2.00: qc timeout (cmd 0xa0) [ 18.035697] ata2.00: TEST_UNIT_READY failed (err_mask=0x5) [ 18.042919] ata2.00: disabled [ 18.045671] ata2: soft resetting link [ 18.206824] ata2.01: NODEV after polling detection [ 18.211174] ata2: EH complete [ 32.873120] ata1: lost interrupt (Status 0x50) [ 32.881800] ata1.00: exception Emask 0x0 SAct 0x0 SErr 0x0 action 0x6 frozen [ 32.886772] ata1.00: failed command: READ DMA
Borislav Petkov
maintainerRe: [tip:x86/apic] x86, irq: Use cached IOAPIC entry instead of reading from hardware
Quoted 3 lines · Jiang Liu
Thanks for tracking down to this line of change. I have no
platform to reproduce this bug, so could you please help to revert this commit and apply following patch to get some data about IOAPIC entry?
Yep, the cached data differs from what's in the hw reg sometimes:
dmesg | grep -i ioapic
[ 0.000000] ACPI: IOAPIC (id[0x02] address[0xfec00000] gsi_base[0]) [ 0.000000] IOAPIC[0]: apic_id 2, version 33, address 0xfec00000, GSI 0-23 [ 0.429355] ioapic0 pin9, hardware reg a939, cached data 1a939 [ 0.506249] ioapic0 pin9, hardware reg 1a939, cached data 1a939 [ 0.521547] ACPI: Using IOAPIC for interrupt routing [ 1.313959] ioapic0 pin19, hardware reg a9c1, cached data 1a9c1 [ 1.357875] ioapic0 pin12, hardware reg 93c, cached data 93c [ 1.359204] ioapic0 pin1, hardware reg 931, cached data 931 [ 1.367423] ioapic0 pin8, hardware reg 938, cached data 938 [ 7.560846] ioapic0 pin17, hardware reg a981, cached data 1a981 [ 7.866814] ioapic0 pin18, hardware reg a9a1, cached data 1a9a1 [ 10.141662] ioapic0 pin16, hardware reg a942, cached data 1a942
This would explain the failure because the ahci ioapic pin19 has that discrepancy:
[ 1.311476] ahci 0000:00:11.0: version 3.0 [ 1.313374] ahci 0000:00:11.0: AHCI 0001.0200 32 slots 1 ports 3 Gbps 0x1 impl SATA mode [ 1.313556] ahci 0000:00:11.0: flags: 64bit ncq sntf ilck pm led clo pmp pio slum part ccc [ 1.313959] ioapic0 pin19, hardware reg a9c1, cached data 1a9c1 [ 1.317281] scsi host0: ahci
Btw, that's 32-bit.
Full dmesg attached.
Signature · 5 lines
Regards/Gruss,
Boris.
Sent from a fat crate under my desk. Formatting is fine.
--[ 0.000000] Initializing cgroup subsys cpu [ 0.000000] Linux version 3.18.0-rc6+ (boris@pd) (gcc version 4.9.1 (Debian 4.9.1-19) ) #25 SMP PREEMPT Fri Nov 28 12:15:46 CET 2014 [ 0.000000] e820: BIOS-provided physical RAM map: [ 0.000000] BIOS-e820: [mem 0x0000000000000000-0x000000000009d7ff] usable [ 0.000000] BIOS-e820: [mem 0x000000000009d800-0x000000000009ffff] reserved [ 0.000000] BIOS-e820: [mem 0x00000000000e0000-0x00000000000fffff] reserved [ 0.000000] BIOS-e820: [mem 0x0000000000100000-0x00000000c6cf5fff] usable [ 0.000000] BIOS-e820: [mem 0x00000000c6cf6000-0x00000000c7105fff] reserved [ 0.000000] BIOS-e820: [mem 0x00000000c7106000-0x00000000c7185fff] ACPI NVS [ 0.000000] BIOS-e820: [mem 0x00000000c7186000-0x00000000c71e5fff] ACPI data [ 0.000000] BIOS-e820: [mem 0x00000000c71e6000-0x00000000c7bfffff] usable [ 0.000000] BIOS-e820: [mem 0x00000000c7c00000-0x00000000c7ffffff] reserved [ 0.000000] BIOS-e820: [mem 0x00000000fec00000-0x00000000fecfffff] reserved [ 0.000000] BIOS-e820: [mem 0x00000000fed80000-0x00000000fed80fff] reserved [ 0.000000] BIOS-e820: [mem 0x00000000ffe00000-0x00000000ffffffff] reserved [ 0.000000] BIOS-e820: [mem 0x0000000100000000-0x000000011effffff] usable [ 0.000000] debug: ignoring loglevel setting. [ 0.000000] Notice: NX (Execute Disable) protection cannot be enabled: non-PAE kernel! [ 0.000000] SMBIOS 2.6 present. [ 0.000000] DMI: LENOVO 30515QG/30515QG, BIOS 8RET30WW (1.12 ) 09/15/2011 [ 0.000000] e820: update [mem 0x00000000-0x00000fff] usable ==> reserved [ 0.000000] e820: remove [mem 0x000a0000-0x000fffff] usable [ 0.000000] e820: last_pfn = 0xc7c00 max_arch_pfn = 0x100000 [ 0.000000] MTRR default type: uncachable [ 0.000000] MTRR fixed ranges enabled: [ 0.000000] 00000-9FFFF write-back [ 0.000000] A0000-BFFFF uncachable [ 0.000000] C0000-FFFFF write-protect [ 0.000000] MTRR variable ranges enabled: [ 0.000000] 0 base 000000000 mask F80000000 write-back [ 0.000000] 1 base 080000000 mask FC0000000 write-back [ 0.000000] 2 base 0C0000000 mask FF8000000 write-back [ 0.000000] 3 base 0FFF90000 mask FFFFF0000 uncachable [ 0.000000] 4 base 0FED80000 mask FFFFFF000 uncachable [ 0.000000] 5 disabled [ 0.000000] 6 disabled [ 0.000000] 7 base 0FFE00000 mask FFFE00000 write-protect [ 0.000000] TOM2: 000000011f000000 aka 4592M [ 0.000000] PAT configuration [0-7]: WB WC UC- UC WB WC UC- UC [ 0.000000] initial memory mapped: [mem 0x00000000-0x027fffff] [ 0.000000] Base memory trampoline at [c0099000] 99000 size 16384 [ 0.000000] init_memory_mapping: [mem 0x00000000-0x000fffff] [ 0.000000] [mem 0x00000000-0x000fffff] page 4k [ 0.000000] init_memory_mapping: [mem 0x37000000-0x373fffff] [ 0.000000] [mem 0x37000000-0x373fffff] page 2M [ 0.000000] init_memory_mapping: [mem 0x30000000-0x36ffffff] [ 0.000000] [mem 0x30000000-0x36ffffff] page 2M [ 0.000000] init_memory_mapping: [mem 0x00100000-0x2fffffff] [ 0.000000] [mem 0x00100000-0x003fffff] page 4k [ 0.000000] [mem 0x00400000-0x2fffffff] page 2M [ 0.000000] init_memory_mapping: [mem 0x37400000-0x377fdfff] [ 0.000000] [mem 0x37400000-0x377fdfff] page 4k [ 0.000000] BRK [0x023bf000, 0x023bffff] PGTABLE [ 0.000000] log_buf_len: 16777216 bytes [ 0.000000] early log buf free: 2093776(99%) [ 0.000000] RAMDISK: [mem 0x37a42000-0x37d18fff] [ 0.000000] Allocated new RAMDISK: [mem 0x36527000-0x367fd4f7] [ 0.000000] Move RAMDISK from [mem 0x37a42000-0x37d184f7] to [mem 0x36527000-0x367fd4f7] [ 0.000000] ACPI: Early table checksum verification disabled [ 0.000000] ACPI: RSDP 0x000F00E0 000024 (v04 LENOVO) [ 0.000000] ACPI: XSDT 0xC71E5120 000074 (v01 LENOVO TP-8R 00000003 PTEC 00000002) [ 0.000000] ACPI: FACP 0xC71D3000 0000F4 (v04 LENOVO TP-8R 00001130 PTL 00000002) [ 0.000000] ACPI: DSDT 0xC71D5000 00EABE (v01 LENOVO TP-8R 00001000 PTEC 00001130) [ 0.000000] ACPI: FACS 0xC7171000 000040 [ 0.000000] ACPI: SLIC 0xC71E4000 000176 (v01 LENOVO TP-8R 00001130 PTEC 00000001) [ 0.000000] ACPI: HPET 0xC71D2000 000038 (v01 LENOVO TP-8R 00001130 PTL 00000002) [ 0.000000] ACPI: APIC 0xC71D1000 00005E (v02 LENOVO TP-8R 00001130 PTL 00000002) [ 0.000000] ACPI: MCFG 0xC71D0000 00003C (v01 LENOVO TP-8R 00001130 PTL 00000002) [ 0.000000] ACPI: UEFI 0xC71CF000 00003E (v01 LENOVO TP-8R 00001130 PTL 00000002) [ 0.000000] ACPI: UEFI 0xC71CE000 000042 (v01 PTL COMBUF 00000001 PTL 00000001) [ 0.000000] ACPI: SSDT 0xC71CD000 0003DE (v01 AMD POWERNOW 00000001 AMD 00000001) [ 0.000000] ACPI: SSDT 0xC71CB000 00168E (v02 AMD ALIB 00000001 MSFT 04000000) [ 0.000000] ACPI: UEFI 0xC71CA000 00013E (v01 LENOVO TP-8R 00001130 PTL 00000002) [ 0.000000] ACPI: Local APIC address 0xfee00000 [ 0.000000] 2308MB HIGHMEM available. [ 0.000000] 887MB LOWMEM available. [ 0.000000] mapped low ram: 0 - 377fe000 [ 0.000000] low ram: 0 - 377fe000 [ 0.000000] BRK [0x023c0000, 0x023c0fff] PGTABLE [ 0.000000] Zone ranges: [ 0.000000] DMA [mem 0x00001000-0x00ffffff] [ 0.000000] Normal [mem 0x01000000-0x377fdfff] [ 0.000000] HighMem [mem 0x377fe000-0xc7bfffff] [ 0.000000] Movable zone start for each node [ 0.000000] Early memory node ranges [ 0.000000] node 0: [mem 0x00001000-0x0009cfff] [ 0.000000] node 0: [mem 0x00100000-0xc6cf5fff] [ 0.000000] node 0: [mem 0xc71e6000-0xc7bfffff] [ 0.000000] Initmem setup node 0 [mem 0x00001000-0xc7bfffff] [ 0.000000] On node 0 totalpages: 816812 [ 0.000000] DMA zone: 32 pages used for memmap [ 0.000000] DMA zone: 0 pages reserved [ 0.000000] DMA zone: 3996 pages, LIFO batch:0 [ 0.000000] Normal zone: 1744 pages used for memmap [ 0.000000] Normal zone: 223230 pages, LIFO batch:31 [ 0.000000] HighMem zone: 4617 pages used for memmap [ 0.000000] HighMem zone: 589586 pages, LIFO batch:31 [ 0.000000] Using APIC driver default [ 0.000000] ACPI: PM-Timer IO Port: 0x808 [ 0.000000] ACPI: Local APIC address 0xfee00000 [ 0.000000] ACPI: LAPIC (acpi_id[0x00] lapic_id[0x00] enabled) [ 0.000000] ACPI: LAPIC (acpi_id[0x01] lapic_id[0x01] enabled) [ 0.000000] ACPI: LAPIC_NMI (acpi_id[0x00] high edge lint[0x1]) [ 0.000000] ACPI: LAPIC_NMI (acpi_id[0x01] high edge lint[0x1]) [ 0.000000] ACPI: IOAPIC (id[0x02] address[0xfec00000] gsi_base[0]) [ 0.000000] IOAPIC[0]: apic_id 2, version 33, address 0xfec00000, GSI 0-23 [ 0.000000] ACPI: INT_SRC_OVR (bus 0 bus_irq 0 global_irq 2 dfl dfl) [ 0.000000] ACPI: IRQ0 used by override. [ 0.000000] ACPI: IRQ9 used by override. [ 0.000000] Using ACPI (MADT) for SMP configuration information [ 0.000000] ACPI: HPET id: 0x43538210 base: 0xfed00000 [ 0.000000] smpboot: Allowing 2 CPUs, 0 hotplug CPUs [ 0.000000] PM: Registered nosave memory: [mem 0x00000000-0x00000fff] [ 0.000000] PM: Registered nosave memory: [mem 0x0009d000-0x0009dfff] [ 0.000000] PM: Registered nosave memory: [mem 0x0009e000-0x0009ffff] [ 0.000000] PM: Registered nosave memory: [mem 0x000a0000-0x000dffff] [ 0.000000] PM: Registered nosave memory: [mem 0x000e0000-0x000fffff] [ 0.000000] e820: [mem 0xc8000000-0xfebfffff] available for PCI devices [ 0.000000] setup_percpu: NR_CPUS:2 nr_cpumask_bits:2 nr_cpu_ids:2 nr_node_ids:1 [ 0.000000] PERCPU: Embedded 16 pages/cpu @f4bd2000 s34304 r0 d31232 u65536 [ 0.000000] pcpu-alloc: s34304 r0 d31232 u65536 alloc=16*4096 [ 0.000000] pcpu-alloc: [0] 0 [0] 1 [ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 815036 [ 0.000000] Kernel command line: BOOT_IMAGE=/boot/vmlinuz-3.18.0-rc6+ root=/dev/sda9 ro debug ignore_loglevel log_buf_len=10M [ 0.000000] PID hash table entries: 4096 (order: 2, 16384 bytes) [ 0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes) [ 0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes) [ 0.000000] Initializing CPU#0 [ 0.000000] Initializing HighMem for node 0 (000377fe:000c7c00) [ 0.000000] Initializing Movable for node 0 (00000000:00000000) [ 0.000000] Memory: 3200920K/3267248K available (5950K kernel code, 578K rwdata, 2416K rodata, 620K init, 10576K bss, 66328K reserved, 2358344K highmem) [ 0.000000] virtual kernel memory layout: [ 0.000000] fixmap : 0xfff8f000 - 0xfffff000 ( 448 kB) [ 0.000000] pkmap : 0xff800000 - 0xffc00000 (4096 kB) [ 0.000000] vmalloc : 0xf7ffe000 - 0xff7fe000 ( 120 MB) [ 0.000000] lowmem : 0xc0000000 - 0xf77fe000 ( 887 MB) [ 0.000000] .init : 0xc18c0000 - 0xc195b000 ( 620 kB) [ 0.000000] .data : 0xc15cfe1e - 0xc18beac0 (3003 kB) [ 0.000000] .text : 0xc1000000 - 0xc15cfe1e (5951 kB) [ 0.000000] Checking if this processor honours the WP bit even in supervisor mode...Ok. [ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1 [ 0.000000] Preemptible hierarchical RCU implementation. [ 0.000000] RCU lockdep checking is enabled. [ 0.000000] Additional per-CPU info printed with stalls. [ 0.000000] Running RCU self tests [ 0.000000] NR_IRQS:2304 nr_irqs:440 16 [ 0.000000] CPU 0 irqstacks, hard=f440a000 soft=f440c000 [ 0.000000] spurious 8259A interrupt: IRQ7. [ 0.000000] Console: colour VGA+ 80x25 [ 0.000000] console [tty0] enabled [ 0.000000] Lock dependency validator: Copyright (c) 2006 Red Hat, Inc., Ingo Molnar [ 0.000000] ... MAX_LOCKDEP_SUBCLASSES: 8 [ 0.000000] ... MAX_LOCK_DEPTH: 48 [ 0.000000] ... MAX_LOCKDEP_KEYS: 8191 [ 0.000000] ... CLASSHASH_SIZE: 4096 [ 0.000000] ... MAX_LOCKDEP_ENTRIES: 32768 [ 0.000000] ... MAX_LOCKDEP_CHAINS: 65536 [ 0.000000] ... CHAINHASH_SIZE: 32768 [ 0.000000] memory used by lock dependency info: 4911 kB [ 0.000000] per task-struct memory footprint: 1152 bytes [ 0.000000] ------------------------ [ 0.000000] | Locking API testsuite: [ 0.000000] ---------------------------------------------------------------------------- [ 0.000000] | spin |wlock |rlock |mutex | wsem | rsem | [ 0.000000] -------------------------------------------------------------------------- [ 0.000000] A-A deadlock: ok | ok | ok | ok | ok | ok | [ 0.000000] A-B-B-A deadlock: ok | ok | ok | ok | ok | ok | [ 0.000000] A-B-B-C-C-A deadlock: ok | ok | ok | ok | ok | ok | [ 0.000000] A-B-C-A-B-C deadlock: ok | ok | ok | ok | ok | ok | [ 0.000000] A-B-B-C-C-D-D-A deadlock: ok | ok | ok | ok | ok | ok | [ 0.000000] A-B-C-D-B-D-D-A deadlock: ok | ok | ok | ok | ok | ok | [ 0.000000] A-B-C-D-B-C-D-A deadlock: ok | ok | ok | ok | ok | ok | [ 0.000000] double unlock: ok | ok | ok | ok | ok | ok | [ 0.000000] initialize held: ok | ok | ok | ok | ok | ok | [ 0.000000] bad unlock order: ok | ok | ok | ok | ok | ok | [ 0.000000] -------------------------------------------------------------------------- [ 0.000000] recursive read-lock: | ok | | ok | [ 0.000000] recursive read-lock #2: | ok | | ok | [ 0.000000] mixed read-write-lock: | ok | | ok | [ 0.000000] mixed write-read-lock: | ok | | ok | [ 0.000000] -------------------------------------------------------------------------- [ 0.000000] hard-irqs-on + irq-safe-A/12: ok | ok | ok | [ 0.000000] soft-irqs-on + irq-safe-A/12: ok | ok | ok | [ 0.000000] hard-irqs-on + irq-safe-A/21: ok | ok | ok | [ 0.000000] soft-irqs-on + irq-safe-A/21: ok | ok | ok | [ 0.000000] sirq-safe-A => hirqs-on/12: ok | ok | ok | [ 0.000000] sirq-safe-A => hirqs-on/21: ok | ok | ok | [ 0.000000] hard-safe-A + irqs-on/12: ok | ok | ok | [ 0.000000] soft-safe-A + irqs-on/12: ok | ok | ok | [ 0.000000] hard-safe-A + irqs-on/21: ok | ok | ok | [ 0.000000] soft-safe-A + irqs-on/21: ok | ok | ok | [ 0.000000] hard-safe-A + unsafe-B #1/123: ok | ok | ok | [ 0.000000] soft-safe-A + unsafe-B #1/123: ok | ok | ok | [ 0.000000] hard-safe-A + unsafe-B #1/132: ok | ok | ok | [ 0.000000] soft-safe-A + unsafe-B #1/132: ok | ok | ok | [ 0.000000] hard-safe-A + unsafe-B #1/213: ok | ok | ok | [ 0.000000] soft-safe-A + unsafe-B #1/213: ok | ok | ok | [ 0.000000] hard-safe-A + unsafe-B #1/231: ok | ok | ok | [ 0.000000] soft-safe-A + unsafe-B #1/231: ok | ok | ok | [ 0.000000] hard-safe-A + unsafe-B #1/312: ok | ok | ok | [ 0.000000] soft-safe-A + unsafe-B #1/312: ok | ok | ok | [ 0.000000] hard-safe-A + unsafe-B #1/321: ok | ok | ok | [ 0.000000] soft-safe-A + unsafe-B #1/321: ok | ok | ok | [ 0.000000] hard-safe-A + unsafe-B #2/123: ok | ok | ok | [ 0.000000] soft-safe-A + unsafe-B #2/123: ok | ok | ok | [ 0.000000] hard-safe-A + unsafe-B #2/132: ok | ok | ok | [ 0.000000] soft-safe-A + unsafe-B #2/132: ok | ok | ok | [ 0.000000] hard-safe-A + unsafe-B #2/213: ok | ok | ok | [ 0.000000] soft-safe-A + unsafe-B #2/213: ok | ok | ok | [ 0.000000] hard-safe-A + unsafe-B #2/231: ok | ok | ok | [ 0.000000] soft-safe-A + unsafe-B #2/231: ok | ok | ok | [ 0.000000] hard-safe-A + unsafe-B #2/312: ok | ok | ok | [ 0.000000] soft-safe-A + unsafe-B #2/312: ok | ok | ok | [ 0.000000] hard-safe-A + unsafe-B #2/321: ok | ok | ok | [ 0.000000] soft-safe-A + unsafe-B #2/321: ok | ok | ok | [ 0.000000] hard-irq lock-inversion/123: ok | ok | ok | [ 0.000000] soft-irq lock-inversion/123: ok | ok | ok | [ 0.000000] hard-irq lock-inversion/132: ok | ok | ok | [ 0.000000] soft-irq lock-inversion/132: ok | ok | ok | [ 0.000000] hard-irq lock-inversion/213: ok | ok | ok | [ 0.000000] soft-irq lock-inversion/213: ok | ok | ok | [ 0.000000] hard-irq lock-inversion/231: ok | ok | ok | [ 0.000000] soft-irq lock-inversion/231: ok | ok | ok | [ 0.000000] hard-irq lock-inversion/312: ok | ok | ok | [ 0.000000] soft-irq lock-inversion/312: ok | ok | ok | [ 0.000000] hard-irq lock-inversion/321: ok | ok | ok | [ 0.000000] soft-irq lock-inversion/321: ok | ok | ok | [ 0.000000] hard-irq read-recursion/123: ok | [ 0.000000] soft-irq read-recursion/123: ok | [ 0.000000] hard-irq read-recursion/132: ok | [ 0.000000] soft-irq read-recursion/132: ok | [ 0.000000] hard-irq read-recursion/213: ok | [ 0.000000] soft-irq read-recursion/213: ok | [ 0.000000] hard-irq read-recursion/231: ok | [ 0.000000] soft-irq read-recursion/231: ok | [ 0.000000] hard-irq read-recursion/312: ok | [ 0.000000] soft-irq read-recursion/312: ok | [ 0.000000] hard-irq read-recursion/321: ok | [ 0.000000] soft-irq read-recursion/321: ok | [ 0.000000] -------------------------------------------------------------------------- [ 0.000000] | Wound/wait tests | [ 0.000000] --------------------- [ 0.000000] ww api failures: ok | ok | ok | [ 0.000000] ww contexts mixing: ok | ok | [ 0.000000] finishing ww context: ok | ok | ok | ok | [ 0.000000] locking mismatches: ok | ok | ok | [ 0.000000] EDEADLK handling: ok | ok | ok | ok | ok | ok | ok | ok | ok | ok | [ 0.000000] spinlock nest unlocked: ok | [ 0.000000] ----------------------------------------------------- [ 0.000000] |block | try |context| [ 0.000000] ----------------------------------------------------- [ 0.000000] context: ok | ok | ok | [ 0.000000] try: ok | ok | ok | [ 0.000000] block: ok | ok | ok | [ 0.000000] spinlock: ok | ok | ok | [ 0.000000] ------------------------------------------------------- [ 0.000000] Good, all 253 testcases passed! | [ 0.000000] --------------------------------- [ 0.000000] kmemleak: Kernel memory leak detector disabled [ 0.000000] kmemleak: Early log buffer exceeded (806), please increase DEBUG_KMEMLEAK_EARLY_LOG_SIZE [ 0.000000] hpet clockevent registered [ 0.000000] tsc: Fast TSC calibration using PIT [ 0.000000] tsc: Detected 1596.614 MHz processor [ 0.000005] Calibrating delay loop (skipped), value calculated using timer frequency.. 3193.22 BogoMIPS (lpj=6386456) [ 0.000180] pid_max: default: 32768 minimum: 301 [ 0.000341] ACPI: Core revision 20140926 [ 0.086010] ACPI: All ACPI Tables successfully acquired [ 0.091341] Mount-cache hash table entries: 2048 (order: 1, 8192 bytes) [ 0.091484] Mountpoint-cache hash table entries: 2048 (order: 1, 8192 bytes) [ 0.093627] CPU: Physical Processor ID: 0 [ 0.093764] CPU: Processor Core ID: 0 [ 0.093897] mce: CPU supports 6 MCE banks [ 0.094052] Last level iTLB entries: 4KB 512, 2MB 8, 4MB 4 [ 0.094052] Last level dTLB entries: 4KB 512, 2MB 8, 4MB 4, 1GB 0 [ 0.094857] Freeing SMP alternatives memory: 20K (c195b000 - c1960000) [ 0.094999] ftrace: allocating 20962 entries in 41 pages [ 0.116271] Enabling APIC mode: Flat. Using 1 I/O APICs [ 0.117451] ..TIMER: vector=0x30 apic1=0 pin1=2 apic2=-1 pin2=-1 [ 0.157254] smpboot: CPU0: AMD E-350 Processor (fam: 14, model: 01, stepping: 00) [ 0.262763] Performance Events: AMD PMU driver. [ 0.263006] ... version: 0 [ 0.263138] ... bit width: 48 [ 0.263268] ... generic registers: 4 [ 0.263398] ... value mask: 0000ffffffffffff [ 0.263485] ... max period: 00007fffffffffff [ 0.263571] ... fixed-purpose events: 0 [ 0.263655] ... event mask: 000000000000000f [ 0.281937] MCE: In-kernel MCE decoding enabled. [ 0.287924] CPU 1 irqstacks, hard=f455a000 soft=f455c000 [ 0.288119] x86: Booting SMP configuration: [ 0.288251] .... node #0, CPUs: #1 [ 0.304710] Initializing CPU#1 [ 0.307281] x86: Booted up 1 node, 2 CPUs [ 0.307672] ---------------- [ 0.307803] | NMI testsuite: [ 0.307930] -------------------- [ 0.308059] remote IPI: ok | [ 0.319242] local IPI: ok | [ 0.342982] -------------------- [ 0.343172] Good, all 2 testcases passed! | [ 0.343303] --------------------------------- [ 0.343436] smpboot: Total of 2 processors activated (6386.45 BogoMIPS) [ 0.346863] devtmpfs: initialized [ 0.348982] PM: Registering ACPI NVS region [mem 0xc7106000-0xc7185fff] (524288 bytes) [ 0.354336] NET: Registered protocol family 16 [ 0.367499] cpuidle: using governor ladder [ 0.379023] cpuidle: using governor menu [ 0.379687] ACPI: bus type PCI registered [ 0.379867] acpiphp: ACPI Hot Plug PCI Controller Driver version: 0.5 [ 0.380565] PCI: MMCONFIG for domain 0000 [bus 00-1f] at [mem 0xf8000000-0xf9ffffff] (base 0xf8000000) [ 0.380769] PCI: not using MMCONFIG [ 0.381217] PCI: PCI BIOS revision 3.00 entry at 0xfc030, last bus=31 [ 0.381398] PCI: Using configuration type 1 for base access [ 0.381514] PCI: Using configuration type 1 for extended access [ 0.382075] mtrr: your CPUs had inconsistent variable MTRR settings [ 0.382256] mtrr: probably your BIOS does not setup all CPUs. [ 0.382389] mtrr: corrected configuration. [ 0.408062] ACPI: Added _OSI(Module Device) [ 0.408254] ACPI: Added _OSI(Processor Device) [ 0.408388] ACPI: Added _OSI(3.0 _SCP Extensions) [ 0.408476] ACPI: Added _OSI(Processor Aggregator Device) [ 0.429355] ioapic0 pin9, hardware reg a939, cached data 1a939 [ 0.496923] [Firmware Bug]: ACPI: BIOS _OSI(Linux) query ignored [ 0.506249] ioapic0 pin9, hardware reg 1a939, cached data 1a939 [ 0.520591] ACPI: Interpreter enabled [ 0.520805] ACPI Exception: AE_NOT_FOUND, While evaluating Sleep State [\_S1_] (20140926/hwxface-580) [ 0.521116] ACPI Exception: AE_NOT_FOUND, While evaluating Sleep State [\_S2_] (20140926/hwxface-580) [ 0.521461] ACPI: (supports S0 S3 S4 S5) [ 0.521547] ACPI: Using IOAPIC for interrupt routing [ 0.522731] PCI: MMCONFIG for domain 0000 [bus 00-1f] at [mem 0xf8000000-0xf9ffffff] (base 0xf8000000) [ 0.527039] PCI: MMCONFIG at [mem 0xf8000000-0xf9ffffff] reserved in ACPI motherboard resources [ 0.527250] PCI: Using MMCONFIG for extended config space [ 0.527436] PCI: Using host bridge windows from ACPI; if necessary, use "pci=nocrs" and report a bug [ 0.533157] [Firmware Bug]: ACPI: No _BQC method, cannot determine initial brightness [ 0.585723] [Firmware Bug]: ACPI: No _BQC method, cannot determine initial brightness [ 0.601088] ACPI: PCI Root Bridge [PCI0] (domain 0000 [bus 00-ff]) [ 0.601298] acpi PNP0A08:00: _OSC: OS supports [ExtendedConfig ASPM ClockPM Segments MSI] [ 0.604618] acpi PNP0A08:00: _OSC: OS now controls [PCIeHotplug PME PCIeCapability] [ 0.614418] acpi PNP0A08:00: ignoring host bridge window [mem 0x000ce000-0x000cffff] (conflicts with Video ROM [mem 0x000c0000-0x000ce5ff]) [ 0.614696] acpi PNP0A08:00: [Firmware Info]: MMCONFIG for domain 0000 [bus 00-1f] only partially covers this bridge [ 0.616938] PCI host bridge to bus 0000:00 [ 0.617124] pci_bus 0000:00: root bus resource [bus 00-ff] [ 0.617261] pci_bus 0000:00: root bus resource [mem 0x000a0000-0x000bffff] [ 0.617384] pci_bus 0000:00: root bus resource [mem 0x000c0000-0x000c1fff] [ 0.617476] pci_bus 0000:00: root bus resource [mem 0x000c2000-0x000c3fff] [ 0.617615] pci_bus 0000:00: root bus resource [mem 0x000c4000-0x000c5fff] [ 0.617753] pci_bus 0000:00: root bus resource [mem 0x000c6000-0x000c7fff] [ 0.617892] pci_bus 0000:00: root bus resource [mem 0x000c8000-0x000c9fff] [ 0.618030] pci_bus 0000:00: root bus resource [mem 0x000ca000-0x000cbfff] [ 0.618168] pci_bus 0000:00: root bus resource [mem 0x000cc000-0x000cdfff] [ 0.618298] pci_bus 0000:00: root bus resource [mem 0x000d0000-0x000d1fff] [ 0.618440] pci_bus 0000:00: root bus resource [mem 0x000d2000-0x000d3fff] [ 0.618578] pci_bus 0000:00: root bus resource [mem 0x000d4000-0x000d5fff] [ 0.618717] pci_bus 0000:00: root bus resource [mem 0x000d6000-0x000d7fff] [ 0.618855] pci_bus 0000:00: root bus resource [mem 0x000d8000-0x000d9fff] [ 0.619002] pci_bus 0000:00: root bus resource [mem 0x000da000-0x000dbfff] [ 0.619137] pci_bus 0000:00: root bus resource [mem 0x000dc000-0x000ddfff] [ 0.619272] pci_bus 0000:00: root bus resource [mem 0x000de000-0x000dffff] [ 0.619359] pci_bus 0000:00: root bus resource [mem 0x000e0000-0x000e1fff] [ 0.619478] pci_bus 0000:00: root bus resource [mem 0x000e2000-0x000e3fff] [ 0.619611] pci_bus 0000:00: root bus resource [mem 0x000e4000-0x000e5fff] [ 0.619744] pci_bus 0000:00: root bus resource [mem 0x000e6000-0x000e7fff] [ 0.619878] pci_bus 0000:00: root bus resource [mem 0x000e8000-0x000e9fff] [ 0.620011] pci_bus 0000:00: root bus resource [mem 0x000ea000-0x000ebfff] [ 0.620143] pci_bus 0000:00: root bus resource [mem 0x000ec000-0x000edfff] [ 0.620277] pci_bus 0000:00: root bus resource [mem 0x000ee000-0x000effff] [ 0.620364] pci_bus 0000:00: root bus resource [mem 0xe0000000-0xf7ffffff] [ 0.620480] pci_bus 0000:00: root bus resource [mem 0xf8000000-0xffffffff] [ 0.620614] pci_bus 0000:00: root bus resource [io 0x0000-0x0cf7] [ 0.620747] pci_bus 0000:00: root bus resource [io 0x0d00-0xffff] [ 0.620938] pci 0000:00:00.0: [1022:1510] type 00 class 0x060000 [ 0.622146] pci 0000:00:01.0: [1002:9802] type 00 class 0x030000 [ 0.622326] pci 0000:00:01.0: reg 0x10: [mem 0xe0000000-0xefffffff pref] [ 0.622473] pci 0000:00:01.0: reg 0x14: [io 0x4000-0x40ff] [ 0.622620] pci 0000:00:01.0: reg 0x18: [mem 0xf0300000-0xf033ffff] [ 0.622927] pci 0000:00:01.0: supports D1 D2 [ 0.624134] pci 0000:00:01.1: [1002:1314] type 00 class 0x040300 [ 0.624321] pci 0000:00:01.1: reg 0x10: [mem 0xf0344000-0xf0347fff] [ 0.624655] pci 0000:00:01.1: supports D1 D2 [ 0.625507] pci 0000:00:05.0: [1022:1513] type 01 class 0x060400 [ 0.625849] pci 0000:00:05.0: PME# supported from D0 D3hot D3cold [ 0.626652] pci 0000:00:05.0: System wakeup disabled by ACPI [ 0.627214] pci 0000:00:06.0: [1022:1514] type 01 class 0x060400 [ 0.627509] pci 0000:00:06.0: PME# supported from D0 D3hot D3cold [ 0.628097] pci 0000:00:06.0: System wakeup disabled by ACPI [ 0.628633] pci 0000:00:07.0: [1022:1515] type 01 class 0x060400 [ 0.629019] pci 0000:00:07.0: PME# supported from D0 D3hot D3cold [ 0.629645] pci 0000:00:07.0: System wakeup disabled by ACPI [ 0.630234] pci 0000:00:11.0: [1002:4391] type 00 class 0x010601 [ 0.630408] pci 0000:00:11.0: reg 0x10: [io 0x4118-0x411f] [ 0.630560] pci 0000:00:11.0: reg 0x14: [io 0x4124-0x4127] [ 0.630710] pci 0000:00:11.0: reg 0x18: [io 0x4110-0x4117] [ 0.630861] pci 0000:00:11.0: reg 0x1c: [io 0x4120-0x4123] [ 0.631020] pci 0000:00:11.0: reg 0x20: [io 0x4100-0x410f] [ 0.631170] pci 0000:00:11.0: reg 0x24: [mem 0xf034a000-0xf034a3ff] [ 0.632156] pci 0000:00:12.0: [1002:4397] type 00 class 0x0c0310 [ 0.632316] pci 0000:00:12.0: reg 0x10: [mem 0xf0349000-0xf0349fff] [ 0.633115] pci 0000:00:12.0: System wakeup disabled by ACPI [ 0.633703] pci 0000:00:12.2: [1002:4396] type 00 class 0x0c0320 [ 0.633877] pci 0000:00:12.2: reg 0x10: [mem 0xf034a500-0xf034a5ff] [ 0.634231] pci 0000:00:12.2: supports D1 D2 [ 0.634360] pci 0000:00:12.2: PME# supported from D0 D1 D2 D3hot [ 0.634978] pci 0000:00:12.2: System wakeup disabled by ACPI [ 0.635526] pci 0000:00:13.0: [1002:4397] type 00 class 0x0c0310 [ 0.635688] pci 0000:00:13.0: reg 0x10: [mem 0xf0348000-0xf0348fff] [ 0.636474] pci 0000:00:13.0: System wakeup disabled by ACPI [ 0.637021] pci 0000:00:13.2: [1002:4396] type 00 class 0x0c0320 [ 0.637194] pci 0000:00:13.2: reg 0x10: [mem 0xf034a400-0xf034a4ff] [ 0.637499] pci 0000:00:13.2: supports D1 D2 [ 0.637627] pci 0000:00:13.2: PME# supported from D0 D1 D2 D3hot [ 0.638532] pci 0000:00:14.0: [1002:4385] type 00 class 0x0c0500 [ 0.639512] pci 0000:00:14.2: [1002:4383] type 00 class 0x040300 [ 0.639691] pci 0000:00:14.2: reg 0x10: [mem 0xf0340000-0xf0343fff 64bit] [ 0.640005] pci 0000:00:14.2: PME# supported from D0 D3hot D3cold [ 0.640577] pci 0000:00:14.2: System wakeup disabled by ACPI [ 0.641159] pci 0000:00:14.3: [1002:439d] type 00 class 0x060100 [ 0.642181] pci 0000:00:14.4: [1002:4384] type 01 class 0x060401 [ 0.642804] pci 0000:00:14.4: System wakeup disabled by ACPI [ 0.643368] pci 0000:00:18.0: [1022:1700] type 00 class 0x060000 [ 0.644250] pci 0000:00:18.1: [1022:1701] type 00 class 0x060000 [ 0.645095] pci 0000:00:18.2: [1022:1702] type 00 class 0x060000 [ 0.646023] pci 0000:00:18.3: [1022:1703] type 00 class 0x060000 [ 0.646956] pci 0000:00:18.4: [1022:1704] type 00 class 0x060000 [ 0.647882] pci 0000:00:18.5: [1022:1718] type 00 class 0x060000 [ 0.648804] pci 0000:00:18.6: [1022:1716] type 00 class 0x060000 [ 0.649733] pci 0000:00:18.7: [1022:1719] type 00 class 0x060000 [ 0.651119] pci 0000:01:00.0: [10ec:8176] type 00 class 0x028000 [ 0.651317] pci 0000:01:00.0: reg 0x10: [io 0x3000-0x30ff] [ 0.651506] pci 0000:01:00.0: reg 0x18: [mem 0xf0200000-0xf0203fff 64bit] [ 0.651947] pci 0000:01:00.0: supports D1 D2 [ 0.652126] pci 0000:01:00.0: PME# supported from D0 D1 D2 D3hot D3cold [ 0.659292] pci 0000:00:05.0: PCI bridge to [bus 01] [ 0.659451] pci 0000:00:05.0: bridge window [io 0x3000-0x3fff] [ 0.659594] pci 0000:00:05.0: bridge window [mem 0xf0200000-0xf02fffff] [ 0.660203] pci 0000:02:00.0: [1969:1083] type 00 class 0x020000 [ 0.660400] pci 0000:02:00.0: reg 0x10: [mem 0xf0100000-0xf013ffff 64bit] [ 0.660589] pci 0000:02:00.0: reg 0x18: [io 0x2000-0x207f] [ 0.660990] pci 0000:02:00.0: PME# supported from D0 D1 D2 D3hot D3cold [ 0.667250] pci 0000:00:06.0: PCI bridge to [bus 02] [ 0.667364] pci 0000:00:06.0: bridge window [io 0x2000-0x2fff] [ 0.667460] pci 0000:00:06.0: bridge window [mem 0xf0100000-0xf01fffff] [ 0.668070] pci 0000:03:00.0: [10ec:5209] type 00 class 0xff0000 [ 0.668298] pci 0000:03:00.0: reg 0x10: [mem 0xf0000000-0xf0000fff] [ 0.668570] pci 0000:03:00.0: reg 0x30: [mem 0xffff0000-0xffffffff pref] [ 0.668933] pci 0000:03:00.0: supports D1 D2 [ 0.669113] pci 0000:03:00.0: PME# supported from D1 D2 D3hot [ 0.675256] pci 0000:00:07.0: PCI bridge to [bus 03] [ 0.675425] pci 0000:00:07.0: bridge window [mem 0xf0000000-0xf00fffff] [ 0.676023] pci 0000:00:14.4: PCI bridge to [bus 04] (subtractive decode) [ 0.676182] pci 0000:00:14.4: bridge window [mem 0x000a0000-0x000bffff] (subtractive decode) [ 0.676350] pci 0000:00:14.4: bridge window [mem 0x000c0000-0x000c1fff] (subtractive decode) [ 0.676529] pci 0000:00:14.4: bridge window [mem 0x000c2000-0x000c3fff] (subtractive decode) [ 0.676706] pci 0000:00:14.4: bridge window [mem 0x000c4000-0x000c5fff] (subtractive decode) [ 0.676883] pci 0000:00:14.4: bridge window [mem 0x000c6000-0x000c7fff] (subtractive decode) [ 0.677061] pci 0000:00:14.4: bridge window [mem 0x000c8000-0x000c9fff] (subtractive decode) [ 0.677238] pci 0000:00:14.4: bridge window [mem 0x000ca000-0x000cbfff] (subtractive decode) [ 0.677415] pci 0000:00:14.4: bridge window [mem 0x000cc000-0x000cdfff] (subtractive decode) [ 0.677593] pci 0000:00:14.4: bridge window [mem 0x000d0000-0x000d1fff] (subtractive decode) [ 0.677769] pci 0000:00:14.4: bridge window [mem 0x000d2000-0x000d3fff] (subtractive decode) [ 0.677942] pci 0000:00:14.4: bridge window [mem 0x000d4000-0x000d5fff] (subtractive decode) [ 0.678115] pci 0000:00:14.4: bridge window [mem 0x000d6000-0x000d7fff] (subtractive decode) [ 0.678263] pci 0000:00:14.4: bridge window [mem 0x000d8000-0x000d9fff] (subtractive decode) [ 0.678435] pci 0000:00:14.4: bridge window [mem 0x000da000-0x000dbfff] (subtractive decode) [ 0.678607] pci 0000:00:14.4: bridge window [mem 0x000dc000-0x000ddfff] (subtractive decode) [ 0.678780] pci 0000:00:14.4: bridge window [mem 0x000de000-0x000dffff] (subtractive decode) [ 0.678965] pci 0000:00:14.4: bridge window [mem 0x000e0000-0x000e1fff] (subtractive decode) [ 0.679137] pci 0000:00:14.4: bridge window [mem 0x000e2000-0x000e3fff] (subtractive decode) [ 0.679276] pci 0000:00:14.4: bridge window [mem 0x000e4000-0x000e5fff] (subtractive decode) [ 0.679444] pci 0000:00:14.4: bridge window [mem 0x000e6000-0x000e7fff] (subtractive decode) [ 0.679616] pci 0000:00:14.4: bridge window [mem 0x000e8000-0x000e9fff] (subtractive decode) [ 0.679789] pci 0000:00:14.4: bridge window [mem 0x000ea000-0x000ebfff] (subtractive decode) [ 0.679960] pci 0000:00:14.4: bridge window [mem 0x000ec000-0x000edfff] (subtractive decode) [ 0.680133] pci 0000:00:14.4: bridge window [mem 0x000ee000-0x000effff] (subtractive decode) [ 0.680274] pci 0000:00:14.4: bridge window [mem 0xe0000000-0xf7ffffff] (subtractive decode) [ 0.680444] pci 0000:00:14.4: bridge window [mem 0xf8000000-0xffffffff] (subtractive decode) [ 0.680616] pci 0000:00:14.4: bridge window [io 0x0000-0x0cf7] (subtractive decode) [ 0.682457] pci 0000:00:14.4: bridge window [io 0x0d00-0xffff] (subtractive decode) [ 0.682786] pci_bus 0000:00: on NUMA node 0 [ 0.685975] ACPI: PCI Interrupt Link [LNKA] (IRQs 10 11) *0 [ 0.686979] ACPI: PCI Interrupt Link [LNKB] (IRQs 10 11) *0 [ 0.688008] ACPI: PCI Interrupt Link [LNKC] (IRQs 10 11) *0 [ 0.689018] ACPI: PCI Interrupt Link [LNKD] (IRQs 10 11) *0 [ 0.689940] ACPI: PCI Interrupt Link [LNKE] (IRQs 10 11) *0 [ 0.690755] ACPI: PCI Interrupt Link [LNKF] (IRQs 10 11) *0 [ 0.691534] ACPI: PCI Interrupt Link [LNKG] (IRQs 10 11) *0 [ 0.692317] ACPI: PCI Interrupt Link [LNKH] (IRQs 10 11) *0 [ 0.696755] ACPI: Enabled 2 GPEs in block 00 to 1F [ 0.697765] ACPI : EC: GPE = 0x3, I/O: command/status = 0x66, data = 0x62 [ 0.699607] vgaarb: setting as boot device: PCI:0000:00:01.0 [ 0.699802] vgaarb: device added: PCI:0000:00:01.0,decodes=io+mem,owns=io+mem,locks=none [ 0.700011] vgaarb: loaded [ 0.700141] vgaarb: bridge control possible 0000:00:01.0 [ 0.700650] SCSI subsystem initialized [ 0.701437] libata version 3.00 loaded. [ 0.701637] ACPI: bus type USB registered [ 0.702025] usbcore: registered new interface driver usbfs [ 0.702301] usbcore: registered new interface driver hub [ 0.702571] usbcore: registered new device driver usb [ 0.703069] PCI: Using ACPI for IRQ routing [ 0.704929] PCI: pci_cache_line_size set to 64 bytes [ 0.705261] e820: reserve RAM buffer [mem 0x0009d800-0x0009ffff] [ 0.705417] e820: reserve RAM buffer [mem 0xc6cf6000-0xc7ffffff] [ 0.705554] e820: reserve RAM buffer [mem 0xc7c00000-0xc7ffffff] [ 0.707797] hpet0: at MMIO 0xfed00000, IRQs 2, 8, 0 [ 0.708045] hpet0: 3 comparators, 32-bit 14.318180 MHz counter [ 0.711390] Switched to clocksource hpet [ 0.819906] pnp: PnP ACPI init [ 0.820982] system 00:00: [io 0x0f50-0x0f51] has been reserved [ 0.821180] system 00:00: [mem 0xfec00000-0xfec00fff] could not be reserved [ 0.821276] system 00:00: [mem 0xfee00000-0xfee00fff] has been reserved [ 0.821371] system 00:00: [mem 0xf8000000-0xf9ffffff] has been reserved [ 0.821582] system 00:00: Plug and Play ACPI device, IDs PNP0c02 (active) [ 0.825014] pnp 00:01: Plug and Play ACPI device, IDs PNP0b00 (active) [ 0.825431] pnp 00:02: Plug and Play ACPI device, IDs PNP0303 (active) [ 0.825892] pnp 00:03: Plug and Play ACPI device, IDs LEN0026 PNP0f13 (active) [ 0.826462] system 00:04: [io 0x04d0-0x04d1] has been reserved [ 0.826650] system 00:04: [io 0x0530-0x0537] has been reserved [ 0.826793] system 00:04: [io 0x0800-0x0827] could not be reserved [ 0.826933] system 00:04: [io 0x0830] has been reserved [ 0.827071] system 00:04: [io 0x0840-0x0847] has been reserved [ 0.827164] system 00:04: [io 0x0b00-0x0b1f] has been reserved [ 0.827256] system 00:04: [io 0x0b20-0x0b3f] has been reserved [ 0.827368] system 00:04: [io 0x0c00-0x0c01] has been reserved [ 0.827507] system 00:04: [io 0x0c14] has been reserved [ 0.827645] system 00:04: [io 0x0c50-0x0c52] has been reserved [ 0.827784] system 00:04: [io 0x0cd0-0x0cd1] has been reserved [ 0.827923] system 00:04: [io 0x0cd2-0x0cd3] has been reserved [ 0.828062] system 00:04: [io 0x0cd4-0x0cd5] has been reserved [ 0.828182] system 00:04: [io 0x0cd6-0x0cd7] has been reserved [ 0.828322] system 00:04: [io 0x0cd8-0x0cdf] has been reserved [ 0.828464] system 00:04: [io 0x0cf9] could not be reserved [ 0.828602] system 00:04: [io 0x8100-0x81ff window] has been reserved [ 0.828739] system 00:04: [io 0x8200-0x82ff window] has been reserved [ 0.828882] system 00:04: Plug and Play ACPI device, IDs PNP0c02 (active) [ 0.829734] system 00:05: [mem 0x000e0000-0x000fffff] could not be reserved [ 0.829920] system 00:05: [mem 0xffe00000-0xffffffff] has been reserved [ 0.830056] system 00:05: [mem 0xfec10000-0xfec1001f] has been reserved [ 0.830180] system 00:05: [mem 0xfed00000-0xfed003ff] has been reserved [ 0.830321] system 00:05: [mem 0xfed61000-0xfed613ff] has been reserved [ 0.830458] system 00:05: [mem 0xfed80000-0xfed80fff] has been reserved [ 0.830601] system 00:05: Plug and Play ACPI device, IDs PNP0c01 (active) [ 0.831658] pnp: PnP ACPI: found 6 devices [ 0.907825] pci 0000:03:00.0: can't claim BAR 6 [mem 0xffff0000-0xffffffff pref]: no compatible bridge window [ 0.908089] pci 0000:00:07.0: bridge window [io 0x1000-0x0fff] to [bus 03] add_size 1000 [ 0.908288] pci 0000:00:07.0: bridge window [mem 0x00100000-0x000fffff 64bit pref] to [bus 03] add_size 200000 [ 0.908485] pci 0000:00:07.0: res[9]=[mem 0x00100000-0x000fffff 64bit pref] get_res_add_size add_size 200000 [ 0.908665] pci 0000:00:07.0: res[7]=[io 0x1000-0x0fff] get_res_add_size add_size 1000 [ 0.908878] pci 0000:00:07.0: BAR 9: assigned [mem 0xf0400000-0xf05fffff 64bit pref] [ 0.909107] pci 0000:00:07.0: BAR 7: assigned [io 0x1000-0x1fff] [ 0.909207] pci 0000:00:05.0: PCI bridge to [bus 01] [ 0.909298] pci 0000:00:05.0: bridge window [io 0x3000-0x3fff] [ 0.909441] pci 0000:00:05.0: bridge window [mem 0xf0200000-0xf02fffff] [ 0.909590] pci 0000:00:06.0: PCI bridge to [bus 02] [ 0.909722] pci 0000:00:06.0: bridge window [io 0x2000-0x2fff] [ 0.909861] pci 0000:00:06.0: bridge window [mem 0xf0100000-0xf01fffff] [ 0.910010] pci 0000:03:00.0: BAR 6: assigned [mem 0xf0010000-0xf001ffff pref] [ 0.910148] pci 0000:00:07.0: PCI bridge to [bus 03] [ 0.910280] pci 0000:00:07.0: bridge window [io 0x1000-0x1fff] [ 0.910419] pci 0000:00:07.0: bridge window [mem 0xf0000000-0xf00fffff] [ 0.910557] pci 0000:00:07.0: bridge window [mem 0xf0400000-0xf05fffff 64bit pref] [ 0.910733] pci 0000:00:14.4: PCI bridge to [bus 04] [ 0.910888] pci_bus 0000:00: resource 4 [mem 0x000a0000-0x000bffff] [ 0.911020] pci_bus 0000:00: resource 5 [mem 0x000c0000-0x000c1fff] [ 0.911106] pci_bus 0000:00: resource 6 [mem 0x000c2000-0x000c3fff] [ 0.911191] pci_bus 0000:00: resource 7 [mem 0x000c4000-0x000c5fff] [ 0.911327] pci_bus 0000:00: resource 8 [mem 0x000c6000-0x000c7fff] [ 0.911460] pci_bus 0000:00: resource 9 [mem 0x000c8000-0x000c9fff] [ 0.911592] pci_bus 0000:00: resource 10 [mem 0x000ca000-0x000cbfff] [ 0.911724] pci_bus 0000:00: resource 11 [mem 0x000cc000-0x000cdfff] [ 0.911855] pci_bus 0000:00: resource 12 [mem 0x000d0000-0x000d1fff] [ 0.911988] pci_bus 0000:00: resource 13 [mem 0x000d2000-0x000d3fff] [ 0.912119] pci_bus 0000:00: resource 14 [mem 0x000d4000-0x000d5fff] [ 0.912205] pci_bus 0000:00: resource 15 [mem 0x000d6000-0x000d7fff] [ 0.912290] pci_bus 0000:00: resource 16 [mem 0x000d8000-0x000d9fff] [ 0.912422] pci_bus 0000:00: resource 17 [mem 0x000da000-0x000dbfff] [ 0.912554] pci_bus 0000:00: resource 18 [mem 0x000dc000-0x000ddfff] [ 0.912686] pci_bus 0000:00: resource 19 [mem 0x000de000-0x000dffff] [ 0.912817] pci_bus 0000:00: resource 20 [mem 0x000e0000-0x000e1fff] [ 0.912949] pci_bus 0000:00: resource 21 [mem 0x000e2000-0x000e3fff] [ 0.913035] pci_bus 0000:00: resource 22 [mem 0x000e4000-0x000e5fff] [ 0.913120] pci_bus 0000:00: resource 23 [mem 0x000e6000-0x000e7fff] [ 0.913206] pci_bus 0000:00: resource 24 [mem 0x000e8000-0x000e9fff] [ 0.913291] pci_bus 0000:00: resource 25 [mem 0x000ea000-0x000ebfff] [ 0.913423] pci_bus 0000:00: resource 26 [mem 0x000ec000-0x000edfff] [ 0.913555] pci_bus 0000:00: resource 27 [mem 0x000ee000-0x000effff] [ 0.913687] pci_bus 0000:00: resource 28 [mem 0xe0000000-0xf7ffffff] [ 0.913819] pci_bus 0000:00: resource 29 [mem 0xf8000000-0xffffffff] [ 0.913951] pci_bus 0000:00: resource 30 [io 0x0000-0x0cf7] [ 0.914035] pci_bus 0000:00: resource 31 [io 0x0d00-0xffff] [ 0.914120] pci_bus 0000:01: resource 0 [io 0x3000-0x3fff] [ 0.914205] pci_bus 0000:01: resource 1 [mem 0xf0200000-0xf02fffff] [ 0.914291] pci_bus 0000:02: resource 0 [io 0x2000-0x2fff] [ 0.914422] pci_bus 0000:02: resource 1 [mem 0xf0100000-0xf01fffff] [ 0.914554] pci_bus 0000:03: resource 0 [io 0x1000-0x1fff] [ 0.914685] pci_bus 0000:03: resource 1 [mem 0xf0000000-0xf00fffff] [ 0.914818] pci_bus 0000:03: resource 2 [mem 0xf0400000-0xf05fffff 64bit pref] [ 0.914987] pci_bus 0000:04: resource 4 [mem 0x000a0000-0x000bffff] [ 0.915119] pci_bus 0000:04: resource 5 [mem 0x000c0000-0x000c1fff] [ 0.915205] pci_bus 0000:04: resource 6 [mem 0x000c2000-0x000c3fff] [ 0.915303] pci_bus 0000:04: resource 7 [mem 0x000c4000-0x000c5fff] [ 0.915436] pci_bus 0000:04: resource 8 [mem 0x000c6000-0x000c7fff] [ 0.915568] pci_bus 0000:04: resource 9 [mem 0x000c8000-0x000c9fff] [ 0.915700] pci_bus 0000:04: resource 10 [mem 0x000ca000-0x000cbfff] [ 0.915832] pci_bus 0000:04: resource 11 [mem 0x000cc000-0x000cdfff] [ 0.915964] pci_bus 0000:04: resource 12 [mem 0x000d0000-0x000d1fff] [ 0.916096] pci_bus 0000:04: resource 13 [mem 0x000d2000-0x000d3fff] [ 0.916212] pci_bus 0000:04: resource 14 [mem 0x000d4000-0x000d5fff] [ 0.916297] pci_bus 0000:04: resource 15 [mem 0x000d6000-0x000d7fff] [ 0.916429] pci_bus 0000:04: resource 16 [mem 0x000d8000-0x000d9fff] [ 0.916561] pci_bus 0000:04: resource 17 [mem 0x000da000-0x000dbfff] [ 0.916693] pci_bus 0000:04: resource 18 [mem 0x000dc000-0x000ddfff] [ 0.916825] pci_bus 0000:04: resource 19 [mem 0x000de000-0x000dffff] [ 0.916957] pci_bus 0000:04: resource 20 [mem 0x000e0000-0x000e1fff] [ 0.917089] pci_bus 0000:04: resource 21 [mem 0x000e2000-0x000e3fff] [ 0.917211] pci_bus 0000:04: resource 22 [mem 0x000e4000-0x000e5fff] [ 0.917297] pci_bus 0000:04: resource 23 [mem 0x000e6000-0x000e7fff] [ 0.917429] pci_bus 0000:04: resource 24 [mem 0x000e8000-0x000e9fff] [ 0.917561] pci_bus 0000:04: resource 25 [mem 0x000ea000-0x000ebfff] [ 0.917693] pci_bus 0000:04: resource 26 [mem 0x000ec000-0x000edfff] [ 0.917825] pci_bus 0000:04: resource 27 [mem 0x000ee000-0x000effff] [ 0.917957] pci_bus 0000:04: resource 28 [mem 0xe0000000-0xf7ffffff] [ 0.918089] pci_bus 0000:04: resource 29 [mem 0xf8000000-0xffffffff] [ 0.918211] pci_bus 0000:04: resource 30 [io 0x0000-0x0cf7] [ 0.918295] pci_bus 0000:04: resource 31 [io 0x0d00-0xffff] [ 0.918577] NET: Registered protocol family 2 [ 0.920007] TCP established hash table entries: 8192 (order: 3, 32768 bytes) [ 0.920294] TCP bind hash table entries: 8192 (order: 6, 294912 bytes) [ 0.921910] TCP: Hash tables configured (established 8192 bind 8192) [ 0.922252] TCP: reno registered [ 0.922431] UDP hash table entries: 512 (order: 3, 40960 bytes) [ 0.922763] UDP-Lite hash table entries: 512 (order: 3, 40960 bytes) [ 0.923781] NET: Registered protocol family 1 [ 0.924024] pci 0000:00:01.0: Video device with shadowed ROM [ 1.075419] PCI: CLS 32 bytes, default 64 [ 1.076342] Unpacking initramfs... [ 1.206863] microcode: updated early to new patch_level=0x05000029 [ 1.210911] Freeing initrd memory: 2908K (f6527000 - f67fe000) [ 1.212951] microcode: CPU0: patch_level=0x05000029 [ 1.213134] microcode: CPU1: patch_level=0x05000029 [ 1.213970] microcode: Microcode Update Driver: v2.00 <[email protected]>, Peter Oruba [ 1.214219] LVT offset 0 assigned for vector 0x400 [ 1.214528] perf: AMD IBS detected (0x000000ff) [ 1.221088] cryptomgr_test (30) used greatest stack depth: 7060 bytes left [ 1.222584] futex hash table entries: 512 (order: 3, 32768 bytes) [ 1.225405] HugeTLB registered 4 MB page size, pre-allocated 0 pages [ 1.252619] ntfs: driver 2.1.31 [Flags: R/O]. [ 1.253485] fuse init (API version 7.23) [ 1.254944] msgmni has been set to 1651 [ 1.255930] cryptomgr_test (33) used greatest stack depth: 7056 bytes left [ 1.263469] bounce: pool size: 64 pages [ 1.264018] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 253) [ 1.264327] io scheduler noop registered [ 1.264511] io scheduler deadline registered [ 1.264994] io scheduler cfq registered (default) [ 1.271652] pcieport 0000:00:05.0: Signaling PME through PCIe PME interrupt [ 1.271845] pci 0000:01:00.0: Signaling PME through PCIe PME interrupt [ 1.271987] pcie_pme 0000:00:05.0:pcie01: service driver pcie_pme loaded [ 1.272254] pcieport 0000:00:06.0: Signaling PME through PCIe PME interrupt [ 1.272439] pci 0000:02:00.0: Signaling PME through PCIe PME interrupt [ 1.272580] pcie_pme 0000:00:06.0:pcie01: service driver pcie_pme loaded [ 1.272841] pcieport 0000:00:07.0: Signaling PME through PCIe PME interrupt [ 1.273026] pci 0000:03:00.0: Signaling PME through PCIe PME interrupt [ 1.273168] pcie_pme 0000:00:07.0:pcie01: service driver pcie_pme loaded [ 1.273354] pci_hotplug: PCI Hot Plug PCI Core version: 0.5 [ 1.287759] acpiphp_ibm: ibm_acpiphp_init: acpi_walk_namespace failed [ 1.289086] ACPI: acpi_idle registered with cpuidle [ 1.291455] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled [ 1.297519] Linux agpgart interface v0.103 [ 1.298512] [drm] Initialized drm 1.1.0 20060810 [ 1.310340] loop: module loaded [ 1.311182] SCSI Media Changer driver v0.25 [ 1.311476] ahci 0000:00:11.0: version 3.0 [ 1.313374] ahci 0000:00:11.0: AHCI 0001.0200 32 slots 1 ports 3 Gbps 0x1 impl SATA mode [ 1.313556] ahci 0000:00:11.0: flags: 64bit ncq sntf ilck pm led clo pmp pio slum part ccc [ 1.313959] ioapic0 pin19, hardware reg a9c1, cached data 1a9c1 [ 1.317281] scsi host0: ahci [ 1.318460] ata1: SATA max UDMA/133 abar m1024@0xf034a000 port 0xf034a100 irq 19 [ 1.353632] atl1c 0000:02:00.0: version 1.0.1.1-NAPI [ 1.354565] i8042: PNP: PS/2 Controller [PNP0303:KBC0,PNP0f13:MSE0] at 0x60,0x64 irq 1,12 [ 1.357595] i8042: Detected active multiplexing controller, rev 1.1 [ 1.357875] ioapic0 pin12, hardware reg 93c, cached data 93c [ 1.359204] ioapic0 pin1, hardware reg 931, cached data 931 [ 1.359459] serio: i8042 KBD port at 0x60,0x64 irq 1 [ 1.360527] serio: i8042 AUX0 port at 0x60,0x64 irq 12 [ 1.360981] serio: i8042 AUX1 port at 0x60,0x64 irq 12 [ 1.361425] serio: i8042 AUX2 port at 0x60,0x64 irq 12 [ 1.361867] serio: i8042 AUX3 port at 0x60,0x64 irq 12 [ 1.363879] mousedev: PS/2 mouse device common for all mice [ 1.365659] rtc_cmos 00:01: RTC can wake from S4 [ 1.367188] rtc_cmos 00:01: rtc core: registered rtc_cmos as rtc0 [ 1.367423] ioapic0 pin8, hardware reg 938, cached data 938 [ 1.367589] rtc_cmos 00:01: alarms up to one month, 114 bytes nvram, hpet irqs [ 1.369339] device-mapper: ioctl: 4.28.0-ioctl (2014-09-17) initialised: [email protected] [ 1.370363] TCP: cubic registered [ 1.370549] NET: Registered protocol family 17 [ 1.370728] 9pnet: Installing 9P2000 support [ 1.372682] Using IPI No-Shortcut mode [ 1.375337] registered taskstats version 1 [ 1.379629] console [netcon0] enabled [ 1.379818] netconsole: network logging started [ 1.380074] rtc_cmos 00:01: setting system clock to 2014-11-28 11:24:29 UTC (1417173869) [ 1.380851] acpi-cpufreq: overriding BIOS provided _PSD data [ 1.407330] input: AT Translated Set 2 keyboard as /devices/platform/i8042/serio0/input/input0 [ 1.811383] ata1: SATA link up 3.0 Gbps (SStatus 123 SControl 300) [ 1.815473] ata1.00: ATA-8: ST320LT007-9ZV142, 0004LVM1, max UDMA/133 [ 1.815698] ata1.00: 625142448 sectors, multi 16: LBA48 NCQ (depth 31/32) [ 1.820237] ata1.00: configured for UDMA/133 [ 1.824293] scsi 0:0:0:0: Direct-Access ATA ST320LT007-9ZV14 LVM1 PQ: 0 ANSI: 5 [ 1.829523] sd 0:0:0:0: [sda] 625142448 512-byte logical blocks: (320 GB/298 GiB) [ 1.829702] sd 0:0:0:0: Attached scsi generic sg0 type 0 [ 1.829942] sd 0:0:0:0: [sda] 4096-byte physical blocks [ 1.830707] sd 0:0:0:0: [sda] Write Protect is off [ 1.831090] sd 0:0:0:0: [sda] Mode Sense: 00 3a 00 00 [ 1.831535] sd 0:0:0:0: [sda] Write cache: enabled, read cache: enabled, doesn't support DPO or FUA [ 1.947609] sda: sda1 sda2 sda3 sda4 < sda5 sda6 sda7 sda8 sda9 sda10 > [ 1.960091] sd 0:0:0:0: [sda] Attached SCSI disk [ 2.211148] tsc: Refined TSC clocksource calibration: 1596.599 MHz [ 2.633586] psmouse serio4: synaptics: Touchpad model: 1, fw: 8.0, id: 0x1e2b1, caps: 0xd001a3/0x940300/0x121c00, board id: 1811, fw id: 797391 [ 2.633922] psmouse serio4: synaptics: serio: Synaptics pass-through port at isa0060/serio4/input0 [ 2.680165] input: SynPS/2 Synaptics TouchPad as /devices/platform/i8042/serio4/input/input8 [ 2.726787] Freeing unused kernel memory: 620K (c18c0000 - c195b000) [ 2.727627] Write protecting the kernel text: 5952k [ 2.728276] Write protecting the kernel read-only data: 2424k [ 2.737667] init (53) used greatest stack depth: 7032 bytes left [ 2.743600] init (56) used greatest stack depth: 6872 bytes left [ 2.791080] all_generic_ide (65) used greatest stack depth: 6812 bytes left [ 2.797155] blacklist (67) used greatest stack depth: 6736 bytes left [ 2.827465] udev[71]: starting version 164 [ 2.827505] udevd (70) used greatest stack depth: 6636 bytes left [ 2.960944] udevadm (72) used greatest stack depth: 6472 bytes left [ 3.039491] thermal LNXTHERM:00: registered as thermal_zone0 [ 3.039693] ACPI: Thermal Zone [THZ0] (51 C) [ 3.040648] modprobe (104) used greatest stack depth: 5596 bytes left [ 3.214603] Switched to clocksource tsc [ 4.814671] PM: Starting manual resume from disk [ 4.914326] EXT4-fs (sda9): mounted filesystem with ordered data mode. Opts: (null) [ 5.156825] random: nonblocking pool is initialized [ 6.967790] udev[339]: starting version 164 [ 6.977783] psmouse serio5: trackpoint: IBM TrackPoint firmware: 0x0e, buttons: 3/3 [ 7.204008] input: TPPS/2 IBM TrackPoint as /devices/platform/i8042/serio4/serio5/input/input9 [ 7.429487] ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver [ 7.531405] input: Power Button as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0C0C:00/input/input10 [ 7.532815] ACPI: Video Device [VGA1] (multi-head: yes rom: no post: no) [ 7.533376] ACPI: Power Button [PWRB] [ 7.534276] [Firmware Bug]: ACPI: No _BQC method, cannot determine initial brightness [ 7.538980] ehci-pci: EHCI PCI platform driver [ 7.539051] input: Sleep Button as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0C0E:00/input/input11 [ 7.539463] ACPI: Sleep Button [SLPB] [ 7.557264] QUIRK: Enable AMD PLL fix [ 7.557616] ehci-pci 0000:00:12.2: EHCI Host Controller [ 7.558839] ehci-pci 0000:00:12.2: new USB bus registered, assigned bus number 1 [ 7.559417] ACPI: AC Adapter [ACAD] (off-line) [ 7.560078] ehci-pci 0000:00:12.2: applying AMD SB700/SB800/Hudson-2/3 EHCI dummy qh workaround [ 7.560360] ehci-pci 0000:00:12.2: debug port 1 [ 7.560846] ioapic0 pin17, hardware reg a981, cached data 1a981 [ 7.561142] ehci-pci 0000:00:12.2: irq 17, io mem 0xf034a500 [ 7.562481] input: Lid Switch as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0C0D:00/input/input12 [ 7.565935] ACPI: Lid Switch [LID] [ 7.567009] input: Power Button as /devices/LNXSYSTM:00/LNXPWRBN:00/input/input13 [ 7.568940] ACPI: Power Button [PWRF] [ 7.580061] ehci-pci 0000:00:12.2: USB 2.0 started, EHCI 1.00 [ 7.580707] acpi device:37: registered as cooling_device2 [ 7.582808] input: Video Bus as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0A08:00/LNXVIDEO:01/input/input14 [ 7.606434] usb usb1: New USB device found, idVendor=1d6b, idProduct=0002 [ 7.606840] usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber=1 [ 7.607865] usb usb1: Product: EHCI Host Controller [ 7.608019] usb usb1: Manufacturer: Linux 3.18.0-rc6+ ehci_hcd [ 7.610245] usb usb1: SerialNumber: 0000:00:12.2 [ 7.617323] modprobe (486) used greatest stack depth: 5236 bytes left [ 7.619779] ACPI: Battery Slot [BAT1] (battery present) [ 7.628237] hub 1-0:1.0: USB hub found [ 7.628637] hub 1-0:1.0: 5 ports detected [ 7.630662] rtsx_pci 0000:03:00.0: rtsx_pci_acquire_irq: pcr->msi_en = 1, pci->irq = 27 [ 7.670398] ehci-pci 0000:00:13.2: EHCI Host Controller [ 7.670592] ehci-pci 0000:00:13.2: new USB bus registered, assigned bus number 2 [ 7.670741] ehci-pci 0000:00:13.2: applying AMD SB700/SB800/Hudson-2/3 EHCI dummy qh workaround [ 7.670925] ehci-pci 0000:00:13.2: debug port 1 [ 7.671117] ehci-pci 0000:00:13.2: irq 17, io mem 0xf034a400 [ 7.679663] ehci-pci 0000:00:13.2: USB 2.0 started, EHCI 1.00 [ 7.680263] usb usb2: New USB device found, idVendor=1d6b, idProduct=0002 [ 7.680451] usb usb2: New USB device strings: Mfr=3, Product=2, SerialNumber=1 [ 7.680626] usb usb2: Product: EHCI Host Controller [ 7.680759] usb usb2: Manufacturer: Linux 3.18.0-rc6+ ehci_hcd [ 7.680894] usb usb2: SerialNumber: 0000:00:13.2 [ 7.702451] hub 2-0:1.0: USB hub found [ 7.709743] hub 2-0:1.0: 5 ports detected [ 7.746424] ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver [ 7.747298] modprobe (422) used greatest stack depth: 5092 bytes left [ 7.754910] input: PC Speaker as /devices/platform/pcspkr/input/input15 [ 7.766786] cfg80211: Calling CRDA to update world regulatory domain [ 7.864447] ohci-pci: OHCI PCI platform driver [ 7.866316] ohci-pci 0000:00:12.0: OHCI PCI host controller [ 7.866509] ohci-pci 0000:00:12.0: new USB bus registered, assigned bus number 3 [ 7.866814] ioapic0 pin18, hardware reg a9a1, cached data 1a9a1 [ 7.866980] ohci-pci 0000:00:12.0: irq 18, io mem 0xf0349000 [ 7.927492] usb usb3: New USB device found, idVendor=1d6b, idProduct=0001 [ 7.927646] usb usb3: New USB device strings: Mfr=3, Product=2, SerialNumber=1 [ 7.927823] usb usb3: Product: OHCI PCI host controller [ 7.927959] usb usb3: Manufacturer: Linux 3.18.0-rc6+ ohci_hcd [ 7.928095] usb usb3: SerialNumber: 0000:00:12.0 [ 7.934168] hub 3-0:1.0: USB hub found [ 7.935789] hub 3-0:1.0: 5 ports detected [ 7.986086] ohci-pci 0000:00:13.0: OHCI PCI host controller [ 7.986279] ohci-pci 0000:00:13.0: new USB bus registered, assigned bus number 4 [ 7.986638] ohci-pci 0000:00:13.0: irq 18, io mem 0xf0348000 [ 8.046235] usb usb4: New USB device found, idVendor=1d6b, idProduct=0001 [ 8.046340] usb usb4: New USB device strings: Mfr=3, Product=2, SerialNumber=1 [ 8.046465] usb usb4: Product: OHCI PCI host controller [ 8.046551] usb usb4: Manufacturer: Linux 3.18.0-rc6+ ohci_hcd [ 8.046701] usb usb4: SerialNumber: 0000:00:13.0 [ 8.054243] hub 4-0:1.0: USB hub found [ 8.056090] hub 4-0:1.0: 5 ports detected [ 8.105779] rtsx_pci_sdmmc rtsx_pci_sdmmc.0: : Realtek PCI-E SDMMC controller found [ 8.106715] rtsx_pci_sdmmc rtsx_pci_sdmmc.0: pcr->extra_caps = 0x23 [ 8.108382] mmc0: clock 0Hz busmode 1 powermode 0 cs 0 Vdd 0 width 0 timing 0 [ 8.111657] rtsx_pci_sdmmc rtsx_pci_sdmmc.0: sdmmc_get_cd: RTSX_BIPR = 0x00000000 [ 8.651212] Non-volatile memory driver v1.3 [ 8.767992] thinkpad_acpi: ThinkPad ACPI Extras v0.25 [ 8.768113] thinkpad_acpi: http://ibm-acpi.sf.net/ [ 8.768201] thinkpad_acpi: ThinkPad BIOS 8RET30WW (1.12 ), EC unknown [ 8.768292] thinkpad_acpi: Lenovo ThinkPad X120e, model 30515QG [ 8.793859] thinkpad_acpi: Unsupported brightness interface, please contact [email protected] [ 8.795340] thinkpad_acpi: radio switch found; radios are enabled [ 8.795591] thinkpad_acpi: possible tablet mode switch found; ThinkPad in laptop mode [ 8.795938] thinkpad_acpi: This ThinkPad has standard ACPI backlight brightness control, supported by the ACPI video driver [ 8.796163] thinkpad_acpi: Disabling thinkpad-acpi brightness events by default... [ 8.824337] thinkpad_acpi: Console audio control enabled, mode: monitor (read only) [ 8.848560] input: ThinkPad Extra Buttons as /devices/platform/thinkpad_acpi/input/input16 [ 9.393545] Error: Driver 'pcspkr' is already registered, aborting... [ 10.141662] ioapic0 pin16, hardware reg a942, cached data 1a942 [ 10.540977] sound hdaudioC1D0: CX20590: BIOS auto-probing. [ 10.543174] sound hdaudioC1D0: autoconfig: line_outs=1 (0x1f/0x0/0x0/0x0/0x0) type:speaker [ 10.543390] sound hdaudioC1D0: speaker_outs=0 (0x0/0x0/0x0/0x0/0x0) [ 10.543552] sound hdaudioC1D0: hp_outs=1 (0x19/0x0/0x0/0x0/0x0) [ 10.543712] sound hdaudioC1D0: mono: mono_out=0x0 [ 10.543864] sound hdaudioC1D0: inputs: [ 10.544023] sound hdaudioC1D0: Internal Mic=0x23 [ 10.544183] sound hdaudioC1D0: Mic=0x1b [ 10.570012] input: HDA Digital PCBeep as /devices/pci0000:00/0000:00:14.2/sound/card1/hdaudioC1D0/input17 [ 10.585456] input: HDA ATI SB Mic as /devices/pci0000:00/0000:00:14.2/sound/card1/input18 [ 10.587011] input: HDA ATI SB Headphone as /devices/pci0000:00/0000:00:14.2/sound/card1/input19 [ 10.636465] input: HD-Audio Generic HDMI/DP,pcm=3 as /devices/pci0000:00/0000:00:01.1/sound/card0/input20 [ 11.189171] [drm] radeon kernel modesetting enabled. [ 11.195188] [drm] initializing kernel modesetting (PALM 0x1002:0x9802 0x17AA:0x21EC). [ 11.195533] [drm] register mmio base: 0xF0300000 [ 11.195712] [drm] register mmio size: 262144 [ 11.196001] ATOM BIOS: Lenovo [ 11.196628] radeon 0000:00:01.0: VRAM: 384M 0x0000000000000000 - 0x0000000017FFFFFF (384M used) [ 11.196855] radeon 0000:00:01.0: GTT: 1024M 0x0000000018000000 - 0x0000000057FFFFFF [ 11.197029] [drm] Detected VRAM RAM=384M, BAR=256M [ 11.197159] [drm] RAM width 32bits DDR [ 11.198869] [TTM] Zone kernel: Available graphics memory: 423062 kiB [ 11.198969] [TTM] Zone highmem: Available graphics memory: 1602234 kiB [ 11.199058] [TTM] Initializing pool allocator [ 11.200573] [drm] radeon: 384M of VRAM memory ready [ 11.200764] [drm] radeon: 1024M of GTT memory ready. [ 11.201078] [drm] Loading PALM Microcode [ 11.224639] radeon 0000:00:01.0: Direct firmware load for radeon/PALM_pfp.bin failed with error -2 [ 11.224931] r600_cp: Failed to load firmware "radeon/PALM_pfp.bin" [ 11.225091] [drm:evergreen_init] *ERROR* Failed to load firmware! [ 11.225251] radeon 0000:00:01.0: Fatal error during GPU init [ 11.225722] [drm] radeon: finishing device. [ 11.234855] [TTM] Finalizing pool allocator [ 11.238378] [TTM] Zone kernel: Used memory at exit: 0 kiB [ 11.238636] [TTM] Zone highmem: Used memory at exit: 0 kiB [ 11.238883] [drm] radeon: ttm finalized [ 11.248925] radeon: probe of 0000:00:01.0 failed with error -2 [ 11.318298] rtl8192ce: Using firmware rtlwifi/rtl8192cfw.bin [ 11.360819] ieee80211 phy0: Selected rate control algorithm 'rtl_rc' [ 11.365004] rtlwifi: rtlwifi: wireless switch is on [ 12.705311] Adding 15625212k swap on /dev/sda2. Priority:-1 extents:1 across:15625212k [ 12.786895] EXT4-fs (sda9): re-mounted. Opts: (null) [ 13.326407] EXT4-fs (sda9): re-mounted. Opts: errors=remount-ro [ 14.287930] EXT4-fs (sda10): mounted filesystem with ordered data mode. Opts: (null) [ 15.338388] atl1c 0000:02:00.0: atl1c: eth0 NIC Link is Up<100 Mbps Full Duplex> [ 16.576090] NET: Registered protocol family 10
Borislav Petkov
maintainerRe: [tip:x86/apic] x86, irq: Use cached IOAPIC entry instead of reading from hardware
Quoted 21 lines · Borislav Petkov
Quoted 3 lines · Jiang Liu
Thanks for tracking down to this line of change. I have no
platform to reproduce this bug, so could you please help to revert this commit and apply following patch to get some data about IOAPIC entry?Yep, the cached data differs from what's in the hw reg sometimes:
dmesg | grep -i ioapic
[ 0.000000] ACPI: IOAPIC (id[0x02] address[0xfec00000] gsi_base[0]) [ 0.000000] IOAPIC[0]: apic_id 2, version 33, address 0xfec00000, GSI 0-23 [ 0.429355] ioapic0 pin9, hardware reg a939, cached data 1a939 [ 0.506249] ioapic0 pin9, hardware reg 1a939, cached data 1a939 [ 0.521547] ACPI: Using IOAPIC for interrupt routing [ 1.313959] ioapic0 pin19, hardware reg a9c1, cached data 1a9c1 [ 1.357875] ioapic0 pin12, hardware reg 93c, cached data 93c [ 1.359204] ioapic0 pin1, hardware reg 931, cached data 931 [ 1.367423] ioapic0 pin8, hardware reg 938, cached data 938 [ 7.560846] ioapic0 pin17, hardware reg a981, cached data 1a981 [ 7.866814] ioapic0 pin18, hardware reg a9a1, cached data 1a9a1 [ 10.141662] ioapic0 pin16, hardware reg a942, cached data 1a942
Quoted 7 lines
This would explain the failure because the ahci ioapic pin19 has that discrepancy:
[ 1.311476] ahci 0000:00:11.0: version 3.0 [ 1.313374] ahci 0000:00:11.0: AHCI 0001.0200 32 slots 1 ports 3 Gbps 0x1 impl SATA mode [ 1.313556] ahci 0000:00:11.0: flags: 64bit ncq sntf ilck pm led clo pmp pio slum part ccc [ 1.313959] ioapic0 pin19, hardware reg a9c1, cached data 1a9c1
Ok, so this is interesting: the cached data has bit 16 set which, AFAICT, is in one of those io redirection table registers. That bit masks out interrupts and if set, those get ignored. Which would explain the timeoutting of the ATA commands because the IRQ is masked.
I don't know, though, why your cached data has bit 16 set....
This is all a big IMHO of course...
Signature · 5 lines
Regards/Gruss,
Boris.
Sent from a fat crate under my desk. Formatting is fine.
--Re: [tip:x86/apic] x86, irq: Use cached IOAPIC entry instead of reading from hardware
Quoted 30 lines · Borislav Petkov
Quoted 21 lines · Borislav Petkov
Quoted 3 lines · Jiang Liu
Thanks for tracking down to this line of change. I have no
platform to reproduce this bug, so could you please help to revert this commit and apply following patch to get some data about IOAPIC entry?Yep, the cached data differs from what's in the hw reg sometimes:
dmesg | grep -i ioapic
[ 0.000000] ACPI: IOAPIC (id[0x02] address[0xfec00000] gsi_base[0]) [ 0.000000] IOAPIC[0]: apic_id 2, version 33, address 0xfec00000, GSI 0-23 [ 0.429355] ioapic0 pin9, hardware reg a939, cached data 1a939 [ 0.506249] ioapic0 pin9, hardware reg 1a939, cached data 1a939 [ 0.521547] ACPI: Using IOAPIC for interrupt routing [ 1.313959] ioapic0 pin19, hardware reg a9c1, cached data 1a9c1 [ 1.357875] ioapic0 pin12, hardware reg 93c, cached data 93c [ 1.359204] ioapic0 pin1, hardware reg 931, cached data 931 [ 1.367423] ioapic0 pin8, hardware reg 938, cached data 938 [ 7.560846] ioapic0 pin17, hardware reg a981, cached data 1a981 [ 7.866814] ioapic0 pin18, hardware reg a9a1, cached data 1a9a1 [ 10.141662] ioapic0 pin16, hardware reg a942, cached data 1a942Quoted 7 lines
This would explain the failure because the ahci ioapic pin19 has that discrepancy:
[ 1.311476] ahci 0000:00:11.0: version 3.0 [ 1.313374] ahci 0000:00:11.0: AHCI 0001.0200 32 slots 1 ports 3 Gbps 0x1 impl SATA mode [ 1.313556] ahci 0000:00:11.0: flags: 64bit ncq sntf ilck pm led clo pmp pio slum part ccc [ 1.313959] ioapic0 pin19, hardware reg a9c1, cached data 1a9c1
Quoted 6 lines
Ok, so this is interesting: the cached data has bit 16 set which, AFAICT, is in one of those io redirection table registers. That bit masks out interrupts and if set, those get ignored. Which would explain the timeoutting of the ATA commands because the IRQ is masked.
I don't know, though, why your cached data has bit 16 set....
Hi Borislav,
Sorry, my previous test patch has some issue, but I think I
should have found the root cause now. Could you please try following patch directly on top of tip/master without reverting any patch? Thanks!
Gerry
arch/x86/kernel/apic/io_apic.c +0 -0
@@ -1885,7 +1885,7 @@ static int ioapic_set_affinity(struct irq_data
*irq_data,
raw_spin_lock_irqsave(&ioapic_lock, flags);
if (ret >= 0 && ret != IRQ_SET_MASK_OK_DONE) {
cfg = irqd_cfg(irq_data);
- data->entry.dest = SET_APIC_LOGICAL_ID(cfg->dest_apicid);
+ data->entry.dest = cfg->dest_apicid;
data->entry.vector = cfg->vector;
for_each_irq_pin(entry, data->irq_2_pin)
__ioapic_write_entry(entry->apic, entry->pin,Quoted 3 lines
This is all a big IMHO of course...
Re: [tip:x86/apic] x86, irq: Use cached IOAPIC entry instead of reading from hardware
Quoted 7 lines · Jiang Liu
Quoted 6 lines · Borislav Petkov
Quoted 5 lines · Borislav Petkov
Quoted 3 lines · Jiang Liu
Thanks for tracking down to this line of change. I have no
platform to reproduce this bug, so could you please help to revert this commit and apply following patch to get some data about IOAPIC entry?
<snit>
Quoted 11 lines
Quoted 7 lines
Ok, so this is interesting: the cached data has bit 16 set which, AFAICT, is in one of those io redirection table registers. That bit masks out interrupts and if set, those get ignored. Which would explain the timeoutting of the ATA commands because the IRQ is masked.
I don't know, though, why your cached data has bit 16 set....
Hi Borislav,
Sorry, my previous test patch has some issue, but I think I
should have found the root cause now. Could you please try following patch directly on top of tip/master without reverting any patch?
Hi Borislav,
With this patch applied, KVM with SMP kernel boots successfully
now:)
Regards!
Gerry
Borislav Petkov
maintainerRe: [tip:x86/apic] x86, irq: Use cached IOAPIC entry instead of reading from hardware
Quoted 1 line · Jiang Liu
With this patch applied, KVM with SMP kernel boots successfully now:)
Same with my laptop, thanks! :-)
Reported-and-tested-by Borislav Petkov <[email protected]>
Signature · 5 lines
Regards/Gruss,
Boris.
Sent from a fat crate under my desk. Formatting is fine.
--tip-bot for Jiang Liu
merge bot[tip:x86/apic] x86, ioapic: Repair io_apic_set_affinity
In reply to Jiang Liux86, ioapic: Repair io_apic_set_affinity
Commit-ID: 412fbca8dd3067438a9c8a98853299f58a5597d5 Gitweb: http://git.kernel.org/tip/412fbca8dd3067438a9c8a98853299f58a5597d5 Author: Jiang Liu <[email protected]> AuthorDate: Fri, 28 Nov 2014 21:43:02 +0100 Committer: Thomas Gleixner <[email protected]> CommitDate: Fri, 28 Nov 2014 22:09:22 +0100
x86, ioapic: Repair io_apic_set_affinity
Boris reported, that the rework of the ioapic to use cached entry data broke his older AMD machine.
The cause for this is that the cached entry.dest field is assigned with SET_APIC_LOGICAL_ID(cfg->desc_apicid). SET_APIC_LOGICAL_ID left shifts the value by 24. This is obviously wrong as the dest field is already at the proper bit position, so the extra shift essentially cleared the dest field.
Remove SET_APIC_LOGICAL_ID and assign cfg->desc_apicid directly.
This got introduced in commit bfa644bfa9e3 but only becomes visible since the conversion to use cached entries in commit fda7c08b1349 'x86, irq: Use cached IOAPIC entry instead of reading from hardware'
Reported-and-tested-by Borislav Petkov <[email protected]>
Fixes bfa644bfa9e3 'x86, irq: Convert IOAPIC to use hierarchy irqdomain interfaces'
Signed-off-by Thomas Gleixner <[email protected]>
--- arch/x86/kernel/apic/io_apic.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
arch/x86/kernel/apic/io_apic.c +1 -1
@@ -1885,7 +1885,7 @@ static int ioapic_set_affinity(struct irq_data *irq_data,raw_spin_lock_irqsave (&ioapic_lock, flags);if (ret >=0 && ret !=IRQ_SET_MASK_OK_DONE ) { cfg =irqd_cfg (irq_data); - data->entry.dest =SET_APIC_LOGICAL_ID (cfg->dest_apicid); + data->entry.dest = cfg->dest_apicid; data->entry.vector = cfg->vector;for_each_irq_pin (entry, data->irq_2_pin) __ioapic_write_entry(entry->apic, entry->pin,
PATCH v4 30/38 x86, irq: Kill unused alloc_irq_and_cfg_at()
In reply to Jiang LiuThere's no caller of alloc_irq_and_cfg_at() anymore, so kill it.
Signed-off-by Jiang Liu <[email protected]>
Tested-by Joerg Roedel <[email protected]>
--- arch/x86/include/asm/hw_irq.h | 1 - arch/x86/kernel/apic/vector.c | 21 --------------------- 2 files changed, 22 deletions(-)
arch/x86/include/asm/hw_irq.h +0 -1
@@ -186,7 +186,6 @@ extern void copy_irq_alloc_info(struct irq_alloc_info *dst, struct irq_alloc_info *src);extern struct irq_cfg *irq_cfg (unsigned int irq);extern struct irq_cfg *irqd_cfg (struct irq_data *irq_data); -extern struct irq_cfg *alloc_irq_and_cfg_at (unsigned int at,int node);extern void lock_vector_lock (void );extern void unlock_vector_lock (void );extern int assign_irq_vector (int ,struct irq_cfg *,const struct cpumask *);
arch/x86/kernel/apic/vector.c +0 -21
@@ -76,27 +76,6 @@ out_cfg:return NULL ; } -struct irq_cfg *alloc_irq_and_cfg_at (unsigned int at,int node) -{ -int res =irq_alloc_desc_at (at, node); -struct irq_cfg *cfg; - -if (res <0 ) { -if (res != -EEXIST ) -return NULL ; - cfg =irq_cfg (at); -if (cfg) -return cfg; - } - - cfg =alloc_irq_cfg (node); -if (cfg) -irq_set_chip_data (at, cfg); -else -irq_free_desc (at); -return cfg; -} -static void free_irq_cfg (struct irq_cfg *cfg) {if (cfg) {
Signature · 1 line
1.7.10.4
tip-bot for Jiang Liu
merge bot[tip:x86/apic] x86, irq: Kill unused alloc_irq_and_cfg_at()
x86, irq: Kill unused alloc_irq_and_cfg_at()
Commit-ID: fef49a5184b8b0afea2f440393c23734a15064b7 Gitweb: http://git.kernel.org/tip/fef49a5184b8b0afea2f440393c23734a15064b7 Author: Jiang Liu <[email protected]> AuthorDate: Tue, 25 Nov 2014 15:49:54 +0800 Committer: Thomas Gleixner <[email protected]> CommitDate: Wed, 26 Nov 2014 23:52:49 +0100
x86, irq: Kill unused alloc_irq_and_cfg_at()
There's no caller of alloc_irq_and_cfg_at() anymore, so kill it.
Signed-off-by Jiang Liu <[email protected]>
Cc Konrad Rzeszutek Wilk <[email protected]>
Cc Tony Luck <[email protected]>
Cc Joerg Roedel <[email protected]>
Cc Greg Kroah-Hartman <[email protected]>
Cc Bjorn Helgaas <[email protected]>
Cc Benjamin Herrenschmidt <[email protected]>
Cc Rafael J. Wysocki <[email protected]>
Cc Randy Dunlap <[email protected]>
Cc Yinghai Lu <[email protected]>
Cc Borislav Petkov <[email protected]>
Signed-off-by Thomas Gleixner <[email protected]>
Tested-by Joerg Roedel <[email protected]>
--- arch/x86/include/asm/hw_irq.h | 1 - arch/x86/kernel/apic/vector.c | 21 --------------------- 2 files changed, 22 deletions(-)
arch/x86/include/asm/hw_irq.h +0 -1
@@ -186,7 +186,6 @@ extern void copy_irq_alloc_info(struct irq_alloc_info *dst, struct irq_alloc_info *src);extern struct irq_cfg *irq_cfg (unsigned int irq);extern struct irq_cfg *irqd_cfg (struct irq_data *irq_data); -extern struct irq_cfg *alloc_irq_and_cfg_at (unsigned int at,int node);extern void lock_vector_lock (void );extern void unlock_vector_lock (void );extern int assign_irq_vector (int ,struct irq_cfg *,const struct cpumask *);
arch/x86/kernel/apic/vector.c +0 -21
@@ -76,27 +76,6 @@ out_cfg:return NULL ; } -struct irq_cfg *alloc_irq_and_cfg_at (unsigned int at,int node) -{ -int res =irq_alloc_desc_at (at, node); -struct irq_cfg *cfg; - -if (res <0 ) { -if (res != -EEXIST ) -return NULL ; - cfg =irq_cfg (at); -if (cfg) -return cfg; - } - - cfg =alloc_irq_cfg (node); -if (cfg) -irq_set_chip_data (at, cfg); -else -irq_free_desc (at); -return cfg; -} -static void free_irq_cfg (struct irq_cfg *cfg) {if (cfg) {
PATCH v4 31/38 x86, irq: Change functions only used in vector.c as static
In reply to Jiang LiuFunction {assign|clear}_irq_vector() and apic_retrigger_irq() are only used in file vector.c, so change them as static.
Signed-off-by Jiang Liu <[email protected]>
Tested-by Joerg Roedel <[email protected]>
--- arch/x86/include/asm/hw_irq.h | 3 --- arch/x86/kernel/apic/vector.c | 7 ++++--- 2 files changed, 4 insertions(+), 6 deletions(-)
arch/x86/include/asm/hw_irq.h +0 -3
@@ -188,8 +188,6 @@ extern struct irq_cfg *irq_cfg(unsigned int irq);extern struct irq_cfg *irqd_cfg (struct irq_data *irq_data);extern void lock_vector_lock (void );extern void unlock_vector_lock (void ); -extern int assign_irq_vector (int ,struct irq_cfg *,const struct cpumask *); -extern void clear_irq_vector (int irq,struct irq_cfg *cfg);extern void setup_vector_irq (int cpu);#ifdef CONFIG_SMP extern void send_cleanup_vector (struct irq_cfg *);
@@ -199,7 +197,6 @@ static inline void send_cleanup_vector(struct irq_cfg *c) { }static inline void irq_complete_move (struct irq_cfg *c) { }#endif -extern int apic_retrigger_irq (struct irq_data *data);extern void apic_ack_edge (struct irq_data *data);extern int apic_set_affinity (struct irq_data *data,const struct cpumask *mask,unsigned int *dest_id);
arch/x86/kernel/apic/vector.c +4 -3
@@ -185,7 +185,8 @@ next:return err; } -int assign_irq_vector (int irq,struct irq_cfg *cfg,const struct cpumask *mask) +static int assign_irq_vector (int irq,struct irq_cfg *cfg, +const struct cpumask *mask) {int err;unsigned long flags;
@@ -196,7 +197,7 @@ int assign_irq_vector(int irq, struct irq_cfg *cfg, const struct cpumask *mask)return err; } -void clear_irq_vector (int irq,struct irq_cfg *cfg) +static void clear_irq_vector (int irq,struct irq_cfg *cfg) {int cpu, vector;unsigned long flags;
@@ -441,7 +442,7 @@ void setup_vector_irq(int cpu)__setup_vector_irq (cpu); } -int apic_retrigger_irq (struct irq_data *data) +static int apic_retrigger_irq (struct irq_data *data) {struct irq_cfg *cfg =irqd_cfg (data);unsigned long flags;
Signature · 1 line
1.7.10.4
tip-bot for Jiang Liu
merge bot[tip:x86/apic] x86, irq: Change functions only used in vector.c as static
x86, irq: Change functions only used in vector.c as static
Commit-ID: cd42f95eaeaab2cdbada4731279701f6fd80e195 Gitweb: http://git.kernel.org/tip/cd42f95eaeaab2cdbada4731279701f6fd80e195 Author: Jiang Liu <[email protected]> AuthorDate: Tue, 25 Nov 2014 15:49:55 +0800 Committer: Thomas Gleixner <[email protected]> CommitDate: Wed, 26 Nov 2014 23:52:49 +0100
x86, irq: Change functions only used in vector.c as static
Function {assign|clear}_irq_vector() and apic_retrigger_irq() are only used in file vector.c, so change them as static.
Signed-off-by Jiang Liu <[email protected]>
Cc Konrad Rzeszutek Wilk <[email protected]>
Cc Tony Luck <[email protected]>
Cc Joerg Roedel <[email protected]>
Cc Greg Kroah-Hartman <[email protected]>
Cc Bjorn Helgaas <[email protected]>
Cc Benjamin Herrenschmidt <[email protected]>
Cc Rafael J. Wysocki <[email protected]>
Cc Randy Dunlap <[email protected]>
Cc Yinghai Lu <[email protected]>
Cc Borislav Petkov <[email protected]>
Signed-off-by Thomas Gleixner <[email protected]>
Tested-by Joerg Roedel <[email protected]>
--- arch/x86/include/asm/hw_irq.h | 3 --- arch/x86/kernel/apic/vector.c | 7 ++++--- 2 files changed, 4 insertions(+), 6 deletions(-)
arch/x86/include/asm/hw_irq.h +0 -3
@@ -188,8 +188,6 @@ extern struct irq_cfg *irq_cfg(unsigned int irq);extern struct irq_cfg *irqd_cfg (struct irq_data *irq_data);extern void lock_vector_lock (void );extern void unlock_vector_lock (void ); -extern int assign_irq_vector (int ,struct irq_cfg *,const struct cpumask *); -extern void clear_irq_vector (int irq,struct irq_cfg *cfg);extern void setup_vector_irq (int cpu);#ifdef CONFIG_SMP extern void send_cleanup_vector (struct irq_cfg *);
@@ -199,7 +197,6 @@ static inline void send_cleanup_vector(struct irq_cfg *c) { }static inline void irq_complete_move (struct irq_cfg *c) { }#endif -extern int apic_retrigger_irq (struct irq_data *data);extern void apic_ack_edge (struct irq_data *data);extern int apic_set_affinity (struct irq_data *data,const struct cpumask *mask,unsigned int *dest_id);
arch/x86/kernel/apic/vector.c +4 -3
@@ -185,7 +185,8 @@ next:return err; } -int assign_irq_vector (int irq,struct irq_cfg *cfg,const struct cpumask *mask) +static int assign_irq_vector (int irq,struct irq_cfg *cfg, +const struct cpumask *mask) {int err;unsigned long flags;
@@ -196,7 +197,7 @@ int assign_irq_vector(int irq, struct irq_cfg *cfg, const struct cpumask *mask)return err; } -void clear_irq_vector (int irq,struct irq_cfg *cfg) +static void clear_irq_vector (int irq,struct irq_cfg *cfg) {int cpu, vector;unsigned long flags;
@@ -441,7 +442,7 @@ void setup_vector_irq(int cpu)__setup_vector_irq (cpu); } -int apic_retrigger_irq (struct irq_data *data) +static int apic_retrigger_irq (struct irq_data *data) {struct irq_cfg *cfg =irqd_cfg (data);unsigned long flags;
PATCH v4 32/38 x86, irq: Kill function apic_set_affinity()
In reply to Jiang LiuNow there's no user of apic_set_affinity(), so kill it.
Also rename vector_set_affinity() to apic_set_affinity() for consistency.
Signed-off-by Jiang Liu <[email protected]>
Tested-by Joerg Roedel <[email protected]>
--- arch/x86/include/asm/hw_irq.h | 2 -- arch/x86/kernel/apic/vector.c | 40 +++------------------------------------- 2 files changed, 3 insertions(+), 39 deletions(-)
arch/x86/include/asm/hw_irq.h +0 -2
@@ -198,8 +198,6 @@ static inline void irq_complete_move(struct irq_cfg *c) { }#endif extern void apic_ack_edge (struct irq_data *data); -extern int apic_set_affinity (struct irq_data *data,const struct cpumask *mask, -unsigned int *dest_id);#else /* CONFIG_X86_LOCAL_APIC */ static inline void lock_vector_lock (void ) {}static inline void unlock_vector_lock (void ) {}
arch/x86/kernel/apic/vector.c +3 -37
@@ -463,42 +463,8 @@ void apic_ack_edge(struct irq_data *data)ack_APIC_irq (); } -/* -* Either sets data->affinity to a valid value, and returns -* ->cpu_mask_to_apicid of that in dest_id, or returns -1 and -* leaves data->affinity untouched. -*/ -int apic_set_affinity (struct irq_data *data,const struct cpumask *mask, -unsigned int *dest_id) -{ -struct irq_cfg *cfg =irqd_cfg (data); -unsigned int irq = data->irq; -int err; - -if (!config_enabled (CONFIG_SMP )) -return -EPERM ; - -if (!cpumask_intersects (mask, cpu_online_mask)) -return -EINVAL ; - - err =assign_irq_vector (irq, cfg, mask); -if (err) -return err; - - err = apic->cpu_mask_to_apicid_and (mask, cfg->domain, dest_id); -if (err) { -if (assign_irq_vector (irq, cfg, data->affinity)) -pr_err ("Failed to recover vector for irq %d\n" , irq); -return err; - } - -cpumask_copy (data->affinity, mask); - -return 0 ; -} - -static int vector_set_affinity (struct irq_data *irq_data, -const struct cpumask *dest,bool force) +static int apic_set_affinity (struct irq_data *irq_data, +const struct cpumask *dest,bool force) {int err;int irq = irq_data->irq;
@@ -524,7 +490,7 @@ static int vector_set_affinity(struct irq_data *irq_data,static struct irq_chip lapic_controller = { .irq_ack = apic_ack_edge, - .irq_set_affinity = vector_set_affinity, + .irq_set_affinity = apic_set_affinity, .irq_retrigger = apic_retrigger_irq, };
Signature · 1 line
1.7.10.4
tip-bot for Jiang Liu
merge bot[tip:x86/apic] x86, irq: Kill function apic_set_affinity()
x86, irq: Kill function apic_set_affinity()
Commit-ID: 194200be668427182d3364a758ef7372c50e0b69 Gitweb: http://git.kernel.org/tip/194200be668427182d3364a758ef7372c50e0b69 Author: Jiang Liu <[email protected]> AuthorDate: Tue, 25 Nov 2014 15:49:56 +0800 Committer: Thomas Gleixner <[email protected]> CommitDate: Wed, 26 Nov 2014 23:52:49 +0100
x86, irq: Kill function apic_set_affinity()
Now there's no user of apic_set_affinity(), so kill it.
Also rename vector_set_affinity() to apic_set_affinity() for consistency.
Signed-off-by Jiang Liu <[email protected]>
Cc Konrad Rzeszutek Wilk <[email protected]>
Cc Tony Luck <[email protected]>
Cc Joerg Roedel <[email protected]>
Cc Greg Kroah-Hartman <[email protected]>
Cc Bjorn Helgaas <[email protected]>
Cc Benjamin Herrenschmidt <[email protected]>
Cc Rafael J. Wysocki <[email protected]>
Cc Randy Dunlap <[email protected]>
Cc Yinghai Lu <[email protected]>
Cc Borislav Petkov <[email protected]>
Signed-off-by Thomas Gleixner <[email protected]>
Tested-by Joerg Roedel <[email protected]>
--- arch/x86/include/asm/hw_irq.h | 2 -- arch/x86/kernel/apic/vector.c | 40 +++------------------------------------- 2 files changed, 3 insertions(+), 39 deletions(-)
arch/x86/include/asm/hw_irq.h +0 -2
@@ -198,8 +198,6 @@ static inline void irq_complete_move(struct irq_cfg *c) { }#endif extern void apic_ack_edge (struct irq_data *data); -extern int apic_set_affinity (struct irq_data *data,const struct cpumask *mask, -unsigned int *dest_id);#else /* CONFIG_X86_LOCAL_APIC */ static inline void lock_vector_lock (void ) {}static inline void unlock_vector_lock (void ) {}
arch/x86/kernel/apic/vector.c +3 -37
@@ -463,42 +463,8 @@ void apic_ack_edge(struct irq_data *data)ack_APIC_irq (); } -/* -* Either sets data->affinity to a valid value, and returns -* ->cpu_mask_to_apicid of that in dest_id, or returns -1 and -* leaves data->affinity untouched. -*/ -int apic_set_affinity (struct irq_data *data,const struct cpumask *mask, -unsigned int *dest_id) -{ -struct irq_cfg *cfg =irqd_cfg (data); -unsigned int irq = data->irq; -int err; - -if (!config_enabled (CONFIG_SMP )) -return -EPERM ; - -if (!cpumask_intersects (mask, cpu_online_mask)) -return -EINVAL ; - - err =assign_irq_vector (irq, cfg, mask); -if (err) -return err; - - err = apic->cpu_mask_to_apicid_and (mask, cfg->domain, dest_id); -if (err) { -if (assign_irq_vector (irq, cfg, data->affinity)) -pr_err ("Failed to recover vector for irq %d\n" , irq); -return err; - } - -cpumask_copy (data->affinity, mask); - -return 0 ; -} - -static int vector_set_affinity (struct irq_data *irq_data, -const struct cpumask *dest,bool force) +static int apic_set_affinity (struct irq_data *irq_data, +const struct cpumask *dest,bool force) {int err;int irq = irq_data->irq;
@@ -524,7 +490,7 @@ static int vector_set_affinity(struct irq_data *irq_data,static struct irq_chip lapic_controller = { .irq_ack = apic_ack_edge, - .irq_set_affinity = vector_set_affinity, + .irq_set_affinity = apic_set_affinity, .irq_retrigger = apic_retrigger_irq, };
PATCH v4 33/38 x86, irq: Move check of cfg->move_in_progress into send_cleanup_vector()
In reply to Jiang LiuMove check of cfg->move_in_progress into send_cleanup_vector() to prepare for simplifying struct irq_cfg.
Signed-off-by Jiang Liu <[email protected]>
Tested-by Joerg Roedel <[email protected]>
--- arch/x86/kernel/apic/vector.c | 10 ++++++++-- arch/x86/platform/uv/uv_irq.c | 3 +-- drivers/iommu/amd_iommu.c | 3 +-- drivers/iommu/intel_irq_remapping.c | 3 +-- 4 files changed, 11 insertions(+), 8 deletions(-)
arch/x86/kernel/apic/vector.c +8 -2
@@ -495,7 +495,7 @@ static struct irq_chip lapic_controller = { };#ifdef CONFIG_SMP -void send_cleanup_vector (struct irq_cfg *cfg) +static void __send_cleanup_vector (struct irq_cfg *cfg) {cpumask_var_t cleanup_mask;
@@ -513,6 +513,12 @@ void send_cleanup_vector(struct irq_cfg *cfg) cfg->move_in_progress =0 ; } +void send_cleanup_vector (struct irq_cfg *cfg) +{ +if (cfg->move_in_progress) +__send_cleanup_vector (cfg); +} + asmlinkage __visible void smp_irq_move_cleanup_interrupt(void) {unsigned vector, me;
@@ -583,7 +589,7 @@ static void __irq_complete_move(struct irq_cfg *cfg, unsigned vector) me =smp_processor_id ();if (vector == cfg->vector &&cpumask_test_cpu (me, cfg->domain)) -send_cleanup_vector (cfg); +__send_cleanup_vector (cfg); }void irq_complete_move (struct irq_cfg *cfg)
arch/x86/platform/uv/uv_irq.c +1 -2
@@ -63,8 +63,7 @@ uv_set_irq_affinity(struct irq_data *data, const struct cpumask *mask, ret = parent->chip->irq_set_affinity (parent, mask, force);if (ret >=0 ) {uv_program_mmr (cfg, data->chip_data); -if (cfg->move_in_progress) -send_cleanup_vector (cfg); +send_cleanup_vector (cfg); }return ret;
drivers/iommu/amd_iommu.c +1 -2
@@ -4331,8 +4331,7 @@ static int amd_ir_set_affinity(struct irq_data *data,* at the new destination. So, time to cleanup the previous * vector allocation. */ -if (cfg->move_in_progress) -send_cleanup_vector (cfg); +send_cleanup_vector (cfg);return IRQ_SET_MASK_OK_DONE ; }
drivers/iommu/intel_irq_remapping.c +1 -2
@@ -997,8 +997,7 @@ intel_ir_set_affinity(struct irq_data *data, const struct cpumask *mask,* at the new destination. So, time to cleanup the previous * vector allocation. */ -if (cfg->move_in_progress) -send_cleanup_vector (cfg); +send_cleanup_vector (cfg);return IRQ_SET_MASK_OK_DONE ; }
Signature · 1 line
1.7.10.4
tip-bot for Jiang Liu
merge bot[tip:x86/apic] x86, irq: Move check of cfg-> move_in_progress into send_cleanup_vector()
x86, irq: Move check of cfg->move_in_progress into send_cleanup_vector()
Commit-ID: 0b05539ff0e79690037dc888dbe0c0339c0a3b20 Gitweb: http://git.kernel.org/tip/0b05539ff0e79690037dc888dbe0c0339c0a3b20 Author: Jiang Liu <[email protected]> AuthorDate: Tue, 25 Nov 2014 15:49:57 +0800 Committer: Thomas Gleixner <[email protected]> CommitDate: Wed, 26 Nov 2014 23:52:49 +0100
x86, irq: Move check of cfg->move_in_progress into send_cleanup_vector()
Move check of cfg->move_in_progress into send_cleanup_vector() to prepare for simplifying struct irq_cfg.
Signed-off-by Jiang Liu <[email protected]>
Cc Konrad Rzeszutek Wilk <[email protected]>
Cc Tony Luck <[email protected]>
Cc Greg Kroah-Hartman <[email protected]>
Cc Bjorn Helgaas <[email protected]>
Cc Benjamin Herrenschmidt <[email protected]>
Cc Rafael J. Wysocki <[email protected]>
Cc Randy Dunlap <[email protected]>
Cc Yinghai Lu <[email protected]>
Cc Borislav Petkov <[email protected]>
Cc Joerg Roedel <[email protected]>
Signed-off-by Thomas Gleixner <[email protected]>
Tested-by Joerg Roedel <[email protected]>
--- arch/x86/kernel/apic/vector.c | 10 ++++++++-- arch/x86/platform/uv/uv_irq.c | 3 +-- drivers/iommu/amd_iommu.c | 3 +-- drivers/iommu/intel_irq_remapping.c | 3 +-- 4 files changed, 11 insertions(+), 8 deletions(-)
arch/x86/kernel/apic/vector.c +8 -2
@@ -495,7 +495,7 @@ static struct irq_chip lapic_controller = { };#ifdef CONFIG_SMP -void send_cleanup_vector (struct irq_cfg *cfg) +static void __send_cleanup_vector (struct irq_cfg *cfg) {cpumask_var_t cleanup_mask;
@@ -513,6 +513,12 @@ void send_cleanup_vector(struct irq_cfg *cfg) cfg->move_in_progress =0 ; } +void send_cleanup_vector (struct irq_cfg *cfg) +{ +if (cfg->move_in_progress) +__send_cleanup_vector (cfg); +} + asmlinkage __visible void smp_irq_move_cleanup_interrupt(void) {unsigned vector, me;
@@ -583,7 +589,7 @@ static void __irq_complete_move(struct irq_cfg *cfg, unsigned vector) me =smp_processor_id ();if (vector == cfg->vector &&cpumask_test_cpu (me, cfg->domain)) -send_cleanup_vector (cfg); +__send_cleanup_vector (cfg); }void irq_complete_move (struct irq_cfg *cfg)
arch/x86/platform/uv/uv_irq.c +1 -2
@@ -63,8 +63,7 @@ uv_set_irq_affinity(struct irq_data *data, const struct cpumask *mask, ret = parent->chip->irq_set_affinity (parent, mask, force);if (ret >=0 ) {uv_program_mmr (cfg, data->chip_data); -if (cfg->move_in_progress) -send_cleanup_vector (cfg); +send_cleanup_vector (cfg); }return ret;
drivers/iommu/amd_iommu.c +1 -2
@@ -4331,8 +4331,7 @@ static int amd_ir_set_affinity(struct irq_data *data,* at the new destination. So, time to cleanup the previous * vector allocation. */ -if (cfg->move_in_progress) -send_cleanup_vector (cfg); +send_cleanup_vector (cfg);return IRQ_SET_MASK_OK_DONE ; }
drivers/iommu/intel_irq_remapping.c +1 -2
@@ -997,8 +997,7 @@ intel_ir_set_affinity(struct irq_data *data, const struct cpumask *mask,* at the new destination. So, time to cleanup the previous * vector allocation. */ -if (cfg->move_in_progress) -send_cleanup_vector (cfg); +send_cleanup_vector (cfg);return IRQ_SET_MASK_OK_DONE ; }
PATCH v4 34/38 x86, irq: Move private data in struct irq_cfg into dedicated data structure
In reply to Jiang LiuSeveral fields in struct irq_cfg are private to vector.c, so move it into dedicated data structure. This helps to hide implementation details.
Signed-off-by Jiang Liu <[email protected]>
Tested-by Joerg Roedel <[email protected]>
--- arch/x86/include/asm/hw_irq.h | 3 - arch/x86/kernel/apic/vector.c | 221 ++++++++++++++++++++++------------------- 2 files changed, 119 insertions(+), 105 deletions(-)
arch/x86/include/asm/hw_irq.h +0 -3
@@ -171,11 +171,8 @@ enum { };struct irq_cfg { -cpumask_var_t domain; -cpumask_var_t old_domain;unsigned int dest_apicid;u8 vector; -u8 move_in_progress :1 ; };extern struct irq_domain *x86_vector_domain;
arch/x86/kernel/apic/vector.c +119 -102
484 lines not on this page · raw message
Signature · 1 line
1.7.10.4
tip-bot for Jiang Liu
merge bot[tip:x86/apic] x86, irq: Move private data in struct irq_cfg into dedicated data structure
x86, irq: Move private data in struct irq_cfg into dedicated data structure
Commit-ID: bb8e4776035d6d5cece71b05527b5ff9f16acd83 Gitweb: http://git.kernel.org/tip/bb8e4776035d6d5cece71b05527b5ff9f16acd83 Author: Jiang Liu <[email protected]> AuthorDate: Tue, 25 Nov 2014 15:49:58 +0800 Committer: Thomas Gleixner <[email protected]> CommitDate: Wed, 26 Nov 2014 23:52:49 +0100
x86, irq: Move private data in struct irq_cfg into dedicated data structure
Several fields in struct irq_cfg are private to vector.c, so move it into dedicated data structure. This helps to hide implementation details.
Signed-off-by Jiang Liu <[email protected]>
Cc Konrad Rzeszutek Wilk <[email protected]>
Cc Tony Luck <[email protected]>
Cc Joerg Roedel <[email protected]>
Cc Greg Kroah-Hartman <[email protected]>
Cc Bjorn Helgaas <[email protected]>
Cc Benjamin Herrenschmidt <[email protected]>
Cc Rafael J. Wysocki <[email protected]>
Cc Randy Dunlap <[email protected]>
Cc Yinghai Lu <[email protected]>
Cc Borislav Petkov <[email protected]>
Signed-off-by Thomas Gleixner <[email protected]>
Tested-by Joerg Roedel <[email protected]>
--- arch/x86/include/asm/hw_irq.h | 3 - arch/x86/kernel/apic/vector.c | 221 +++++++++++++++++++++++------------------- 2 files changed, 119 insertions(+), 105 deletions(-)
arch/x86/include/asm/hw_irq.h +0 -3
@@ -171,11 +171,8 @@ enum { };struct irq_cfg { -cpumask_var_t domain; -cpumask_var_t old_domain;unsigned int dest_apicid;u8 vector; -u8 move_in_progress :1 ; };extern struct irq_domain *x86_vector_domain;
arch/x86/kernel/apic/vector.c +119 -102
484 lines not on this page · raw message
tip-bot for Jiang Liu
merge bot[tip:x86/apic] x86/irq: Move private data in struct irq_cfg into dedicated data structure
In reply to Jiang Liux86/irq: Move private data in struct irq_cfg into dedicated data structure
Commit-ID: 7f3262edcdf623296b514377d52911b115c7ab49 Gitweb: http://git.kernel.org/tip/7f3262edcdf623296b514377d52911b115c7ab49 Author: Jiang Liu <[email protected]> AuthorDate: Tue, 14 Apr 2015 10:30:03 +0800 Committer: Thomas Gleixner <[email protected]> CommitDate: Fri, 24 Apr 2015 15:36:55 +0200
x86/irq: Move private data in struct irq_cfg into dedicated data structure
Several fields in struct irq_cfg are private to vector.c, so move it into dedicated data structure. This helps to hide implementation details.
Signed-off-by Jiang Liu <[email protected]>
Cc Konrad Rzeszutek Wilk <[email protected]>
Cc David Cohen <[email protected]>
Cc Sander Eikelenboom <[email protected]>
Cc David Vrabel <[email protected]>
Cc Tony Luck <[email protected]>
Cc Joerg Roedel <[email protected]>
Cc Greg Kroah-Hartman <[email protected]>
Cc Bjorn Helgaas <[email protected]>
Cc Benjamin Herrenschmidt <[email protected]>
Cc Rafael J. Wysocki <[email protected]>
Cc Randy Dunlap <[email protected]>
Cc Yinghai Lu <[email protected]>
Cc Borislav Petkov <[email protected]>
Cc Dimitri Sivanich <[email protected]>
Signed-off-by Thomas Gleixner <[email protected]>
Cc Konrad Rzeszutek Wilk <[email protected]>
Cc Tony Luck <[email protected]>
Cc Joerg Roedel <[email protected]>
Cc Greg Kroah-Hartman <[email protected]>
Cc Bjorn Helgaas <[email protected]>
Cc Benjamin Herrenschmidt <[email protected]>
Cc Rafael J. Wysocki <[email protected]>
Cc Randy Dunlap <[email protected]>
Cc Yinghai Lu <[email protected]>
Cc Borislav Petkov <[email protected]>
Signed-off-by Thomas Gleixner <[email protected]>
Tested-by Joerg Roedel <[email protected]>
--- arch/x86/include/asm/hw_irq.h | 3 - arch/x86/kernel/apic/vector.c | 221 +++++++++++++++++++++++------------------- 2 files changed, 119 insertions(+), 105 deletions(-)
arch/x86/include/asm/hw_irq.h +0 -3
@@ -171,11 +171,8 @@ enum { };struct irq_cfg { -cpumask_var_t domain; -cpumask_var_t old_domain;unsigned int dest_apicid;u8 vector; -u8 move_in_progress :1 ; };extern struct irq_domain *x86_vector_domain;
arch/x86/kernel/apic/vector.c +119 -102
486 lines not on this page · raw message
PATCH v4 35/38 x86, irq: Refine the way to calculate NR_IRQS
In reply to Jiang LiuNow we have made MSI independent of IOAPIC, so we need to refine the way to calculate NR_IRQS to support configuration with MSI enabled but IOAPIC disabled.
Signed-off-by Jiang Liu <[email protected]>
Tested-by Joerg Roedel <[email protected]>
--- arch/x86/include/asm/irq_vectors.h | 18 +++++++++++------- 1 file changed, 11 insertions(+), 7 deletions(-)
arch/x86/include/asm/irq_vectors.h +11 -7
@@ -155,18 +155,22 @@ static inline int invalid_vm86_irq(int irq)* static arrays. */ -#define NR_IRQS_LEGACY 16 +#define NR_IRQS_LEGACY 16 -#define IO_APIC_VECTOR_LIMIT ( 32 * MAX_IO_APICS ) +#define CPU_VECTOR_LIMIT (64 * NR_CPUS) +#define IO_APIC_VECTOR_LIMIT (32 * MAX_IO_APICS) -#ifdef CONFIG_X86_IO_APIC -# define CPU_VECTOR_LIMIT (64 * NR_CPUS) -# define NR_IRQS \ +#if defined(CONFIG_X86_IO_APIC ) && defined(CONFIG_PCI_MSI ) +#define NR_IRQS \ (CPU_VECTOR_LIMIT > IO_APIC_VECTOR_LIMIT ? \ (NR_VECTORS + CPU_VECTOR_LIMIT) : \ (NR_VECTORS + IO_APIC_VECTOR_LIMIT)) -#else /* !CONFIG_X86_IO_APIC: */ -# define NR_IRQS NR_IRQS_LEGACY +#elif defined(CONFIG_X86_IO_APIC ) +#define NR_IRQS (NR_VECTORS + IO_APIC_VECTOR_LIMIT) +#elif defined(CONFIG_PCI_MSI ) +#define NR_IRQS (NR_VECTORS + CPU_VECTOR_LIMIT) +#else +#define NR_IRQS NR_IRQS_LEGACY#endif #endif /* _ASM_X86_IRQ_VECTORS_H */
Signature · 1 line
1.7.10.4
tip-bot for Jiang Liu
merge bot[tip:x86/apic] x86, irq: Refine the way to calculate NR_IRQS
x86, irq: Refine the way to calculate NR_IRQS
Commit-ID: 9523785062ca8b0f2fdaddc5718d71adfc0d15b3 Gitweb: http://git.kernel.org/tip/9523785062ca8b0f2fdaddc5718d71adfc0d15b3 Author: Jiang Liu <[email protected]> AuthorDate: Tue, 25 Nov 2014 15:49:59 +0800 Committer: Thomas Gleixner <[email protected]> CommitDate: Wed, 26 Nov 2014 23:52:49 +0100
x86, irq: Refine the way to calculate NR_IRQS
Now we have made MSI independent of IOAPIC, so we need to refine the way to calculate NR_IRQS to support configuration with MSI enabled but IOAPIC disabled.
Signed-off-by Jiang Liu <[email protected]>
Cc Konrad Rzeszutek Wilk <[email protected]>
Cc Tony Luck <[email protected]>
Cc Joerg Roedel <[email protected]>
Cc Greg Kroah-Hartman <[email protected]>
Cc Bjorn Helgaas <[email protected]>
Cc Benjamin Herrenschmidt <[email protected]>
Cc Rafael J. Wysocki <[email protected]>
Cc Randy Dunlap <[email protected]>
Cc Yinghai Lu <[email protected]>
Cc Borislav Petkov <[email protected]>
Cc Jan Beulich <[email protected]>
Signed-off-by Thomas Gleixner <[email protected]>
Tested-by Joerg Roedel <[email protected]>
--- arch/x86/include/asm/irq_vectors.h | 18 +++++++++++------- 1 file changed, 11 insertions(+), 7 deletions(-)
arch/x86/include/asm/irq_vectors.h +11 -7
@@ -155,18 +155,22 @@ static inline int invalid_vm86_irq(int irq)* static arrays. */ -#define NR_IRQS_LEGACY 16 +#define NR_IRQS_LEGACY 16 -#define IO_APIC_VECTOR_LIMIT ( 32 * MAX_IO_APICS ) +#define CPU_VECTOR_LIMIT (64 * NR_CPUS) +#define IO_APIC_VECTOR_LIMIT (32 * MAX_IO_APICS) -#ifdef CONFIG_X86_IO_APIC -# define CPU_VECTOR_LIMIT (64 * NR_CPUS) -# define NR_IRQS \ +#if defined(CONFIG_X86_IO_APIC ) && defined(CONFIG_PCI_MSI ) +#define NR_IRQS \ (CPU_VECTOR_LIMIT > IO_APIC_VECTOR_LIMIT ? \ (NR_VECTORS + CPU_VECTOR_LIMIT) : \ (NR_VECTORS + IO_APIC_VECTOR_LIMIT)) -#else /* !CONFIG_X86_IO_APIC: */ -# define NR_IRQS NR_IRQS_LEGACY +#elif defined(CONFIG_X86_IO_APIC ) +#define NR_IRQS (NR_VECTORS + IO_APIC_VECTOR_LIMIT) +#elif defined(CONFIG_PCI_MSI ) +#define NR_IRQS (NR_VECTORS + CPU_VECTOR_LIMIT) +#else +#define NR_IRQS NR_IRQS_LEGACY#endif #endif /* _ASM_X86_IRQ_VECTORS_H */
PATCH v4 36/38 ACPI, irq, x86: Kill private function mp_register_gsi()/ mp_unregister_gsi()
In reply to Jiang LiuFunction mp_register_gsi() is only called once, so fold it into caller acpi_register_gsi_ioapic(). Do the same for mp_unregister_gsi().
Signed-off-by Jiang Liu <[email protected]>
Tested-by Joerg Roedel <[email protected]>
--- arch/x86/kernel/acpi/boot.c | 57 ++++++++++++++----------------------------- 1 file changed, 18 insertions(+), 39 deletions(-)
arch/x86/kernel/acpi/boot.c +18 -39
@@ -400,42 +400,6 @@ static int mp_config_acpi_gsi(struct device *dev, u32 gsi, int trigger,return 0 ; } -static int mp_register_gsi (struct device *dev,u32 gsi,int trigger, -int polarity) -{ -int irq, node; -struct irq_alloc_info info; - -if (acpi_irq_model !=ACPI_IRQ_MODEL_IOAPIC ) -return gsi; - - trigger = trigger ==ACPI_EDGE_SENSITIVE ?0 :1 ; - polarity = polarity ==ACPI_ACTIVE_HIGH ?0 :1 ; - node = dev ?dev_to_node (dev) :NUMA_NO_NODE ; -ioapic_set_alloc_attr (&info, node, trigger, polarity); - irq =mp_map_gsi_to_irq (gsi,IOAPIC_MAP_ALLOC , &info); -if (irq <0 ) -return irq; - -/* Don't set up the ACPI SCI because it's already set up */ -if (enable_update_mptable && acpi_gbl_FADT.sci_interrupt != gsi) -mp_config_acpi_gsi (dev, gsi, trigger, polarity); - -return irq; -} - -static void mp_unregister_gsi (u32 gsi) -{ -int irq; - -if (acpi_irq_model !=ACPI_IRQ_MODEL_IOAPIC ) -return ; - - irq =mp_map_gsi_to_irq (gsi,0 ,NULL ); -if (irq >0 ) -mp_unmap_irq (irq); -} -static struct irq_domain_ops acpi_irqdomain_ops = { .alloc = mp_irqdomain_alloc, .free = mp_irqdomain_free,
@@ -657,10 +621,21 @@ static int acpi_register_gsi_ioapic(struct device *dev, u32 gsi, int trigger, int polarity) { int irq = gsi; -#ifdef CONFIG_X86_IO_APIC +int node; +struct irq_alloc_info info; + + node = dev ?dev_to_node (dev) :NUMA_NO_NODE ; + trigger = trigger ==ACPI_EDGE_SENSITIVE ?0 :1 ; + polarity = polarity ==ACPI_ACTIVE_HIGH ?0 :1 ; +ioapic_set_alloc_attr (&info, node, trigger, polarity); +mutex_lock (&acpi_ioapic_lock); - irq =mp_register_gsi (dev, gsi, trigger, polarity); + irq =mp_map_gsi_to_irq (gsi,IOAPIC_MAP_ALLOC , &info); +/* Don't set up the ACPI SCI because it's already set up */ +if (irq >=0 && enable_update_mptable && + acpi_gbl_FADT.sci_interrupt != gsi) +mp_config_acpi_gsi (dev, gsi, trigger, polarity);mutex_unlock (&acpi_ioapic_lock);#endif
@@ -670,8 +645,12 @@ static int acpi_register_gsi_ioapic(struct device *dev, u32 gsi,static void acpi_unregister_gsi_ioapic (u32 gsi) {#ifdef CONFIG_X86_IO_APIC +int irq; +mutex_lock (&acpi_ioapic_lock); -mp_unregister_gsi (gsi); + irq =mp_map_gsi_to_irq (gsi,0 ,NULL ); +if (irq >0 ) +mp_unmap_irq (irq);mutex_unlock (&acpi_ioapic_lock);#endif }
Signature · 1 line
1.7.10.4
tip-bot for Jiang Liu
merge bot[tip:x86/apic] ACPI, irq, x86: Kill private function mp_register_gsi()/ mp_unregister_gsi()
ACPI, irq, x86: Kill private function mp_register_gsi()/ mp_unregister_gsi()
Commit-ID: 1dbc321f50262cc1218be65cd352957df6f98a1a Gitweb: http://git.kernel.org/tip/1dbc321f50262cc1218be65cd352957df6f98a1a Author: Jiang Liu <[email protected]> AuthorDate: Tue, 25 Nov 2014 15:50:00 +0800 Committer: Thomas Gleixner <[email protected]> CommitDate: Wed, 26 Nov 2014 23:52:50 +0100
ACPI, irq, x86: Kill private function mp_register_gsi()/ mp_unregister_gsi()
Function mp_register_gsi() is only called once, so fold it into caller acpi_register_gsi_ioapic(). Do the same for mp_unregister_gsi().
Signed-off-by Jiang Liu <[email protected]>
Cc Konrad Rzeszutek Wilk <[email protected]>
Cc Tony Luck <[email protected]>
Cc Joerg Roedel <[email protected]>
Cc Greg Kroah-Hartman <[email protected]>
Cc Bjorn Helgaas <[email protected]>
Cc Benjamin Herrenschmidt <[email protected]>
Cc Rafael J. Wysocki <[email protected]>
Cc Randy Dunlap <[email protected]>
Cc Yinghai Lu <[email protected]>
Cc Borislav Petkov <[email protected]>
Cc Len Brown <[email protected]>
Cc Pavel Machek <[email protected]>
Signed-off-by Thomas Gleixner <[email protected]>
Tested-by Joerg Roedel <[email protected]>
--- arch/x86/kernel/acpi/boot.c | 57 ++++++++++++++------------------------------- 1 file changed, 18 insertions(+), 39 deletions(-)
arch/x86/kernel/acpi/boot.c +18 -39
@@ -400,42 +400,6 @@ static int mp_config_acpi_gsi(struct device *dev, u32 gsi, int trigger,return 0 ; } -static int mp_register_gsi (struct device *dev,u32 gsi,int trigger, -int polarity) -{ -int irq, node; -struct irq_alloc_info info; - -if (acpi_irq_model !=ACPI_IRQ_MODEL_IOAPIC ) -return gsi; - - trigger = trigger ==ACPI_EDGE_SENSITIVE ?0 :1 ; - polarity = polarity ==ACPI_ACTIVE_HIGH ?0 :1 ; - node = dev ?dev_to_node (dev) :NUMA_NO_NODE ; -ioapic_set_alloc_attr (&info, node, trigger, polarity); - irq =mp_map_gsi_to_irq (gsi,IOAPIC_MAP_ALLOC , &info); -if (irq <0 ) -return irq; - -/* Don't set up the ACPI SCI because it's already set up */ -if (enable_update_mptable && acpi_gbl_FADT.sci_interrupt != gsi) -mp_config_acpi_gsi (dev, gsi, trigger, polarity); - -return irq; -} - -static void mp_unregister_gsi (u32 gsi) -{ -int irq; - -if (acpi_irq_model !=ACPI_IRQ_MODEL_IOAPIC ) -return ; - - irq =mp_map_gsi_to_irq (gsi,0 ,NULL ); -if (irq >0 ) -mp_unmap_irq (irq); -} -static struct irq_domain_ops acpi_irqdomain_ops = { .alloc = mp_irqdomain_alloc, .free = mp_irqdomain_free,
@@ -657,10 +621,21 @@ static int acpi_register_gsi_ioapic(struct device *dev, u32 gsi, int trigger, int polarity) { int irq = gsi; -#ifdef CONFIG_X86_IO_APIC +int node; +struct irq_alloc_info info; + + node = dev ?dev_to_node (dev) :NUMA_NO_NODE ; + trigger = trigger ==ACPI_EDGE_SENSITIVE ?0 :1 ; + polarity = polarity ==ACPI_ACTIVE_HIGH ?0 :1 ; +ioapic_set_alloc_attr (&info, node, trigger, polarity); +mutex_lock (&acpi_ioapic_lock); - irq =mp_register_gsi (dev, gsi, trigger, polarity); + irq =mp_map_gsi_to_irq (gsi,IOAPIC_MAP_ALLOC , &info); +/* Don't set up the ACPI SCI because it's already set up */ +if (irq >=0 && enable_update_mptable && + acpi_gbl_FADT.sci_interrupt != gsi) +mp_config_acpi_gsi (dev, gsi, trigger, polarity);mutex_unlock (&acpi_ioapic_lock);#endif
@@ -670,8 +645,12 @@ static int acpi_register_gsi_ioapic(struct device *dev, u32 gsi,static void acpi_unregister_gsi_ioapic (u32 gsi) {#ifdef CONFIG_X86_IO_APIC +int irq; +mutex_lock (&acpi_ioapic_lock); -mp_unregister_gsi (gsi); + irq =mp_map_gsi_to_irq (gsi,0 ,NULL ); +if (irq >0 ) +mp_unmap_irq (irq);mutex_unlock (&acpi_ioapic_lock);#endif }
PATCH v4 37/38 x86, irq: Introduce mechanism to support different vector allocation policies
In reply to Jiang LiuIntroduce mechanism to support different vector allocation policies, so platform or user may choose the best suitable CPU vector allocation policy. Currently two policies are supported:
1) allocate CPU vector from cpumask_of_node(dev_to_node(dev))
2) allocate from apic->target_cpus(), this is the default policy
Platform driver may call set_vector_alloc_policy() to choose the preferred policies.
This mechanism may be used to support NumaConnect systems to allocate CPU vectors from device local node.
We may also enhance to support per-cpu vector allocation if it's needed.
Signed-off-by Jiang Liu <[email protected]>
Cc Daniel J Blueman <[email protected]>
--- arch/x86/include/asm/hw_irq.h | 12 ++++++++ arch/x86/kernel/apic/vector.c | 66 +++++++++++++++++++++++++++++++++++------ 2 files changed, 69 insertions(+), 9 deletions(-)
arch/x86/include/asm/hw_irq.h +12 -0
@@ -170,6 +170,17 @@ enum { X86_IRQ_ALLOC_CONTIGOUS_VECTORS = 0x1, }; +enum { +/* Allocate vector from cpumask_of_node(dev_to_node(dev)) */ +X86_VECTOR_POL_NODE =0x1 , +/* Allocate vector from apic->target_cpus() */ +X86_VECTOR_POL_DEFAULT =0x2 , +/* Allocate vector from cpumask assigned by caller */ +X86_VECTOR_POL_CALLER =0x4 , +X86_VECTOR_POL_MIN =X86_VECTOR_POL_NODE , +X86_VECTOR_POL_MAX =X86_VECTOR_POL_CALLER , +}; +struct irq_cfg {unsigned int dest_apicid;u8 vector;
@@ -185,6 +196,7 @@ extern struct irq_cfg *irq_cfg(unsigned int irq);extern struct irq_cfg *irqd_cfg (struct irq_data *irq_data);extern void lock_vector_lock (void );extern void unlock_vector_lock (void ); +extern void set_vector_alloc_policy (unsigned int policy);extern void setup_vector_irq (int cpu);#ifdef CONFIG_SMP extern void send_cleanup_vector (struct irq_cfg *);
arch/x86/kernel/apic/vector.c +57 -9
108 lines not on this page · raw message
Signature · 1 line
1.7.10.4
Re: [Patch Part3 v4 37/38] x86, irq: Introduce mechanism to support different vector allocation policies
Quoted 2 lines · Jiang Liu
Introduce mechanism to support different vector allocation policies, so platform or user may choose the best suitable CPU vector allocation
I've postponed this and the next patch for 3.20.
Quoted 9 lines
policy. Currently two policies are supported:
1) allocate CPU vector from cpumask_of_node(dev_to_node(dev))
2) allocate fromapic->target_cpus(), this is the default policyPlatform driver may call
set_vector_alloc_policy()to choose the preferred policies.This mechanism may be used to support NumaConnect systems to allocate CPU vectors from device local node.
So these policies are system wide and need to be selected at boot time?
Thanks,
tglx
Re: [Patch Part3 v4 37/38] x86, irq: Introduce mechanism to support different vector allocation policies
Quoted 5 lines · Thomas Gleixner
Quoted 2 lines · Jiang Liu
Introduce mechanism to support different vector allocation policies, so platform or user may choose the best suitable CPU vector allocation
I've postponed this and the next patch for 3.20.
Hi Thomas,
That's fine, thanks for merging all other patches for 3.19:)
Quoted 5 lines
Quoted 5 lines
policy. Currently two policies are supported:
1) allocate CPU vector from cpumask_of_node(dev_to_node(dev))
2) allocate fromapic->target_cpus(), this is the default policy
Quoted 7 lines
Quoted 5 lines
Platform driver may call
set_vector_alloc_policy()to choose the preferred policies.This mechanism may be used to support NumaConnect systems to allocate CPU vectors from device local node.
So these policies are system wide and need to be selected at boot time?
Yes, the polices are system wide.
It may be change at runtime, but seems no strong requirement yet so haven't implemented the interface to change it at runtime.
Basically this idea is inspired by a patch set to allocate CPU vector from device local node for NumaConnect systems. I found it may also help 2-socket or 4-socket systems, so reimplemented in this way. Thanks!
Gerry
Quoted 5 lines
Thanks,
tglx
PATCH v4 38/38 x86, irq: Add kernel parameter vector_alloc to set CPU vector allocation policy
In reply to Jiang LiuParameter vector_alloc should be set to an integer with:
bit 0: enable allocating CPU vector from CPUs on device local node.
That's to allocate from cpumask_of_node(irq_data->node).
bit 1: enable the default policy, which is to allocate from
apic->target_cpus().When allocating vectors, it tries all enabled policies from lower bit position to higher bit position.
This option could be use to optimize interrupt distribution on large system such as NumaChip etc.
Signed-off-by Jiang Liu <[email protected]>
Cc Daniel J Blueman <[email protected]>
--- Documentation/kernel-parameters.txt | 6 ++++++ arch/x86/kernel/apic/vector.c | 11 +++++++++++ 2 files changed, 17 insertions(+)
Documentation/kernel-parameters.txt +6 -0
@@ -3709,6 +3709,12 @@ bytes respectively. Such letter suffixes can also be entirely omitted. vector= [IA-64,SMP] vector=percpu: enable percpu vector domain + vector_alloc= [x86,SMP] + vector_alloc=policy: policy is a bitmap, bit 0 + for allocating CPU vector from CPUs on device local + node; bit 1 for the default policy to allocating from + apic->target_cpus(). All higher bits are reserved. + video= [FB] Frame buffer configuration See Documentation/fb/modedb.txt.
arch/x86/kernel/apic/vector.c +11 -0
@@ -79,6 +79,17 @@ void set_vector_alloc_policy(unsigned int policy) x86_vector_alloc_policy = policy |X86_VECTOR_POL_CALLER ; } +static int __init apic_parse_vector_policy (char *str) +{ +int policy; + +if (get_option (&str, &policy) ==1 ) +set_vector_alloc_policy (policy); + +return 1 ; +} +__setup ("vector_alloc=" , apic_parse_vector_policy); +static struct apic_chip_data *alloc_apic_chip_data (int node) {struct apic_chip_data *data;
Signature · 1 line
1.7.10.4
Bjorn Helgaas
maintainerRe: [Patch Part3 v4 38/38] x86, irq: Add kernel parameter vector_alloc to set CPU vector allocation policy
Quoted 11 lines · Jiang Liu
Parameter
vector_allocshould be set to an integer with:
bit 0: enable allocating CPU vector from CPUs on device local node.That's to allocate from cpumask_of_node(irq_data->node). bit 1: enable the default policy, which is to allocate from apic->target_cpus().When allocating vectors, it tries all enabled policies from lower bit position to higher bit position.
This option could be use to optimize interrupt distribution on large system such as NumaChip etc.
Why can't we figure this out automatically? Having a kernel parameter is a pain in the neck for users.
Quoted 49 lines
Signed-off-by Jiang Liu <[email protected]>Cc Daniel J Blueman <[email protected]>--- Documentation/kernel-parameters.txt | 6 ++++++ arch/x86/kernel/apic/vector.c | 11 +++++++++++ 2 files changed, 17 insertions(+)Documentation/kernel-parameters.txt +6
-0@@ -3709,6 +3709,12 @@ bytes respectively. Such letter suffixes can also be entirely omitted. vector= [IA-64,SMP] vector=percpu: enable percpu vector domain + vector_alloc= [x86,SMP] + vector_alloc=policy: policy is a bitmap, bit 0 + for allocating CPU vector from CPUs on device local + node; bit 1 for the default policy to allocating from + apic->target_cpus(). All higher bits are reserved. + video= [FB] Frame buffer configuration See Documentation/fb/modedb.txt.arch/x86/kernel/apic/vector.c +11
-1@@ -79,6 +79,17 @@ void set_vector_alloc_policy(unsigned int policy) x86_vector_alloc_policy = policy |X86_VECTOR_POL_CALLER ; } +static int __init apic_parse_vector_policy (char *str) +{ +int policy; + +if (get_option (&str, &policy) ==1 ) +set_vector_alloc_policy (policy); + +return 1 ; +} +__setup ("vector_alloc=" , apic_parse_vector_policy); +static struct apic_chip_data *alloc_apic_chip_data (int node) {struct apic_chip_data *data; --1.7.10.4
Re: [Patch Part3 v4 38/38] x86, irq: Add kernel parameter vector_alloc to set CPU vector allocation policy
Quoted 7 lines · Bjorn Helgaas
Quoted 6 lines · Jiang Liu
Parameter
vector_allocshould be set to an integer with:
bit 0: enable allocating CPU vector from CPUs on device local node.That's to allocate from cpumask_of_node(irq_data->node). bit 1: enable the default policy, which is to allocate from apic->target_cpus().
Quoted 8 lines
Quoted 5 lines
When allocating vectors, it tries all enabled policies from lower bit position to higher bit position.
This option could be use to optimize interrupt distribution on large system such as NumaChip etc.
Why can't we figure this out automatically? Having a kernel parameter is a pain in the neck for users.
For the Numachip case, it would be sufficient to add a call to set_vector_alloc_policy in the APIC driver, as this will always be preferred for local MSI handling.
I'll follow up with a patch in the next day or so; further support for other systems can be added later as and when tested.
Quoted 46 lines
Quoted 46 lines
Signed-off-by Jiang Liu <[email protected]>Cc Daniel J Blueman <[email protected]>--- Documentation/kernel-parameters.txt | 6 ++++++ arch/x86/kernel/apic/vector.c | 11 +++++++++++ 2 files changed, 17 insertions(+)Documentation/kernel-parameters.txt +6
-0@@ -3709,6 +3709,12 @@ bytes respectively. Such letter suffixes can also be entirely omitted. vector= [IA-64,SMP] vector=percpu: enable percpu vector domain + vector_alloc= [x86,SMP] + vector_alloc=policy: policy is a bitmap, bit 0 + for allocating CPU vector from CPUs on device local + node; bit 1 for the default policy to allocating from + apic->target_cpus(). All higher bits are reserved. + video= [FB] Frame buffer configuration See Documentation/fb/modedb.txt.arch/x86/kernel/apic/vector.c +11
-0@@ -79,6 +79,17 @@ void set_vector_alloc_policy(unsigned int policy) x86_vector_alloc_policy = policy |X86_VECTOR_POL_CALLER ; } +static int __init apic_parse_vector_policy (char *str) +{ +int policy; + +if (get_option (&str, &policy) ==1 ) +set_vector_alloc_policy (policy); + +return 1 ; +} +__setup ("vector_alloc=" , apic_parse_vector_policy); +static struct apic_chip_data *alloc_apic_chip_data (int node) {struct apic_chip_data *data;
Signature · 2 lines
Daniel J Blueman Principal Software Engineer, Numascale
Re: [Patch Part3 v4 38/38] x86, irq: Add kernel parameter vector_alloc to set CPU vector allocation policy
In reply to Bjorn HelgaasQuoted 7 lines · Bjorn Helgaas
Quoted 6 lines · Jiang Liu
Parameter
vector_allocshould be set to an integer with:
bit 0: enable allocating CPU vector from CPUs on device local node.That's to allocate from cpumask_of_node(irq_data->node). bit 1: enable the default policy, which is to allocate from apic->target_cpus().
Quoted 8 lines
Quoted 5 lines
When allocating vectors, it tries all enabled policies from lower bit position to higher bit position.
This option could be use to optimize interrupt distribution on large system such as NumaChip etc.
Why can't we figure this out automatically? Having a kernel parameter is a pain in the neck for users.
Hi Bjorn,
I'm thinking of automatically turning on local vector
allocation if any host bridge has an assigned(valid) NUMA node id. By this way, user doesn't need to specify the kernel parameter for most cases. How about this solution?
Thanks!
Gerry
Quoted 50 lines
Quoted 50 lines
Signed-off-by Jiang Liu <[email protected]>Cc Daniel J Blueman <[email protected]>--- Documentation/kernel-parameters.txt | 6 ++++++ arch/x86/kernel/apic/vector.c | 11 +++++++++++ 2 files changed, 17 insertions(+)Documentation/kernel-parameters.txt +6
-0@@ -3709,6 +3709,12 @@ bytes respectively. Such letter suffixes can also be entirely omitted. vector= [IA-64,SMP] vector=percpu: enable percpu vector domain + vector_alloc= [x86,SMP] + vector_alloc=policy: policy is a bitmap, bit 0 + for allocating CPU vector from CPUs on device local + node; bit 1 for the default policy to allocating from + apic->target_cpus(). All higher bits are reserved. + video= [FB] Frame buffer configuration See Documentation/fb/modedb.txt.arch/x86/kernel/apic/vector.c +11
-1@@ -79,6 +79,17 @@ void set_vector_alloc_policy(unsigned int policy) x86_vector_alloc_policy = policy |X86_VECTOR_POL_CALLER ; } +static int __init apic_parse_vector_policy (char *str) +{ +int policy; + +if (get_option (&str, &policy) ==1 ) +set_vector_alloc_policy (policy); + +return 1 ; +} +__setup ("vector_alloc=" , apic_parse_vector_policy); +static struct apic_chip_data *alloc_apic_chip_data (int node) {struct apic_chip_data *data; --1.7.10.4
Bjorn Helgaas
maintainerRe: [Patch Part3 v4 38/38] x86, irq: Add kernel parameter vector_alloc to set CPU vector allocation policy
Quoted 16 lines · Jiang Liu
Quoted 13 lines · Bjorn Helgaas
Quoted 11 lines · Jiang Liu
Parameter
vector_allocshould be set to an integer with:
bit 0: enable allocating CPU vector from CPUs on device local node.That's to allocate from cpumask_of_node(irq_data->node). bit 1: enable the default policy, which is to allocate from apic->target_cpus().When allocating vectors, it tries all enabled policies from lower bit position to higher bit position.
This option could be use to optimize interrupt distribution on large system such as NumaChip etc.
Quoted 7 lines
Quoted 2 lines
Why can't we figure this out automatically? Having a kernel parameter is a pain in the neck for users.
Hi Bjorn,
I'm thinking of automatically turning on local vector
allocation if any host bridge has an assigned(valid) NUMA node id. By this way, user doesn't need to specify the kernel parameter for most cases. How about this solution?
I'm not an IRQ person, but your idea sounds like figuring this out automatically, and I'm in favor of that :)
Quoted 49 lines
Quoted 49 lines
Quoted 49 lines
Signed-off-by Jiang Liu <[email protected]>Cc Daniel J Blueman <[email protected]>--- Documentation/kernel-parameters.txt | 6 ++++++ arch/x86/kernel/apic/vector.c | 11 +++++++++++ 2 files changed, 17 insertions(+)Documentation/kernel-parameters.txt +6
-0@@ -3709,6 +3709,12 @@ bytes respectively. Such letter suffixes can also be entirely omitted. vector= [IA-64,SMP] vector=percpu: enable percpu vector domain + vector_alloc= [x86,SMP] + vector_alloc=policy: policy is a bitmap, bit 0 + for allocating CPU vector from CPUs on device local + node; bit 1 for the default policy to allocating from + apic->target_cpus(). All higher bits are reserved. + video= [FB] Frame buffer configuration See Documentation/fb/modedb.txt.arch/x86/kernel/apic/vector.c +11
-1@@ -79,6 +79,17 @@ void set_vector_alloc_policy(unsigned int policy) x86_vector_alloc_policy = policy |X86_VECTOR_POL_CALLER ; } +static int __init apic_parse_vector_policy (char *str) +{ +int policy; + +if (get_option (&str, &policy) ==1 ) +set_vector_alloc_policy (policy); + +return 1 ; +} +__setup ("vector_alloc=" , apic_parse_vector_policy); +static struct apic_chip_data *alloc_apic_chip_data (int node) {struct apic_chip_data *data; --1.7.10.4
v5 cover Clean up obsoleted x86 interrupt manangement code and interfaces
The patch set "[Patch Part1 v8 00/37] Convert x86 to hierarchy irqdomain and stacked irqchip" at http://www.spinics.net/lists/kernel/msg1967024.html
has converted x86 interrupt managment to use hierarchy irqdomain and stacked irqchip. And this is the following-on patch set to clean up code and interfaces obseleted by previous patch set.
With the these two patch sets combined, we have
63 files changed, 2430 insertions(+), 2613 deletions(-)
That's good, the refactor improves code maintanence with less code.
Main changes since last reviewed version:
1) rebased onto v4.0-rc6
2) add patch 33 to avoid memory allocation/free when assigning CPU vector
Regards,
Gerry
Jiang Liu (29):
x86/irq: Kill unused old IOAPIC irqdomain interfaces x86/irq: Kill unused struct mp_pin_info
x86/irq: Kill x86_io_apic_ops.print_entries and related interfaces x86/irq: Kill x86_io_apic_ops.setup_entry and related interfaces x86/irq: Kill x86_io_apic_ops.set_affinity and related interfaces x86/irq: Kill x86_io_apic_ops.eoi_ioapic_pin and related interfaces x86/irq: Kill GENERIC_IRQ_LEGACY_ALLOC_HWIRQ
x86/irq: Clean up unused forward declarations in x86_init.h
irq_remapping: Clean up unsued code to support IOAPIC irq_remapping/vt-d: Clean up unsued code irq_remapping/amd: Clean up unsued code
irq_remapping: Clean up unused interfaces
x86/irq: Kill irq_cfg.irq_remapped
irq_remapping/vt-d: Move struct irq_2_iommu into
intel_irq_remapping.c
irq_remapping/amd: Move struct irq_2_irte into amd_iommu.c x86/irq: Move irq_cfg.irq_2_pin into io_apic.c
x86/irq: Kill struct io_apic_irq_attr
x86/irq: Kill x86_io_apic_ops.write and x86_io_apic_ops.modify x86/irq: Clean up io_apic.h
x86/irq: Use cached IOAPIC entry instead of reading from hardware x86/irq: Kill unused alloc_irq_and_cfg_at()
x86/irq: Change functions only used in vector.c as static x86/irq: Kill function apic_set_affinity()
x86/irq: Move check of cfg->move_in_progress into
send_cleanup_vector()
x86/irq: Move private data in struct irq_cfg into dedicated data
structure
x86/irq: Refine the way to calculate NR_IRQS
x86/irq, ACPI: Kill private function mp_register_gsi()/
mp_unregister_gsi()
x86/irq: Move irqdomain specific code into asm/irqdomain.h x86/irq: Avoid memory allocation in __assign_irq_vector()
Thomas Gleixner (4):
x86/irq: Remove sis apic bug workaround x86, ioapic: Use proper defines for the entry fields x86,ioapic: Cleanup irq_trigger/polarity()
x86: Cleanup irq_domain ops
arch/x86/Kconfig | 1 - arch/x86/include/asm/hw_irq.h | 63 --- arch/x86/include/asm/io_apic.h | 103 +--- arch/x86/include/asm/irq_remapping.h | 38 +- arch/x86/include/asm/irq_vectors.h | 18 +- arch/x86/include/asm/irqdomain.h | 63 +++ arch/x86/include/asm/x86_init.h | 16 - arch/x86/kernel/acpi/boot.c | 70 +-- arch/x86/kernel/apic/htirq.c | 2 +- arch/x86/kernel/apic/io_apic.c | 869 +++++++++------------------------- arch/x86/kernel/apic/msi.c | 2 +- arch/x86/kernel/apic/vector.c | 342 ++++++------- arch/x86/kernel/devicetree.c | 12 +- arch/x86/kernel/hpet.c | 2 +- arch/x86/kernel/mpparse.c | 9 +- arch/x86/kernel/x86_init.c | 6 - arch/x86/platform/sfi/sfi.c | 10 +- arch/x86/platform/uv/uv_irq.c | 5 +- drivers/iommu/amd_iommu.c | 153 +----- drivers/iommu/intel_irq_remapping.c | 206 +------- drivers/iommu/irq_remapping.c | 80 ---- drivers/iommu/irq_remapping.h | 16 - drivers/pci/quirks.c | 7 - 23 files changed, 491 insertions(+), 1602 deletions(-) create mode 100644 arch/x86/include/asm/irqdomain.h
Signature · 1 line
1.7.10.4
PATCH v5 1/33 x86/irq: Kill unused old IOAPIC irqdomain interfaces
Now we have converted to hierarchy irqdomain, so kill unused old IOAPIC irqdomain interfaces and code.
Signed-off-by Jiang Liu <[email protected]>
Cc Konrad Rzeszutek Wilk <[email protected]>
Cc Tony Luck <[email protected]>
Cc Joerg Roedel <[email protected]>
Cc Greg Kroah-Hartman <[email protected]>
Cc Bjorn Helgaas <[email protected]>
Cc Benjamin Herrenschmidt <[email protected]>
Cc Rafael J. Wysocki <[email protected]>
Cc Randy Dunlap <[email protected]>
Cc Yinghai Lu <[email protected]>
Cc Borislav Petkov <[email protected]>
Cc Grant Likely <[email protected]>
Signed-off-by Thomas Gleixner <[email protected]>
Tested-by Joerg Roedel <[email protected]>
--- arch/x86/include/asm/io_apic.h | 4 - arch/x86/kernel/apic/io_apic.c | 202 +--------------------------------------- 2 files changed, 1 insertion(+), 205 deletions(-)
arch/x86/include/asm/io_apic.h +0 -4
@@ -204,9 +204,6 @@ extern int mp_register_ioapic(int id, u32 address, u32 gsi_base, struct ioapic_domain_cfg *cfg);extern int mp_unregister_ioapic (u32 gsi_base);extern int mp_ioapic_registered (u32 gsi_base); -extern int mp_irqdomain_map (struct irq_domain *domain,unsigned int virq, -irq_hw_number_t hwirq); -extern void mp_irqdomain_unmap (struct irq_domain *domain,unsigned int virq);extern int mp_irqdomain_alloc (struct irq_domain *domain,unsigned int virq,unsigned int nr_irqs,void *arg); extern void mp_irqdomain_free(struct irq_domain *domain, unsigned int virq,
@@ -218,7 +215,6 @@ extern void mp_irqdomain_deactivate(struct irq_domain *domain,extern int mp_irqdomain_ioapic_idx (struct irq_domain *domain);extern void ioapic_set_alloc_attr (struct irq_alloc_info *info,int node,int trigger,int polarity); -extern int mp_set_gsi_attr (u32 gsi,int trigger,int polarity,int node);extern void mp_save_irq (struct mpc_intsrc *m);
arch/x86/kernel/apic/io_apic.c +1 -201
245 lines not on this page · raw message
Signature · 1 line
1.7.10.4
tip-bot for Jiang Liu
merge bot[tip:x86/apic] x86/irq: Remove unused old IOAPIC irqdomain interfaces
x86/irq: Remove unused old IOAPIC irqdomain interfaces
Commit-ID: 5ad274d41c1b3f3ccf73591078efaa8ed6828a8d Gitweb: http://git.kernel.org/tip/5ad274d41c1b3f3ccf73591078efaa8ed6828a8d Author: Jiang Liu <[email protected]> AuthorDate: Tue, 14 Apr 2015 10:29:38 +0800 Committer: Thomas Gleixner <[email protected]> CommitDate: Fri, 24 Apr 2015 15:36:51 +0200
x86/irq: Remove unused old IOAPIC irqdomain interfaces
Now we have converted to hierarchical irqdomain, so remove unused old IOAPIC interfaces and code.
Signed-off-by Jiang Liu <[email protected]>
Tested-by Joerg Roedel <[email protected]>
Cc Konrad Rzeszutek Wilk <[email protected]>
Cc David Cohen <[email protected]>
Cc Sander Eikelenboom <[email protected]>
Cc David Vrabel <[email protected]>
Cc Tony Luck <[email protected]>
Cc Joerg Roedel <[email protected]>
Cc Greg Kroah-Hartman <[email protected]>
Cc Bjorn Helgaas <[email protected]>
Cc Benjamin Herrenschmidt <[email protected]>
Cc Rafael J. Wysocki <[email protected]>
Cc Randy Dunlap <[email protected]>
Cc Yinghai Lu <[email protected]>
Cc Borislav Petkov <[email protected]>
Cc Dimitri Sivanich <[email protected]>
Cc Grant Likely <[email protected]>
Signed-off-by Thomas Gleixner <[email protected]>
--- arch/x86/include/asm/io_apic.h | 4 - arch/x86/kernel/apic/io_apic.c | 202 +---------------------------------------- 2 files changed, 1 insertion(+), 205 deletions(-)
arch/x86/include/asm/io_apic.h +0 -4
@@ -204,9 +204,6 @@ extern int mp_register_ioapic(int id, u32 address, u32 gsi_base, struct ioapic_domain_cfg *cfg);extern int mp_unregister_ioapic (u32 gsi_base);extern int mp_ioapic_registered (u32 gsi_base); -extern int mp_irqdomain_map (struct irq_domain *domain,unsigned int virq, -irq_hw_number_t hwirq); -extern void mp_irqdomain_unmap (struct irq_domain *domain,unsigned int virq);extern int mp_irqdomain_alloc (struct irq_domain *domain,unsigned int virq,unsigned int nr_irqs,void *arg); extern void mp_irqdomain_free(struct irq_domain *domain, unsigned int virq,
@@ -218,7 +215,6 @@ extern void mp_irqdomain_deactivate(struct irq_domain *domain,extern int mp_irqdomain_ioapic_idx (struct irq_domain *domain);extern void ioapic_set_alloc_attr (struct irq_alloc_info *info,int node,int trigger,int polarity); -extern int mp_set_gsi_attr (u32 gsi,int trigger,int polarity,int node);extern void mp_save_irq (struct mpc_intsrc *m);
arch/x86/kernel/apic/io_apic.c +1 -201
245 lines not on this page · raw message
PATCH v5 2/33 x86/irq: Kill unused struct mp_pin_info
In reply to Jiang LiuNow nobody makes use of struct mp_pin_info, so kill it.
Signed-off-by Jiang Liu <[email protected]>
Cc Konrad Rzeszutek Wilk <[email protected]>
Cc Tony Luck <[email protected]>
Cc Joerg Roedel <[email protected]>
Cc Greg Kroah-Hartman <[email protected]>
Cc Bjorn Helgaas <[email protected]>
Cc Benjamin Herrenschmidt <[email protected]>
Cc Rafael J. Wysocki <[email protected]>
Cc Randy Dunlap <[email protected]>
Cc Yinghai Lu <[email protected]>
Cc Borislav Petkov <[email protected]>
Cc Grant Likely <[email protected]>
Signed-off-by Thomas Gleixner <[email protected]>
Tested-by Joerg Roedel <[email protected]>
--- arch/x86/kernel/apic/io_apic.c | 30 +++--------------------------- 1 file changed, 3 insertions(+), 27 deletions(-)
arch/x86/kernel/apic/io_apic.c +3 -27
@@ -86,13 +86,6 @@ struct mp_chip_data {bool isa_irq; }; -struct mp_pin_info { -int trigger; -int polarity; -int set; -u32 count; -}; - static struct ioapic { /* * # of IRQ routing registers
@@ -108,7 +101,6 @@ static struct ioapic {struct mp_ioapic_gsi gsi_config;struct ioapic_domain_cfg irqdomain_cfg;struct irq_domain *irqdomain; -struct mp_pin_info *pin_info;struct resource *iomem_res; } ioapics[MAX_IO_APICS ];
@@ -159,11 +151,6 @@ static inline int mp_init_irq_at_boot(int ioapic, int irq)return ioapic ==0 ||mp_is_legacy_irq (irq); } -static inline struct mp_pin_info *mp_pin_info (int ioapic_idx,int pin) -{ -return ioapics[ioapic_idx].pin_info + pin; -} -static inline struct irq_domain *mp_ioapic_irqdomain (int ioapic) {return ioapics[ioapic].irqdomain;
@@ -2432,7 +2419,6 @@ out:static int mp_irqdomain_create (int ioapic) { -size_t size;struct irq_alloc_info info;struct irq_domain *parent;int hwirqs =mp_ioapic_pin_count (ioapic);
@@ -2440,11 +2426,6 @@ static int mp_irqdomain_create(int ioapic)struct ioapic_domain_cfg *cfg = &ip->irqdomain_cfg;struct mp_ioapic_gsi *gsi_cfg =mp_ioapic_gsi_routing (ioapic); - size =sizeof (struct mp_pin_info ) *mp_ioapic_pin_count (ioapic); - ip->pin_info =kzalloc (size,GFP_KERNEL ); -if (!ip->pin_info) -return -ENOMEM ; -if (cfg->type ==IOAPIC_DOMAIN_INVALID )return 0 ;
@@ -2457,13 +2438,10 @@ static int mp_irqdomain_create(int ioapic) ip->irqdomain =irq_domain_add_linear (cfg->dev, hwirqs, cfg->ops, (void *)(long )ioapic); -if (ip->irqdomain) { - ip->irqdomain->parent = parent; - }else { -kfree (ip->pin_info); - ip->pin_info =NULL ; +if (!ip->irqdomain)return -ENOMEM ; - } + + ip->irqdomain->parent = parent;if (cfg->type ==IOAPIC_DOMAIN_LEGACY || cfg->type ==IOAPIC_DOMAIN_STRICT )
@@ -2479,8 +2457,6 @@ static void ioapic_destroy_irqdomain(int idx)irq_domain_remove (ioapics[idx].irqdomain); ioapics[idx].irqdomain =NULL ; } -kfree (ioapics[idx].pin_info); - ioapics[idx].pin_info =NULL ; }void __init setup_IO_APIC (void )
Signature · 1 line
1.7.10.4
tip-bot for Jiang Liu
merge bot[tip:x86/apic] x86/irq: Remove unused struct mp_pin_info
x86/irq: Remove unused struct mp_pin_info
Commit-ID: b75e818f7fc6db153a4ebfba1d31366c1cc531aa Gitweb: http://git.kernel.org/tip/b75e818f7fc6db153a4ebfba1d31366c1cc531aa Author: Jiang Liu <[email protected]> AuthorDate: Tue, 14 Apr 2015 10:29:39 +0800 Committer: Thomas Gleixner <[email protected]> CommitDate: Fri, 24 Apr 2015 15:36:52 +0200
x86/irq: Remove unused struct mp_pin_info
Now nobody makes use of struct mp_pin_info, so remove it.
Signed-off-by Jiang Liu <[email protected]>
Tested-by Joerg Roedel <[email protected]>
Cc Konrad Rzeszutek Wilk <[email protected]>
Cc David Cohen <[email protected]>
Cc Sander Eikelenboom <[email protected]>
Cc David Vrabel <[email protected]>
Cc Tony Luck <[email protected]>
Cc Joerg Roedel <[email protected]>
Cc Greg Kroah-Hartman <[email protected]>
Cc Bjorn Helgaas <[email protected]>
Cc Benjamin Herrenschmidt <[email protected]>
Cc Rafael J. Wysocki <[email protected]>
Cc Randy Dunlap <[email protected]>
Cc Yinghai Lu <[email protected]>
Cc Borislav Petkov <[email protected]>
Cc Dimitri Sivanich <[email protected]>
Cc Grant Likely <[email protected]>
Signed-off-by Thomas Gleixner <[email protected]>
--- arch/x86/kernel/apic/io_apic.c | 30 +++--------------------------- 1 file changed, 3 insertions(+), 27 deletions(-)
arch/x86/kernel/apic/io_apic.c +3 -27
@@ -86,13 +86,6 @@ struct mp_chip_data {bool isa_irq; }; -struct mp_pin_info { -int trigger; -int polarity; -int set; -u32 count; -}; - static struct ioapic { /* * # of IRQ routing registers
@@ -108,7 +101,6 @@ static struct ioapic {struct mp_ioapic_gsi gsi_config;struct ioapic_domain_cfg irqdomain_cfg;struct irq_domain *irqdomain; -struct mp_pin_info *pin_info;struct resource *iomem_res; } ioapics[MAX_IO_APICS ];
@@ -159,11 +151,6 @@ static inline int mp_init_irq_at_boot(int ioapic, int irq)return ioapic ==0 ||mp_is_legacy_irq (irq); } -static inline struct mp_pin_info *mp_pin_info (int ioapic_idx,int pin) -{ -return ioapics[ioapic_idx].pin_info + pin; -} -static inline struct irq_domain *mp_ioapic_irqdomain (int ioapic) {return ioapics[ioapic].irqdomain;
@@ -2432,7 +2419,6 @@ out:static int mp_irqdomain_create (int ioapic) { -size_t size;struct irq_alloc_info info;struct irq_domain *parent;int hwirqs =mp_ioapic_pin_count (ioapic);
@@ -2440,11 +2426,6 @@ static int mp_irqdomain_create(int ioapic)struct ioapic_domain_cfg *cfg = &ip->irqdomain_cfg;struct mp_ioapic_gsi *gsi_cfg =mp_ioapic_gsi_routing (ioapic); - size =sizeof (struct mp_pin_info ) *mp_ioapic_pin_count (ioapic); - ip->pin_info =kzalloc (size,GFP_KERNEL ); -if (!ip->pin_info) -return -ENOMEM ; -if (cfg->type ==IOAPIC_DOMAIN_INVALID )return 0 ;
@@ -2457,13 +2438,10 @@ static int mp_irqdomain_create(int ioapic) ip->irqdomain =irq_domain_add_linear (cfg->dev, hwirqs, cfg->ops, (void *)(long )ioapic); -if (ip->irqdomain) { - ip->irqdomain->parent = parent; - }else { -kfree (ip->pin_info); - ip->pin_info =NULL ; +if (!ip->irqdomain)return -ENOMEM ; - } + + ip->irqdomain->parent = parent;if (cfg->type ==IOAPIC_DOMAIN_LEGACY || cfg->type ==IOAPIC_DOMAIN_STRICT )
@@ -2479,8 +2457,6 @@ static void ioapic_destroy_irqdomain(int idx)irq_domain_remove (ioapics[idx].irqdomain); ioapics[idx].irqdomain =NULL ; } -kfree (ioapics[idx].pin_info); - ioapics[idx].pin_info =NULL ; }void __init setup_IO_APIC (void )
PATCH v5 3/33 x86/irq: Kill x86_io_apic_ops.print_entries and related interfaces
In reply to Jiang LiuNow there is no user of x86_io_apic_ops.print_entries anymore, so kill it.
Signed-off-by Jiang Liu <[email protected]>
Cc Konrad Rzeszutek Wilk <[email protected]>
Cc Tony Luck <[email protected]>
Cc Greg Kroah-Hartman <[email protected]>
Cc Bjorn Helgaas <[email protected]>
Cc Benjamin Herrenschmidt <[email protected]>
Cc Rafael J. Wysocki <[email protected]>
Cc Randy Dunlap <[email protected]>
Cc Yinghai Lu <[email protected]>
Cc Borislav Petkov <[email protected]>
Cc Joerg Roedel <[email protected]>
Cc Yijing Wang <[email protected]>
Cc Grant Likely <[email protected]>
Signed-off-by Thomas Gleixner <[email protected]>
Tested-by Joerg Roedel <[email protected]>
--- arch/x86/include/asm/io_apic.h | 3 -- arch/x86/include/asm/x86_init.h | 1 - arch/x86/kernel/apic/io_apic.c | 55 ----------------------------------- arch/x86/kernel/x86_init.c | 1 - drivers/iommu/intel_irq_remapping.c | 7 ----- 5 files changed, 67 deletions(-)
arch/x86/include/asm/io_apic.h +0 -3
@@ -225,8 +225,6 @@ extern unsigned int native_io_apic_read(unsigned int apic, unsigned int reg);extern void native_io_apic_write (unsigned int apic,unsigned int reg,unsigned int val);extern void native_io_apic_modify (unsigned int apic,unsigned int reg,unsigned int val);extern void native_disable_io_apic (void ); -extern void native_io_apic_print_entries (unsigned int apic,unsigned int nr_entries); -extern void intel_ir_io_apic_print_entries (unsigned int apic,unsigned int nr_entries);extern int native_ioapic_set_affinity (struct irq_data *,const struct cpumask *,bool );
@@ -290,7 +288,6 @@ static inline void disable_ioapic_support(void) { }#define native_io_apic_write NULL#define native_io_apic_modify NULL#define native_disable_io_apic NULL -#define native_io_apic_print_entries NULL#define native_ioapic_set_affinity NULL#define native_setup_ioapic_entry NULL#define native_eoi_ioapic_pin NULL
arch/x86/include/asm/x86_init.h +0 -1
@@ -191,7 +191,6 @@ struct x86_io_apic_ops {void (*write) (unsigned int apic,unsigned int reg,unsigned int value);void (*modify) (unsigned int apic,unsigned int reg,unsigned int value);void (*disable)(void ); -void (*print_entries)(unsigned int apic,unsigned int nr_entries);int (*set_affinity)(struct irq_data *data,const struct cpumask *mask,bool force);
arch/x86/kernel/apic/io_apic.c +0 -55
61 lines not on this page · raw message
arch/x86/kernel/x86_init.c +0 -1
@@ -144,7 +144,6 @@ struct x86_io_apic_ops x86_io_apic_ops = { .write = native_io_apic_write, .modify = native_io_apic_modify, .disable = native_disable_io_apic, - .print_entries = native_io_apic_print_entries, .set_affinity = native_ioapic_set_affinity, .setup_entry = native_setup_ioapic_entry, .eoi_ioapic_pin = native_eoi_ioapic_pin,
drivers/iommu/intel_irq_remapping.c +0 -7
@@ -696,13 +696,6 @@ static int __init intel_enable_irq_remapping(void) irq_remapping_enabled =1 ; -/* -* VT-d has a different layout for IO-APIC entries when -* interrupt remapping is enabled. So it needs a special routine -* to print IO-APIC entries for debugging purposes too. -*/ - x86_io_apic_ops.print_entries = intel_ir_io_apic_print_entries; -pr_info ("Enabled IRQ remapping in %s mode\n" , eim ?"x2apic" :"xapic" );return eim ?IRQ_REMAP_X2APIC_MODE :IRQ_REMAP_XAPIC_MODE ;
Signature · 1 line
1.7.10.4
tip-bot for Jiang Liu
merge bot[tip:x86/apic] x86/irq: Remove x86_io_apic_ops.print_entries and related interfaces
x86/irq: Remove x86_io_apic_ops.print_entries and related interfaces
Commit-ID: 84bea5cc7709dffdadfa9885a66efd67d9ffc24c Gitweb: http://git.kernel.org/tip/84bea5cc7709dffdadfa9885a66efd67d9ffc24c Author: Jiang Liu <[email protected]> AuthorDate: Tue, 14 Apr 2015 10:29:40 +0800 Committer: Thomas Gleixner <[email protected]> CommitDate: Fri, 24 Apr 2015 15:36:52 +0200
x86/irq: Remove x86_io_apic_ops.print_entries and related interfaces
Now there is no user of x86_io_apic_ops.print_entries anymore, so remove it.
Signed-off-by Jiang Liu <[email protected]>
Tested-by Joerg Roedel <[email protected]>
Cc Konrad Rzeszutek Wilk <[email protected]>
Cc David Cohen <[email protected]>
Cc Sander Eikelenboom <[email protected]>
Cc David Vrabel <[email protected]>
Cc Tony Luck <[email protected]>
Cc Greg Kroah-Hartman <[email protected]>
Cc Bjorn Helgaas <[email protected]>
Cc Benjamin Herrenschmidt <[email protected]>
Cc Rafael J. Wysocki <[email protected]>
Cc Randy Dunlap <[email protected]>
Cc Yinghai Lu <[email protected]>
Cc Borislav Petkov <[email protected]>
Cc Dimitri Sivanich <[email protected]>
Cc Joerg Roedel <[email protected]>
Cc Yijing Wang <[email protected]>
Cc Grant Likely <[email protected]>
Signed-off-by Thomas Gleixner <[email protected]>
--- arch/x86/include/asm/io_apic.h | 3 -- arch/x86/include/asm/x86_init.h | 1 - arch/x86/kernel/apic/io_apic.c | 55 ------------------------------------- arch/x86/kernel/x86_init.c | 1 - drivers/iommu/intel_irq_remapping.c | 7 ----- 5 files changed, 67 deletions(-)
arch/x86/include/asm/io_apic.h +0 -3
@@ -225,8 +225,6 @@ extern unsigned int native_io_apic_read(unsigned int apic, unsigned int reg);extern void native_io_apic_write (unsigned int apic,unsigned int reg,unsigned int val);extern void native_io_apic_modify (unsigned int apic,unsigned int reg,unsigned int val);extern void native_disable_io_apic (void ); -extern void native_io_apic_print_entries (unsigned int apic,unsigned int nr_entries); -extern void intel_ir_io_apic_print_entries (unsigned int apic,unsigned int nr_entries);extern int native_ioapic_set_affinity (struct irq_data *,const struct cpumask *,bool );
@@ -290,7 +288,6 @@ static inline void disable_ioapic_support(void) { }#define native_io_apic_write NULL#define native_io_apic_modify NULL#define native_disable_io_apic NULL -#define native_io_apic_print_entries NULL#define native_ioapic_set_affinity NULL#define native_setup_ioapic_entry NULL#define native_eoi_ioapic_pin NULL
arch/x86/include/asm/x86_init.h +0 -1
@@ -191,7 +191,6 @@ struct x86_io_apic_ops {void (*write) (unsigned int apic,unsigned int reg,unsigned int value);void (*modify) (unsigned int apic,unsigned int reg,unsigned int value);void (*disable)(void ); -void (*print_entries)(unsigned int apic,unsigned int nr_entries);int (*set_affinity)(struct irq_data *data,const struct cpumask *mask,bool force);
arch/x86/kernel/apic/io_apic.c +0 -55
61 lines not on this page · raw message
arch/x86/kernel/x86_init.c +0 -1
@@ -144,7 +144,6 @@ struct x86_io_apic_ops x86_io_apic_ops = { .write = native_io_apic_write, .modify = native_io_apic_modify, .disable = native_disable_io_apic, - .print_entries = native_io_apic_print_entries, .set_affinity = native_ioapic_set_affinity, .setup_entry = native_setup_ioapic_entry, .eoi_ioapic_pin = native_eoi_ioapic_pin,
drivers/iommu/intel_irq_remapping.c +0 -7
@@ -696,13 +696,6 @@ static int __init intel_enable_irq_remapping(void) irq_remapping_enabled =1 ; -/* -* VT-d has a different layout for IO-APIC entries when -* interrupt remapping is enabled. So it needs a special routine -* to print IO-APIC entries for debugging purposes too. -*/ - x86_io_apic_ops.print_entries = intel_ir_io_apic_print_entries; -pr_info ("Enabled IRQ remapping in %s mode\n" , eim ?"x2apic" :"xapic" );return eim ?IRQ_REMAP_X2APIC_MODE :IRQ_REMAP_XAPIC_MODE ;
PATCH v5 4/33 x86/irq: Kill x86_io_apic_ops.setup_entry and related interfaces
In reply to Jiang LiuNow there is no user of x86_io_apic_ops.setup_entry anymore, so kill it.
Signed-off-by Jiang Liu <[email protected]>
Cc Konrad Rzeszutek Wilk <[email protected]>
Cc Tony Luck <[email protected]>
Cc Greg Kroah-Hartman <[email protected]>
Cc Bjorn Helgaas <[email protected]>
Cc Benjamin Herrenschmidt <[email protected]>
Cc Rafael J. Wysocki <[email protected]>
Cc Randy Dunlap <[email protected]>
Cc Yinghai Lu <[email protected]>
Cc Borislav Petkov <[email protected]>
Cc Joerg Roedel <[email protected]>
Cc Yijing Wang <[email protected]>
Cc Grant Likely <[email protected]>
Signed-off-by Thomas Gleixner <[email protected]>
Tested-by Joerg Roedel <[email protected]>
--- arch/x86/include/asm/io_apic.h | 4 ---- arch/x86/include/asm/irq_remapping.h | 13 ------------- arch/x86/include/asm/x86_init.h | 3 --- arch/x86/kernel/apic/io_apic.c | 24 ------------------------ arch/x86/kernel/x86_init.c | 1 - drivers/iommu/irq_remapping.c | 13 ------------- 6 files changed, 58 deletions(-)
arch/x86/include/asm/io_apic.h +0 -4
@@ -150,9 +150,6 @@ struct irq_cfg;extern void ioapic_insert_resources (void );extern int arch_early_ioapic_init (void ); -extern int native_setup_ioapic_entry (int ,struct IO_APIC_route_entry *, -unsigned int ,int , -struct io_apic_irq_attr *);extern void eoi_ioapic_irq (unsigned int irq,struct irq_cfg *cfg);extern void native_eoi_ioapic_pin (int apic,int pin,int vector);
@@ -289,7 +286,6 @@ static inline void disable_ioapic_support(void) { }#define native_io_apic_modify NULL#define native_disable_io_apic NULL#define native_ioapic_set_affinity NULL -#define native_setup_ioapic_entry NULL#define native_eoi_ioapic_pin NULLstatic inline void setup_IO_APIC (void ) { }
arch/x86/include/asm/irq_remapping.h +0 -13
@@ -42,11 +42,6 @@ extern int irq_remapping_enable(void);extern void irq_remapping_disable (void );extern int irq_remapping_reenable (int );extern int irq_remap_enable_fault_handling (void ); -extern int setup_ioapic_remapped_entry (int irq, -struct IO_APIC_route_entry *entry, -unsigned int destination, -int vector, -struct io_apic_irq_attr *attr);extern void free_remapped_irq (int irq);extern void panic_if_irq_remap (const char *msg); extern bool setup_remapped_irq(int irq,
@@ -77,14 +72,6 @@ static inline int irq_remapping_enable(void) { return -ENODEV; }static inline void irq_remapping_disable (void ) { }static inline int irq_remapping_reenable (int eim) {return -ENODEV ; }static inline int irq_remap_enable_fault_handling (void ) {return -ENODEV ; } -static inline int setup_ioapic_remapped_entry (int irq, -struct IO_APIC_route_entry *entry, -unsigned int destination, -int vector, -struct io_apic_irq_attr *attr) -{ -return -ENODEV ; -}static inline void free_remapped_irq (int irq) { }static inline void panic_if_irq_remap (const char *msg)
arch/x86/include/asm/x86_init.h +0 -3
@@ -194,9 +194,6 @@ struct x86_io_apic_ops {int (*set_affinity)(struct irq_data *data,const struct cpumask *mask,bool force); -int (*setup_entry)(int irq,struct IO_APIC_route_entry *entry, -unsigned int destination,int vector, -struct io_apic_irq_attr *attr);void (*eoi_ioapic_pin)(int apic,int pin,int vector); };
arch/x86/kernel/apic/io_apic.c +0 -24
@@ -1296,30 +1296,6 @@ static inline int IO_APIC_irq_trigger(int irq) }#endif -int native_setup_ioapic_entry (int irq,struct IO_APIC_route_entry *entry, -unsigned int destination,int vector, -struct io_apic_irq_attr *attr) -{ -memset (entry,0 ,sizeof (*entry)); - - entry->delivery_mode = apic->irq_delivery_mode; - entry->dest_mode = apic->irq_dest_mode; - entry->dest = destination; - entry->vector = vector; - entry->mask =0 ;/* enable IRQ */ - entry->trigger = attr->trigger; - entry->polarity = attr->polarity; - -/* -* Mask level triggered irqs. -* Use IRQ_DELAYED_DISABLE for edge triggered irqs. -*/ -if (attr->trigger) - entry->mask =1 ; - -return 0 ; -} -static void __init setup_IO_APIC_irqs (void ) {unsigned int ioapic, pin;
arch/x86/kernel/x86_init.c +0 -1
@@ -145,6 +145,5 @@ struct x86_io_apic_ops x86_io_apic_ops = { .modify = native_io_apic_modify, .disable = native_disable_io_apic, .set_affinity = native_ioapic_set_affinity, - .setup_entry = native_setup_ioapic_entry, .eoi_ioapic_pin = native_eoi_ioapic_pin, };
drivers/iommu/irq_remapping.c +0 -13
@@ -62,7 +62,6 @@ static void __init irq_remapping_modify_x86_ops(void) { x86_io_apic_ops.disable = irq_remapping_disable_io_apic; x86_io_apic_ops.set_affinity = set_remapped_irq_affinity; - x86_io_apic_ops.setup_entry = setup_ioapic_remapped_entry; x86_io_apic_ops.eoi_ioapic_pin = eoi_ioapic_pin_remapped; }
@@ -158,18 +157,6 @@ int __init irq_remap_enable_fault_handling(void)return remap_ops->enable_faulting (); } -int setup_ioapic_remapped_entry (int irq, -struct IO_APIC_route_entry *entry, -unsigned int destination,int vector, -struct io_apic_irq_attr *attr) -{ -if (!remap_ops->setup_ioapic_entry) -return -ENODEV ; - -return remap_ops->setup_ioapic_entry (irq, entry, destination, - vector, attr); -} -static int set_remapped_irq_affinity (struct irq_data *data,const struct cpumask *mask,bool force) {
Signature · 1 line
1.7.10.4
tip-bot for Jiang Liu
merge bot[tip:x86/apic] x86/irq: Remove x86_io_apic_ops.setup_entry and related interfaces
x86/irq: Remove x86_io_apic_ops.setup_entry and related interfaces
Commit-ID: 35d50d8fd5b8f932b3e71311a4cbd4384501ab9a Gitweb: http://git.kernel.org/tip/35d50d8fd5b8f932b3e71311a4cbd4384501ab9a Author: Jiang Liu <[email protected]> AuthorDate: Tue, 14 Apr 2015 10:29:41 +0800 Committer: Thomas Gleixner <[email protected]> CommitDate: Fri, 24 Apr 2015 15:36:52 +0200
x86/irq: Remove x86_io_apic_ops.setup_entry and related interfaces
Now there is no user of x86_io_apic_ops.setup_entry anymore, so remove it.
Signed-off-by Jiang Liu <[email protected]>
Tested-by Joerg Roedel <[email protected]>
Cc Konrad Rzeszutek Wilk <[email protected]>
Cc David Cohen <[email protected]>
Cc Sander Eikelenboom <[email protected]>
Cc David Vrabel <[email protected]>
Cc Tony Luck <[email protected]>
Cc Greg Kroah-Hartman <[email protected]>
Cc Bjorn Helgaas <[email protected]>
Cc Benjamin Herrenschmidt <[email protected]>
Cc Rafael J. Wysocki <[email protected]>
Cc Randy Dunlap <[email protected]>
Cc Yinghai Lu <[email protected]>
Cc Borislav Petkov <[email protected]>
Cc Dimitri Sivanich <[email protected]>
Cc Joerg Roedel <[email protected]>
Cc Yijing Wang <[email protected]>
Cc Grant Likely <[email protected]>
Signed-off-by Thomas Gleixner <[email protected]>
--- arch/x86/include/asm/io_apic.h | 4 ---- arch/x86/include/asm/irq_remapping.h | 13 ------------- arch/x86/include/asm/x86_init.h | 3 --- arch/x86/kernel/apic/io_apic.c | 24 ------------------------ arch/x86/kernel/x86_init.c | 1 - drivers/iommu/irq_remapping.c | 13 ------------- 6 files changed, 58 deletions(-)
arch/x86/include/asm/io_apic.h +0 -4
@@ -150,9 +150,6 @@ struct irq_cfg;extern void ioapic_insert_resources (void );extern int arch_early_ioapic_init (void ); -extern int native_setup_ioapic_entry (int ,struct IO_APIC_route_entry *, -unsigned int ,int , -struct io_apic_irq_attr *);extern void eoi_ioapic_irq (unsigned int irq,struct irq_cfg *cfg);extern void native_eoi_ioapic_pin (int apic,int pin,int vector);
@@ -289,7 +286,6 @@ static inline void disable_ioapic_support(void) { }#define native_io_apic_modify NULL#define native_disable_io_apic NULL#define native_ioapic_set_affinity NULL -#define native_setup_ioapic_entry NULL#define native_eoi_ioapic_pin NULLstatic inline void setup_IO_APIC (void ) { }
arch/x86/include/asm/irq_remapping.h +0 -13
@@ -42,11 +42,6 @@ extern int irq_remapping_enable(void);extern void irq_remapping_disable (void );extern int irq_remapping_reenable (int );extern int irq_remap_enable_fault_handling (void ); -extern int setup_ioapic_remapped_entry (int irq, -struct IO_APIC_route_entry *entry, -unsigned int destination, -int vector, -struct io_apic_irq_attr *attr);extern void free_remapped_irq (int irq);extern void panic_if_irq_remap (const char *msg); extern bool setup_remapped_irq(int irq,
@@ -77,14 +72,6 @@ static inline int irq_remapping_enable(void) { return -ENODEV; }static inline void irq_remapping_disable (void ) { }static inline int irq_remapping_reenable (int eim) {return -ENODEV ; }static inline int irq_remap_enable_fault_handling (void ) {return -ENODEV ; } -static inline int setup_ioapic_remapped_entry (int irq, -struct IO_APIC_route_entry *entry, -unsigned int destination, -int vector, -struct io_apic_irq_attr *attr) -{ -return -ENODEV ; -}static inline void free_remapped_irq (int irq) { }static inline void panic_if_irq_remap (const char *msg)
arch/x86/include/asm/x86_init.h +0 -3
@@ -194,9 +194,6 @@ struct x86_io_apic_ops {int (*set_affinity)(struct irq_data *data,const struct cpumask *mask,bool force); -int (*setup_entry)(int irq,struct IO_APIC_route_entry *entry, -unsigned int destination,int vector, -struct io_apic_irq_attr *attr);void (*eoi_ioapic_pin)(int apic,int pin,int vector); };
arch/x86/kernel/apic/io_apic.c +0 -24
@@ -1296,30 +1296,6 @@ static inline int IO_APIC_irq_trigger(int irq) }#endif -int native_setup_ioapic_entry (int irq,struct IO_APIC_route_entry *entry, -unsigned int destination,int vector, -struct io_apic_irq_attr *attr) -{ -memset (entry,0 ,sizeof (*entry)); - - entry->delivery_mode = apic->irq_delivery_mode; - entry->dest_mode = apic->irq_dest_mode; - entry->dest = destination; - entry->vector = vector; - entry->mask =0 ;/* enable IRQ */ - entry->trigger = attr->trigger; - entry->polarity = attr->polarity; - -/* -* Mask level triggered irqs. -* Use IRQ_DELAYED_DISABLE for edge triggered irqs. -*/ -if (attr->trigger) - entry->mask =1 ; - -return 0 ; -} -static void __init setup_IO_APIC_irqs (void ) {unsigned int ioapic, pin;
arch/x86/kernel/x86_init.c +0 -1
@@ -145,6 +145,5 @@ struct x86_io_apic_ops x86_io_apic_ops = { .modify = native_io_apic_modify, .disable = native_disable_io_apic, .set_affinity = native_ioapic_set_affinity, - .setup_entry = native_setup_ioapic_entry, .eoi_ioapic_pin = native_eoi_ioapic_pin, };
drivers/iommu/irq_remapping.c +0 -13
@@ -62,7 +62,6 @@ static void __init irq_remapping_modify_x86_ops(void) { x86_io_apic_ops.disable = irq_remapping_disable_io_apic; x86_io_apic_ops.set_affinity = set_remapped_irq_affinity; - x86_io_apic_ops.setup_entry = setup_ioapic_remapped_entry; x86_io_apic_ops.eoi_ioapic_pin = eoi_ioapic_pin_remapped; }
@@ -158,18 +157,6 @@ int __init irq_remap_enable_fault_handling(void)return remap_ops->enable_faulting (); } -int setup_ioapic_remapped_entry (int irq, -struct IO_APIC_route_entry *entry, -unsigned int destination,int vector, -struct io_apic_irq_attr *attr) -{ -if (!remap_ops->setup_ioapic_entry) -return -ENODEV ; - -return remap_ops->setup_ioapic_entry (irq, entry, destination, - vector, attr); -} -static int set_remapped_irq_affinity (struct irq_data *data,const struct cpumask *mask,bool force) {
PATCH v5 5/33 x86/irq: Kill x86_io_apic_ops.set_affinity and related interfaces
In reply to Jiang LiuNow there is no user of x86_io_apic_ops.set_affinity anymore, so kill it.
Cc Konrad Rzeszutek Wilk <[email protected]>
Cc Tony Luck <[email protected]>
Cc Greg Kroah-Hartman <[email protected]>
Cc iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org
Cc Bjorn Helgaas <[email protected]>
Cc Benjamin Herrenschmidt <[email protected]>
Cc Rafael J. Wysocki <[email protected]>
Cc Randy Dunlap <[email protected]>
Cc Yinghai Lu <[email protected]>
Cc Borislav Petkov <[email protected]>
Cc Joerg Roedel <[email protected]>
Cc Yijing Wang <[email protected]>
Cc Grant Likely <[email protected]>
Link http://lkml.kernel.org/r/1416901802-24211-15-git-send-email-jiang.liu-VuQAYsv1563Yd54FQh9/[email protected] open here
Signed-off-by Thomas Gleixner <[email protected]>
Tested-by Joerg Roedel <[email protected]>
--- arch/x86/include/asm/io_apic.h | 4 ---- arch/x86/include/asm/x86_init.h | 3 --- arch/x86/kernel/apic/io_apic.c | 25 +------------------------ arch/x86/kernel/x86_init.c | 1 - drivers/iommu/irq_remapping.c | 15 --------------- 5 files changed, 1 insertion(+), 47 deletions(-)
arch/x86/include/asm/io_apic.h +0 -4
@@ -222,9 +222,6 @@ extern unsigned int native_io_apic_read(unsigned int apic, unsigned int reg);extern void native_io_apic_write (unsigned int apic,unsigned int reg,unsigned int val);extern void native_io_apic_modify (unsigned int apic,unsigned int reg,unsigned int val);extern void native_disable_io_apic (void ); -extern int native_ioapic_set_affinity (struct irq_data *, -const struct cpumask *, -bool );static inline unsigned int io_apic_read (unsigned int apic,unsigned int reg) {
@@ -285,7 +282,6 @@ static inline void disable_ioapic_support(void) { }#define native_io_apic_write NULL#define native_io_apic_modify NULL#define native_disable_io_apic NULL -#define native_ioapic_set_affinity NULL#define native_eoi_ioapic_pin NULLstatic inline void setup_IO_APIC (void ) { }
arch/x86/include/asm/x86_init.h +0 -3
@@ -191,9 +191,6 @@ struct x86_io_apic_ops {void (*write) (unsigned int apic,unsigned int reg,unsigned int value);void (*modify) (unsigned int apic,unsigned int reg,unsigned int value);void (*disable)(void ); -int (*set_affinity)(struct irq_data *data, -const struct cpumask *mask, -bool force);void (*eoi_ioapic_pin)(int apic,int pin,int vector); };
arch/x86/kernel/apic/io_apic.c +1 -24
@@ -1787,29 +1787,6 @@ static void __target_IO_APIC_irq(unsigned int irq, unsigned int dest, struct irq } } -int native_ioapic_set_affinity (struct irq_data *data, -const struct cpumask *mask, -bool force) -{ -unsigned int dest, irq = data->irq; -unsigned long flags; -int ret; - -if (!config_enabled (CONFIG_SMP )) -return -EPERM ; - -raw_spin_lock_irqsave (&ioapic_lock, flags); - ret =apic_set_affinity (data, mask, &dest); -if (!ret) { -/* Only the high 8 bits are valid. */ - dest =SET_APIC_LOGICAL_ID (dest); -__target_IO_APIC_irq (irq, dest,irqd_cfg (data)); - ret =IRQ_SET_MASK_OK_NOCOPY ; - } -raw_spin_unlock_irqrestore (&ioapic_lock, flags); -return ret; -} -atomic_t irq_mis_count;#ifdef CONFIG_GENERIC_PENDING_IRQ
@@ -2686,7 +2663,7 @@ void __init setup_ioapic_dest(void)else mask = apic->target_cpus (); - x86_io_apic_ops.set_affinity (idata, mask, false); +irq_set_affinity (irq, mask); } }
arch/x86/kernel/x86_init.c +0 -1
@@ -144,6 +144,5 @@ struct x86_io_apic_ops x86_io_apic_ops = { .write = native_io_apic_write, .modify = native_io_apic_modify, .disable = native_disable_io_apic, - .set_affinity = native_ioapic_set_affinity, .eoi_ioapic_pin = native_eoi_ioapic_pin, };
drivers/iommu/irq_remapping.c +0 -15
@@ -25,10 +25,6 @@ int no_x2apic_optout;static int disable_irq_remap;static struct irq_remap_ops *remap_ops; -static int set_remapped_irq_affinity (struct irq_data *data, -const struct cpumask *mask, -bool force); -static bool irq_remapped (struct irq_cfg *cfg) {return (cfg->remapped ==1 );
@@ -61,7 +57,6 @@ static void eoi_ioapic_pin_remapped(int apic, int pin, int vector)static void __init irq_remapping_modify_x86_ops (void ) { x86_io_apic_ops.disable = irq_remapping_disable_io_apic; - x86_io_apic_ops.set_affinity = set_remapped_irq_affinity; x86_io_apic_ops.eoi_ioapic_pin = eoi_ioapic_pin_remapped; }
@@ -157,15 +152,6 @@ int __init irq_remap_enable_fault_handling(void)return remap_ops->enable_faulting (); } -static int set_remapped_irq_affinity (struct irq_data *data, -const struct cpumask *mask,bool force) -{ -if (!config_enabled (CONFIG_SMP ) || !remap_ops->set_affinity) -return 0 ; - -return remap_ops->set_affinity (data, mask, force); -} -void free_remapped_irq (int irq) {struct irq_cfg *cfg =irq_cfg (irq);
@@ -201,7 +187,6 @@ void irq_remap_modify_chip_defaults(struct irq_chip *chip) chip->irq_print_chip = ir_print_prefix; chip->irq_ack = ir_ack_apic_edge; chip->irq_eoi = ir_ack_apic_level; - chip->irq_set_affinity = x86_io_apic_ops.set_affinity; }bool setup_remapped_irq (int irq,struct irq_cfg *cfg,struct irq_chip *chip)
Signature · 1 line
1.7.10.4
tip-bot for Jiang Liu
merge bot[tip:x86/apic] x86/irq: Remove x86_io_apic_ops.set_affinity and related interfaces
x86/irq: Remove x86_io_apic_ops.set_affinity and related interfaces
Commit-ID: aa5cb97f14a2dd5aefabed6538c35ebc087d7c24 Gitweb: http://git.kernel.org/tip/aa5cb97f14a2dd5aefabed6538c35ebc087d7c24 Author: Jiang Liu <[email protected]> AuthorDate: Tue, 14 Apr 2015 10:29:42 +0800 Committer: Thomas Gleixner <[email protected]> CommitDate: Fri, 24 Apr 2015 15:36:52 +0200
x86/irq: Remove x86_io_apic_ops.set_affinity and related interfaces
Now there is no user of x86_io_apic_ops.set_affinity anymore, so remove it.
Signed-off-by Jiang Liu <[email protected]>
Tested-by Joerg Roedel <[email protected]>
Cc Konrad Rzeszutek Wilk <[email protected]>
Cc David Cohen <[email protected]>
Cc Sander Eikelenboom <[email protected]>
Cc David Vrabel <[email protected]>
Cc Tony Luck <[email protected]>
Cc Greg Kroah-Hartman <[email protected]>
Cc Bjorn Helgaas <[email protected]>
Cc Benjamin Herrenschmidt <[email protected]>
Cc Rafael J. Wysocki <[email protected]>
Cc Randy Dunlap <[email protected]>
Cc Yinghai Lu <[email protected]>
Cc Borislav Petkov <[email protected]>
Cc Dimitri Sivanich <[email protected]>
Cc Joerg Roedel <[email protected]>
Cc Yijing Wang <[email protected]>
Cc Grant Likely <[email protected]>
--- arch/x86/include/asm/io_apic.h | 4 ---- arch/x86/include/asm/x86_init.h | 3 --- arch/x86/kernel/apic/io_apic.c | 25 +------------------------ arch/x86/kernel/x86_init.c | 1 - drivers/iommu/irq_remapping.c | 15 --------------- 5 files changed, 1 insertion(+), 47 deletions(-)
arch/x86/include/asm/io_apic.h +0 -4
@@ -222,9 +222,6 @@ extern unsigned int native_io_apic_read(unsigned int apic, unsigned int reg);extern void native_io_apic_write (unsigned int apic,unsigned int reg,unsigned int val);extern void native_io_apic_modify (unsigned int apic,unsigned int reg,unsigned int val);extern void native_disable_io_apic (void ); -extern int native_ioapic_set_affinity (struct irq_data *, -const struct cpumask *, -bool );static inline unsigned int io_apic_read (unsigned int apic,unsigned int reg) {
@@ -285,7 +282,6 @@ static inline void disable_ioapic_support(void) { }#define native_io_apic_write NULL#define native_io_apic_modify NULL#define native_disable_io_apic NULL -#define native_ioapic_set_affinity NULL#define native_eoi_ioapic_pin NULLstatic inline void setup_IO_APIC (void ) { }
arch/x86/include/asm/x86_init.h +0 -3
@@ -191,9 +191,6 @@ struct x86_io_apic_ops {void (*write) (unsigned int apic,unsigned int reg,unsigned int value);void (*modify) (unsigned int apic,unsigned int reg,unsigned int value);void (*disable)(void ); -int (*set_affinity)(struct irq_data *data, -const struct cpumask *mask, -bool force);void (*eoi_ioapic_pin)(int apic,int pin,int vector); };
arch/x86/kernel/apic/io_apic.c +1 -24
@@ -1787,29 +1787,6 @@ static void __target_IO_APIC_irq(unsigned int irq, unsigned int dest, struct irq } } -int native_ioapic_set_affinity (struct irq_data *data, -const struct cpumask *mask, -bool force) -{ -unsigned int dest, irq = data->irq; -unsigned long flags; -int ret; - -if (!config_enabled (CONFIG_SMP )) -return -EPERM ; - -raw_spin_lock_irqsave (&ioapic_lock, flags); - ret =apic_set_affinity (data, mask, &dest); -if (!ret) { -/* Only the high 8 bits are valid. */ - dest =SET_APIC_LOGICAL_ID (dest); -__target_IO_APIC_irq (irq, dest,irqd_cfg (data)); - ret =IRQ_SET_MASK_OK_NOCOPY ; - } -raw_spin_unlock_irqrestore (&ioapic_lock, flags); -return ret; -} -atomic_t irq_mis_count;#ifdef CONFIG_GENERIC_PENDING_IRQ
@@ -2686,7 +2663,7 @@ void __init setup_ioapic_dest(void)else mask = apic->target_cpus (); - x86_io_apic_ops.set_affinity (idata, mask, false); +irq_set_affinity (irq, mask); } }
arch/x86/kernel/x86_init.c +0 -1
@@ -144,6 +144,5 @@ struct x86_io_apic_ops x86_io_apic_ops = { .write = native_io_apic_write, .modify = native_io_apic_modify, .disable = native_disable_io_apic, - .set_affinity = native_ioapic_set_affinity, .eoi_ioapic_pin = native_eoi_ioapic_pin, };
drivers/iommu/irq_remapping.c +0 -15
@@ -25,10 +25,6 @@ int no_x2apic_optout;static int disable_irq_remap;static struct irq_remap_ops *remap_ops; -static int set_remapped_irq_affinity (struct irq_data *data, -const struct cpumask *mask, -bool force); -static bool irq_remapped (struct irq_cfg *cfg) {return (cfg->remapped ==1 );
@@ -61,7 +57,6 @@ static void eoi_ioapic_pin_remapped(int apic, int pin, int vector)static void __init irq_remapping_modify_x86_ops (void ) { x86_io_apic_ops.disable = irq_remapping_disable_io_apic; - x86_io_apic_ops.set_affinity = set_remapped_irq_affinity; x86_io_apic_ops.eoi_ioapic_pin = eoi_ioapic_pin_remapped; }
@@ -157,15 +152,6 @@ int __init irq_remap_enable_fault_handling(void)return remap_ops->enable_faulting (); } -static int set_remapped_irq_affinity (struct irq_data *data, -const struct cpumask *mask,bool force) -{ -if (!config_enabled (CONFIG_SMP ) || !remap_ops->set_affinity) -return 0 ; - -return remap_ops->set_affinity (data, mask, force); -} -void free_remapped_irq (int irq) {struct irq_cfg *cfg =irq_cfg (irq);
@@ -201,7 +187,6 @@ void irq_remap_modify_chip_defaults(struct irq_chip *chip) chip->irq_print_chip = ir_print_prefix; chip->irq_ack = ir_ack_apic_edge; chip->irq_eoi = ir_ack_apic_level; - chip->irq_set_affinity = x86_io_apic_ops.set_affinity; }bool setup_remapped_irq (int irq,struct irq_cfg *cfg,struct irq_chip *chip)
PATCH v5 6/33 x86/irq: Kill x86_io_apic_ops.eoi_ioapic_pin and related interfaces
In reply to Jiang LiuNow there is no user of x86_io_apic_ops.eoi_ioapic_pin anymore, so kill it.
Cc Konrad Rzeszutek Wilk <[email protected]>
Cc Tony Luck <[email protected]>
Cc Greg Kroah-Hartman <[email protected]>
Cc iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org
Cc Bjorn Helgaas <[email protected]>
Cc Benjamin Herrenschmidt <[email protected]>
Cc Rafael J. Wysocki <[email protected]>
Cc Randy Dunlap <[email protected]>
Cc Yinghai Lu <[email protected]>
Cc Borislav Petkov <[email protected]>
Cc Joerg Roedel <[email protected]>
Cc Yijing Wang <[email protected]>
Cc Grant Likely <[email protected]>
Link http://lkml.kernel.org/r/1416901802-24211-16-git-send-email-jiang.liu-VuQAYsv1563Yd54FQh9/[email protected] open here
Signed-off-by Thomas Gleixner <[email protected]>
Tested-by Joerg Roedel <[email protected]>
--- arch/x86/include/asm/io_apic.h | 7 ------- arch/x86/include/asm/x86_init.h | 1 - arch/x86/kernel/apic/io_apic.c | 20 ++++---------------- arch/x86/kernel/x86_init.c | 1 - drivers/iommu/irq_remapping.c | 19 ------------------- 5 files changed, 4 insertions(+), 44 deletions(-)
arch/x86/include/asm/io_apic.h +0 -7
@@ -150,10 +150,6 @@ struct irq_cfg;extern void ioapic_insert_resources (void );extern int arch_early_ioapic_init (void ); -extern void eoi_ioapic_irq (unsigned int irq,struct irq_cfg *cfg); - -extern void native_eoi_ioapic_pin (int apic,int pin,int vector); -extern int save_ioapic_entries (void );extern void mask_ioapic_entries (void );extern int restore_ioapic_entries (void );
@@ -237,8 +233,6 @@ static inline void io_apic_modify(unsigned int apic, unsigned int reg, unsigned x86_io_apic_ops.modify (apic, reg, value); } -extern void io_apic_eoi (unsigned int apic,unsigned int vector); -extern void setup_IO_APIC (void );extern void enable_IO_APIC (void );extern void disable_IO_APIC (void );
@@ -282,7 +276,6 @@ static inline void disable_ioapic_support(void) { }#define native_io_apic_write NULL#define native_io_apic_modify NULL#define native_disable_io_apic NULL -#define native_eoi_ioapic_pin NULLstatic inline void setup_IO_APIC (void ) { }static inline void enable_IO_APIC (void ) { }
arch/x86/include/asm/x86_init.h +0 -1
@@ -191,7 +191,6 @@ struct x86_io_apic_ops {void (*write) (unsigned int apic,unsigned int reg,unsigned int value);void (*modify) (unsigned int apic,unsigned int reg,unsigned int value);void (*disable)(void ); -void (*eoi_ioapic_pin)(int apic,int pin,int vector); };extern struct x86_init_ops x86_init;
arch/x86/kernel/apic/io_apic.c +4 -16
@@ -271,7 +271,7 @@ static __attribute_const__ struct io_apic __iomem *io_apic_base(int idx) + (mpc_ioapic_addr (idx) & ~PAGE_MASK ); } -void io_apic_eoi (unsigned int apic,unsigned int vector) +static inline void io_apic_eoi (unsigned int apic,unsigned int vector) {struct io_apic __iomem *io_apic =io_apic_base (apic);writel (vector, &io_apic->eoi);
@@ -527,7 +527,7 @@ static void unmask_ioapic_irq(struct irq_data *data)* Otherwise, we simulate the EOI message manually by changing the trigger * mode to edge and then back to level, with RTE being masked during this. */ -void native_eoi_ioapic_pin (int apic,int pin,int vector) +static void __eoi_ioapic_pin (int apic,int pin,int vector) {if (mpc_ioapic_ver (apic) >=0x20 ) {io_apic_eoi (apic, vector);
@@ -558,19 +558,7 @@ void eoi_ioapic_pin(int vector, struct irq_cfg *cfg)raw_spin_lock_irqsave (&ioapic_lock, flags);for_each_irq_pin (entry, cfg->irq_2_pin) -native_eoi_ioapic_pin (entry->apic, entry->pin, vector); -raw_spin_unlock_irqrestore (&ioapic_lock, flags); -} - -void eoi_ioapic_irq (unsigned int irq,struct irq_cfg *cfg) -{ -struct irq_pin_list *entry; -unsigned long flags; - -raw_spin_lock_irqsave (&ioapic_lock, flags); -for_each_irq_pin (entry, cfg->irq_2_pin) - x86_io_apic_ops.eoi_ioapic_pin (entry->apic, entry->pin, - cfg->vector); +__eoi_ioapic_pin (entry->apic, entry->pin, vector);raw_spin_unlock_irqrestore (&ioapic_lock, flags); }
@@ -606,7 +594,7 @@ static void clear_IO_APIC_pin(unsigned int apic, unsigned int pin)ioapic_write_entry (apic, pin, entry); }raw_spin_lock_irqsave (&ioapic_lock, flags); -native_eoi_ioapic_pin (apic, pin, entry.vector); +__eoi_ioapic_pin (apic, pin, entry.vector);raw_spin_unlock_irqrestore (&ioapic_lock, flags); }
arch/x86/kernel/x86_init.c +0 -1
@@ -144,5 +144,4 @@ struct x86_io_apic_ops x86_io_apic_ops = { .write = native_io_apic_write, .modify = native_io_apic_modify, .disable = native_disable_io_apic, - .eoi_ioapic_pin = native_eoi_ioapic_pin, };
drivers/iommu/irq_remapping.c +0 -19
@@ -43,21 +43,9 @@ static void irq_remapping_disable_io_apic(void)disconnect_bsp_APIC (0 ); } -static void eoi_ioapic_pin_remapped (int apic,int pin,int vector) -{ -/* -* Intr-remapping uses pin number as the virtual vector -* in the RTE. Actual vector is programmed in -* intr-remapping table entry. Hence for the io-apic -* EOI we use the pin number. -*/ -io_apic_eoi (apic, pin); -} -static void __init irq_remapping_modify_x86_ops (void ) { x86_io_apic_ops.disable = irq_remapping_disable_io_apic; - x86_io_apic_ops.eoi_ioapic_pin = eoi_ioapic_pin_remapped; }static __init int setup_nointremap (char *str)
@@ -171,12 +159,6 @@ void ir_ack_apic_edge(struct irq_data *data)ack_APIC_irq (); } -static void ir_ack_apic_level (struct irq_data *data) -{ -ack_APIC_irq (); -eoi_ioapic_irq (data->irq,irqd_cfg (data)); -} -static void ir_print_prefix (struct irq_data *data,struct seq_file *p) {seq_printf (p," IR-%s" , data->chip->name);
@@ -186,7 +168,6 @@ void irq_remap_modify_chip_defaults(struct irq_chip *chip) { chip->irq_print_chip = ir_print_prefix; chip->irq_ack = ir_ack_apic_edge; - chip->irq_eoi = ir_ack_apic_level; }bool setup_remapped_irq (int irq,struct irq_cfg *cfg,struct irq_chip *chip)
Signature · 1 line
1.7.10.4
tip-bot for Jiang Liu
merge bot[tip:x86/apic] x86/irq: Remove x86_io_apic_ops.eoi_ioapic_pin and related interfaces
x86/irq: Remove x86_io_apic_ops.eoi_ioapic_pin and related interfaces
Commit-ID: ad66e1efc95e548598b032c1fe5bbc34f6460547 Gitweb: http://git.kernel.org/tip/ad66e1efc95e548598b032c1fe5bbc34f6460547 Author: Jiang Liu <[email protected]> AuthorDate: Tue, 14 Apr 2015 10:29:43 +0800 Committer: Thomas Gleixner <[email protected]> CommitDate: Fri, 24 Apr 2015 15:36:52 +0200
x86/irq: Remove x86_io_apic_ops.eoi_ioapic_pin and related interfaces
Now there is no user of x86_io_apic_ops.eoi_ioapic_pin anymore, so remove it.
Signed-off-by Jiang Liu <[email protected]>
Tested-by Joerg Roedel <[email protected]>
Cc Konrad Rzeszutek Wilk <[email protected]>
Cc David Cohen <[email protected]>
Cc Sander Eikelenboom <[email protected]>
Cc David Vrabel <[email protected]>
Cc Tony Luck <[email protected]>
Cc Greg Kroah-Hartman <[email protected]>
Cc Bjorn Helgaas <[email protected]>
Cc Benjamin Herrenschmidt <[email protected]>
Cc Rafael J. Wysocki <[email protected]>
Cc Randy Dunlap <[email protected]>
Cc Yinghai Lu <[email protected]>
Cc Borislav Petkov <[email protected]>
Cc Dimitri Sivanich <[email protected]>
Cc Joerg Roedel <[email protected]>
Cc Yijing Wang <[email protected]>
Cc Grant Likely <[email protected]>
Signed-off-by Thomas Gleixner <[email protected]>
--- arch/x86/include/asm/io_apic.h | 7 ------- arch/x86/include/asm/x86_init.h | 1 - arch/x86/kernel/apic/io_apic.c | 20 ++++---------------- arch/x86/kernel/x86_init.c | 1 - drivers/iommu/irq_remapping.c | 19 ------------------- 5 files changed, 4 insertions(+), 44 deletions(-)
arch/x86/include/asm/io_apic.h +0 -7
@@ -150,10 +150,6 @@ struct irq_cfg;extern void ioapic_insert_resources (void );extern int arch_early_ioapic_init (void ); -extern void eoi_ioapic_irq (unsigned int irq,struct irq_cfg *cfg); - -extern void native_eoi_ioapic_pin (int apic,int pin,int vector); -extern int save_ioapic_entries (void );extern void mask_ioapic_entries (void );extern int restore_ioapic_entries (void );
@@ -237,8 +233,6 @@ static inline void io_apic_modify(unsigned int apic, unsigned int reg, unsigned x86_io_apic_ops.modify (apic, reg, value); } -extern void io_apic_eoi (unsigned int apic,unsigned int vector); -extern void setup_IO_APIC (void );extern void enable_IO_APIC (void );extern void disable_IO_APIC (void );
@@ -282,7 +276,6 @@ static inline void disable_ioapic_support(void) { }#define native_io_apic_write NULL#define native_io_apic_modify NULL#define native_disable_io_apic NULL -#define native_eoi_ioapic_pin NULLstatic inline void setup_IO_APIC (void ) { }static inline void enable_IO_APIC (void ) { }
arch/x86/include/asm/x86_init.h +0 -1
@@ -191,7 +191,6 @@ struct x86_io_apic_ops {void (*write) (unsigned int apic,unsigned int reg,unsigned int value);void (*modify) (unsigned int apic,unsigned int reg,unsigned int value);void (*disable)(void ); -void (*eoi_ioapic_pin)(int apic,int pin,int vector); };extern struct x86_init_ops x86_init;
arch/x86/kernel/apic/io_apic.c +4 -16
@@ -271,7 +271,7 @@ static __attribute_const__ struct io_apic __iomem *io_apic_base(int idx) + (mpc_ioapic_addr (idx) & ~PAGE_MASK ); } -void io_apic_eoi (unsigned int apic,unsigned int vector) +static inline void io_apic_eoi (unsigned int apic,unsigned int vector) {struct io_apic __iomem *io_apic =io_apic_base (apic);writel (vector, &io_apic->eoi);
@@ -527,7 +527,7 @@ static void unmask_ioapic_irq(struct irq_data *data)* Otherwise, we simulate the EOI message manually by changing the trigger * mode to edge and then back to level, with RTE being masked during this. */ -void native_eoi_ioapic_pin (int apic,int pin,int vector) +static void __eoi_ioapic_pin (int apic,int pin,int vector) {if (mpc_ioapic_ver (apic) >=0x20 ) {io_apic_eoi (apic, vector);
@@ -558,19 +558,7 @@ void eoi_ioapic_pin(int vector, struct irq_cfg *cfg)raw_spin_lock_irqsave (&ioapic_lock, flags);for_each_irq_pin (entry, cfg->irq_2_pin) -native_eoi_ioapic_pin (entry->apic, entry->pin, vector); -raw_spin_unlock_irqrestore (&ioapic_lock, flags); -} - -void eoi_ioapic_irq (unsigned int irq,struct irq_cfg *cfg) -{ -struct irq_pin_list *entry; -unsigned long flags; - -raw_spin_lock_irqsave (&ioapic_lock, flags); -for_each_irq_pin (entry, cfg->irq_2_pin) - x86_io_apic_ops.eoi_ioapic_pin (entry->apic, entry->pin, - cfg->vector); +__eoi_ioapic_pin (entry->apic, entry->pin, vector);raw_spin_unlock_irqrestore (&ioapic_lock, flags); }
@@ -606,7 +594,7 @@ static void clear_IO_APIC_pin(unsigned int apic, unsigned int pin)ioapic_write_entry (apic, pin, entry); }raw_spin_lock_irqsave (&ioapic_lock, flags); -native_eoi_ioapic_pin (apic, pin, entry.vector); +__eoi_ioapic_pin (apic, pin, entry.vector);raw_spin_unlock_irqrestore (&ioapic_lock, flags); }
arch/x86/kernel/x86_init.c +0 -1
@@ -144,5 +144,4 @@ struct x86_io_apic_ops x86_io_apic_ops = { .write = native_io_apic_write, .modify = native_io_apic_modify, .disable = native_disable_io_apic, - .eoi_ioapic_pin = native_eoi_ioapic_pin, };
drivers/iommu/irq_remapping.c +0 -19
@@ -43,21 +43,9 @@ static void irq_remapping_disable_io_apic(void)disconnect_bsp_APIC (0 ); } -static void eoi_ioapic_pin_remapped (int apic,int pin,int vector) -{ -/* -* Intr-remapping uses pin number as the virtual vector -* in the RTE. Actual vector is programmed in -* intr-remapping table entry. Hence for the io-apic -* EOI we use the pin number. -*/ -io_apic_eoi (apic, pin); -} -static void __init irq_remapping_modify_x86_ops (void ) { x86_io_apic_ops.disable = irq_remapping_disable_io_apic; - x86_io_apic_ops.eoi_ioapic_pin = eoi_ioapic_pin_remapped; }static __init int setup_nointremap (char *str)
@@ -171,12 +159,6 @@ void ir_ack_apic_edge(struct irq_data *data)ack_APIC_irq (); } -static void ir_ack_apic_level (struct irq_data *data) -{ -ack_APIC_irq (); -eoi_ioapic_irq (data->irq,irqd_cfg (data)); -} -static void ir_print_prefix (struct irq_data *data,struct seq_file *p) {seq_printf (p," IR-%s" , data->chip->name);
@@ -186,7 +168,6 @@ void irq_remap_modify_chip_defaults(struct irq_chip *chip) { chip->irq_print_chip = ir_print_prefix; chip->irq_ack = ir_ack_apic_edge; - chip->irq_eoi = ir_ack_apic_level; }bool setup_remapped_irq (int irq,struct irq_cfg *cfg,struct irq_chip *chip)
PATCH v5 7/33 x86/irq: Kill GENERIC_IRQ_LEGACY_ALLOC_HWIRQ
In reply to Jiang LiuThere's no user of irq_alloc_hwirqs(), irq_alloc_hwirq(), irq_free_hwirqs() and irq_free_hwirq() anymore, so kill GENERIC_IRQ_LEGACY_ALLOC_HWIRQ and related code.
Signed-off-by Jiang Liu <[email protected]>
Cc Konrad Rzeszutek Wilk <[email protected]>
Cc Tony Luck <[email protected]>
Cc Joerg Roedel <[email protected]>
Cc Greg Kroah-Hartman <[email protected]>
Cc Bjorn Helgaas <[email protected]>
Cc Benjamin Herrenschmidt <[email protected]>
Cc Rafael J. Wysocki <[email protected]>
Cc Randy Dunlap <[email protected]>
Cc Yinghai Lu <[email protected]>
Cc Borislav Petkov <[email protected]>
Signed-off-by Thomas Gleixner <[email protected]>
--- arch/x86/Kconfig | 1 - arch/x86/kernel/apic/vector.c | 34 ---------------------------------- 2 files changed, 35 deletions(-)
arch/x86/Kconfig +0 -1
@@ -921,7 +921,6 @@ config X86_UP_IOAPIC config X86_LOCAL_APIC def_bool y depends on X86_64 || SMP || X86_32_NON_STANDARD || X86_UP_APIC || PCI_MSI - select GENERIC_IRQ_LEGACY_ALLOC_HWIRQ select IRQ_DOMAIN_HIERARCHY select PCI_MSI_IRQ_DOMAIN if PCI_MSI
arch/x86/kernel/apic/vector.c +0 -34
@@ -660,40 +660,6 @@ void irq_force_complete_move(int irq) }#endif -/* -* Dynamic irq allocate and deallocation. Should be replaced by irq domains! -*/ -int arch_setup_hwirq (unsigned int irq,int node) -{ -struct irq_cfg *cfg; -unsigned long flags; -int ret; - - cfg =alloc_irq_cfg (node); -if (!cfg) -return -ENOMEM ; - -raw_spin_lock_irqsave (&vector_lock, flags); - ret =__assign_irq_vector (irq, cfg, apic->target_cpus ()); -raw_spin_unlock_irqrestore (&vector_lock, flags); - -if (!ret) -irq_set_chip_data (irq, cfg); -else -free_irq_cfg (cfg); -return ret; -} - -void arch_teardown_hwirq (unsigned int irq) -{ -struct irq_cfg *cfg =irq_cfg (irq); - -free_remapped_irq (irq); -clear_irq_vector (irq, cfg); -irq_set_chip_data (irq,NULL ); -free_irq_cfg (cfg); -} -static void __init print_APIC_field (int base) {int i;
Signature · 1 line
1.7.10.4
tip-bot for Jiang Liu
merge bot[tip:x86/apic] x86/irq: Remove GENERIC_IRQ_LEGACY_ALLOC_HWIRQ
x86/irq: Remove GENERIC_IRQ_LEGACY_ALLOC_HWIRQ
Commit-ID: baac16952635445addaf397bad74e847db821d6d Gitweb: http://git.kernel.org/tip/baac16952635445addaf397bad74e847db821d6d Author: Jiang Liu <[email protected]> AuthorDate: Tue, 14 Apr 2015 10:29:44 +0800 Committer: Thomas Gleixner <[email protected]> CommitDate: Fri, 24 Apr 2015 15:36:52 +0200
x86/irq: Remove GENERIC_IRQ_LEGACY_ALLOC_HWIRQ
There's no user of irq_alloc_hwirqs(), irq_alloc_hwirq(), irq_free_hwirqs() and irq_free_hwirq() in x86 anymore, so remove GENERIC_IRQ_LEGACY_ALLOC_HWIRQ and related code.
Signed-off-by Jiang Liu <[email protected]>
Cc Konrad Rzeszutek Wilk <[email protected]>
Cc David Cohen <[email protected]>
Cc Sander Eikelenboom <[email protected]>
Cc David Vrabel <[email protected]>
Cc Tony Luck <[email protected]>
Cc Joerg Roedel <[email protected]>
Cc Greg Kroah-Hartman <[email protected]>
Cc Bjorn Helgaas <[email protected]>
Cc Benjamin Herrenschmidt <[email protected]>
Cc Rafael J. Wysocki <[email protected]>
Cc Randy Dunlap <[email protected]>
Cc Yinghai Lu <[email protected]>
Cc Borislav Petkov <[email protected]>
Cc Dimitri Sivanich <[email protected]>
Signed-off-by Thomas Gleixner <[email protected]>
--- arch/x86/Kconfig | 1 - arch/x86/kernel/apic/vector.c | 34 ---------------------------------- 2 files changed, 35 deletions(-)
arch/x86/Kconfig +0 -1
@@ -912,7 +912,6 @@ config X86_UP_IOAPIC config X86_LOCAL_APIC def_bool y depends on X86_64 || SMP || X86_32_NON_STANDARD || X86_UP_APIC || PCI_MSI - select GENERIC_IRQ_LEGACY_ALLOC_HWIRQ select IRQ_DOMAIN_HIERARCHY select PCI_MSI_IRQ_DOMAIN if PCI_MSI
arch/x86/kernel/apic/vector.c +0 -34
@@ -659,40 +659,6 @@ void irq_force_complete_move(int irq) }#endif -/* -* Dynamic irq allocate and deallocation. Should be replaced by irq domains! -*/ -int arch_setup_hwirq (unsigned int irq,int node) -{ -struct irq_cfg *cfg; -unsigned long flags; -int ret; - - cfg =alloc_irq_cfg (node); -if (!cfg) -return -ENOMEM ; - -raw_spin_lock_irqsave (&vector_lock, flags); - ret =__assign_irq_vector (irq, cfg, apic->target_cpus ()); -raw_spin_unlock_irqrestore (&vector_lock, flags); - -if (!ret) -irq_set_chip_data (irq, cfg); -else -free_irq_cfg (cfg); -return ret; -} - -void arch_teardown_hwirq (unsigned int irq) -{ -struct irq_cfg *cfg =irq_cfg (irq); - -free_remapped_irq (irq); -clear_irq_vector (irq, cfg); -irq_set_chip_data (irq,NULL ); -free_irq_cfg (cfg); -} -static void __init print_APIC_field (int base) {int i;
PATCH v5 8/33 x86/irq: Clean up unused forward declarations in x86_init.h
In reply to Jiang LiuClean up unused forward declarations in x86_init.h.
Signed-off-by Jiang Liu <[email protected]>
Cc Konrad Rzeszutek Wilk <[email protected]>
Cc Tony Luck <[email protected]>
Cc Joerg Roedel <[email protected]>
Cc Greg Kroah-Hartman <[email protected]>
Cc Bjorn Helgaas <[email protected]>
Cc Benjamin Herrenschmidt <[email protected]>
Cc Rafael J. Wysocki <[email protected]>
Cc Randy Dunlap <[email protected]>
Cc Yinghai Lu <[email protected]>
Cc Borislav Petkov <[email protected]>
Cc Yijing Wang <[email protected]>
Signed-off-by Thomas Gleixner <[email protected]>
Tested-by Joerg Roedel <[email protected]>
--- arch/x86/include/asm/x86_init.h | 6 ------ 1 file changed, 6 deletions(-)
arch/x86/include/asm/x86_init.h +0 -6
@@ -171,7 +171,6 @@ struct x86_platform_ops { };struct pci_dev ; -struct msi_msg ;struct x86_msi_ops {int (*setup_msi_irqs)(struct pci_dev *dev,int nvec,int type);
@@ -180,11 +179,6 @@ struct x86_msi_ops {void (*restore_msi_irqs)(struct pci_dev *dev); }; -struct IO_APIC_route_entry ; -struct io_apic_irq_attr ; -struct irq_data ; -struct cpumask ; -struct x86_io_apic_ops {void (*init) (void );unsigned int (*read) (unsigned int apic,unsigned int reg);
Signature · 1 line
1.7.10.4