Add SDHCI support for APM X-Gene SoC using ARASAN SDHCI controller.
Subsystems (4)
cover Add SDHCI support for APM X-Gene SoC using ARASAN SDHCI controller.
Due to the fact that the existing of-arasan driver works with 32-bit platforms. This patch tweaks existing of-arasan driver to work with 64-bit X-Gene platform using IOMMU translation.
v1 change:
* Use the CONFIG_ARM64_DMA_HAS_IOMMU for dma-mapping.
---
Suman Tripathi (2):
mmc: host: arasan: Add addition of-arasan quirks and IOMMU support for
arasan SDHCI driver.
arm64: dts: Add the arasan sdhc nodes in apm-storm.dtsi.
arch/arm64/boot/dts/apm-storm.dtsi | 43 +++++++++++++++++++++++++++ drivers/mmc/host/Makefile | 2 ++ drivers/mmc/host/sdhci-ahbc-xgene.c | 58 +++++++++++++++++++++++++++++++++++++ drivers/mmc/host/sdhci-ahbc-xgene.h | 49 +++++++++++++++++++++++++++++++ drivers/mmc/host/sdhci-of-arasan.c | 11 +++++++ drivers/mmc/host/sdhci-pltfm.c | 12 ++++++++ 6 files changed, 175 insertions(+) create mode 100644 drivers/mmc/host/sdhci-ahbc-xgene.c create mode 100644 drivers/mmc/host/sdhci-ahbc-xgene.h
--
1.8.2.1
PATCH 1/2 mmc: host: arasan: Add addition of-arasan quirks and IOMMU support for arasan SDHCI driver.
Due to the fact that the existing of-arasan driver works with 32-bit platforms. This patch tweaks existing of-arasan driver to work with 64-bit platform using IOMMU translation.
In addition it adds support for more quirks and quirks2 obtained from device tree inside the generic sdhci-platform(sdhci-pltfm.c) driver.
--- drivers/mmc/host/Makefile | 2 ++ drivers/mmc/host/sdhci-ahbc-xgene.c | 58 +++++++++++++++++++++++++++++++++++++ drivers/mmc/host/sdhci-ahbc-xgene.h | 49 +++++++++++++++++++++++++++++++ drivers/mmc/host/sdhci-of-arasan.c | 11 +++++++ drivers/mmc/host/sdhci-pltfm.c | 12 ++++++++ 5 files changed, 132 insertions(+) create mode 100644 drivers/mmc/host/sdhci-ahbc-xgene.c create mode 100644 drivers/mmc/host/sdhci-ahbc-xgene.h
drivers/mmc/host/Makefile +2 -0
@@ -75,3 +75,5 @@ obj-$(CONFIG_MMC_SDHCI_ST) += sdhci-st.o ifeq ($(CONFIG_CB710_DEBUG),y) CFLAGS-cb710-mmc += -DDEBUG endif + +obj-$(CONFIG_XGENE_AHBC_IOMMU) += sdhci-ahbc-xgene.o
drivers/mmc/host/sdhci-ahbc-xgene.c new file +58 -0
58 lines not on this page · raw message
drivers/mmc/host/sdhci-ahbc-xgene.h new file +49 -0
49 lines not on this page · raw message
drivers/mmc/host/sdhci-of-arasan.c +11 -0
@@ -22,6 +22,8 @@#include <linux/module.h> #include "sdhci-pltfm.h" +#include "sdhci-ahbc-xgene.h" +#define SDHCI_ARASAN_CLK_CTRL_OFFSET 0x2c#define CLK_CTRL_TIMEOUT_SHIFT 16
@@ -174,6 +176,13 @@ static int sdhci_arasan_probe(struct platform_device *pdev) pltfm_host->priv = sdhci_arasan; pltfm_host->clk = clk_xin; + ret =xgene_ahbc_iommu_attach_device (&pdev->dev); +if (ret <0 &&IS_ENABLED (CONFIG_XGENE_AHBC_IOMMU )) { +dev_err (&pdev->dev, +"unable to attach device to iommu %x\n" , ret); + goto clk_disable_all; + } + ret =sdhci_add_host (host);if (ret) {dev_err (&pdev->dev,"platform register failed (%u)\n" , ret);
@@ -201,6 +210,8 @@ static int sdhci_arasan_remove(struct platform_device *pdev)clk_disable_unprepare (pltfm_host->clk);clk_disable_unprepare (sdhci_arasan->clk_ahb); +xgene_ahbc_iommu_detach_device (&pdev->dev); +return sdhci_pltfm_unregister (pdev); }
drivers/mmc/host/sdhci-pltfm.c +12 -0
@@ -90,6 +90,18 @@ void sdhci_get_of_property(struct platform_device *pdev)if (of_get_property (np,"broken-cd" ,NULL )) host->quirks |=SDHCI_QUIRK_BROKEN_CARD_DETECTION ; +if (of_get_property (np,"delay-after-power" ,NULL )) + host->quirks |=SDHCI_QUIRK_DELAY_AFTER_POWER ; + +if (of_get_property (np,"no-hispd" ,NULL )) + host->quirks |=SDHCI_QUIRK_NO_HISPD_BIT ; + +if (of_get_property (np,"broken-adma" ,NULL )) + host->quirks |=SDHCI_QUIRK_BROKEN_ADMA ; + +if (of_get_property (np,"no-cmd23" ,NULL )) + host->quirks2 |=SDHCI_QUIRK2_HOST_NO_CMD23 ; +if (of_get_property (np,"no-1-8-v" ,NULL )) host->quirks2 |=SDHCI_QUIRK2_NO_1_8_V ;
--
1.8.2.1
PATCH 1/2 mmc: host: arasan: Add addition of-arasan quirks and IOMMU support for arasan SDHCI driver.
Quoted 5 lines · On Tuesday 27 January 2015 22:50:59 Suman Tripathi wrote:
drivers/mmc/host/sdhci-of-arasan.c +0
-0@@ -174,6 +176,13 @@ static int sdhci_arasan_probe(struct platform_device *pdev) pltfm_host->priv = sdhci_arasan; pltfm_host->clk = clk_xin;
drivers/mmc/host/sdhci-of-arasan.c static int sdhci_arasan_probe(struct platform_device *pdev) · line 188
Quoted 10 lines
drivers/mmc/host/sdhci-of-arasan.c +7
-0+ ret =xgene_ahbc_iommu_attach_device (&pdev->dev); +if (ret <0 &&IS_ENABLED (CONFIG_XGENE_AHBC_IOMMU )) { +dev_err (&pdev->dev, +"unable to attach device to iommu %x\n" , ret); + goto clk_disable_all; + } + ret =sdhci_add_host (host);if (ret) {dev_err (&pdev->dev,"platform register failed (%u)\n" , ret);
This looks wrong: the iommu should be automatically configured for devices that need it, without any interaction from the driver.
Arnd
PATCH 2/2 arm64: dts: Add the arasan sdhc nodes in apm-storm.dtsi.
In reply to Suman TripathiThis patch adds the arasan sdhc nodes to reuse the of-arasan driver for APM X-Gene SoC.
--- arch/arm64/boot/dts/apm-storm.dtsi | 43 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 43 insertions(+)
arch/arm64/boot/dts/apm-storm.dtsi +43 -0
@@ -144,6 +144,40 @@ clock-output-names = "socplldiv2"; }; + ahbclk: ahbclk@1f2ac000 { + compatible = "apm,xgene-device-clock"; + #clock-cells = <1>; + clocks = <&socplldiv2 0>; + reg = <0x0 0x1f2ac000 0x0 0x1000 + 0x0 0x17000000 0x0 0x2000>; + reg-names = "csr-reg", "div-reg"; + csr-offset = <0x0>; + csr-mask = <0x1>; + enable-offset = <0x8>; + enable-mask = <0x1>; + divider-offset = <0x164>; + divider-width = <0x5>; + divider-shift = <0x0>; + clock-output-names = "ahbclk"; + }; + + sdioclk: sdioclk@1f2ac000 { + compatible = "apm,xgene-device-clock"; + #clock-cells = <1>; + clocks = <&socplldiv2 0>; + reg = <0x0 0x1f2ac000 0x0 0x1000 + 0x0 0x17000000 0x0 0x2000>; + reg-names = "csr-reg", "div-reg"; + csr-offset = <0x0>; + csr-mask = <0x2>; + enable-offset = <0x8>; + enable-mask = <0x2>; + divider-offset = <0x178>; + divider-width = <0x8>; + divider-shift = <0x0>; + clock-output-names = "sdioclk"; + }; + qmlclk: qmlclk { compatible = "apm,xgene-device-clock"; #clock-cells = <1>;
@@ -595,6 +629,15 @@ clocks = <&rtcclk 0>; }; + sdhc0: sdhc@1c000000 { + device_type = "sdhc"; + compatible = "arasan,sdhci-8.9a"; + reg = <0x0 0x1c000000 0x0 0x100>; + interrupts = <0x0 0x49 0x4>; + clock-names = "clk_xin", "clk_ahb"; + clocks = <&sdioclk 0>, <&ahbclk 0>; + }; + menet: ethernet@17020000 { compatible = "apm,xgene-enet"; status = "disabled";
--
1.8.2.1
PATCH 2/2 arm64: dts: Add the arasan sdhc nodes in apm-storm.dtsi.
arch/arm64/boot/dts/apm-storm.dtsi line 640
Quoted 10 lines · On Tuesday 27 January 2015 22:51:00 Suman Tripathi wrote:
arch/arm64/boot/dts/apm-storm.dtsi +9
-0+ sdhc0: sdhc at 1c000000 { + device_type = "sdhc"; + compatible = "arasan,sdhci-8.9a"; + reg = <0x0 0x1c000000 0x0 0x100>; + interrupts = <0x0 0x49 0x4>; + clock-names = "clk_xin", "clk_ahb"; + clocks = <&sdioclk 0>, <&ahbclk 0>; + }; +
Here you don't provide an 'iommus' property, which means that the device is unable to use the iommu.
Arnd
Re: [PATCH v1 2/2] arm64: dts: Add the arasan sdhc nodes in apm-storm.dtsi.
Hi Arnd,
arch/arm64/boot/dts/apm-storm.dtsi line 640
Quoted 10 lines · On Tuesday 27 January 2015 22:51:00 Suman Tripathi wrote:
arch/arm64/boot/dts/apm-storm.dtsi +9
-0+ sdhc0: sdhc@1c000000 { + device_type = "sdhc"; + compatible = "arasan,sdhci-8.9a"; + reg = <0x0 0x1c000000 0x0 0x100>; + interrupts = <0x0 0x49 0x4>; + clock-names = "clk_xin", "clk_ahb"; + clocks = <&sdioclk 0>, <&ahbclk 0>; + }; +
Here you don't provide an 'iommus' property, which means that the device is unable to use the iommu.
I added the iommus in the IOMMU AHBC patch. Anything wrong in that ? In the next version Also I will remove the IOMMU hacks from arasan driver
Quoted 17 lines · Arnd Bergmann
arch/arm64/boot/dts/apm-storm.dtsi line 640
Quoted 10 lines · On Tuesday 27 January 2015 22:51:00 Suman Tripathi wrote:
arch/arm64/boot/dts/apm-storm.dtsi +9
-0+ sdhc0: sdhc@1c000000 { + device_type = "sdhc"; + compatible = "arasan,sdhci-8.9a"; + reg = <0x0 0x1c000000 0x0 0x100>; + interrupts = <0x0 0x49 0x4>; + clock-names = "clk_xin", "clk_ahb"; + clocks = <&sdioclk 0>, <&ahbclk 0>; + }; +Here you don't provide an 'iommus' property, which means that the device is unable to use the iommu.
Arnd
Signature · 3 lines
Thanks, with regards, Suman Tripathi
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PATCH 2/2 arm64: dts: Add the arasan sdhc nodes in apm-storm.dtsi.
Hi Arnd,
I added the iommus in the IOMMU AHBC patch. Anything wrong in that ? In the next version Also I will remove the IOMMU hacks from arasan driver
Quoted 46 lines · Suman Tripathi
Hi Arnd,
arch/arm64/boot/dts/apm-storm.dtsi line 640
Quoted 10 lines · On Tuesday 27 January 2015 22:51:00 Suman Tripathi wrote:
arch/arm64/boot/dts/apm-storm.dtsi +9
-0+ sdhc0: sdhc at 1c000000 { + device_type = "sdhc"; + compatible = "arasan,sdhci-8.9a"; + reg = <0x0 0x1c000000 0x0 0x100>; + interrupts = <0x0 0x49 0x4>; + clock-names = "clk_xin", "clk_ahb"; + clocks = <&sdioclk 0>, <&ahbclk 0>; + }; +Here you don't provide an 'iommus' property, which means that the device is unable to use the iommu.
I added the iommus in the IOMMU AHBC patch. Anything wrong in that ? In the next version Also I will remove the IOMMU hacks from arasan driverQuoted 13 lines · Arnd Bergmann
arch/arm64/boot/dts/apm-storm.dtsi line 640
Quoted 10 lines · On Tuesday 27 January 2015 22:51:00 Suman Tripathi wrote:
arch/arm64/boot/dts/apm-storm.dtsi +9
-0+ sdhc0: sdhc at 1c000000 { + device_type = "sdhc"; + compatible = "arasan,sdhci-8.9a"; + reg = <0x0 0x1c000000 0x0 0x100>; + interrupts = <0x0 0x49 0x4>; + clock-names = "clk_xin", "clk_ahb"; + clocks = <&sdioclk 0>, <&ahbclk 0>; + }; +Quoted 4 lines
Here you don't provide an 'iommus' property, which means that the device is unable to use the iommu.
Arnd
--
Thanks,
with regards,
Suman Tripathi
Signature · 3 lines
Thanks, with regards, Suman Tripathi
PATCH 2/2 arm64: dts: Add the arasan sdhc nodes in apm-storm.dtsi.
Quoted 4 lines · On Wednesday 28 January 2015 09:53:25 Suman Tripathi wrote:
I added the iommus in the IOMMU AHBC patch. Anything wrong in that ? In the next version Also I will remove the IOMMU hacks from arasan driver
Hmm, I guess you have a required ordering between the patches either way, which makes it hard to merge in a way that is bisectable.
You are correct that you should not merge a patch with the iommu reference before adding the iommu device node, because it would otherwise break building the mmc tree.
Usually, the right answer is to merged the dts changes through the arm-soc tree, and then you can just add the node for the sdhc device after the one for the iommu device.
Arnd
PATCH 2/2 arm64: dts: Add the arasan sdhc nodes in apm-storm.dtsi.
Quoted 4 lines · On Wednesday 28 January 2015 09:53:25 Suman Tripathi wrote:
I added the iommus in the IOMMU AHBC patch. Anything wrong in that ? In the next version Also I will remove the IOMMU hacks from arasan driver
Hmm, I guess you have a required ordering between the patches either way, which makes it hard to merge in a way that is bisectable.
You are correct that you should not merge a patch with the iommu reference before adding the iommu device node, because it would otherwise break building the mmc tree.
One more point is the binding for IOMMU needs to be in the same patch in which the IOMMU support is added. So to provide the binding info of the master node we require the sdhc nodes to be merged first.
Usually, the right answer is to merged the dts changes through the arm-soc tree, and then you can just add the node for the sdhc device after the one for the iommu device.
Quoted 18 lines · Arnd Bergmann
Quoted 4 lines · On Wednesday 28 January 2015 09:53:25 Suman Tripathi wrote:
I added the iommus in the IOMMU AHBC patch. Anything wrong in that ? In the next version Also I will remove the IOMMU hacks from arasan driver
Hmm, I guess you have a required ordering between the patches either way, which makes it hard to merge in a way that is bisectable.
You are correct that you should not merge a patch with the iommu reference before adding the iommu device node, because it would otherwise break building the mmc tree.
Usually, the right answer is to merged the dts changes through the arm-soc tree, and then you can just add the node for the sdhc device after the one for the iommu device.
Arnd
Signature · 3 lines
Thanks, with regards, Suman Tripathi