drm/vmwgfx: Screen targets for -next
Subsystems (3)
cover drm/vmwgfx: Screen targets for -next
Screen targets is a device interface to make a 3D surface a scanout surface. It should speed swapbuffers / pageflips up somewhat, and it relaxes the requirement for pinned virtual VRAM, which previously needed to be pre-allocated to match the size of the scanout bounding box.
It's also needed for upcoming enhanced 3D support.
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PATCH 1/6 drm/vmwgfx: Add an interface to pin a resource v3
For screen targets it appears we need to pin surfaces while they are bound as screen targets, so add a small interface to do that.
v2: Always increase pin_count on pin.
v3: Add missing reservation sem.
--- drivers/gpu/drm/vmwgfx/vmwgfx_drv.h | 4 ++ drivers/gpu/drm/vmwgfx/vmwgfx_resource.c | 91 +++++++++++++++++++++++++++++++- 2 files changed, 94 insertions(+), 1 deletion(-)
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h +4 -0
@@ -113,6 +113,7 @@ struct vmw_resource {bool backup_dirty;/* Protected by backup buffer reserved */ struct vmw_dma_buffer *backup;unsigned long backup_offset; +unsigned long pin_count;/* Protected by resource reserved */ const struct vmw_res_func *func;struct list_head lru_head;/* Protected by the resource lock */ struct list_head mob_head;/* Protected by @backup reserved */
@@ -927,6 +928,9 @@ int vmw_dumb_map_offset(struct drm_file *file_priv,int vmw_dumb_destroy (struct drm_file *file_priv,struct drm_device *dev,uint32_t handle); +extern int vmw_resource_pin (struct vmw_resource *res); +extern void vmw_resource_unpin (struct vmw_resource *res); +/** * Overlay control - vmwgfx_overlay.c */
drivers/gpu/drm/vmwgfx/vmwgfx_resource.c +90 -1
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PATCH 2/6 drm/vmwgfx: SVGA device definition update
In reply to Thomas HellstromFrom: Sinclair Yeh <[email protected]>
Update device definition headers to support screen targets.
--- drivers/gpu/drm/vmwgfx/svga3d_reg.h | 56 ++++++++++++++++++++++-- drivers/gpu/drm/vmwgfx/svga3d_surfacedefs.h | 67 +++++++++++++++++++++++++++-- 2 files changed, 117 insertions(+), 6 deletions(-)
drivers/gpu/drm/vmwgfx/svga3d_reg.h +53 -3
@@ -1,5 +1,5 @@/********************************************************** -* Copyright 1998-2009 VMware, Inc. All rights reserved. +* Copyright 1998-2014 VMware, Inc. All rights reserved. * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation
@@ -224,7 +224,7 @@ typedef enum SVGA3dSurfaceFormat {SVGA3D_R8_SNORM =95 ,SVGA3D_R8_SINT =96 ,SVGA3D_A8_UNORM =32 , -SVGA3D_R1_UNORM =97 , +SVGA3D_P8 =97 ,SVGA3D_R9G9B9E5_SHAREDEXP =98 ,SVGA3D_R8G8_B8G8_UNORM =99 , SVGA3D_G8R8_G8B8_UNORM = 100,
@@ -1312,6 +1312,11 @@ struct { typedef enum { SVGA3D_SURFACE_CUBEMAP = (1 << 0), + + /* + * HINT flags are not enforced by the device but are useful for + * performance. + */ SVGA3D_SURFACE_HINT_STATIC = (1 << 1), SVGA3D_SURFACE_HINT_DYNAMIC = (1 << 2), SVGA3D_SURFACE_HINT_INDEXBUFFER = (1 << 3),
@@ -1322,6 +1327,50 @@ typedef enum {SVGA3D_SURFACE_HINT_WRITEONLY = (1 <<8 ),SVGA3D_SURFACE_MASKABLE_ANTIALIAS = (1 <<9 ),SVGA3D_SURFACE_AUTOGENMIPMAPS = (1 <<10 ), +SVGA3D_SURFACE_DECODE_RENDERTARGET = (1 <<11 ), + +/* +* Is this surface using a base-level pitch for it's mob backing? +* +* This flag is not intended to be set by guest-drivers, but is instead +* set by the device when the surface is bound to a mob with a specified +* pitch. +*/ +SVGA3D_SURFACE_MOB_PITCH = (1 <<12 ), + +SVGA3D_SURFACE_INACTIVE = (1 <<13 ), +SVGA3D_SURFACE_HINT_RT_LOCKABLE = (1 <<14 ), +SVGA3D_SURFACE_VOLUME = (1 <<15 ), + +/* +* Required to be set on a surface to bind it to a screen target. +*/ +SVGA3D_SURFACE_SCREENTARGET = (1 <<16 ), + +/* +* Align images in the guest-backing mob to 16-bytes. +*/ +SVGA3D_SURFACE_ALIGN16 = (1 <<17 ), + +SVGA3D_SURFACE_1D = (1 <<18 ), +SVGA3D_SURFACE_ARRAY = (1 <<19 ), + +/* +* Bind flags. +* These are enforced for any surface defined with DefineGBSurface_v2. +*/ +SVGA3D_SURFACE_BIND_VERTEX_BUFFER = (1 <<20 ), +SVGA3D_SURFACE_BIND_INDEX_BUFFER = (1 <<21 ), +SVGA3D_SURFACE_BIND_CONSTANT_BUFFER = (1 <<22 ), +SVGA3D_SURFACE_BIND_SHADER_RESOURCE = (1 <<23 ), +SVGA3D_SURFACE_BIND_RENDER_TARGET = (1 <<24 ), +SVGA3D_SURFACE_BIND_DEPTH_STENCIL = (1 <<25 ), +SVGA3D_SURFACE_BIND_STREAM_OUTPUT = (1 <<26 ), + +/* +* Marker for the last defined bit. +*/ +SVGA3D_SURFACE_FLAG_MAX = (1 <<27 ), } SVGA3dSurfaceFlags; typedef
@@ -2402,6 +2451,7 @@ struct {int32 xRoot;int32 yRoot;uint32 flags; +uint32 dpi; }__packed SVGA3dCmdDefineGBScreenTarget;/* SVGA_3D_CMD_DEFINE_GB_SCREENTARGET */
@@ -2421,7 +2471,7 @@ SVGA3dCmdBindGBScreenTarget; /* SVGA_3D_CMD_BIND_GB_SCREENTARGET */typedef struct {uint32 stid; -SVGA3dBox box; +SVGA3dRect rect; } __packedSVGA3dCmdUpdateGBScreenTarget ;/* SVGA_3D_CMD_UPDATE_GB_SCREENTARGET */
drivers/gpu/drm/vmwgfx/svga3d_surfacedefs.h +64 -3
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PATCH 3/6 drm/vmwgfx: Refactor vmw_gb_surface_define_ioctl()
In reply to Thomas HellstromFrom: Sinclair Yeh <[email protected]>
Refactored vmw_gb_surface_define_ioctl() and made the surface definition part a separate function. This way other parts of vmwgfx can use it to allocate kernel-visible GB surfaces.
--- drivers/gpu/drm/vmwgfx/vmwgfx_drv.h | 9 ++ drivers/gpu/drm/vmwgfx/vmwgfx_surface.c | 195 ++++++++++++++++++++++---------- 2 files changed, 143 insertions(+), 61 deletions(-)
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h +9 -0
@@ -1029,6 +1029,15 @@ extern int vmw_surface_check(struct vmw_private *dev_priv, uint32_t handle, int *id);extern int vmw_surface_validate (struct vmw_private *dev_priv,struct vmw_surface *srf); +int vmw_surface_gb_priv_define (struct drm_device *dev, +uint32_t user_accounting_size, +uint32_t svga3d_flags, +SVGA3dSurfaceFormat format, +bool for_scanout, +uint32_t num_mip_levels, +uint32_t multisample_count, +struct drm_vmw_size size, +struct vmw_surface **srf_out);/* * Shader management - vmwgfx_shader.c
drivers/gpu/drm/vmwgfx/vmwgfx_surface.c +134 -61
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PATCH 4/6 drm/vmwgfx: Major KMS refactoring / cleanup in preparation of screen targets
In reply to Thomas HellstromFrom: Sinclair Yeh <[email protected]>
--- drivers/gpu/drm/vmwgfx/vmwgfx_drv.h | 22 +- drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c | 4 +- drivers/gpu/drm/vmwgfx/vmwgfx_kms.c | 563 +++++--------------------------- drivers/gpu/drm/vmwgfx/vmwgfx_kms.h | 81 +++-- drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c | 45 ++- drivers/gpu/drm/vmwgfx/vmwgfx_overlay.c | 6 +- drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c | 433 ++++++++++++++++++++++-- 7 files changed, 607 insertions(+), 547 deletions(-)
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h +17 -5
@@ -1,6 +1,6 @@/************************************************************************** * -* Copyright © 2009 VMware, Inc., Palo Alto, CA., USA +* Copyright © 2009-2014 VMware, Inc., Palo Alto, CA., USA * All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a
@@ -330,6 +330,17 @@ struct vmw_ctx_binding_state {struct vmw_ctx_binding shaders[SVGA3D_SHADERTYPE_MAX ]; }; + +/* +* enum vmw_display_unit_type - Describes the display unit +*/ +enum vmw_display_unit_type { + vmw_du_invalid =0 , + vmw_du_legacy, + vmw_du_screen_object +}; + +struct vmw_sw_context {struct drm_open_hash res_ht;bool res_ht_initialized;
@@ -421,6 +432,7 @@ struct vmw_private {*/ void *fb_info; +enum vmw_display_unit_type active_display_unit;struct vmw_legacy_display *ldu_priv;struct vmw_screen_object_display *sou_priv;struct vmw_overlay *overlay_priv;
@@ -834,8 +846,8 @@ extern void vmw_execbuf_copy_fence_user(struct vmw_private *dev_priv,extern irqreturn_t vmw_irq_handler (int irq,void *arg);extern int vmw_wait_seqno (struct vmw_private *dev_priv,bool lazy, -uint32_t seqno,bool interruptible, -unsigned long timeout); +uint32_t seqno,bool interruptible, +unsigned long timeout);extern void vmw_irq_preinstall (struct drm_device *dev);extern int vmw_irq_postinstall (struct drm_device *dev);extern void vmw_irq_uninstall (struct drm_device *dev);
@@ -862,9 +874,9 @@ extern void vmw_goal_waiter_remove(struct vmw_private *dev_priv);extern void vmw_marker_queue_init (struct vmw_marker_queue *queue);extern void vmw_marker_queue_takedown (struct vmw_marker_queue *queue);extern int vmw_marker_push (struct vmw_marker_queue *queue, -uint32_t seqno); +uint32_t seqno);extern int vmw_marker_pull (struct vmw_marker_queue *queue, -uint32_t signaled_seqno); +uint32_t signaled_seqno);extern int vmw_wait_lag (struct vmw_private *dev_priv,struct vmw_marker_queue *queue,uint32_t us);
drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c +2 -2
@@ -71,8 +71,8 @@ bool vmw_fifo_have_3d(struct vmw_private *dev_priv)if (hwversion <SVGA3D_HWVERSION_WS8_B1 )return false; -/* Non-Screen Object path does not support surfaces */ -if (!dev_priv->sou_priv) +/* Legacy Display Unit does not support surfaces */ +if (dev_priv->active_display_unit == vmw_du_legacy)return false;return true;
drivers/gpu/drm/vmwgfx/vmwgfx_kms.c +84 -479
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drivers/gpu/drm/vmwgfx/vmwgfx_kms.h +61 -20
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drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c +42 -3
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drivers/gpu/drm/vmwgfx/vmwgfx_overlay.c +3 -3
@@ -100,7 +100,7 @@ static int vmw_overlay_send_put(struct vmw_private *dev_priv, {struct vmw_escape_video_flush *flush;size_t fifo_size; -bool have_so = dev_priv->sou_priv ? true : false; +bool have_so = (dev_priv->active_display_unit == vmw_du_screen_object);int i, num_items;SVGAGuestPtr ptr;
@@ -231,7 +231,7 @@ static int vmw_overlay_move_buffer(struct vmw_private *dev_priv,if (!pin)return vmw_dmabuf_unpin (dev_priv, buf, inter); -if (!dev_priv->sou_priv) +if (dev_priv->active_display_unit == vmw_du_legacy)return vmw_dmabuf_to_vram (dev_priv, buf, true, inter);return vmw_dmabuf_to_vram_or_gmr (dev_priv, buf, true, inter);
@@ -453,7 +453,7 @@ int vmw_overlay_pause_all(struct vmw_private *dev_priv)static bool vmw_overlay_available (const struct vmw_private *dev_priv) { -return (dev_priv->overlay_priv !=NULL && +return (dev_priv->overlay_priv !=NULL && ((dev_priv->fifo.capabilities &VMW_OVERLAY_CAP_MASK ) ==VMW_OVERLAY_CAP_MASK )); }
drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c +398 -35
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