Marvell PXA1928 USB support

Combine the ChipIdea USB binding into a single document to reduce duplication and fragmentation. This marks use of the old PHY bindings as deprecated. Future compatible bindings should use generic PHY binding.

Signed-off-by Rob Herring <[email protected]>

Cc Ivan T. Ivanov <[email protected]>

Cc Peter Chen [email protected]>

Cc Daniel Tang [email protected]>

Cc Pawel Moll [email protected]>

Cc Mark Rutland [email protected]>

Cc Ian Campbell <[email protected]>

Cc Kumar Gala <[email protected]>

Cc [email protected]

---
 .../devicetree/bindings/usb/ci-hdrc-imx.txt        | 35 ----------------------
 .../devicetree/bindings/usb/ci-hdrc-qcom.txt       | 17 -----------
 .../devicetree/bindings/usb/ci-hdrc-usb2.txt       | 22 +++++++++++++-
 .../devicetree/bindings/usb/ci-hdrc-zevio.txt      | 17 -----------
 4 files changed, 21 insertions(+), 70 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/usb/ci-hdrc-imx.txt
 delete mode 100644 Documentation/devicetree/bindings/usb/ci-hdrc-qcom.txt
 delete mode 100644 Documentation/devicetree/bindings/usb/ci-hdrc-zevio.txt

Combine the ChipIdea USB binding into a single document to reduce duplication and fragmentation. This marks use of the old PHY bindings as deprecated. Future compatible bindings should use generic PHY binding.

Signed-off-by Rob Herring <[email protected]>

Cc Ivan T. Ivanov <[email protected]>

Cc Peter Chen <[email protected]>

Cc Daniel Tang <[email protected]>

Cc Pawel Moll <[email protected]>

Cc Mark Rutland <[email protected]>

Cc Ian Campbell <[email protected]>

Cc Kumar Gala <[email protected]>

Cc [email protected]

---
 .../devicetree/bindings/usb/ci-hdrc-imx.txt        | 35 ----------------------
 .../devicetree/bindings/usb/ci-hdrc-qcom.txt       | 17 -----------
 .../devicetree/bindings/usb/ci-hdrc-usb2.txt       | 22 +++++++++++++-
 .../devicetree/bindings/usb/ci-hdrc-zevio.txt      | 17 -----------
 4 files changed, 21 insertions(+), 70 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/usb/ci-hdrc-imx.txt
 delete mode 100644 Documentation/devicetree/bindings/usb/ci-hdrc-qcom.txt
 delete mode 100644 Documentation/devicetree/bindings/usb/ci-hdrc-zevio.txt

Documentation/devicetree/bindings/usb/ci-hdrc-imx.txt deleted +0 -35

deleted file mode 100644
index 38a5480..0000000
@@ -1,35 +0,0 @@
-* Freescale i.MX ci13xxx usb controllers
-
-Required properties:
-- compatible: Should be "fsl,imx27-usb"
-- reg: Should contain registers location and length
-- interrupts: Should contain controller interrupt
-- fsl,usbphy: phandle of usb phy that connects to the port
-
-Recommended properies:
-- phy_type: the type of the phy connected to the core. Should be one
-  of "utmi", "utmi_wide", "ulpi", "serial" or "hsic". Without this
-  property the PORTSC register won't be touched
-- dr_mode: One of "host", "peripheral" or "otg". Defaults to "otg"
-
-Optional properties:
-- fsl,usbmisc: phandler of non-core register device, with one argument
-  that indicate usb controller index
-- vbus-supply: regulator for vbus
-- disable-over-current: disable over current detect
-- external-vbus-divider: enables off-chip resistor divider for Vbus
-- maximum-speed: limit the maximum connection speed to "full-speed".
-- tpl-support: TPL (Targeted Peripheral List) feature for targeted hosts
-
-Examples:
-usb@02184000 { /* USB OTG */
-	compatible = "fsl,imx6q-usb", "fsl,imx27-usb";
-	reg = <0x02184000 0x200>;
-	interrupts = <0 43 0x04>;
-	fsl,usbphy = <&usbphy1>;
-	fsl,usbmisc = <&usbmisc 0>;
-	disable-over-current;
-	external-vbus-divider;
-	maximum-speed = "full-speed";
-	tpl-support;
-};

Documentation/devicetree/bindings/usb/ci-hdrc-qcom.txt deleted +0 -17

deleted file mode 100644
index f2899b5..0000000
@@ -1,17 +0,0 @@
-Qualcomm CI13xxx (Chipidea) USB controllers
-
-Required properties:
-- compatible:   should contain "qcom,ci-hdrc"
-- reg:          offset and length of the register set in the memory map
-- interrupts:   interrupt-specifier for the controller interrupt.
-- usb-phy:      phandle for the PHY device
-- dr_mode:      Should be "peripheral"
-
-Examples:
-	gadget@f9a55000 {
-		compatible = "qcom,ci-hdrc";
-		reg = <0xf9a55000 0x400>;
-		dr_mode = "peripheral";
-		interrupts = <0 134 0>;
-		usb-phy = <&usbphy0>;
-	};

Documentation/devicetree/bindings/usb/ci-hdrc-usb2.txt +21 -1

index 27f8b1e..553e2fa 100644
@@ -1,15 +1,35 @@
 * USB2 ChipIdea USB controller for ci13xxx
 
 Required properties:
-- compatible: should be "chipidea,usb2"
+- compatible: should be one of:
+	"fsl,imx27-usb"
+	"lsi,zevio-usb"
+	"qcom,ci-hdrc"
+	"chipidea,usb2"
 - reg: base address and length of the registers
 - interrupts: interrupt for the USB controller
 
+Recommended properies:
+- phy_type: the type of the phy connected to the core. Should be one
+  of "utmi", "utmi_wide", "ulpi", "serial" or "hsic". Without this
+  property the PORTSC register won't be touched.
+- dr_mode: One of "host", "peripheral" or "otg". Defaults to "otg"
+
+Deprecated properties:
+- usb-phy:      phandle for the PHY device. Use "phys" instead.
+- fsl,usbphy: phandle of usb phy that connects to the port. Use "phys" instead.
+
 Optional properties:
 - clocks: reference to the USB clock
 - phys: reference to the USB PHY
 - phy-names: should be "usb-phy"
 - vbus-supply: reference to the VBUS regulator
+- maximum-speed: limit the maximum connection speed to "full-speed".
+- tpl-support: TPL (Targeted Peripheral List) feature for targeted hosts
+- fsl,usbmisc: (FSL only) phandler of non-core register device, with one
+  argument that indicate usb controller index
+- disable-over-current: (FSL only) disable over current detect
+- external-vbus-divider: (FSL only) enables off-chip resistor divider for Vbus
 
 Example:
 

Documentation/devicetree/bindings/usb/ci-hdrc-zevio.txt deleted +0 -17

deleted file mode 100644
index abbcb2a..0000000
@@ -1,17 +0,0 @@
-* LSI Zevio USB OTG Controller
-
-Required properties:
-- compatible: Should be "lsi,zevio-usb"
-- reg: Should contain registers location and length
-- interrupts: Should contain controller interrupt
-
-Optional properties:
-- vbus-supply: regulator for vbus
-
-Examples:
-		usb0: usb@b0000000 {
-			reg = <0xb0000000 0x1000>;
-			compatible = "lsi,zevio-usb";
-			interrupts = <8>;
-			vbus-supply = <&vbus_reg>;
-		};

Signature · 1 line

2.1.0

Currently, ci_default_pdata is common to all instances of the driver and gets modified by the core driver code. This is bad if there are multiple instances of the device with different settings such as the phy type. Fix this by making a copy of the default platform_data.

Signed-off-by Rob Herring <[email protected]>

Cc Peter Chen <[email protected]>

Cc Greg Kroah-Hartman <[email protected]>

Cc [email protected]

---
 drivers/usb/chipidea/ci_hdrc_usb2.c | 8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)

drivers/usb/chipidea/ci_hdrc_usb2.c +5 -3

index 45844c9..9eae1a1 100644
@@ -25,7 +25,7 @@ struct ci_hdrc_usb2_priv {
 	struct clk		*clk;
 };
 
-static struct ci_hdrc_platform_data ci_default_pdata = {
+static const struct ci_hdrc_platform_data ci_default_pdata = {
 	.capoffset	= DEF_CAPOFFSET,
 	.flags		= CI_HDRC_DISABLE_STREAMING,
 };

@@ -37,8 +37,10 @@ static int ci_hdrc_usb2_probe(struct platform_device *pdev)
 	struct ci_hdrc_platform_data *ci_pdata = dev_get_platdata(dev);
 	int ret;
 
-	if (!ci_pdata)
-		ci_pdata = &ci_default_pdata;
+	if (!ci_pdata) {
+		ci_pdata = devm_kmalloc(dev, sizeof(*ci_pdata), GFP_KERNEL);
+		*ci_pdata = ci_default_pdata;	/* struct copy */
+	}
 
 	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
 	if (!priv)

Signature · 1 line

2.1.0

The Marvell 28nm HSIC PHY requires the port to be forced to HS mode after the port power is applied. This is done using the test mode in the PORTSC register.

As HSIC is always HS, this work-around should be safe to do with all HSIC PHYs and has been tested on i.MX6S.

Signed-off-by Rob Herring <[email protected]>

Tested-by Peter Chen <[email protected]>

Cc Greg Kroah-Hartman <[email protected]>

Cc [email protected]

---
 drivers/usb/chipidea/host.c | 12 ++++++++++++
 1 file changed, 12 insertions(+)

drivers/usb/chipidea/host.c +0 -0

index 21fe1a3..6cf87b8 100644
@@ -37,12 +37,14 @@ static int (*orig_bus_suspend)(struct usb_hcd *hcd);
 
 struct ehci_ci_priv {

drivers/usb/chipidea/host.c +10 -0

 	int ret = 0;
 	int port = HCS_N_PORTS(ehci->hcs_params);

@@ -64,6 +66,15 @@ static int ehci_ci_portpower(struct usb_hcd *hcd, int portnum, bool enable)
 			return ret;
 		}
 	}
+
+	if (enable && (ci->platdata->phy_mode == USBPHY_INTERFACE_MODE_HSIC)) {
+		/*
+		 * Marvell 28nm HSIC PHY requires forcing the port to HS mode.
+		 * As HSIC is always HS, this should be safe for others.
+		 */
+		hw_port_test_set(ci, 5);
+		hw_port_test_set(ci, 0);
+	}
 	return 0;
 };
 

@@ -112,6 +123,7 @@ static int host_start(struct ci_hdrc *ci)
 
 	priv = (struct ehci_ci_priv *)ehci->priv;
 	priv->reg_vbus = NULL;
+	priv->ci = ci;
 
 	if (ci->platdata->reg_vbus && !ci_otg_is_fsm_mode(ci)) {
 		if (ci->platdata->flags & CI_HDRC_TURN_VBUS_EARLY_ON) {

Signature · 1 line

2.1.0

This series adds USB PHYs and EHCI host drivers for the Marvell PXA1928 SOC.

The OTG block is based on ChipIdea and works with the "chipidea,usb2" compatible driver as is just by adding the PHY driver. Yay! After more testing it turns out the EHCI host is also based on ChipIdea too. So this version uses the ChipIdea driver for both. A couple of fixes are needed to make the ChipIdea driver work with the PXA1928 EHCI host.