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arm: socfpga: Enable ubi and ubifs support

PATCH Superseded Chin Liang See 4 participants 14 messages Dec 22, 2015 – Dec 23, 2015

v2 of 3 Superseded Latest is v3 →

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#0 lore raw

PATCH v2 1/5 arm: socfpga: Enable ubi and ubifs support

When QSPI and NAND is enabled, the ubi and ubifs support will be enabled too.

Cc Dinh Nguyen <[email protected]>
Cc Dinh Nguyen <[email protected]>
Cc Pavel Machek <[email protected]>
Cc Marek Vasut <[email protected]>
Cc Stefan Roese <[email protected]>

---
Changes for v2
- move CONFIG_SPI_FLASH_USE_4K_SECTORS to Kconfig

---
 include/configs/socfpga_common.h | 8 ++++++++
 1 file changed, 8 insertions(+)
include/configs/socfpga_common.h +8 -0
index f7c0eb5..dfc3ed5 100644
@@ -300,6 +300,14 @@ unsigned int cm_get_qspi_controller_clk_hz(void);
 				"- at 1536k(UBI)\0"
 #endif
 
+/* UBI and UBIFS support */
+#if defined(CONFIG_CMD_SF) || defined(CONFIG_CMD_NAND)
+#define CONFIG_CMD_UBI
+#define CONFIG_CMD_UBIFS
+#define CONFIG_RBTREE
+#define CONFIG_LZO
+#endif
+
 /*
  * SPL
  *
Signature · 1 line
1.9.2.468.g3f0c02a
#1 lore raw

PATCH v2 2/5 arm: socfpga: cyclone5: Undefine CONFIG_SPI_FLASH_USE_4K_SECTORS

Undefine CONFIG_SPI_FLASH_USE_4K_SECTORS for UBI and UBIFS support on serial NOR flash

Cc Dinh Nguyen <[email protected]>
Cc Dinh Nguyen <[email protected]>
Cc Pavel Machek <[email protected]>
Cc Marek Vasut <[email protected]>
Cc Stefan Roese <[email protected]>

---
Changes for v2
- move CONFIG_SPI_FLASH_USE_4K_SECTORS to Kconfig

---
 configs/socfpga_cyclone5_defconfig | 1 +
 1 file changed, 1 insertion(+)
configs/socfpga_cyclone5_defconfig +1 -0
index 864358c..4216b55 100644
@@ -23,3 +23,4 @@ CONFIG_DESIGNWARE_SPI=y
 CONFIG_DM_MMC=y
 CONFIG_USB=y
 CONFIG_DM_USB=y
+CONFIG_SPI_FLASH_USE_4K_SECTORS=n
Signature · 1 line
1.9.2.468.g3f0c02a
#2 lore raw

PATCH v2 2/5 arm: socfpga: cyclone5: Undefine CONFIG_SPI_FLASH_USE_4K_SECTORS

Quoted 21 lines · Chin Liang See

Undefine CONFIG_SPI_FLASH_USE_4K_SECTORS for UBI and UBIFS support on serial NOR flash

Cc Dinh Nguyen <[email protected]>
Cc Dinh Nguyen <[email protected]>
Cc Pavel Machek <[email protected]>
Cc Marek Vasut <[email protected]>
Cc Stefan Roese <[email protected]>

---
Changes for v2
- move CONFIG_SPI_FLASH_USE_4K_SECTORS to Kconfig

---
 configs/socfpga_cyclone5_defconfig | 1 +
 1 file changed, 1 insertion(+)
(quoted diff) +0 -0

b/configs/socfpga_cyclone5_defconfig index 864358c..4216b55 100644

configs/socfpga_cyclone5_defconfig CONFIG_DESIGNWARE_SPI=y · line 26

Quoted 4 lines
configs/socfpga_cyclone5_defconfig +1 -0
@@ -23,3 +23,4 @@ CONFIG_DESIGNWARE_SPI=y
 CONFIG_DM_MMC=y
 CONFIG_USB=y
 CONFIG_DM_USB=y
+CONFIG_SPI_FLASH_USE_4K_SECTORS=n

And for arriaV ... ? And sockit ? ;-)

Best regards,
Marek Vasut

#3 lore raw

PATCH v2 2/5 arm: socfpga: cyclone5: Undefine CONFIG_SPI_FLASH_USE_4K_SECTORS

Quoted 17 lines · Marek Vasut
Quoted 16 lines · Chin Liang See

Undefine CONFIG_SPI_FLASH_USE_4K_SECTORS for UBI and UBIFS support on serial NOR flash

Cc Dinh Nguyen <[email protected]>
Cc Dinh Nguyen <[email protected]>
Cc Pavel Machek <[email protected]>
Cc Marek Vasut <[email protected]>
Cc Stefan Roese <[email protected]>

---
Changes for v2
- move CONFIG_SPI_FLASH_USE_4K_SECTORS to Kconfig

---
 configs/socfpga_cyclone5_defconfig | 1 +
 1 file changed, 1 insertion(+)
Quoted 11 lines

configs/socfpga_cyclone5_defconfig CONFIG_DESIGNWARE_SPI=y · line 26

Quoted 9 lines
(quoted diff) +0 -0

b/configs/socfpga_cyclone5_defconfig index 864358c..4216b55 100644

configs/socfpga_cyclone5_defconfig +1 -0
@@ -23,3 +23,4 @@ CONFIG_DESIGNWARE_SPI=y
 CONFIG_DM_MMC=y
 CONFIG_USB=y
 CONFIG_DM_USB=y
+CONFIG_SPI_FLASH_USE_4K_SECTORS=n

And for arriaV ... ? And sockit ? ;-)

haha too obsess testing on CV board :)
Let me include them into these series.

Thanks
Chin Liang

Quoted 3 lines

Best regards,
Marek Vasut

#4 lore raw

PATCH v2 2/5 arm: socfpga: cyclone5: Undefine CONFIG_SPI_FLASH_USE_4K_SECTORS

Quoted 29 lines · Chin Liang See
Quoted 28 lines · Marek Vasut
Quoted 27 lines · Chin Liang See

Undefine CONFIG_SPI_FLASH_USE_4K_SECTORS for UBI and UBIFS support on serial NOR flash

Cc Dinh Nguyen <[email protected]>
Cc Dinh Nguyen <[email protected]>
Cc Pavel Machek <[email protected]>
Cc Marek Vasut <[email protected]>
Cc Stefan Roese <[email protected]>

---
Changes for v2
- move CONFIG_SPI_FLASH_USE_4K_SECTORS to Kconfig
---

 configs/socfpga_cyclone5_defconfig | 1 +
 1 file changed, 1 insertion(+)
(quoted diff) +0 -0

b/configs/socfpga_cyclone5_defconfig index 864358c..4216b55 100644

configs/socfpga_cyclone5_defconfig +0 -0
@@ -23,3 +23,4 @@ CONFIG_DESIGNWARE_SPI=y
 
 CONFIG_DM_MMC=y
 CONFIG_USB=y
 CONFIG_DM_USB=y
Quoted 6 lines
Quoted 3 lines
Quoted 1 line

+CONFIG_SPI_FLASH_USE_4K_SECTORS=n

And for arriaV ... ? And sockit ? ;-)

haha too obsess testing on CV board :)
Let me include them into these series.

These should be the only three boards which use QSPI NOR.

SoCrates, MCV and DE0 do not have QSPI NOR. SR1500 I believe also doesn't have one.

Best regards,
Marek Vasut

#5 lore raw

PATCH v2 2/5 arm: socfpga: cyclone5: Undefine CONFIG_SPI_FLASH_USE_4K_SECTORS

Quoted 36 lines · Marek Vasut
Quoted 35 lines · Chin Liang See
Quoted 33 lines · Marek Vasut
Quoted 23 lines · Chin Liang See

Undefine CONFIG_SPI_FLASH_USE_4K_SECTORS for UBI and UBIFS support on serial NOR flash

Cc Dinh Nguyen <[email protected]>
Cc Dinh Nguyen <[email protected]>
Cc Pavel Machek <[email protected]>
Cc Marek Vasut <[email protected]>
Cc Stefan Roese <[email protected]>

---
Changes for v2
- move CONFIG_SPI_FLASH_USE_4K_SECTORS to Kconfig
---

 configs/socfpga_cyclone5_defconfig | 1 +
 1 file changed, 1 insertion(+)
(quoted diff) +0 -0

b/configs/socfpga_cyclone5_defconfig index 864358c..4216b55 100644

configs/socfpga_cyclone5_defconfig CONFIG_DESIGNWARE_SPI=y · line 26

Quoted 6 lines
configs/socfpga_cyclone5_defconfig +1 -0
@@ -23,3 +23,4 @@ CONFIG_DESIGNWARE_SPI=y
 
 CONFIG_DM_MMC=y
 CONFIG_USB=y
 CONFIG_DM_USB=y
 
+CONFIG_SPI_FLASH_USE_4K_SECTORS=n

And for arriaV ... ? And sockit ? ;-)

Quoted 8 lines
Quoted 2 lines

haha too obsess testing on CV board :)
Let me include them into these series.

These should be the only three boards which use QSPI NOR.

SoCrates, MCV and DE0 do not have QSPI NOR. SR1500 I believe also doesn't have
one.

Nice, dun need to scratch my head :)

Thanks
Chin Liang

Quoted 3 lines

Best regards,
Marek Vasut

#6 lore raw

PATCH v2 2/5 arm: socfpga: cyclone5: Undefine CONFIG_SPI_FLASH_USE_4K_SECTORS

In reply to Marek Vasut
Quoted 34 lines · Marek Vasut
Quoted 33 lines · Chin Liang See
Quoted 31 lines · Marek Vasut
Quoted 22 lines · Chin Liang See

Undefine CONFIG_SPI_FLASH_USE_4K_SECTORS for UBI and UBIFS support on serial NOR flash

Cc Dinh Nguyen <[email protected]>
Cc Dinh Nguyen <[email protected]>
Cc Pavel Machek <[email protected]>
Cc Marek Vasut <[email protected]>
Cc Stefan Roese <[email protected]>

---
Changes for v2
- move CONFIG_SPI_FLASH_USE_4K_SECTORS to Kconfig
---

  configs/socfpga_cyclone5_defconfig | 1 +
  1 file changed, 1 insertion(+)
(quoted diff) +0 -0

b/configs/socfpga_cyclone5_defconfig index 864358c..4216b55 100644

configs/socfpga_cyclone5_defconfig CONFIG_DESIGNWARE_SPI=y · line 26

Quoted 6 lines
configs/socfpga_cyclone5_defconfig +1 -0
@@ -23,3 +23,4 @@ CONFIG_DESIGNWARE_SPI=y
 
  CONFIG_DM_MMC=y
  CONFIG_USB=y
  CONFIG_DM_USB=y
 
+CONFIG_SPI_FLASH_USE_4K_SECTORS=n

And for arriaV ... ? And sockit ? ;-)

Quoted 7 lines
Quoted 2 lines

haha too obsess testing on CV board :)
Let me include them into these series.

These should be the only three boards which use QSPI NOR.

SoCrates, MCV and DE0 do not have QSPI NOR. SR1500 I believe also doesn't have one.

SR1500 does have QSPI NOR. Its the boot device.

Thanks,
Stefan

#7 lore raw

PATCH v2 2/5 arm: socfpga: cyclone5: Undefine CONFIG_SPI_FLASH_USE_4K_SECTORS

Quoted 5 lines · Stefan Roese
Quoted 4 lines · Marek Vasut
Quoted 3 lines · Chin Liang See
Quoted 2 lines · Marek Vasut

On Tuesday, December 22, 2015 at 01:59:46 AM, Chin Liang See wrote:

[..]

Quoted 20 lines
Quoted 20 lines
Quoted 19 lines
Quoted 9 lines
Quoted 9 lines
(quoted diff) +0 -0

b/configs/socfpga_cyclone5_defconfig index 864358c..4216b55 100644

configs/socfpga_cyclone5_defconfig +0 -0
@@ -23,3 +23,4 @@ CONFIG_DESIGNWARE_SPI=y
 
Quoted 7 lines

configs/socfpga_cyclone5_defconfig CONFIG_DESIGNWARE_SPI=y · line 26

Quoted 5 lines
configs/socfpga_cyclone5_defconfig +1 -0
  CONFIG_DM_MMC=y
  CONFIG_USB=y
  CONFIG_DM_USB=y
 
+CONFIG_SPI_FLASH_USE_4K_SECTORS=n

And for arriaV ... ? And sockit ? ;-)

haha too obsess testing on CV board :)
Let me include them into these series.

Quoted 7 lines
Quoted 5 lines

These should be the only three boards which use QSPI NOR.

SoCrates, MCV and DE0 do not have QSPI NOR. SR1500 I believe also doesn't have
one.

SR1500 does have QSPI NOR. Its the boot device.

Just in time as going to create v3 now :)

Thanks
Chin Liang

Thanks,

Quoted 2 lines

Stefan

#8 lore raw

PATCH v2 2/5 arm: socfpga: cyclone5: Undefine CONFIG_SPI_FLASH_USE_4K_SECTORS

In reply to Chin Liang See
Quoted 21 lines · Chin Liang See

Undefine CONFIG_SPI_FLASH_USE_4K_SECTORS for UBI and UBIFS support on serial NOR flash

Cc Dinh Nguyen <[email protected]>
Cc Dinh Nguyen <[email protected]>
Cc Pavel Machek <[email protected]>
Cc Marek Vasut <[email protected]>
Cc Stefan Roese <[email protected]>

---
Changes for v2
- move CONFIG_SPI_FLASH_USE_4K_SECTORS to Kconfig

---
 configs/socfpga_cyclone5_defconfig | 1 +
 1 file changed, 1 insertion(+)
configs/socfpga_cyclone5_defconfig +0 -0
index 864358c..4216b55 100644

configs/socfpga_cyclone5_defconfig CONFIG_DESIGNWARE_SPI=y · line 26

Quoted 4 lines
configs/socfpga_cyclone5_defconfig +1 -0
@@ -23,3 +23,4 @@ CONFIG_DESIGNWARE_SPI=y
 CONFIG_DM_MMC=y
 CONFIG_USB=y
 CONFIG_DM_USB=y
+CONFIG_SPI_FLASH_USE_4K_SECTORS=n

Actually, do we usually specify =n in config files? It seems to be so rare it is an error.

Normally, we have something like "# CONFIG_SYS_MALLOC_F is not set" in config files.

Pavel

Signature · 2 lines
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
#9 lore raw

PATCH v2 2/5 arm: socfpga: cyclone5: Undefine CONFIG_SPI_FLASH_USE_4K_SECTORS

Quoted 31 lines · Pavel Machek
Quoted 22 lines · Chin Liang See

Undefine CONFIG_SPI_FLASH_USE_4K_SECTORS for UBI and UBIFS support on serial NOR flash

Cc Dinh Nguyen <[email protected]>
Cc Dinh Nguyen <[email protected]>
Cc Pavel Machek <[email protected]>
Cc Marek Vasut <[email protected]>
Cc Stefan Roese <[email protected]>

---
Changes for v2
- move CONFIG_SPI_FLASH_USE_4K_SECTORS to Kconfig

---
 configs/socfpga_cyclone5_defconfig | 1 +
 1 file changed, 1 insertion(+)
configs/socfpga_cyclone5_defconfig +0 -0
index 864358c..4216b55 100644

configs/socfpga_cyclone5_defconfig CONFIG_DESIGNWARE_SPI=y · line 26

Quoted 4 lines
configs/socfpga_cyclone5_defconfig +1 -0
@@ -23,3 +23,4 @@ CONFIG_DESIGNWARE_SPI=y
 CONFIG_DM_MMC=y
 CONFIG_USB=y
 CONFIG_DM_USB=y
+CONFIG_SPI_FLASH_USE_4K_SECTORS=n

Actually, do we usually specify =n in config files? It seems to be so rare it is an error.

Quoted 3 lines

Normally, we have something like "# CONFIG_SYS_MALLOC_F is not set" in
config files.

yah, this was fixed by Marek.

Thanks
Chin Liang

Quoted 4 lines

Pavel

#10 lore raw

PATCH v2 3/5 arm: socfpga: cyclone5_socdk: Enable ubiload console command

In reply to Chin Liang See

Enabling ubiload command to load kernel image and device tree from mtd part labeled "UBI". ubiload command will search the file from directory /boot.

Cc Dinh Nguyen <[email protected]>
Cc Dinh Nguyen <[email protected]>
Cc Pavel Machek <[email protected]>
Cc Marek Vasut <[email protected]>
Cc Stefan Roese <[email protected]>

---
Changes for v2
- use && instead of ; for ubiload
- update commit message

---
 include/configs/socfpga_cyclone5_socdk.h | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)
include/configs/socfpga_cyclone5_socdk.h +4 -1
index 3c2e2ae..72a3cef 100644
@@ -74,7 +74,10 @@
 	"qspirootfstype=jffs2\0" \
 	"qspiboot=setenv bootargs " CONFIG_BOOTARGS \
 		" root=${qspiroot} rw rootfstype=${qspirootfstype};"\
-		"bootm ${loadaddr} - ${fdt_addr}\0"
+		"bootm ${loadaddr} - ${fdt_addr}\0" \
+	"ubiload=ubi part UBI && ubifsmount ubi0 && " \
+		"ubifsload ${loadaddr} /boot/${bootimage} && " \
+		"ubifsload ${fdt_addr} /boot/${fdtimage}\0"
 
 /* The rest of the configuration is shared */
 #include <configs/socfpga_common.h>
Signature · 1 line
1.9.2.468.g3f0c02a
#11 lore raw

PATCH v2 4/5 arm: socfpga: cyclone5_socdk: Enable qspiload console command

In reply to Chin Liang See

Enabling qspiload command which will load the kernel image and dtb from UBIFS within MTD partition labeled UBI.

Cc Dinh Nguyen <[email protected]>
Cc Dinh Nguyen <[email protected]>
Cc Pavel Machek <[email protected]>
Cc Marek Vasut <[email protected]>
Cc Stefan Roese <[email protected]>

---
Changes for v2
- use && instead ; for qspiload

---
 include/configs/socfpga_cyclone5_socdk.h | 1 +
 1 file changed, 1 insertion(+)
include/configs/socfpga_cyclone5_socdk.h +1 -0
index 72a3cef..0ed7f42 100644
@@ -70,6 +70,7 @@
 	"mmcload=mmc rescan;" \
 		"load mmc 0:1 ${loadaddr} ${bootimage};" \
 		"load mmc 0:1 ${fdt_addr} ${fdtimage}\0" \
+	"qspiload=sf probe && mtdparts default && run ubiload\0" \
 	"qspiroot=/dev/mtdblock0\0" \
 	"qspirootfstype=jffs2\0" \
 	"qspiboot=setenv bootargs " CONFIG_BOOTARGS \
Signature · 1 line
1.9.2.468.g3f0c02a
#12 lore raw

PATCH v2 5/5 arm: socfpga: cyclone5_socdk: Update qspiboot to use UBIFS

In reply to Chin Liang See

Update the qspiboot console command to use UBIFS instead of old jffs2 file system.

Cc Dinh Nguyen <[email protected]>
Cc Dinh Nguyen <[email protected]>
Cc Pavel Machek <[email protected]>
Cc Marek Vasut <[email protected]>
Cc Stefan Roese <[email protected]>

---
Changes for v2
- part of series

---
 include/configs/socfpga_cyclone5_socdk.h | 6 ++----
 1 file changed, 2 insertions(+), 4 deletions(-)
include/configs/socfpga_cyclone5_socdk.h +2 -4
index 0ed7f42..c4c4ecb 100644
@@ -71,11 +71,9 @@
 		"load mmc 0:1 ${loadaddr} ${bootimage};" \
 		"load mmc 0:1 ${fdt_addr} ${fdtimage}\0" \
 	"qspiload=sf probe && mtdparts default && run ubiload\0" \
-	"qspiroot=/dev/mtdblock0\0" \
-	"qspirootfstype=jffs2\0" \
 	"qspiboot=setenv bootargs " CONFIG_BOOTARGS \
-		" root=${qspiroot} rw rootfstype=${qspirootfstype};"\
-		"bootm ${loadaddr} - ${fdt_addr}\0" \
+		" ubi.mtd=1,64 root=ubi0:rootfs rw rootfstype=ubifs;"\
+		"bootz ${loadaddr} - ${fdt_addr}\0" \
 	"ubiload=ubi part UBI && ubifsmount ubi0 && " \
 		"ubifsload ${loadaddr} /boot/${bootimage} && " \
 		"ubifsload ${fdt_addr} /boot/${fdtimage}\0"
Signature · 1 line
1.9.2.468.g3f0c02a
#13 lore raw

PATCH v2 1/5 arm: socfpga: Enable ubi and ubifs support

In reply to Chin Liang See
Quoted 9 lines · Chin Liang See

When QSPI and NAND is enabled, the ubi and ubifs support will be enabled too.

Cc Dinh Nguyen <[email protected]>
Cc Dinh Nguyen <[email protected]>
Cc Pavel Machek <[email protected]>
Cc Marek Vasut <[email protected]>
Cc Stefan Roese <[email protected]>
Quoted 3 lines

---
Changes for v2
- move CONFIG_SPI_FLASH_USE_4K_SECTORS to Kconfig

All but 2/5 looks good :)

Best regards,
Marek Vasut