support mapping PCI device ids to stream ids for MSIs

-----Original Message-----
From: Stuart Yoder [mailto:stuart.yoder at nxp.com]
Sent: Friday, February 26, 2016 7:06 AM
To: u-boot at lists.denx.de
Cc: york sun <[email protected]>; Prabhakar Kushwaha <[email protected]>; Mingkai Hu <[email protected]>; Minghuan Lian <[email protected]>; Yang-Leo Li <[email protected]>; marc.zyngier at arm.com; Stuart Yoder <[email protected]>
Subject: [PATCH 4/7 v2] pci/layerscape: add support for LUT

From: Stuart Yoder <[email protected]>

The per-PCI controller LUT (Look-Up-Table) is a 32-entry table that maps PCI requester IDs (bus/dev/fun) to a stream ID.

This patch implements infrastructure to enable LUT initialization:
-define registers offsets
-add an index to 'struct ls_pcie' to track next available slot in LUT -add function to allocate the next available entry index -add function to program a LUT entry

Signed-off-by Stuart Yoder <[email protected]>

---

(quoted diff) +1 -1

-v2
  -no changes
 
 drivers/pci/pcie_layerscape.c |   36
++++++++++++++++++++++++++++++++++++
 1 file changed, 36 insertions(+)

drivers/pci/pcie_layerscape.c +0 -0

index bb29222..6886488 100644

drivers/pci/pcie_layerscape.c +33 -0

+#define PCIE_LUT_UDR(n)         (0x800 + (n) * 8)
+#define PCIE_LUT_LDR(n)         (0x804 + (n) * 8)
+#define PCIE_LUT_ENABLE         (1 << 31)
+#define PCIE_LUT_ENTRY_COUNT    32
+
 #define PCIE_DBI_RO_WR_EN	0x8bc
 
 #define PCIE_LINK_CAP		0x7c

@@ -93,6 +100,7 @@ struct ls_pcie {
 	void __iomem *dbi;
 	void __iomem *va_cfg0;
 	void __iomem *va_cfg1;
+	int next_lut_index;
 	struct pci_controller hose;
 };
 

@@ -482,6 +490,33 @@ static void ls_pcie_setup_ep(struct ls_pcie *pcie,
 struct ls_pcie_info *info)
 	}
 }
 
+
+/*
+ * Return next available LUT index.
+ */
+static u32 ls_pcie_next_lut_index(struct ls_pcie *pcie)
+{
+	if (pcie->next_lut_index < PCIE_LUT_ENTRY_COUNT)
+		return pcie->next_lut_index++;
+	else
+		return -1;  /* LUT is full */
+}
+
+/*
+ * Program a single LUT entry
+ */
+static void ls_pcie_lut_set_mapping(struct ls_pcie *pcie, int index, u32 devid,
+			     u32 streamid)
+{
+	void __iomem *lut;
+
+	lut = pcie->dbi + PCIE_LUT_BASE;
+
+	/* leave mask as all zeroes, want to match all bits */
+	writel((devid << 16), lut + PCIE_LUT_UDR(index));
+	writel(streamid | PCIE_LUT_ENABLE, lut + PCIE_LUT_LDR(index));
+}
+
 int ls_pcie_init_ctrl(int busno, enum srds_prtcl dev, struct ls_pcie_info *info)
 {

drivers/pci/pcie_layerscape.c +1 -0

 	struct ls_pcie *pcie;

@@ -513,6 +548,7 @@ int ls_pcie_init_ctrl(int busno, enum srds_prtcl dev,
 struct ls_pcie_info *info)
 	pcie->va_cfg1 = map_physmem(info->cfg1_phys,
 				    info->cfg1_size,
 				    MAP_NOCACHE);
+	pcie->next_lut_index = 0;
 
 	/* outbound memory */

pci_set_region(&hose->regions[0],
--
1.7.9.5

-----Original Message-----
From: Minghuan Lian
Sent: Thursday, February 25, 2016 11:56 PM
To: Stuart Yoder <[email protected]>; u-boot at lists.denx.de
Cc: york sun <[email protected]>; Prabhakar Kushwaha <[email protected]>; Mingkai Hu <[email protected]>; Yang-Leo Li <[email protected]>; marc.zyngier at arm.com; Stuart Yoder <[email protected]>
Subject: RE: [PATCH 4/7 v2] pci/layerscape: add support for LUT

Hi Stuart,

Please see my comments inline.

Thanks,
Minghuan

Quoted 35 lines

-----Original Message-----
From: Stuart Yoder [mailto:stuart.yoder at nxp.com]
Sent: Friday, February 26, 2016 7:06 AM
To: u-boot at lists.denx.de
Cc: york sun <[email protected]>; Prabhakar Kushwaha <[email protected]>; Mingkai Hu <[email protected]>; Minghuan Lian <[email protected]>; Yang-Leo Li <[email protected]>; marc.zyngier at arm.com; Stuart Yoder <[email protected]>
Subject: [PATCH 4/7 v2] pci/layerscape: add support for LUT

From: Stuart Yoder <[email protected]>

The per-PCI controller LUT (Look-Up-Table) is a 32-entry table that maps PCI requester IDs (bus/dev/fun) to a stream ID.

This patch implements infrastructure to enable LUT initialization:
-define registers offsets
-add an index to 'struct ls_pcie' to track next available slot in LUT -add function to allocate the next available entry index -add function to program a LUT entry

Signed-off-by Stuart Yoder <[email protected]>

---

(quoted diff) +1 -1

-v2
  -no changes
 
 drivers/pci/pcie_layerscape.c |   36
++++++++++++++++++++++++++++++++++++
 1 file changed, 36 insertions(+)

drivers/pci/pcie_layerscape.c +0 -0

index bb29222..6886488 100644

drivers/pci/pcie_layerscape.c line 62

Quoted 5 lines

drivers/pci/pcie_layerscape.c +2 -0

@@ -58,6 +58,13 @@
 #define PCIE_ATU_FUNC(x)		(((x) & 0x7) << 16)
 #define PCIE_ATU_UPPER_TARGET		0x91C
 
+/* LUT registers */
+#define PCIE_LUT_BASE		0x80000

[Minghuan Lian] PCIE_LUT_BASE has been defined in immap_lsch2.h and immap_lsch3.h. LS1043a has the different base address.

drivers/pci/pcie_layerscape.c line 67

Quoted 5 lines

drivers/pci/pcie_layerscape.c +5 -0

+#define PCIE_LUT_UDR(n)         (0x800 + (n) * 8)
+#define PCIE_LUT_LDR(n)         (0x804 + (n) * 8)
+#define PCIE_LUT_ENABLE         (1 << 31)
+#define PCIE_LUT_ENTRY_COUNT    32
+

-----Original Message-----
From: Stuart Yoder [mailto:stuart.yoder at nxp.com]
Sent: Friday, February 26, 2016 7:06 AM
To: u-boot at lists.denx.de
Cc: york sun <[email protected]>; Prabhakar Kushwaha <[email protected]>; Mingkai Hu <[email protected]>; Minghuan Lian <[email protected]>; Yang-Leo Li <[email protected]>; marc.zyngier at arm.com; Stuart Yoder <[email protected]>
Subject: [PATCH 7/7 v2] pci/layerscape: set LUT and msi-map for discovered PCI devices

From: Stuart Yoder <[email protected]>

for all PCI devices discovered in a system:
-allocate a LUT (look-up-table) entry in that PCI controller -allocate a stream ID for the device
-program and enable a LUT entry (maps PCI requester id to stream ID) -set the msi-map property on the controller reflecting the
LUT mapping

basic bus scanning loop/logic was taken from drivers/pci/pci.c pci_hose_scan_bus().

Signed-off-by Stuart Yoder <[email protected]>

---

(quoted diff) +1 -1

-v2
  -removed skip of host bridge when scanning the bus
 
 drivers/pci/pcie_layerscape.c |   64
+++++++++++++++++++++++++++++++++++++++++
 1 file changed, 64 insertions(+)

drivers/pci/pcie_layerscape.c +28 -0

index dfafaf2..3470210 100644
@@ -569,6 +569,66 @@ static void fdt_pcie_set_msi_map_entry(void *blob,
 struct ls_pcie *pcie,
 	fdt_appendprop_u32(blob, nodeoffset, "msi-map", 1);
 }
 
+static void fdt_fixup_pcie(void *blob)
+{
+	unsigned int found_multi = 0;
+	unsigned char header_type;
+	int index;
+	u32 streamid;
+	pci_dev_t dev;
+	int bus;
+	unsigned short id;
+	struct pci_controller *hose;
+	struct ls_pcie *pcie;
+	int i;
+
+	for (i = 0, hose = pci_get_hose_head(); hose; hose = hose->next, i++) {
+		pcie = hose->priv_data;
+		for (bus = hose->first_busno; bus <= hose->last_busno; bus++) {
+
+			for (dev =  PCI_BDF(bus, 0, 0);
+			     dev <  PCI_BDF(bus, PCI_MAX_PCI_DEVICES - 1,
+					    PCI_MAX_PCI_FUNCTIONS - 1);
+			     dev += PCI_BDF(0, 0, 1)) {
+
+				if (PCI_FUNC(dev) && !found_multi)
+					continue;
+
+				pci_read_config_word(dev, PCI_VENDOR_ID, &id);
+
+				pci_read_config_byte(dev, PCI_HEADER_TYPE,

drivers/pci/pcie_layerscape.c +17 -0

+				if (index < 0) {
+					printf("ERROR: no LUT indexes free\n");
+					continue;
+				}
+
+				/* map PCI b.d.f to streamID in LUT */
+				ls_pcie_lut_set_mapping(pcie, index, dev >> 8,
+							streamid);
+
+				/* update msi-map in device tree */
+				fdt_pcie_set_msi_map_entry(blob, pcie, dev >> 8,
+							   streamid);
+			}
+		}
+	}
+}
+
 int ls_pcie_init_ctrl(int busno, enum srds_prtcl dev, struct ls_pcie_info *info)
 {

drivers/pci/pcie_layerscape.c +4 -0

 	struct ls_pcie *pcie;

@@ -745,6 +805,10 @@ void ft_pci_setup(void *blob, bd_t *bd)
 	#ifdef CONFIG_PCIE4
 	ft_pcie_ls_setup(blob, FSL_PCIE_COMPAT, CONFIG_SYS_PCIE4_ADDR,
 PCIE4);
 	#endif
+
+	#if defined(CONFIG_LS2080A) || defined(CONFIG_LS2085A)
+	fdt_fixup_pcie(blob);
+	#endif
 }
 

#else
--
1.7.9.5

-----Original Message-----
From: Minghuan Lian
Sent: Thursday, February 25, 2016 11:55 PM
To: Stuart Yoder <[email protected]>; u-boot at lists.denx.de
Cc: york sun <[email protected]>; Prabhakar Kushwaha <[email protected]>; Mingkai Hu <[email protected]>; Yang-Leo Li <[email protected]>; marc.zyngier at arm.com; Stuart Yoder <[email protected]>
Subject: RE: [PATCH 7/7 v2] pci/layerscape: set LUT and msi-map for discovered PCI devices

Hi Stuart,

Please see my comments inline.

Thanks,
Minghuan

Quoted 69 lines

-----Original Message-----
From: Stuart Yoder [mailto:stuart.yoder at nxp.com]
Sent: Friday, February 26, 2016 7:06 AM
To: u-boot at lists.denx.de
Cc: york sun <[email protected]>; Prabhakar Kushwaha <[email protected]>; Mingkai Hu <[email protected]>; Minghuan Lian <[email protected]>; Yang-Leo Li <[email protected]>; marc.zyngier at arm.com; Stuart Yoder <[email protected]>
Subject: [PATCH 7/7 v2] pci/layerscape: set LUT and msi-map for discovered PCI devices

From: Stuart Yoder <[email protected]>

for all PCI devices discovered in a system:
-allocate a LUT (look-up-table) entry in that PCI controller -allocate a stream ID for the device
-program and enable a LUT entry (maps PCI requester id to stream ID) -set the msi-map property on the controller reflecting the
LUT mapping

basic bus scanning loop/logic was taken from drivers/pci/pci.c pci_hose_scan_bus().

Signed-off-by Stuart Yoder <[email protected]>

---

(quoted diff) +1 -1

-v2
  -removed skip of host bridge when scanning the bus
 
 drivers/pci/pcie_layerscape.c |   64
+++++++++++++++++++++++++++++++++++++++++
 1 file changed, 64 insertions(+)

drivers/pci/pcie_layerscape.c +28 -0

index dfafaf2..3470210 100644
@@ -569,6 +569,66 @@ static void fdt_pcie_set_msi_map_entry(void *blob,
 struct ls_pcie *pcie,
 	fdt_appendprop_u32(blob, nodeoffset, "msi-map", 1);
 }
 
+static void fdt_fixup_pcie(void *blob)
+{
+	unsigned int found_multi = 0;
+	unsigned char header_type;
+	int index;
+	u32 streamid;
+	pci_dev_t dev;
+	int bus;
+	unsigned short id;
+	struct pci_controller *hose;
+	struct ls_pcie *pcie;
+	int i;
+
+	for (i = 0, hose = pci_get_hose_head(); hose; hose = hose->next, i++) {
+		pcie = hose->priv_data;
+		for (bus = hose->first_busno; bus <= hose->last_busno; bus++) {
+
+			for (dev =  PCI_BDF(bus, 0, 0);
+			     dev <  PCI_BDF(bus, PCI_MAX_PCI_DEVICES - 1,
+					    PCI_MAX_PCI_FUNCTIONS - 1);
+			     dev += PCI_BDF(0, 0, 1)) {
+
+				if (PCI_FUNC(dev) && !found_multi)
+					continue;
+
+				pci_read_config_word(dev, PCI_VENDOR_ID, &id);
+
+				pci_read_config_byte(dev, PCI_HEADER_TYPE,

drivers/pci/pcie_layerscape.c static void fdt_pcie_set_msi_map_entry(void *blob, · line 610

Quoted 10 lines

drivers/pci/pcie_layerscape.c +10 -0

+						     &header_type);
+
+				if ((id == 0xFFFF) || (id == 0x0000))
+					continue;
+
+				if (!PCI_FUNC(dev))
+					found_multi = header_type & 0x80;
+
+				streamid = ls_pcie_next_streamid();
+				if (streamid < 0) {

[Minghuan Lian] streamed is u32 type not int, it should be always >= 0.

drivers/pci/pcie_layerscape.c static void fdt_pcie_set_msi_map_entry(void *blob, struct ls_pcie *pcie, · line 614

Quoted 5 lines

drivers/pci/pcie_layerscape.c +5 -0

+					printf("ERROR: no stream ids free\n");
+					continue;
+				}
+
+				index = ls_pcie_next_lut_index(pcie);

[Minghuan Lian] ls_pcie_next_lut_index() returns an u32 value not int. we may change all index and streamid to int type.