Add support for Rockchip RK3288 Ethernet

Add support for the snps,reset-gpio, snps,reset-active-low (optional) and snps,reset-delays-us device-tree bindings. The combination of these three define how the PHY should be reset to ensure it's in a sane state.

Signed-off-by Sjoerd Simons <[email protected]>

---

Changes in v2:
- Store probe gpio in private data not platdata
- Drop unneeded header file

 drivers/net/designware.c | 76 ++++++++++++++++++++++++++++++++++++++++++++----
 drivers/net/designware.h | 10 +++++++
 2 files changed, 80 insertions(+), 6 deletions(-)

Quoted 12 lines · Sjoerd Simons

Add support for the snps,reset-gpio, snps,reset-active-low (optional) and snps,reset-delays-us device-tree bindings. The combination of these three define how the PHY should be reset to ensure it's in a sane state.

Signed-off-by Sjoerd Simons <[email protected]>

---

Changes in v2:
- Store probe gpio in private data not platdata
- Drop unneeded header file

Quoted 3 lines

 drivers/net/designware.c | 76 ++++++++++++++++++++++++++++++++++++++++++++----
 drivers/net/designware.h | 10 +++++++
 2 files changed, 80 insertions(+), 6 deletions(-)

Reviewed-by Simon Glass <[email protected]>

Add the ability for e.g. drivers subclassing to register a function to be called after phy link negotiation. This is useful if e.g. the driver needs to change the mac configuration based on the negotiated speed.

Signed-off-by Sjoerd Simons <[email protected]>

---

Changes in v2:
- Move the hook into the dw_adjust_link function
- Rename the hook to fix_mac_speed, similar to Linux

 drivers/net/designware.c | 8 ++++++--
 drivers/net/designware.h | 4 ++++
 2 files changed, 10 insertions(+), 2 deletions(-)

drivers/net/designware.c +6 -2

index 8834506..5eaa1de 100644
@@ -231,7 +231,8 @@ static int _dw_write_hwaddr(struct dw_eth_dev *priv, u8 *mac_id)
        return 0;
 }
 
-static void dw_adjust_link(struct eth_mac_regs *mac_p,
+static void dw_adjust_link(struct dw_eth_dev *priv,
+                          struct eth_mac_regs *mac_p,
                           struct phy_device *phydev)
 {
        u32 conf = readl(&mac_p->conf) | FRAMEBURSTENABLE | DISABLERXOWN;

@@ -257,6 +258,9 @@ static void dw_adjust_link(struct eth_mac_regs *mac_p,
        printf("Speed: %d, %s duplex%s\n", phydev->speed,
               (phydev->duplex) ? "full" : "half",
               (phydev->port == PORT_FIBRE) ? ", fiber mode" : "");
+
+       if (priv->fix_mac_speed)
+               priv->fix_mac_speed(priv);
 }
 
 static void _dw_eth_halt(struct dw_eth_dev *priv)

@@ -322,7 +326,7 @@ static int _dw_eth_init(struct dw_eth_dev *priv, u8 *enetaddr)
                return ret;
        }
 
-       dw_adjust_link(mac_p, priv->phydev);
+       dw_adjust_link(priv, mac_p, priv->phydev);
 
        if (!priv->phydev->link)
                return -EIO;

drivers/net/designware.h +0 -0

index 6b4bfd7..792af7c 100644

drivers/net/designware.h +0 -1

 };
 
 #ifdef CONFIG_DM_ETH
--

2.7.0

The rgmii_pins node in rk3288.dtsi configures 15 pins. Increase the size of the cell array to accomedate that, otherwise only the first 10 get configured.

Signed-off-by Sjoerd Simons <[email protected]>

---

Changes in v2: None

 drivers/pinctrl/rockchip/pinctrl_rk3288.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

drivers/pinctrl/rockchip/pinctrl_rk3288.c +0 -0

index 7c769bd..1fa1daa 100644

--
2.7.0

Quoted 11 lines · Sjoerd Simons

The rgmii_pins node in rk3288.dtsi configures 15 pins. Increase the size of the cell array to accomedate that, otherwise only the first 10 get configured.

Signed-off-by Sjoerd Simons <[email protected]>

---

Changes in v2: None

 drivers/pinctrl/rockchip/pinctrl_rk3288.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Reviewed-by Simon Glass <[email protected]>

Quoted 12 lines

drivers/pinctrl/rockchip/pinctrl_rk3288.c +1 -1

index 7c769bd..1fa1daa 100644
@@ -623,7 +623,7 @@ static int rk3288_pinctrl_set_state(struct udevice *dev, struct udevice *config)
 {
        const void *blob = gd->fdt_blob;
        int pcfg_node, ret, flags, count, i;
-       u32 cell[40], *ptr;
+       u32 cell[60], *ptr;
 

drivers/pinctrl/rockchip/pinctrl_rk3288.c static int rk3288_pinctrl_set_state(struct udevice *dev, struct udevice *config) · line 629

Quoted 2 lines

drivers/pinctrl/rockchip/pinctrl_rk3288.c +0 -0

        debug("%s: %s %s\n", __func__, dev->name, config->name);
        ret = fdtdec_get_int_array_count(blob, config->of_offset,

It's tempting to add

if (ret == ARRAY_SIZE(cell))
return -ENOSPC;

Quoted 3 lines

--
2.7.0

Setup the clocks for the gmac ethernet interface. This assumes the mac clock is fed by an external clock which is common on RK3288 based devices.

Signed-off-by Sjoerd Simons <[email protected]>

---

Changes in v2: None

 arch/arm/include/asm/arch-rockchip/cru_rk3288.h | 17 +++++++++++++++++
 drivers/clk/clk_rk3288.c                        | 14 ++++++++++++++
 2 files changed, 31 insertions(+)

Quoted 7 lines · Sjoerd Simons

Setup the clocks for the gmac ethernet interface. This assumes the mac clock is fed by an external clock which is common on RK3288 based devices.

Signed-off-by Sjoerd Simons <[email protected]>

---

Quoted 5 lines

Changes in v2: None

 arch/arm/include/asm/arch-rockchip/cru_rk3288.h | 17 +++++++++++++++++
 drivers/clk/clk_rk3288.c                        | 14 ++++++++++++++
 2 files changed, 31 insertions(+)

Reviewed-by Simon Glass <[email protected]>

Add definitions for GRF_SOC_CON1 and GRF_SOC_CON3 which contain various GMAC related fields.

Signed-off-by Sjoerd Simons <[email protected]>

---

Changes in v2: None

 arch/arm/include/asm/arch-rockchip/grf_rk3288.h | 53 +++++++++++++++++++++++++
 1 file changed, 53 insertions(+)

Quoted 6 lines · Sjoerd Simons

Add definitions for GRF_SOC_CON1 and GRF_SOC_CON3 which contain various GMAC related fields.

Signed-off-by Sjoerd Simons <[email protected]>

---

Quoted 4 lines

Changes in v2: None

 arch/arm/include/asm/arch-rockchip/grf_rk3288.h | 53 +++++++++++++++++++++++++
 1 file changed, 53 insertions(+)

Reviewed-by Simon Glass <[email protected]>

Add a new driver for the GMAC ethernet interface present in Rockchip RK3288 SOCs. This driver subclasses the generic design-ware driver to add the glue needed specifically for Rockchip.

Signed-off-by Sjoerd Simons <[email protected]>

---

Changes in v2:
- Fix various coding style nits
- Adjust to new hook name

 drivers/net/Kconfig       |   7 +++
 drivers/net/Makefile      |   1 +
 drivers/net/gmac_rk3288.c | 125 ++++++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 133 insertions(+)
 create mode 100644 drivers/net/gmac_rk3288.c

drivers/net/Kconfig +7 -0

index bc2f51d..fa49856 100644
@@ -133,4 +133,11 @@ config PIC32_ETH
          This driver implements 10/100 Mbps Ethernet and MAC layer for
          Microchip PIC32 microcontrollers.
 
+config GMAC_RK3288
+       bool "Rockchip RK3288 Synopsys Designware Ethernet MAC"
+       depends on DM_ETH && ETH_DESIGNWARE
+       help
+         This driver provides Rockchip RK3288 network support based on the
+         Synopsys Designware driver.
+
 endif # NETDEVICES

drivers/net/Makefile +1 -0

index 33a81ee..d0a8009 100644
@@ -32,6 +32,7 @@ obj-$(CONFIG_FTGMAC100) += ftgmac100.o
 obj-$(CONFIG_FTMAC110) += ftmac110.o
 obj-$(CONFIG_FTMAC100) += ftmac100.o
 obj-$(CONFIG_GRETH) += greth.o
+obj-$(CONFIG_GMAC_RK3288) += gmac_rk3288.o
 obj-$(CONFIG_DRIVER_TI_KEYSTONE_NET) += keystone_net.o
 obj-$(CONFIG_KS8851_MLL) += ks8851_mll.o
 obj-$(CONFIG_LAN91C96) += lan91c96.o

drivers/net/gmac_rk3288.c new file +0 -0

new file mode 100644
index 0000000..5400b2c

drivers/net/gmac_rk3288.c new file +49 -0

+
+DECLARE_GLOBAL_DATA_PTR;
+
+struct gmac_rk3288_platdata {
+       struct dw_eth_pdata dw_eth_pdata;
+       int tx_delay;
+       int rx_delay;
+};
+
+static int gmac_rk3288_ofdata_to_platdata(struct udevice *dev)
+{
+       struct gmac_rk3288_platdata *pdata = dev_get_platdata(dev);
+
+       pdata->tx_delay = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
+                                        "tx_delay", 0x30);
+       pdata->rx_delay = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
+                                        "rx_delay", 0x10);
+
+       return designware_eth_ofdata_to_platdata(dev);
+}
+
+static int gmac_rk3288_fix_mac_speed(struct dw_eth_dev *priv)
+{
+       struct rk3288_grf *grf;
+       int clk;
+
+       switch (priv->phydev->speed) {
+       case 10:
+               clk = GMAC_CLK_SEL_2_5M;
+               break;
+       case 100:
+               clk = GMAC_CLK_SEL_25M;
+               break;
+       case 1000:
+               clk = GMAC_CLK_SEL_125M;
+               break;
+       default:
+               printf("Unknown phy speed: %d\n", priv->phydev->speed);
+               return -EINVAL;
+       }
+
+       grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+
+       rk_clrsetreg(&grf->soc_con1,
+                    GMAC_CLK_SEL_MASK << GMAC_CLK_SEL_SHIFT,
+                    clk << GMAC_CLK_SEL_SHIFT);
+
+       return 0;
+}

drivers/net/gmac_rk3288.c new file +15 -0

+
+       ret = clk_set_periph_rate(clk, SCLK_MAC, 0);
+       if (ret)
+               return ret;
+
+       /* Set to RGMII mode */
+       grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+       rk_clrsetreg(&grf->soc_con1,
+                    RMII_MODE_MASK << RMII_MODE_SHIFT |
+                    GMAC_PHY_INTF_SEL_MASK << GMAC_PHY_INTF_SEL_SHIFT,
+                    GMAC_PHY_INTF_SEL_RGMII << GMAC_PHY_INTF_SEL_SHIFT);
+
+       rk_clrsetreg(&grf->soc_con3,
+                    RXCLK_DLY_ENA_GMAC_MASK <<  RXCLK_DLY_ENA_GMAC_SHIFT |
+                    TXCLK_DLY_ENA_GMAC_MASK <<  TXCLK_DLY_ENA_GMAC_SHIFT |

drivers/net/gmac_rk3288.c new file +18 -1

+}
+
+static const struct udevice_id rk3288_gmac_ids[] = {
+       { .compatible = "rockchip,rk3288-gmac" },
+       { }
+};
+
+U_BOOT_DRIVER(eth_gmac_rk3288) = {
+       .name   = "gmac_rk3288",
+       .id     = UCLASS_ETH,
+       .of_match = rk3288_gmac_ids,
+       .ofdata_to_platdata = gmac_rk3288_ofdata_to_platdata,
+       .probe  = gmac_rk3288_probe,
+       .ops    = &designware_eth_ops,
+       .priv_auto_alloc_size = sizeof(struct dw_eth_dev),
+       .platdata_auto_alloc_size = sizeof(struct gmac_rk3288_platdata),
+       .flags = DM_FLAG_ALLOC_PRIV_DMA,
+};
--

2.7.0

Hi Sjoerd,

Quoted 1 line · Sjoerd Simons

Quoted 11 lines

?

drivers/net/gmac_rk3288.c new file +0 -0

new file mode 100644
index 0000000..5400b2c
@@ -0,0 +1,125 @@

?
+???????priv->fix_mac_speed = gmac_rk3288_fix_mac_speed; +
+???????return designware_eth_probe(dev);

This presumably called gmac_rk3288_fix_mac_speed(). Is it possible to split the init so that you can call gmac_rk3288_fix_mac_speed() directly here?

Quoted 13 lines · Simon Glass

Hi Sjoerd,

Quoted 9 lines · Sjoerd Simons

drivers/net/gmac_rk3288.c new file +0 -0

new file mode 100644
index 0000000..5400b2c
@@ -0,0 +1,125 @@

Quoted 6 lines

drivers/net/gmac_rk3288.c line 107

Quoted 3 lines

drivers/net/gmac_rk3288.c new file +3 -0

+       priv->fix_mac_speed = gmac_rk3288_fix_mac_speed;
+
+       return designware_eth_probe(dev);

This presumably called gmac_rk3288_fix_mac_speed(). Is it possible to split the init so that you can call gmac_rk3288_fix_mac_speed() directly here?

No it gets called down the line from dw eth_ops start function once the ethernet driver is started and the phy speed is known so the mac can be adjust to match.

So to do it in the driver, it would need to override the eth start op from its parent. Possible by exporting more of the designwares implementation so specific ops can be overridden.

Seems less elegant then having a hook in the semantically right spot (e.g. after the link speed is determined)?

Ooi what's your worry with function pointers in DM ?

Add a definition for the gmac interface to the firefly device-tree. Copied verbatim from the linux kernel.

Signed-off-by Sjoerd Simons <[email protected]>

Acked-by Simon Glass <[email protected]>

---

Changes in v2: None

 arch/arm/dts/rk3288-firefly.dtsi | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

u-boot only recognize okay to enable a node (Linux seems to be more lenient here). So use okay instead.

Signed-off-by Sjoerd Simons <[email protected]>

---

Changes in v2: None

 arch/arm/dts/rk3288-rock2-square.dts | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Quoted 6 lines · Sjoerd Simons

u-boot only recognize okay to enable a node (Linux seems to be more lenient here). So use okay instead.

Signed-off-by Sjoerd Simons <[email protected]>

---

Quoted 4 lines

Changes in v2: None

 arch/arm/dts/rk3288-rock2-square.dts | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Reviewed-by Simon Glass <[email protected]>

Enable the various configuration option required to get the ethernet interface up and running on Radxa Rock2 and Firefly.

Signed-off-by Sjoerd Simons <[email protected]>

---

Changes in v2: None

 configs/firefly-rk3288_defconfig | 5 +++++
 configs/rock2_defconfig          | 5 +++++
 2 files changed, 10 insertions(+)