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ARM: i.MX6: SabreSD: Add dts support

PATCH Superseded Jagan Teki 3 participants 37 messages Apr 5, 2017 – May 12, 2017

Subsystems (2)
Arm (32-bit) Arm i.MX and Layerscape

v3 of 6 Superseded Latest is v6 →

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Jagan Teki

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#0 lore raw

v3 cover ARM: i.MX6: SabreSD: Add dts support

From: Jagan Teki <[email protected]>

This series has full possible dts support for SabreSD DualLite, Quad and Quad Plus and DCD code for DualLite has added in SPL code.

The main intention of this series is to add the dts node step by step and remove the legacy code at the end and to make the full functional dts.

Changes for v3:
- rebase on master
- Added patch 'ARM: i.MX6: sabresd: Cleanup board code'
- Added patch 'ARM: i.MX6DL: sabresd: Move DCD reginit on SPL'

Changes for v2:
- rebase on master
- Added new-patches.

U-Boot SPL 2017.03-33716-gcadc609 (Apr 06 2017 - 00:41:19) Trying to boot from MMC1

U-Boot 2017.03-33716-gcadc609 (Apr 06 2017 - 00:41:19 +0530)

CPU:   Freescale i.MX6QP rev1.0 996 MHz (running at 792 MHz)                                                  
CPU:   Automotive temperature grade (-40C to 125C) at 28C                                                     
Reset cause: POR                                                                                              
Model: Freescale i.MX6 Quad Plus SABRE Smart Device Board                                                     
DRAM:  1 GiB
MMC:   FSL_SDHC: 0, FSL_SDHC: 1, FSL_SDHC: 2
PCI:   pcie phy link never came up
No panel detected: default to Hannstar-XGA
Display: Hannstar-XGA (1024x768)
In:    serial
Out:   serial
Err:   serial
Net:   eth0: ethernet at 02188000
Hit any key to stop autoboot:  0

=>
=> dm tree
Class Probed Name
----------------------------------------

 root        [ + ]    root_driver
 thermal     [   ]    |-- imx_thermal
 simple_bus  [ + ]    `-- soc
 simple_bus  [ + ]        |-- aips-bus at 02000000
 simple_bus  [   ]        |   |-- spba-bus at 02000000
 gpio        [ + ]        |   |-- gpio at 0209c000
 gpio        [ + ]        |   |-- gpio at 020a0000
 gpio        [ + ]        |   |-- gpio at 020a4000
 gpio        [ + ]        |   |-- gpio at 020a8000
 gpio        [ + ]        |   |-- gpio at 020ac000
 gpio        [ + ]        |   |-- gpio at 020b0000
 gpio        [ + ]        |   |-- gpio at 020b4000
 simple_bus  [   ]        |   |-- anatop at 020c8000
 simple_bus  [   ]        |   |-- snvs at 020cc000
 pinctrl     [ + ]        |   `-- iomuxc at 020e0000
 pinconfig   [ + ]        |       `-- imx6qdl-sabresd
 pinconfig   [ + ]        |           |-- enetgrp
 pinconfig   [   ]        |           |-- i2c1grp
 pinconfig   [   ]        |           |-- i2c2grp
 pinconfig   [   ]        |           |-- i2c3grp
 pinconfig   [   ]        |           |-- uart1grp
 pinconfig   [   ]        |           |-- usbotggrp
 pinconfig   [ + ]        |           |-- usdhc2grp
 pinconfig   [ + ]        |           |-- usdhc3grp
 pinconfig   [ + ]        |           `-- usdhc4grp
 simple_bus  [ + ]        `-- aips-bus at 02100000
 usb         [   ]            |-- usb at 02184000
 usb         [   ]            |-- usb at 02184200
 eth         [ + ]            |-- ethernet at 02188000
 mmc         [ + ]            |-- usdhc at 02194000
 mmc         [ + ]            |-- usdhc at 02198000
 mmc         [ + ]            |-- usdhc at 0219c000
 i2c         [   ]            |-- i2c at 021a0000
 i2c         [   ]            |-- i2c at 021a4000
 pmic        [   ]            |   `-- pfuze100 at 08
 i2c         [   ]            `-- i2c at 021a8000

Tested: UART, MMC, I2C, FEC(with basic ping)

thanks!
Jagan.

Jagan Teki (31):
ARM: i.MX6: sabresd: Fix README - s/of=/dev/sdbbs=1K/of=/dev/sdb

    bs=1K/

ARM: dts: i.MX6: Add imx6qdl-sabresd.dtsi
ARM: dts: imx6qdl-sabresd: Add imx6q-sabresd.dts
ARM: i.MX6: sabresd: Remove SPL_I2C_SUPPORT
ARM: i.MX6Q: sabresd: Add initial devicetree support
ARM: dts: imx6qdl-sabresd: Add imx6qp-sabresd.dts
ARM: i.MX6QP: sabresd: Add initial devicetree support
ARM: i.MX6: sabresd: Move CONFIG_SYS_I2C_MXC to defconfigs
ARM: dts: imx6qdl-sabresd: Add I2C node's
ARM: dts: imx6qdl-sabresd: Add PMIC pfuze100 node
ARM: i.MX6: sabresd: Enable DM_I2C and DM_PMIC
ARM: i.MX6: sabresd: defconfig move - CONFIG_USB_EHCI(_MX6)
ARM: dts: imx6qdl-sabresd: Add usb host node
ARM: dts: imx6qdl-sabresd: Add usb otg node
ARM: i.MX6: sabresd: Enable CONFIG_DM_REGULATOR
ARM: i.MX6: sabresd: Enable DM_USB
ARM: dts: imx6qdl-sabresd: Add FEC node
ARM: i.MX6: sabresd: Move CONFIG_FEC_MXC to defconfigs
ARM: i.MX6: sabresd: Enable DM_ETH
ARM: i.MX6: sabresd: Add dm_gpio_* for backlight
ARM: i.MX6: sabresd: Add imx6_pcie_toggle_power
ARM: i.MX6: sabresd: Add imx6_pcie_toggle_reset
ARM: i.MX6DL: sabresd: Move DCD reginit on SPL
ARM: dts: imx6qdl-sabresd: Add imx6dl-sabresd.dts
ARM: i.MX6DL: sabresd: Add initial devicetree support
ARM: i.MX6: sabresd: Drop legacy non-fdt code
ARM: i.MX6: %s/mx6sabresd/imx6sabresd
ARM: i.MX6: sabresd: Move DM_* and OF_CONTROL to arch Kconfig
ARM: i.MX6: sabresd: Update README
ARM: i.MX6: sabresd: Drop checkboard
ARM: i.MX6: sabresd: Cleanup board code

 arch/arm/cpu/armv7/mx6/Kconfig                     |  10 +-
 arch/arm/dts/Makefile                              |   3 +
 arch/arm/dts/imx6dl-sabresd.dts                    |  17 +
 arch/arm/dts/imx6q-sabresd.dts                     |  21 +
 arch/arm/dts/imx6qdl-sabresd.dtsi                  | 235 ++++++
 arch/arm/dts/imx6qp-sabresd.dts                    |  85 +++
 .../freescale/{mx6sabresd => imx6sabresd}/Kconfig  |   4 +-
 board/freescale/imx6sabresd/MAINTAINERS            |   8 +
 .../freescale/{mx6sabresd => imx6sabresd}/Makefile |   2 +-
 board/freescale/imx6sabresd/README                 |  84 +++
 .../mx6sabresd.c => imx6sabresd/imx6sabresd.c}     | 785 ++++++++++-----------
 board/freescale/mx6sabresd/MAINTAINERS             |   8 -
 board/freescale/mx6sabresd/README                  | 103 ---
 board/freescale/mx6sabresd/mx6dlsabresd.cfg        | 131 ----
 board/freescale/mx6sabresd/mx6q_4x_mt41j128.cfg    | 169 -----
 ...lsabresd_defconfig => imx6dl_sabresd_defconfig} |  26 +-
 ...bresd_spl_defconfig => imx6q_sabresd_defconfig} |  13 +-
 ...qsabresd_defconfig => imx6qp_sabresd_defconfig} |  27 +-
 include/configs/{mx6sabresd.h => imx6sabresd.h}    |  25 +-
 include/configs/mx6sabre_common.h                  |   3 +-
 20 files changed, 882 insertions(+), 877 deletions(-)
 create mode 100644 arch/arm/dts/imx6dl-sabresd.dts
 create mode 100644 arch/arm/dts/imx6q-sabresd.dts
 create mode 100644 arch/arm/dts/imx6qdl-sabresd.dtsi
 create mode 100644 arch/arm/dts/imx6qp-sabresd.dts
 rename board/freescale/{mx6sabresd => imx6sabresd}/Kconfig (70%)
 create mode 100644 board/freescale/imx6sabresd/MAINTAINERS
 rename board/freescale/{mx6sabresd => imx6sabresd}/Makefile (86%)
 create mode 100644 board/freescale/imx6sabresd/README
 rename board/freescale/{mx6sabresd/mx6sabresd.c => imx6sabresd/imx6sabresd.c} (69%)
 delete mode 100644 board/freescale/mx6sabresd/MAINTAINERS
 delete mode 100644 board/freescale/mx6sabresd/README
 delete mode 100644 board/freescale/mx6sabresd/mx6dlsabresd.cfg
 delete mode 100644 board/freescale/mx6sabresd/mx6q_4x_mt41j128.cfg
 rename configs/{mx6dlsabresd_defconfig => imx6dl_sabresd_defconfig} (59%)
 rename configs/{mx6sabresd_spl_defconfig => imx6q_sabresd_defconfig} (82%)
 rename configs/{mx6qsabresd_defconfig => imx6qp_sabresd_defconfig} (57%)
 rename include/configs/{mx6sabresd.h => imx6sabresd.h} (71%)
Signature · 1 line
1.9.1
author
#1 lore raw

PATCH v3 1/31 ARM: i.MX6: sabresd: Fix README - s/of=/dev/sdbbs=1K/of=/dev/sdb bs=1K/

From: Jagan Teki <[email protected]>

Fix to give space on of and bs on dd command, on mx6sabresd README.

Cc Matteo Lisi <[email protected]>
Cc Michael Trimarchi <[email protected]>
Cc Stefano Babic <[email protected]>
Signed-off-by Jagan Teki <[email protected]>
---
 board/freescale/mx6sabresd/README | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
board/freescale/mx6sabresd/README +2 -2
index 5814b9d..43070e1 100644
@@ -45,7 +45,7 @@ $ sudo dd if=SPL of=/dev/sdb bs=1K seek=1 && sync
 
 - Flash the u-boot.img image into the SD card:
 
-$ sudo dd if=u-boot.img of=/dev/sdbbs=1K seek=69 && sync
+$ sudo dd if=u-boot.img of=/dev/sdb bs=1K seek=69 && sync
 
 
 3. Booting via Falcon mode

@@ -62,7 +62,7 @@ $ sudo dd if=SPL of=/dev/sdb bs=1K seek=1 oflag=sync status=none && sync
 
 - Flash the u-boot.img image into the SD card:
 
-$ sudo dd if=u-boot.img of=/dev/sdbbs=1K seek=69 oflag=sync status=none && sync
+$ sudo dd if=u-boot.img of=/dev/sdb bs=1K seek=69 oflag=sync status=none && sync
 
 Create a partition for root file system and extract it there:
Signature · 1 line
1.9.1
author
#2 lore raw

PATCH v3 2/31 ARM: dts: i.MX6: Add imx6qdl-sabresd.dtsi

In reply to Jagan Teki

From: Jagan Teki <[email protected]>

Add common minimal dtsi file for i.MX6QDL Sabresd boards,
- uart1
- usdhc2
- usdhc3
- usdhc4

Cc Stefano Babic <[email protected]>
Cc Fabio Estevam <[email protected]>
Cc Michael Trimarchi <[email protected]>
Signed-off-by Jagan Teki <[email protected]>
---
 arch/arm/dts/imx6qdl-sabresd.dtsi | 111 ++++++++++++++++++++++++++++++++++++++
 1 file changed, 111 insertions(+)
 create mode 100644 arch/arm/dts/imx6qdl-sabresd.dtsi
arch/arm/dts/imx6qdl-sabresd.dtsi new file +111 -0
new file mode 100644
index 0000000..1846274
@@ -0,0 +1,111 @@
+/*
+ * Copyright 2012 Freescale Semiconductor, Inc.
+ * Copyright 2011 Linaro Ltd.
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+	chosen {
+		stdout-path = &uart1;
+	};
+
+	memory {
+		reg = <0x10000000 0x40000000>;
+	};
+};
+
+&uart1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_uart1>;
+	status = "okay";
+};
+
+&usdhc2 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_usdhc2>;
+	bus-width = <8>;
+	cd-gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
+	wp-gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>;
+	status = "okay";
+};
+
+&usdhc3 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_usdhc3>;
+	bus-width = <8>;
+	cd-gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
+	wp-gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>;
+	status = "okay";
+};
+
+&usdhc4 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_usdhc4>;
+	bus-width = <8>;
+	non-removable;
+	no-1-8-v;
+	status = "okay";
+};
+
+&iomuxc {
+	pinctrl_uart1: uart1grp {
+		fsl,pins = <
+			MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA	0x1b0b1
+			MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA	0x1b0b1
+		>;
+	};
+
+
+	pinctrl_usdhc2: usdhc2grp {
+		fsl,pins = <
+			MX6QDL_PAD_SD2_CMD__SD2_CMD		0x17059
+			MX6QDL_PAD_SD2_CLK__SD2_CLK		0x10059
+			MX6QDL_PAD_SD2_DAT0__SD2_DATA0		0x17059
+			MX6QDL_PAD_SD2_DAT1__SD2_DATA1		0x17059
+			MX6QDL_PAD_SD2_DAT2__SD2_DATA2		0x17059
+			MX6QDL_PAD_SD2_DAT3__SD2_DATA3		0x17059
+			MX6QDL_PAD_NANDF_D4__SD2_DATA4		0x17059
+			MX6QDL_PAD_NANDF_D5__SD2_DATA5		0x17059
+			MX6QDL_PAD_NANDF_D6__SD2_DATA6		0x17059
+			MX6QDL_PAD_NANDF_D7__SD2_DATA7		0x17059
+		>;
+	};
+
+	pinctrl_usdhc3: usdhc3grp {
+		fsl,pins = <
+			MX6QDL_PAD_SD3_CMD__SD3_CMD		0x17059
+			MX6QDL_PAD_SD3_CLK__SD3_CLK		0x10059
+			MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x17059
+			MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x17059
+			MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x17059
+			MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x17059
+			MX6QDL_PAD_SD3_DAT4__SD3_DATA4		0x17059
+			MX6QDL_PAD_SD3_DAT5__SD3_DATA5		0x17059
+			MX6QDL_PAD_SD3_DAT6__SD3_DATA6		0x17059
+			MX6QDL_PAD_SD3_DAT7__SD3_DATA7		0x17059
+		>;
+	};
+
+	pinctrl_usdhc4: usdhc4grp {
+		fsl,pins = <
+			MX6QDL_PAD_SD4_CMD__SD4_CMD		0x17059
+			MX6QDL_PAD_SD4_CLK__SD4_CLK		0x10059
+			MX6QDL_PAD_SD4_DAT0__SD4_DATA0		0x17059
+			MX6QDL_PAD_SD4_DAT1__SD4_DATA1		0x17059
+			MX6QDL_PAD_SD4_DAT2__SD4_DATA2		0x17059
+			MX6QDL_PAD_SD4_DAT3__SD4_DATA3		0x17059
+			MX6QDL_PAD_SD4_DAT4__SD4_DATA4		0x17059
+			MX6QDL_PAD_SD4_DAT5__SD4_DATA5		0x17059
+			MX6QDL_PAD_SD4_DAT6__SD4_DATA6		0x17059
+			MX6QDL_PAD_SD4_DAT7__SD4_DATA7		0x17059
+		>;
+	};
+};
Signature · 1 line
1.9.1
author
#3 lore raw

PATCH v3 3/31 ARM: dts: imx6qdl-sabresd: Add imx6q-sabresd.dts

In reply to Jagan Teki

From: Jagan Teki <[email protected]>

Add initial dts support for i.MX6 Quad Sabresd board.

Cc Stefano Babic <[email protected]>
Cc Fabio Estevam <[email protected]>
Cc Michael Trimarchi <[email protected]>
Signed-off-by Jagan Teki <[email protected]>
---
 arch/arm/dts/Makefile          |  1 +
 arch/arm/dts/imx6q-sabresd.dts | 21 +++++++++++++++++++++
 2 files changed, 22 insertions(+)
 create mode 100644 arch/arm/dts/imx6q-sabresd.dts
arch/arm/dts/Makefile +1 -0
index aa0bd12..18b1ee6 100644
@@ -317,6 +317,7 @@ dtb-$(CONFIG_MX6) += imx6ull-14x14-evk.dtb \
 	imx6dl-icore-rqs.dtb \
 	imx6q-icore.dtb \
 	imx6q-icore-rqs.dtb \
+	imx6q-sabresd.dtb \
 	imx6sx-sabreauto.dtb \
 	imx6ul-geam-kit.dtb \
 	imx6ul-isiot-emmc.dtb \
arch/arm/dts/imx6q-sabresd.dts new file +21 -0
new file mode 100644
index 0000000..5e62c24
@@ -0,0 +1,21 @@
+/*
+ * Copyright 2012 Freescale Semiconductor, Inc.
+ * Copyright 2011 Linaro Ltd.
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/dts-v1/;
+
+#include "imx6q.dtsi"
+#include "imx6qdl-sabresd.dtsi"
+
+/ {
+	model = "Freescale i.MX6 Quad SABRE Smart Device Board";
+	compatible = "fsl,imx6q-sabresd", "fsl,imx6q";
+};
Signature · 1 line
1.9.1
author
#4 lore raw

PATCH v3 4/31 ARM: i.MX6: sabresd: Remove SPL_I2C_SUPPORT

In reply to Jagan Teki

From: Jagan Teki <[email protected]>

I2C support not needed for SPL build, hence removed the CONFIG_SPL_I2C_SUPPORT from mx6sabresd_spl_defconfig

Cc Stefano Babic <[email protected]>
Cc Fabio Estevam <[email protected]>
Cc Michael Trimarchi <[email protected]>
Signed-off-by Jagan Teki <[email protected]>
---
 configs/mx6sabresd_spl_defconfig | 1 -
 1 file changed, 1 deletion(-)
configs/mx6sabresd_spl_defconfig +0 -1
index 7a46a44..c89c3c6 100644
@@ -16,7 +16,6 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y
 CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
 CONFIG_SPL=y
 CONFIG_SPL_EXT_SUPPORT=y
-CONFIG_SPL_I2C_SUPPORT=y
 CONFIG_SPL_OS_BOOT=y
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
Signature · 1 line
1.9.1
author
#5 lore raw

PATCH v3 5/31 ARM: i.MX6Q: sabresd: Add initial devicetree support

In reply to Jagan Teki

From: Jagan Teki <[email protected]>

Add initial devicetree support for i.MX6 Quad Sabresd board.

The configs item are copied from configs/mx6sabresd_spl_defconfig and added
- CONFIG_OF_CONTROL=y
- CONFIG_DM_GPIO=y
- CONFIG_DM_MMC=y
- CONFIG_BLK is not set
- CONFIG_DM_MMC_OPS is not set
- CONFIG_PINCTRL=y
- CONFIG_PINCTRL_IMX6=y

Cc Stefano Babic <[email protected]>
Cc Fabio Estevam <[email protected]>
Cc Michael Trimarchi <[email protected]>
Signed-off-by Jagan Teki <[email protected]>
---
 board/freescale/mx6sabresd/MAINTAINERS  |   1 +
 board/freescale/mx6sabresd/mx6sabresd.c | 122 +++++++++++++++++++++-----------
 configs/imx6q_sabresd_defconfig         |  58 +++++++++++++++
 include/configs/mx6sabresd.h            |   4 ++
 4 files changed, 145 insertions(+), 40 deletions(-)
 create mode 100644 configs/imx6q_sabresd_defconfig
board/freescale/mx6sabresd/MAINTAINERS +1 -0
index add2314..434548a 100644
@@ -6,3 +6,4 @@ F:	include/configs/mx6sabresd.h
 F:	configs/mx6dlsabresd_defconfig
 F:	configs/mx6qsabresd_defconfig
 F:	configs/mx6sabresd_spl_defconfig
+F:	configs/imx6q_sabresd_defconfig
board/freescale/mx6sabresd/mx6sabresd.c +82 -40

150 lines not on this page · raw message

configs/imx6q_sabresd_defconfig new file +58 -0

58 lines not on this page · raw message

include/configs/mx6sabresd.h +4 -0
index 598ab9a..9885a5c 100644
@@ -11,6 +11,10 @@
 
 #ifdef CONFIG_SPL
 #include "imx6_spl.h"
+# ifdef CONFIG_SPL_BUILD
+#  undef CONFIG_DM_GPIO
+#  undef CONFIG_DM_MMC
+# endif
 #endif
 
 #define CONFIG_MACH_TYPE	3980
Signature · 1 line
1.9.1
author
#6 lore raw

PATCH v3 6/31 ARM: dts: imx6qdl-sabresd: Add imx6qp-sabresd.dts

In reply to Jagan Teki

From: Jagan Teki <[email protected]>

Add initial dts support for i.MX6 Quad Plus Sabresd board.

Cc Stefano Babic <[email protected]>
Cc Fabio Estevam <[email protected]>
Cc Michael Trimarchi <[email protected]>
Signed-off-by Jagan Teki <[email protected]>
---
 arch/arm/dts/Makefile             |  1 +
 arch/arm/dts/imx6qdl-sabresd.dtsi | 96 ++++++++++++++++++++-------------------
 arch/arm/dts/imx6qp-sabresd.dts   | 85 ++++++++++++++++++++++++++++++++++
 3 files changed, 135 insertions(+), 47 deletions(-)
 create mode 100644 arch/arm/dts/imx6qp-sabresd.dts
arch/arm/dts/Makefile +1 -0
index 18b1ee6..b6042f3 100644
@@ -318,6 +318,7 @@ dtb-$(CONFIG_MX6) += imx6ull-14x14-evk.dtb \
 	imx6q-icore.dtb \
 	imx6q-icore-rqs.dtb \
 	imx6q-sabresd.dtb \
+	imx6qp-sabresd.dtb \
 	imx6sx-sabreauto.dtb \
 	imx6ul-geam-kit.dtb \
 	imx6ul-isiot-emmc.dtb \
arch/arm/dts/imx6qdl-sabresd.dtsi +49 -47

105 lines not on this page · raw message

arch/arm/dts/imx6qp-sabresd.dts new file +85 -0

85 lines not on this page · raw message

Signature · 1 line
1.9.1
author
#7 lore raw

PATCH v3 7/31 ARM: i.MX6QP: sabresd: Add initial devicetree support

In reply to Jagan Teki

From: Jagan Teki <[email protected]>

Add initial dts support for i.MX6 Quad Plus Sabresd board.

Boot from MMC:
-------------
U-Boot SPL 2017.03-33690-ga80e4f6-dirty (Mar 30 2017 - 00:40:29) Trying to boot from MMC1

U-Boot 2017.03-33690-ga80e4f6-dirty (Mar 30 2017 - 00:40:29 +0530)

CPU:   Freescale i.MX6QP rev1.0 996 MHz (running at 792 MHz)
CPU:   Automotive temperature grade (-40C to 125C) at 29C
Reset cause: POR
Model: Freescale i.MX6 Quad Plus SABRE Smart Device Board
Board: MX6-SabreSD
I2C:   ready
DRAM:  1 GiB
PMIC:  PFUZE100 ID=0x10
MMC:   FSL_SDHC: 0, FSL_SDHC: 1, FSL_SDHC: 2

*** Warning - bad CRC, using default environment

gpio at 020a4000: dir_output: error: gpio GPIO3_19 not reserved
gpio at 020a4000: set_value: error: gpio GPIO3_19 not reserved
gpio at 020b4000: dir_output: error: gpio GPIO7_12 not reserved
gpio at 020b4000: set_value: error: gpio GPIO7_12 not reserved
PCI:   pcie phy link never came up
No panel detected: default to Hannstar-XGA
gpio at 0209c000: dir_output: error: gpio GPIO1_21 not reserved
Display: Hannstar-XGA (1024x768)
In:    serial
Out:   serial
Err:   serial
Net:   gpio at 0209c000: dir_output: error: gpio GPIO1_25 not reserved
gpio at 0209c000: set_value: error: gpio GPIO1_25 not reserved

FEC [PRIME]
Hit any key to stop autoboot: 0
=>

Cc Stefano Babic <[email protected]>
Cc Fabio Estevam <[email protected]>
Cc Michael Trimarchi <[email protected]>
Signed-off-by Jagan Teki <[email protected]>
---
 board/freescale/mx6sabresd/MAINTAINERS |  1 +
 configs/imx6qp_sabresd_defconfig       | 59 ++++++++++++++++++++++++++++++++++
 2 files changed, 60 insertions(+)
 create mode 100644 configs/imx6qp_sabresd_defconfig
board/freescale/mx6sabresd/MAINTAINERS +1 -0
index 434548a..40507f8 100644
@@ -7,3 +7,4 @@ F:	configs/mx6dlsabresd_defconfig
 F:	configs/mx6qsabresd_defconfig
 F:	configs/mx6sabresd_spl_defconfig
 F:	configs/imx6q_sabresd_defconfig
+F:	configs/imx6qp_sabresd_defconfig
configs/imx6qp_sabresd_defconfig new file +59 -0

59 lines not on this page · raw message

Signature · 1 line
1.9.1
author
#8 lore raw

PATCH v3 8/31 ARM: i.MX6: sabresd: Move CONFIG_SYS_I2C_MXC to defconfigs

In reply to Jagan Teki

From: Jagan Teki <[email protected]>

Moved CONFIG_SYS_I2C_MXC from include/configs/mxsabresd.h to imx6 sabresd defconfigs.

Cc Stefano Babic <[email protected]>
Cc Fabio Estevam <[email protected]>
Cc Michael Trimarchi <[email protected]>
Signed-off-by Jagan Teki <[email protected]>
---
 configs/imx6q_sabresd_defconfig  | 1 +
 configs/imx6qp_sabresd_defconfig | 1 +
 configs/mx6dlsabresd_defconfig   | 1 +
 configs/mx6qsabresd_defconfig    | 1 +
 configs/mx6sabresd_spl_defconfig | 1 +
 include/configs/mx6sabresd.h     | 3 ++-
 6 files changed, 7 insertions(+), 1 deletion(-)
configs/imx6q_sabresd_defconfig +1 -0
index c6d4462..e1bea93 100644
@@ -54,5 +54,6 @@ CONFIG_DM_GPIO=y
 CONFIG_DM_MMC=y
 # CONFIG_BLK is not set
 # CONFIG_DM_MMC_OPS is not set
+CONFIG_SYS_I2C_MXC=y
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_IMX6=y
configs/imx6qp_sabresd_defconfig +1 -0
index 430c34b..0d51c2b 100644
@@ -55,5 +55,6 @@ CONFIG_DM_GPIO=y
 CONFIG_DM_MMC=y
 # CONFIG_BLK is not set
 # CONFIG_DM_MMC_OPS is not set
+CONFIG_SYS_I2C_MXC=y
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_IMX6=y
configs/mx6dlsabresd_defconfig +1 -0
index 0254a53..56f629f 100644
@@ -42,3 +42,4 @@ CONFIG_G_DNL_VENDOR_NUM=0x0525
 CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
 # CONFIG_VIDEO_SW_CURSOR is not set
 CONFIG_OF_LIBFDT=y
+CONFIG_SYS_I2C_MXC=y
configs/mx6qsabresd_defconfig +1 -0
index cef7f1a..e598dc8 100644
@@ -42,3 +42,4 @@ CONFIG_G_DNL_VENDOR_NUM=0x0525
 CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
 # CONFIG_VIDEO_SW_CURSOR is not set
 CONFIG_OF_LIBFDT=y
+CONFIG_SYS_I2C_MXC=y
configs/mx6sabresd_spl_defconfig +1 -0
index c89c3c6..d52e48f 100644
@@ -48,3 +48,4 @@ CONFIG_G_DNL_VENDOR_NUM=0x0525
 CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
 # CONFIG_VIDEO_SW_CURSOR is not set
 CONFIG_OF_LIBFDT=y
+CONFIG_SYS_I2C_MXC=y
include/configs/mx6sabresd.h +2 -1
index 9885a5c..7c0e7a5 100644
@@ -52,12 +52,13 @@
 #endif
 
 /* I2C Configs */
+#ifdef CONFIG_SYS_I2C_MXC
 #define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_MXC
 #define CONFIG_SYS_I2C_MXC_I2C1		/* enable I2C bus 1 */
 #define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */
 #define CONFIG_SYS_I2C_MXC_I2C3		/* enable I2C bus 3 */
 #define CONFIG_SYS_I2C_SPEED		  100000
+#endif
 
 /* PMIC */
 #define CONFIG_POWER
Signature · 1 line
1.9.1
author
#9 lore raw

PATCH v3 9/31 ARM: dts: imx6qdl-sabresd: Add I2C node's

In reply to Jagan Teki

From: Jagan Teki <[email protected]>

Add I2C nodes for i.MX6QDL sabresd boards.

Cc Stefano Babic <[email protected]>
Cc Fabio Estevam <[email protected]>
Cc Michael Trimarchi <[email protected]>
Signed-off-by Jagan Teki <[email protected]>
---
 arch/arm/dts/imx6qdl-sabresd.dtsi | 42 +++++++++++++++++++++++++++++++++++++++
 1 file changed, 42 insertions(+)
arch/arm/dts/imx6qdl-sabresd.dtsi +42 -0
index 2986cb4..491fdbf 100644
@@ -22,6 +22,27 @@
 	};
 };
 
+&i2c1 {
+	clock-frequency = <100000>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_i2c1>;
+	status = "okay";
+};
+
+&i2c2 {
+	clock-frequency = <100000>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_i2c2>;
+	status = "okay";
+};
+
+&i2c3 {
+	clock-frequency = <100000>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_i2c3>;
+	status = "okay";
+};
+
 &uart1 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_uart1>;

@@ -57,6 +78,27 @@
 
 &iomuxc {
 	imx6qdl-sabresd {
+		pinctrl_i2c1: i2c1grp {
+			fsl,pins = <
+				MX6QDL_PAD_CSI0_DAT8__I2C1_SDA		0x4001b8b1
+				MX6QDL_PAD_CSI0_DAT9__I2C1_SCL		0x4001b8b1
+			>;
+		};
+
+		pinctrl_i2c2: i2c2grp {
+			fsl,pins = <
+				MX6QDL_PAD_KEY_COL3__I2C2_SCL		0x4001b8b1
+				MX6QDL_PAD_KEY_ROW3__I2C2_SDA		0x4001b8b1
+			>;
+		};
+
+		pinctrl_i2c3: i2c3grp {
+			fsl,pins = <
+				MX6QDL_PAD_GPIO_3__I2C3_SCL		0x4001b8b1
+				MX6QDL_PAD_GPIO_6__I2C3_SDA		0x4001b8b1
+			>;
+		};
+
 		pinctrl_uart1: uart1grp {
 			fsl,pins = <
 				MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA	0x1b0b1
Signature · 1 line
1.9.1
author
#10 lore raw

PATCH v3 10/31 ARM: dts: imx6qdl-sabresd: Add PMIC pfuze100 node

In reply to Jagan Teki

From: Jagan Teki <[email protected]>

Add PMIC pfuze100 node via i2c2 for i.MX6QDL sabresd boards.

Cc Stefano Babic <[email protected]>
Cc Fabio Estevam <[email protected]>
Cc Michael Trimarchi <[email protected]>
Signed-off-by Jagan Teki <[email protected]>
---
 arch/arm/dts/imx6qdl-sabresd.dtsi | 5 +++++
 1 file changed, 5 insertions(+)
arch/arm/dts/imx6qdl-sabresd.dtsi +5 -0
index 491fdbf..4afa108 100644
@@ -34,6 +34,11 @@
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_i2c2>;
 	status = "okay";
+
+	pmic: pfuze100 at 08 {
+		compatible = "fsl,pfuze100";
+		reg = <0x08>;
+	};
 };
 
 &i2c3 {
Signature · 1 line
1.9.1
author
#11 lore raw

PATCH v3 11/31 ARM: i.MX6: sabresd: Enable DM_I2C and DM_PMIC

In reply to Jagan Teki

From: Jagan Teki <[email protected]>

Enable DM_I2C, DM_PMIC and DM_PMIC_PFUZE100 for dt supported sabresd config boards:
- imx6q_sabresd_defconfig
- imx6qp_sabresd_defconfig

I2C Log:
--------
=> i2c bus

Bus 0:  i2c at 021a0000
Bus 1:  i2c at 021a4000

08: pfuze100 at 08, offset len 1, flags 0
Bus 2: i2c at 021a8000
=> i2c dev 1
Setting bus to 1
=> i2c speed 100000
Setting bus speed to 100000 Hz
=> i2c probe
Valid chip addresses: 08 48
=> i2c md 08 0x0 0x20
0000: 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 ................
0010: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
=> i2c md 48 0x0 0x20
0000: 00 f0 00 00 00 00 00 00 00 00 00 80 70 41 41 41 ............pAAA
0010: 00 00 00 80 70 41 41 41 41 41 41 41 41 41 41 41 ....pAAAAAAAAAAA

Cc Stefano Babic <[email protected]>
Cc Fabio Estevam <[email protected]>
Cc Michael Trimarchi <[email protected]>
Signed-off-by Jagan Teki <[email protected]>
---
 board/freescale/mx6sabresd/mx6sabresd.c | 7 ++++++-
 configs/imx6q_sabresd_defconfig         | 3 +++
 configs/imx6qp_sabresd_defconfig        | 3 +++
 include/configs/mx6sabresd.h            | 4 +++-
 4 files changed, 15 insertions(+), 2 deletions(-)
board/freescale/mx6sabresd/mx6sabresd.c +6 -1
index db25dad..5776b39 100644
@@ -202,6 +202,7 @@ static void enable_lvds(struct display_info_t const *dev)
 	enable_backlight();
 }
 
+#ifndef CONFIG_DM_I2C
 static struct i2c_pads_info i2c_pad_info1 = {
 	.scl = {
 		.i2c_mode = MX6_PAD_KEY_COL3__I2C2_SCL | I2C_PAD,

@@ -214,6 +215,7 @@ static struct i2c_pads_info i2c_pad_info1 = {
 		.gp = IMX_GPIO_NR(4, 13)
 	}
 };
+#endif
 
 static void setup_spi(void)
 {

@@ -594,8 +596,9 @@ int board_init(void)
 #ifdef CONFIG_MXC_SPI
 	setup_spi();
 #endif
+#ifndef CONFIG_DM_I2C
 	setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1);
-
+#endif
 #ifdef CONFIG_USB_EHCI_MX6
 	setup_usb();
 #endif

@@ -603,6 +606,7 @@ int board_init(void)
 	return 0;
 }
 
+#ifndef CONFIG_DM_PMIC
 int power_init_board(void)
 {
 	struct pmic *p;

@@ -631,6 +635,7 @@ int power_init_board(void)
 
 	return 0;
 }
+#endif
 
 #ifdef CONFIG_MXC_SPI
 int board_spi_cs_gpio(unsigned bus, unsigned cs)
configs/imx6q_sabresd_defconfig +3 -0
index e1bea93..2076418 100644
@@ -50,10 +50,13 @@ CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
 # CONFIG_VIDEO_SW_CURSOR is not set
 CONFIG_OF_LIBFDT=y
 CONFIG_OF_CONTROL=y
+CONFIG_DM_I2C=y
 CONFIG_DM_GPIO=y
 CONFIG_DM_MMC=y
+CONFIG_DM_PMIC=y
 # CONFIG_BLK is not set
 # CONFIG_DM_MMC_OPS is not set
+CONFIG_DM_PMIC_PFUZE100=y
 CONFIG_SYS_I2C_MXC=y
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_IMX6=y
configs/imx6qp_sabresd_defconfig +3 -0
index 0d51c2b..f75ab70 100644
@@ -51,10 +51,13 @@ CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
 # CONFIG_VIDEO_SW_CURSOR is not set
 CONFIG_OF_LIBFDT=y
 CONFIG_OF_CONTROL=y
+CONFIG_DM_I2C=y
 CONFIG_DM_GPIO=y
 CONFIG_DM_MMC=y
+CONFIG_DM_PMIC=y
 # CONFIG_BLK is not set
 # CONFIG_DM_MMC_OPS is not set
+CONFIG_DM_PMIC_PFUZE100=y
 CONFIG_SYS_I2C_MXC=y
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_IMX6=y
include/configs/mx6sabresd.h +3 -1
index 7c0e7a5..6ece575 100644
@@ -52,7 +52,7 @@
 #endif
 
 /* I2C Configs */
-#ifdef CONFIG_SYS_I2C_MXC
+#if defined(CONFIG_SYS_I2C_MXC) && !defined(CONFIG_DM_I2C)
 #define CONFIG_SYS_I2C
 #define CONFIG_SYS_I2C_MXC_I2C1		/* enable I2C bus 1 */
 #define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */

@@ -61,10 +61,12 @@
 #endif
 
 /* PMIC */
+#ifndef CONFIG_DM_PMIC_PFUZE100
 #define CONFIG_POWER
 #define CONFIG_POWER_I2C
 #define CONFIG_POWER_PFUZE100
 #define CONFIG_POWER_PFUZE100_I2C_ADDR	0x08
+#endif
 
 /* USB Configs */
 #ifdef CONFIG_CMD_USB
Signature · 1 line
1.9.1
author
#12 lore raw

PATCH v3 12/31 ARM: i.MX6: sabresd: defconfig move - CONFIG_USB_EHCI(_MX6)

In reply to Jagan Teki

From: Jagan Teki <[email protected]>

Defconfig move on i.MX6 Sabresd boards:
- CONFIG_USB_EHCI as CONFIG_USB_EHCI_HCD
- CONFIG_USB_EHCI_MX6

Cc Stefano Babic <[email protected]>
Cc Fabio Estevam <[email protected]>
Cc Michael Trimarchi <[email protected]>
Signed-off-by Jagan Teki <[email protected]>
---
 configs/imx6q_sabresd_defconfig  | 2 ++
 configs/imx6qp_sabresd_defconfig | 2 ++
 configs/mx6dlsabresd_defconfig   | 2 ++
 configs/mx6qsabresd_defconfig    | 2 ++
 configs/mx6sabresd_spl_defconfig | 2 ++
 include/configs/mx6sabresd.h     | 4 +---
 6 files changed, 11 insertions(+), 3 deletions(-)
configs/imx6q_sabresd_defconfig +2 -0
index 2076418..5e26409 100644
@@ -40,6 +40,8 @@ CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PCI=y
 CONFIG_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_MX6=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
 CONFIG_CI_UDC=y
configs/imx6qp_sabresd_defconfig +2 -0
index f75ab70..59faf57 100644
@@ -41,6 +41,8 @@ CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PCI=y
 CONFIG_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_MX6=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
 CONFIG_CI_UDC=y
configs/mx6dlsabresd_defconfig +2 -0
index 56f629f..64a024b 100644
@@ -33,6 +33,8 @@ CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PCI=y
 CONFIG_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_MX6=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
 CONFIG_CI_UDC=y
configs/mx6qsabresd_defconfig +2 -0
index e598dc8..8617094 100644
@@ -33,6 +33,8 @@ CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PCI=y
 CONFIG_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_MX6=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
 CONFIG_CI_UDC=y
configs/mx6sabresd_spl_defconfig +2 -0
index d52e48f..c3eb03c 100644
@@ -39,6 +39,8 @@ CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PCI=y
 CONFIG_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_MX6=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
 CONFIG_CI_UDC=y
include/configs/mx6sabresd.h +1 -3
index 6ece575..6abe7a4 100644
@@ -69,9 +69,7 @@
 #endif
 
 /* USB Configs */
-#ifdef CONFIG_CMD_USB
-#define CONFIG_USB_EHCI
-#define CONFIG_USB_EHCI_MX6
+#ifdef CONFIG_USB_EHCI_MX6
 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
 #define CONFIG_USB_HOST_ETHER
 #define CONFIG_USB_ETHER_ASIX
Signature · 1 line
1.9.1
author
#13 lore raw

PATCH v3 13/31 ARM: dts: imx6qdl-sabresd: Add usb host node

In reply to Jagan Teki

From: Jagan Teki <[email protected]>

Add usb host node for i.MX6QDL sabresd boards.

Cc Stefano Babic <[email protected]>
Cc Fabio Estevam <[email protected]>
Cc Michael Trimarchi <[email protected]>
Signed-off-by Jagan Teki <[email protected]>
---
 arch/arm/dts/imx6qdl-sabresd.dtsi | 23 +++++++++++++++++++++++
 1 file changed, 23 insertions(+)
arch/arm/dts/imx6qdl-sabresd.dtsi +23 -0
index 4afa108..e38e370 100644
@@ -20,6 +20,17 @@
 	memory {
 		reg = <0x10000000 0x40000000>;
 	};
+
+	reg_usb_h1_vbus: regulator at 1 {
+		compatible = "regulator-fixed";
+		reg = <1>;
+		regulator-name = "usb_h1_vbus";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		gpio = <&gpio1 29 0>;
+		enable-active-high;
+		vin-supply = <&swbst_reg>;
+	};
 };
 
 &i2c1 {

@@ -38,6 +49,13 @@
 	pmic: pfuze100 at 08 {
 		compatible = "fsl,pfuze100";
 		reg = <0x08>;
+
+		regulators {
+			swbst_reg: swbst {
+				regulator-min-microvolt = <5000000>;
+				regulator-max-microvolt = <5150000>;
+			};
+		};
 	};
 };
 

@@ -54,6 +72,11 @@
 	status = "okay";
 };
 
+&usbh1 {
+	vbus-supply = <&reg_usb_h1_vbus>;
+	status = "okay";
+};
+
 &usdhc2 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_usdhc2>;
Signature · 1 line
1.9.1
author
#14 lore raw

PATCH v3 14/31 ARM: dts: imx6qdl-sabresd: Add usb otg node

In reply to Jagan Teki

From: Jagan Teki <[email protected]>

Add usb otg node for i.MX6QDL sabresd boards.

Cc Stefano Babic <[email protected]>
Cc Fabio Estevam <[email protected]>
Cc Michael Trimarchi <[email protected]>
Signed-off-by Jagan Teki <[email protected]>
---
 arch/arm/dts/imx6qdl-sabresd.dtsi | 23 +++++++++++++++++++++++
 1 file changed, 23 insertions(+)
arch/arm/dts/imx6qdl-sabresd.dtsi +23 -0
index e38e370..0e104c1 100644
@@ -21,6 +21,17 @@
 		reg = <0x10000000 0x40000000>;
 	};
 
+	reg_usb_otg_vbus: regulator at 0 {
+		compatible = "regulator-fixed";
+		reg = <0>;
+		regulator-name = "usb_otg_vbus";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		gpio = <&gpio3 22 0>;
+		enable-active-high;
+		vin-supply = <&swbst_reg>;
+	};
+
 	reg_usb_h1_vbus: regulator at 1 {
 		compatible = "regulator-fixed";
 		reg = <1>;

@@ -77,6 +88,13 @@
 	status = "okay";
 };
 
+&usbotg {
+	vbus-supply = <&reg_usb_otg_vbus>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_usbotg>;
+	status = "okay";
+};
+
 &usdhc2 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_usdhc2>;

@@ -134,6 +152,11 @@
 			>;
 		};
 
+		pinctrl_usbotg: usbotggrp {
+			fsl,pins = <
+				MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID	0x17059
+			>;
+		};
 
 		pinctrl_usdhc2: usdhc2grp {
 			fsl,pins = <
Signature · 1 line
1.9.1
author
#15 lore raw

PATCH v3 15/31 ARM: i.MX6: sabresd: Enable CONFIG_DM_REGULATOR

In reply to Jagan Teki

From: Jagan Teki <[email protected]>

Enable CONFIG_DM_REGULATOR for i.MX6QDL sabresd boards.

Cc Stefano Babic <[email protected]>
Cc Fabio Estevam <[email protected]>
Cc Michael Trimarchi <[email protected]>
Signed-off-by Jagan Teki <[email protected]>
---
 configs/imx6q_sabresd_defconfig  | 1 +
 configs/imx6qp_sabresd_defconfig | 1 +
 2 files changed, 2 insertions(+)
configs/imx6q_sabresd_defconfig +1 -0
index 5e26409..84e34f1 100644
@@ -56,6 +56,7 @@ CONFIG_DM_I2C=y
 CONFIG_DM_GPIO=y
 CONFIG_DM_MMC=y
 CONFIG_DM_PMIC=y
+CONFIG_DM_REGULATOR=y
 # CONFIG_BLK is not set
 # CONFIG_DM_MMC_OPS is not set
 CONFIG_DM_PMIC_PFUZE100=y
configs/imx6qp_sabresd_defconfig +1 -0
index 59faf57..f0be6ea 100644
@@ -57,6 +57,7 @@ CONFIG_DM_I2C=y
 CONFIG_DM_GPIO=y
 CONFIG_DM_MMC=y
 CONFIG_DM_PMIC=y
+CONFIG_DM_REGULATOR=y
 # CONFIG_BLK is not set
 # CONFIG_DM_MMC_OPS is not set
 CONFIG_DM_PMIC_PFUZE100=y
Signature · 1 line
1.9.1
author
#16 lore raw

PATCH v3 16/31 ARM: i.MX6: sabresd: Enable DM_USB

In reply to Jagan Teki

From: Jagan Teki <[email protected]>

Enable DM_USB for dt supported sabresd config boards:
- imx6q_sabresd_defconfig
- imx6qp_sabresd_defconfig

Cc Stefano Babic <[email protected]>
Cc Fabio Estevam <[email protected]>
Cc Michael Trimarchi <[email protected]>
Signed-off-by Jagan Teki <[email protected]>
---
 board/freescale/mx6sabresd/mx6sabresd.c | 4 ++--
 configs/imx6q_sabresd_defconfig         | 1 +
 configs/imx6qp_sabresd_defconfig        | 1 +
 include/configs/mx6sabresd.h            | 9 ++++++---
 4 files changed, 10 insertions(+), 5 deletions(-)
board/freescale/mx6sabresd/mx6sabresd.c +2 -2
index 5776b39..a143dbb 100644
@@ -515,7 +515,7 @@ int board_eth_init(bd_t *bis)
 	return cpu_eth_init(bis);
 }
 
-#ifdef CONFIG_USB_EHCI_MX6
+#if defined(CONFIG_USB_EHCI_MX6) && !defined(CONFIG_DM_USB)
 #define USB_OTHERREGS_OFFSET	0x800
 #define UCTRL_PWR_POL		(1 << 9)
 

@@ -599,7 +599,7 @@ int board_init(void)
 #ifndef CONFIG_DM_I2C
 	setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1);
 #endif
-#ifdef CONFIG_USB_EHCI_MX6
+#if defined(CONFIG_USB_EHCI_MX6) && !defined(CONFIG_DM_USB)
 	setup_usb();
 #endif
configs/imx6q_sabresd_defconfig +1 -0
index 84e34f1..9ac3c9c 100644
@@ -57,6 +57,7 @@ CONFIG_DM_GPIO=y
 CONFIG_DM_MMC=y
 CONFIG_DM_PMIC=y
 CONFIG_DM_REGULATOR=y
+CONFIG_DM_USB=y
 # CONFIG_BLK is not set
 # CONFIG_DM_MMC_OPS is not set
 CONFIG_DM_PMIC_PFUZE100=y
configs/imx6qp_sabresd_defconfig +1 -0
index f0be6ea..a01482c 100644
@@ -58,6 +58,7 @@ CONFIG_DM_GPIO=y
 CONFIG_DM_MMC=y
 CONFIG_DM_PMIC=y
 CONFIG_DM_REGULATOR=y
+CONFIG_DM_USB=y
 # CONFIG_BLK is not set
 # CONFIG_DM_MMC_OPS is not set
 CONFIG_DM_PMIC_PFUZE100=y
include/configs/mx6sabresd.h +6 -3
index 6abe7a4..4f6bb1b 100644
@@ -70,12 +70,15 @@
 
 /* USB Configs */
 #ifdef CONFIG_USB_EHCI_MX6
-#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
 #define CONFIG_USB_HOST_ETHER
 #define CONFIG_USB_ETHER_ASIX
 #define CONFIG_MXC_USB_PORTSC		(PORT_PTS_UTMI | PORT_PTS_PTW)
-#define CONFIG_MXC_USB_FLAGS		0
-#define CONFIG_USB_MAX_CONTROLLER_COUNT	1 /* Enabled USB controller number */
+
+# ifndef CONFIG_DM_USB
+#  define CONFIG_MXC_USB_FLAGS		0
+#  define CONFIG_USB_MAX_CONTROLLER_COUNT	1 /* Enabled USB controller number */
+#  define CONFIG_EHCI_HCD_INIT_AFTER_RESET
+# endif
 #endif
 
 #endif                         /* __MX6QSABRESD_CONFIG_H */
Signature · 1 line
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#17 lore raw

PATCH v3 17/31 ARM: dts: imx6qdl-sabresd: Add FEC node

In reply to Jagan Teki

From: Jagan Teki <[email protected]>

Add FEC node for i.MX6QDL Sabresd boards.

Cc Stefano Babic <[email protected]>
Cc Fabio Estevam <[email protected]>
Cc Michael Trimarchi <[email protected]>
Signed-off-by Jagan Teki <[email protected]>
---
 arch/arm/dts/imx6qdl-sabresd.dtsi | 29 +++++++++++++++++++++++++++++
 1 file changed, 29 insertions(+)
arch/arm/dts/imx6qdl-sabresd.dtsi +29 -0
index 0e104c1..ca1aa58 100644
@@ -44,6 +44,14 @@
 	};
 };
 
+&fec {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_enet>;
+	phy-mode = "rgmii";
+	phy-reset-gpios = <&gpio1 25 0>;
+	status = "okay";
+};
+
 &i2c1 {
 	clock-frequency = <100000>;
 	pinctrl-names = "default";

@@ -124,6 +132,27 @@
 
 &iomuxc {
 	imx6qdl-sabresd {
+		pinctrl_enet: enetgrp {
+			fsl,pins = <
+				MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x1b0b0
+				MX6QDL_PAD_ENET_MDC__ENET_MDC		0x1b0b0
+				MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x1b030
+				MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x1b030
+				MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x1b030
+				MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x1b030
+				MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x1b030
+				MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x1b030
+				MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x1b0b0
+				MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b030
+				MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x1b030
+				MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x1b030
+				MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1b030
+				MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1b030
+				MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x1b030
+				MX6QDL_PAD_GPIO_16__ENET_REF_CLK	0x4001b0a8
+			>;
+		};
+
 		pinctrl_i2c1: i2c1grp {
 			fsl,pins = <
 				MX6QDL_PAD_CSI0_DAT8__I2C1_SDA		0x4001b8b1
Signature · 1 line
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#18 lore raw

PATCH v3 18/31 ARM: i.MX6: sabresd: Move CONFIG_FEC_MXC to defconfigs

In reply to Jagan Teki

From: Jagan Teki <[email protected]>

Moved CONFIG_FEC_MXC from include/configs/mxsabresd.h to imx6 sabresd defconfigs.

Cc Stefano Babic <[email protected]>
Cc Fabio Estevam <[email protected]>
Cc Michael Trimarchi <[email protected]>
Signed-off-by Jagan Teki <[email protected]>
---
 configs/imx6q_sabresd_defconfig   | 1 +
 configs/imx6qp_sabresd_defconfig  | 1 +
 configs/mx6dlsabresd_defconfig    | 1 +
 configs/mx6qsabresd_defconfig     | 1 +
 configs/mx6sabresd_spl_defconfig  | 1 +
 include/configs/mx6sabre_common.h | 3 ++-
 6 files changed, 7 insertions(+), 1 deletion(-)
configs/imx6q_sabresd_defconfig +1 -0
index 9ac3c9c..377a489 100644
@@ -62,5 +62,6 @@ CONFIG_DM_USB=y
 # CONFIG_DM_MMC_OPS is not set
 CONFIG_DM_PMIC_PFUZE100=y
 CONFIG_SYS_I2C_MXC=y
+CONFIG_FEC_MXC=y
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_IMX6=y
configs/imx6qp_sabresd_defconfig +1 -0
index a01482c..037bd41 100644
@@ -63,5 +63,6 @@ CONFIG_DM_USB=y
 # CONFIG_DM_MMC_OPS is not set
 CONFIG_DM_PMIC_PFUZE100=y
 CONFIG_SYS_I2C_MXC=y
+CONFIG_FEC_MXC=y
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_IMX6=y
configs/mx6dlsabresd_defconfig +1 -0
index 64a024b..c61fcd2 100644
@@ -45,3 +45,4 @@ CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
 # CONFIG_VIDEO_SW_CURSOR is not set
 CONFIG_OF_LIBFDT=y
 CONFIG_SYS_I2C_MXC=y
+CONFIG_FEC_MXC=y
configs/mx6qsabresd_defconfig +1 -0
index 8617094..e9758e3 100644
@@ -45,3 +45,4 @@ CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
 # CONFIG_VIDEO_SW_CURSOR is not set
 CONFIG_OF_LIBFDT=y
 CONFIG_SYS_I2C_MXC=y
+CONFIG_FEC_MXC=y
configs/mx6sabresd_spl_defconfig +1 -0
index c3eb03c..bba77b6 100644
@@ -51,3 +51,4 @@ CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
 # CONFIG_VIDEO_SW_CURSOR is not set
 CONFIG_OF_LIBFDT=y
 CONFIG_SYS_I2C_MXC=y
+CONFIG_FEC_MXC=y
include/configs/mx6sabre_common.h +2 -1
index a2ab77a..19ef6dc 100644
@@ -21,7 +21,7 @@
 /* MMC Configs */
 #define CONFIG_SYS_FSL_ESDHC_ADDR      0
 
-#define CONFIG_FEC_MXC
+#ifdef CONFIG_FEC_MXC
 #define CONFIG_MII
 #define IMX_FEC_BASE			ENET_BASE_ADDR
 #define CONFIG_FEC_XCV_TYPE		RGMII

@@ -30,6 +30,7 @@
 
 #define CONFIG_PHYLIB
 #define CONFIG_PHY_ATHEROS
+#endif
 
 #ifdef CONFIG_CMD_SF
 #define CONFIG_MXC_SPI
Signature · 1 line
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author
#19 lore raw

PATCH v3 19/31 ARM: i.MX6: sabresd: Enable DM_ETH

In reply to Jagan Teki

From: Jagan Teki <[email protected]>

Enable DM_ETH for dt supported sabresd config boards:
- imx6q_sabresd_defconfig
- imx6qp_sabresd_defconfig

Cc Stefano Babic <[email protected]>
Cc Fabio Estevam <[email protected]>
Cc Michael Trimarchi <[email protected]>
Signed-off-by Jagan Teki <[email protected]>
---
 board/freescale/mx6sabresd/mx6sabresd.c | 6 ++++++
 configs/imx6q_sabresd_defconfig         | 1 +
 configs/imx6qp_sabresd_defconfig        | 1 +
 3 files changed, 8 insertions(+)
board/freescale/mx6sabresd/mx6sabresd.c +6 -0
index a143dbb..10bc7c6 100644
@@ -70,6 +70,7 @@ static iomux_v3_cfg_t const uart1_pads[] = {
 	MX6_PAD_CSI0_DAT11__UART1_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL),
 };
 
+#ifndef CONFIG_OF_CONTROL
 static iomux_v3_cfg_t const enet_pads[] = {
 	MX6_PAD_ENET_MDIO__ENET_MDIO		| MUX_PAD_CTRL(ENET_PAD_CTRL),
 	MX6_PAD_ENET_MDC__ENET_MDC		| MUX_PAD_CTRL(ENET_PAD_CTRL),

@@ -100,6 +101,7 @@ static void setup_iomux_enet(void)
 	gpio_set_value(IMX_GPIO_NR(1, 25), 1);
 	udelay(100);
 }
+#endif
 
 static iomux_v3_cfg_t const usdhc2_pads[] = {
 	MX6_PAD_SD2_CLK__SD2_CLK	| MUX_PAD_CTRL(USDHC_PAD_CTRL),

@@ -222,6 +224,7 @@ static void setup_spi(void)
 	imx_iomux_v3_setup_multiple_pads(ecspi1_pads, ARRAY_SIZE(ecspi1_pads));
 }
 
+#ifndef CONFIG_OF_CONTROL
 iomux_v3_cfg_t const pcie_pads[] = {
 	MX6_PAD_EIM_D19__GPIO3_IO19 | MUX_PAD_CTRL(NO_PAD_CTRL),	/* POWER */
 	MX6_PAD_GPIO_17__GPIO7_IO12 | MUX_PAD_CTRL(NO_PAD_CTRL),	/* RESET */

@@ -231,6 +234,7 @@ static void setup_pcie(void)
 {
 	imx_iomux_v3_setup_multiple_pads(pcie_pads, ARRAY_SIZE(pcie_pads));
 }
+#endif
 
 iomux_v3_cfg_t const di0_pads[] = {
 	MX6_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK,	/* DISP0_CLK */

@@ -507,6 +511,7 @@ int overwrite_console(void)
 	return 1;
 }
 
+#ifndef CONFIG_OF_CONTROL
 int board_eth_init(bd_t *bis)
 {
 	setup_iomux_enet();

@@ -514,6 +519,7 @@ int board_eth_init(bd_t *bis)
 
 	return cpu_eth_init(bis);
 }
+#endif
 
 #if defined(CONFIG_USB_EHCI_MX6) && !defined(CONFIG_DM_USB)
 #define USB_OTHERREGS_OFFSET	0x800
configs/imx6q_sabresd_defconfig +1 -0
index 377a489..8c7baee 100644
@@ -52,6 +52,7 @@ CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
 # CONFIG_VIDEO_SW_CURSOR is not set
 CONFIG_OF_LIBFDT=y
 CONFIG_OF_CONTROL=y
+CONFIG_DM_ETH=y
 CONFIG_DM_I2C=y
 CONFIG_DM_GPIO=y
 CONFIG_DM_MMC=y
configs/imx6qp_sabresd_defconfig +1 -0
index 037bd41..cccb7b1 100644
@@ -53,6 +53,7 @@ CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
 # CONFIG_VIDEO_SW_CURSOR is not set
 CONFIG_OF_LIBFDT=y
 CONFIG_OF_CONTROL=y
+CONFIG_DM_ETH=y
 CONFIG_DM_I2C=y
 CONFIG_DM_GPIO=y
 CONFIG_DM_MMC=y
Signature · 1 line
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author
#20 lore raw

PATCH v3 20/31 ARM: i.MX6: sabresd: Add dm_gpio_* for backlight

In reply to Jagan Teki

From: Jagan Teki <[email protected]>

For OF_CONTROL, gpio's need to configure through dm_gpio_* calls instead of non-dm gpio code, So add dm_gpio_* calls for dts supported code.

Cc Stefano Babic <[email protected]>
Cc Fabio Estevam <[email protected]>
Cc Michael Trimarchi <[email protected]>
Signed-off-by Jagan Teki <[email protected]>
---
 board/freescale/mx6sabresd/mx6sabresd.c | 22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)
board/freescale/mx6sabresd/mx6sabresd.c +22 -0
index 10bc7c6..1631dbc 100644
@@ -190,7 +190,29 @@ static iomux_v3_cfg_t const bl_pads[] = {
 static void enable_backlight(void)
 {
 	imx_iomux_v3_setup_multiple_pads(bl_pads, ARRAY_SIZE(bl_pads));
+
+#ifdef CONFIG_OF_CONTROL
+	struct gpio_desc backlight;
+	int ret;
+
+	/* Set Brightness to high */
+	ret = dm_gpio_lookup_name("GPIO1_21", &backlight);
+	if (ret) {
+		printf("Cannot get GPIO1_21\n");
+		return;
+	}
+
+	ret = dm_gpio_request(&backlight, "backlight");
+	if (ret) {
+		printf("Cannot request GPIO1_21\n");
+		return;
+	}
+
+	dm_gpio_set_dir_flags(&backlight, GPIOD_IS_OUT);
+	dm_gpio_set_value(&backlight, 1);
+#else
 	gpio_direction_output(DISP0_PWR_EN, 1);
+#endif
 }
 
 static void enable_rgb(struct display_info_t const *dev)
Signature · 1 line
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#21 lore raw

PATCH v3 21/31 ARM: i.MX6: sabresd: Add imx6_pcie_toggle_power

In reply to Jagan Teki

From: Jagan Teki <[email protected]>

Add imx6_pcie_toggle_power on board file using dm_gpio_* calls for OF_CONTROL configs.

Cc Stefano Babic <[email protected]>
Cc Fabio Estevam <[email protected]>
Cc Michael Trimarchi <[email protected]>
Signed-off-by Jagan Teki <[email protected]>
---
 board/freescale/mx6sabresd/mx6sabresd.c | 30 ++++++++++++++++++++++++++++++
 1 file changed, 30 insertions(+)
board/freescale/mx6sabresd/mx6sabresd.c +30 -0
index 1631dbc..f4e14be 100644
@@ -533,6 +533,36 @@ int overwrite_console(void)
 	return 1;
 }
 
+#ifdef CONFIG_OF_CONTROL
+int imx6_pcie_toggle_power(void)
+{
+#ifdef CONFIG_PCIE_IMX_POWER_GPIO
+	struct gpio_desc toggle;
+	int ret;
+
+	ret = dm_gpio_lookup_name("GPIO3_19", &toggle);
+	if (ret) {
+		printf("Cannot get GPIO3_19\n");
+		return ret;
+	}
+
+	ret = dm_gpio_request(&toggle, "toggle");
+	if (ret) {
+		printf("Cannot request GPIO3_19\n");
+		return ret;
+	}
+
+	dm_gpio_set_dir_flags(&toggle, GPIOD_IS_OUT);
+
+	dm_gpio_set_value(&toggle, 0);
+	mdelay(20);
+	dm_gpio_set_value(&toggle, 1);
+	mdelay(20);
+#endif
+	return 0;
+}
+#endif
+
 #ifndef CONFIG_OF_CONTROL
 int board_eth_init(bd_t *bis)
 {
Signature · 1 line
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#22 lore raw

PATCH v3 22/31 ARM: i.MX6: sabresd: Add imx6_pcie_toggle_reset

In reply to Jagan Teki

From: Jagan Teki <[email protected]>

Add imx6_pcie_toggle_reset on board file using dm_gpio_* calls for OF_CONTROL configs.

Cc Stefano Babic <[email protected]>
Cc Fabio Estevam <[email protected]>
Cc Michael Trimarchi <[email protected]>
Signed-off-by Jagan Teki <[email protected]>
---
 board/freescale/mx6sabresd/mx6sabresd.c | 31 +++++++++++++++++++++++++++++++
 1 file changed, 31 insertions(+)
board/freescale/mx6sabresd/mx6sabresd.c +31 -0
index f4e14be..67fc192 100644
@@ -561,6 +561,37 @@ int imx6_pcie_toggle_power(void)
 #endif
 	return 0;
 }
+
+int imx6_pcie_toggle_reset(void)
+{
+#ifdef CONFIG_PCIE_IMX_PERST_GPIO
+	struct gpio_desc reset;
+	int ret;
+
+	ret = dm_gpio_lookup_name("GPIO7_12", &reset);
+	if (ret) {
+		printf("Cannot get GPIO7_12\n");
+		return ret;
+	}
+
+	ret = dm_gpio_request(&reset, "reset");
+	if (ret) {
+		printf("Cannot request GPIO7_12\n");
+		return ret;
+	}
+
+	dm_gpio_set_dir_flags(&reset, GPIOD_IS_OUT);
+
+	dm_gpio_set_value(&reset, 0);
+	mdelay(20);
+	dm_gpio_set_value(&reset, 1);
+	mdelay(20);
+
+#else
+	puts("WARNING: Make sure the PCIe #PERST line is connected!\n");
+#endif
+	return 0;
+}
 #endif
 
 #ifndef CONFIG_OF_CONTROL
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#23 lore raw

PATCH v3 22/31 ARM: i.MX6: sabresd: Add imx6_pcie_toggle_reset

board/freescale/mx6sabresd/mx6sabresd.c int imx6_pcie_toggle_power(void) · line 571

Quoted 7 lines · Jagan Teki
board/freescale/mx6sabresd/mx6sabresd.c +7 -0
+int imx6_pcie_toggle_reset(void)
+{
+#ifdef CONFIG_PCIE_IMX_PERST_GPIO
+       struct gpio_desc reset;
+       int ret;
+
+       ret = dm_gpio_lookup_name("GPIO7_12", &reset);

It would be better to have device tree support in the imx pci driver then it could simply read the 'reset-gpio' property and do the reset.

#24 lore raw

PATCH v3 22/31 ARM: i.MX6: sabresd: Add imx6_pcie_toggle_reset

Quoted 12 lines · Fabio Estevam

board/freescale/mx6sabresd/mx6sabresd.c int imx6_pcie_toggle_power(void) · line 571

Quoted 7 lines · Jagan Teki
board/freescale/mx6sabresd/mx6sabresd.c +7 -0
+int imx6_pcie_toggle_reset(void)
+{
+#ifdef CONFIG_PCIE_IMX_PERST_GPIO
+       struct gpio_desc reset;
+       int ret;
+
+       ret = dm_gpio_lookup_name("GPIO7_12", &reset);

It would be better to have device tree support in the imx pci driver then it could simply read the 'reset-gpio' property and do the reset.

Thought of this, but will done later since pcie_imx need to convert into driver model.

thanks!

Signature · 4 lines
Jagan Teki
Free Software Engineer | www.openedev.com
U-Boot, Linux | Upstream Maintainer
Hyderabad, India.
author
#25 lore raw

PATCH v3 23/31 ARM: i.MX6DL: sabresd: Move DCD reginit on SPL

In reply to Jagan Teki

From: Jagan Teki <[email protected]>

DCD register initialization from mx6dlsabresd.cfg are moved to SPL code in mx6dl_dcd_table.

Now mx6sabresd SPL code support Dual Lite, Quad, Quad Plus.

mx6dl_dcd_table reginit as
- GPR io regs
- DRAM io regs,
- MMDC Calibration io regs
- dram sdcke0 (0x020e04a4) and sdcke1(0x020e04a8) are not available in original mx6dlsabresd.cfg but initialized to default values.

Cc Stefano Babic <[email protected]>
Cc Fabio Estevam <[email protected]>
Cc Michael Trimarchi <[email protected]>
Signed-off-by Jagan Teki <[email protected]>
---
 board/freescale/mx6sabresd/mx6sabresd.c | 64 ++++++++++++++++++++++++++++++++-
 1 file changed, 63 insertions(+), 1 deletion(-)
board/freescale/mx6sabresd/mx6sabresd.c +63 -1
index 67fc192..5595c08 100644
@@ -893,6 +893,66 @@ static void gpr_init(void)
 	}
 }
 
+static int mx6dl_dcd_table[] = {
+	/* GPR io regs */
+	0x020e0774, 0x000C0000,
+	0x020e076c, 0x00000030,
+	0x020e0760, 0x00020000,
+	0x020e0754, 0x00000000,
+	0x020e0750, 0x00020000,
+	0x020e074c, 0x00000030,
+	0x020e0748, 0x00000030,
+	0x020e078c, 0x00000030,
+	0x020e0784, 0x00000030,
+	0x020e0780, 0x00000030,
+	0x020e077c, 0x00000030,
+	0x020e0778, 0x00000030,
+	0x020e0770, 0x00000030,
+	0x020e0764, 0x00000030,
+
+	/* DRAM io regs */
+	0x020e04ac, 0x00000030,
+	0x020e04b0, 0x00000030,
+	0x020e0464, 0x00000030,
+	0x020e0490, 0x00000030,
+	0x020e0494, 0x00000030,
+	0x020e04a4, 0x00000030,
+	0x020e04a8, 0x00000030,
+	0x020e04a0, 0x00000000,
+	0x020e04b4, 0x00000030,
+	0x020e04b8, 0x00000030,
+	0x020e04bc, 0x00000030,
+	0x020e04c0, 0x00000030,
+	0x020e04c4, 0x00000030,
+	0x020e04c8, 0x00000030,
+	0x020e04cc, 0x00000030,
+	0x020e04d0, 0x00000030,
+	0x020e04d4, 0x00000030,
+	0x020e04d8, 0x00000030,
+	0x020e0470, 0x00000030,
+	0x020e0474, 0x00000030,
+	0x020e0478, 0x00000030,
+	0x020e047c, 0x00000030,
+	0x020e0480, 0x00000030,
+	0x020e0484, 0x00000030,
+	0x020e0488, 0x00000030,
+	0x020e048c, 0x00000030,
+
+	/* MMDC Calibration io regs */
+	0x021b080c, 0x001F001F,
+	0x021b0810, 0x001F001F,
+	0x021b480c, 0x001F001F,
+	0x021b4810, 0x001F001F,
+	0x021b083c, 0x4220021F,
+	0x021b0840, 0x0207017E,
+	0x021b483c, 0x4201020C,
+	0x021b4840, 0x01660172,
+	0x021b0848, 0x4A4D4E4D,
+	0x021b0850, 0x3F3C3D31,
+	0x021b4848, 0x4A4F5049,
+	0x021b4850, 0x3238372B,
+};
+
 static int mx6q_dcd_table[] = {
 	0x020e0798, 0x000C0000,
 	0x020e0758, 0x00000000,

@@ -1085,7 +1145,9 @@ static void ddr_init(int *table, int size)
 
 static void spl_dram_init(void)
 {
-	if (is_mx6dq())
+	if (is_mx6dl())
+		ddr_init(mx6dl_dcd_table, ARRAY_SIZE(mx6dl_dcd_table));
+	else if (is_mx6dq())
 		ddr_init(mx6q_dcd_table, ARRAY_SIZE(mx6q_dcd_table));
 	else if (is_mx6dqp())
 		ddr_init(mx6qp_dcd_table, ARRAY_SIZE(mx6qp_dcd_table));
Signature · 1 line
1.9.1
reviewer
#26 lore raw

PATCH v3 23/31 ARM: i.MX6DL: sabresd: Move DCD reginit on SPL

Hi Jagan,

Quoted 14 lines · Jagan Teki

From: Jagan Teki <[email protected]>

DCD register initialization from mx6dlsabresd.cfg are moved to SPL code in mx6dl_dcd_table.

Now mx6sabresd SPL code support Dual Lite, Quad, Quad Plus.

mx6dl_dcd_table reginit as
- GPR io regs
- DRAM io regs,
- MMDC Calibration io regs
- dram sdcke0 (0x020e04a4) and sdcke1(0x020e04a8) are not available in original mx6dlsabresd.cfg but initialized to default values.

Quoted 4 lines
Cc Stefano Babic <[email protected]>
Cc Fabio Estevam <[email protected]>
Cc Michael Trimarchi <[email protected]>
Signed-off-by Jagan Teki <[email protected]>

Have you tested this?

Last time I tried to convert imx6dl-sabresd to SPL it did not work, and I haven't had a chance to debug it.

#27 lore raw

PATCH v3 23/31 ARM: i.MX6DL: sabresd: Move DCD reginit on SPL

Quoted 22 lines · Fabio Estevam

Hi Jagan,

Quoted 14 lines · Jagan Teki

From: Jagan Teki <[email protected]>

DCD register initialization from mx6dlsabresd.cfg are moved to SPL code in mx6dl_dcd_table.

Now mx6sabresd SPL code support Dual Lite, Quad, Quad Plus.

mx6dl_dcd_table reginit as
- GPR io regs
- DRAM io regs,
- MMDC Calibration io regs
- dram sdcke0 (0x020e04a4) and sdcke1(0x020e04a8) are not available in original mx6dlsabresd.cfg but initialized to default values.

Quoted 4 lines
Cc Stefano Babic <[email protected]>
Cc Fabio Estevam <[email protected]>
Cc Michael Trimarchi <[email protected]>
Signed-off-by Jagan Teki <[email protected]>
Quoted 4 lines

Have you tested this?

Last time I tried to convert imx6dl-sabresd to SPL it did not work, and I haven't had a chance to debug it.

I don't have a board to test, can verify it once.

thanks!

Signature · 4 lines
Jagan Teki
Free Software Engineer | www.openedev.com
U-Boot, Linux | Upstream Maintainer
Hyderabad, India.
reviewer
#28 lore raw

PATCH v3 23/31 ARM: i.MX6DL: sabresd: Move DCD reginit on SPL

In reply to Fabio Estevam

Hi Jagan,

Quoted 4 lines · Fabio Estevam

Have you tested this?

Last time I tried to convert imx6dl-sabresd to SPL it did not work, and I haven't had a chance to debug it.

I managed to fix mx6dl sabresd SPL support.

Will submit a patch tomorrow.

author
#29 lore raw

PATCH v3 24/31 ARM: dts: imx6qdl-sabresd: Add imx6dl-sabresd.dts

In reply to Jagan Teki

From: Jagan Teki <[email protected]>

Add initial dts support for i.MX6 DualLite Sabresd board.

Cc Stefano Babic <[email protected]>
Cc Fabio Estevam <[email protected]>
Cc Michael Trimarchi <[email protected]>
Signed-off-by Jagan Teki <[email protected]>
---
 arch/arm/dts/Makefile           |  1 +
 arch/arm/dts/imx6dl-sabresd.dts | 17 +++++++++++++++++
 2 files changed, 18 insertions(+)
 create mode 100644 arch/arm/dts/imx6dl-sabresd.dts
arch/arm/dts/Makefile +1 -0
index b6042f3..4ce0722 100644
@@ -315,6 +315,7 @@ dtb-$(CONFIG_MX6) += imx6ull-14x14-evk.dtb \
 	imx6sll-evk.dtb \
 	imx6dl-icore.dtb \
 	imx6dl-icore-rqs.dtb \
+	imx6dl-sabresd.dtb \
 	imx6q-icore.dtb \
 	imx6q-icore-rqs.dtb \
 	imx6q-sabresd.dtb \
arch/arm/dts/imx6dl-sabresd.dts new file +17 -0
new file mode 100644
index 0000000..1e45f2f
@@ -0,0 +1,17 @@
+/*
+ * Copyright (C) 2013 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/dts-v1/;
+
+#include "imx6dl.dtsi"
+#include "imx6qdl-sabresd.dtsi"
+
+/ {
+	model = "Freescale i.MX6 DualLite SABRE Smart Device Board";
+	compatible = "fsl,imx6dl-sabresd", "fsl,imx6dl";
+};
Signature · 1 line
1.9.1
author
#30 lore raw

PATCH v3 25/31 ARM: i.MX6DL: sabresd: Add initial devicetree support

In reply to Jagan Teki

From: Jagan Teki <[email protected]>

Add initial devicetree support for i.MX6 DualLite Sabresd board.

Cc Stefano Babic <[email protected]>
Cc Fabio Estevam <[email protected]>
Cc Michael Trimarchi <[email protected]>
Signed-off-by Jagan Teki <[email protected]>
---
 board/freescale/mx6sabresd/MAINTAINERS |  1 +
 configs/imx6dl_sabresd_defconfig       | 68 ++++++++++++++++++++++++++++++++++
 2 files changed, 69 insertions(+)
 create mode 100644 configs/imx6dl_sabresd_defconfig
board/freescale/mx6sabresd/MAINTAINERS +1 -0
index 40507f8..5efc795 100644
@@ -6,5 +6,6 @@ F:	include/configs/mx6sabresd.h
 F:	configs/mx6dlsabresd_defconfig
 F:	configs/mx6qsabresd_defconfig
 F:	configs/mx6sabresd_spl_defconfig
+F:	configs/imx6dl_sabresd_defconfig
 F:	configs/imx6q_sabresd_defconfig
 F:	configs/imx6qp_sabresd_defconfig
configs/imx6dl_sabresd_defconfig new file +68 -0

68 lines not on this page · raw message

Signature · 1 line
1.9.1
author
#31 lore raw

PATCH v3 26/31 ARM: i.MX6: sabresd: Drop legacy non-fdt code

In reply to Jagan Teki

From: Jagan Teki <[email protected]>

- Removed non-fdt code (becuase which has dt support)
- Remove legacy defconfigs
mx6dlsabresd_defconfig
mx6qsabresd_defconfig
mx6sabresd_spl_defconfig
- Re-arrange the header includes and removed unneeded includes.
- Move the SPL code in #ifdef CONFIG_SPL_BUILD area.
- Drop mx6dlsabresd.cfg
- Drop mx6q_4x_mt41j128.cfg

Cc Stefano Babic <[email protected]>
Cc Fabio Estevam <[email protected]>
Cc Michael Trimarchi <[email protected]>
Signed-off-by Jagan Teki <[email protected]>
---
 board/freescale/mx6sabresd/MAINTAINERS          |   3 -
 board/freescale/mx6sabresd/mx6dlsabresd.cfg     | 131 --------
 board/freescale/mx6sabresd/mx6q_4x_mt41j128.cfg | 169 ----------
 board/freescale/mx6sabresd/mx6sabresd.c         | 396 ++++--------------------
 configs/mx6dlsabresd_defconfig                  |  48 ---
 configs/mx6qsabresd_defconfig                   |  48 ---
 configs/mx6sabresd_spl_defconfig                |  54 ----
 include/configs/mx6sabresd.h                    |  23 --
 8 files changed, 63 insertions(+), 809 deletions(-)
 delete mode 100644 board/freescale/mx6sabresd/mx6dlsabresd.cfg
 delete mode 100644 board/freescale/mx6sabresd/mx6q_4x_mt41j128.cfg
 delete mode 100644 configs/mx6dlsabresd_defconfig
 delete mode 100644 configs/mx6qsabresd_defconfig
 delete mode 100644 configs/mx6sabresd_spl_defconfig
board/freescale/mx6sabresd/MAINTAINERS +0 -3
index 5efc795..6b3fee9 100644
@@ -3,9 +3,6 @@ M:	Fabio Estevam <[email protected]>
 S:	Maintained
 F:	board/freescale/mx6sabresd/
 F:	include/configs/mx6sabresd.h
-F:	configs/mx6dlsabresd_defconfig
-F:	configs/mx6qsabresd_defconfig
-F:	configs/mx6sabresd_spl_defconfig
 F:	configs/imx6dl_sabresd_defconfig
 F:	configs/imx6q_sabresd_defconfig
 F:	configs/imx6qp_sabresd_defconfig
board/freescale/mx6sabresd/mx6dlsabresd.cfg deleted +0 -131

131 lines not on this page · raw message

board/freescale/mx6sabresd/mx6q_4x_mt41j128.cfg deleted +0 -169

169 lines not on this page · raw message

board/freescale/mx6sabresd/mx6sabresd.c +63 -333

499 lines not on this page · raw message

configs/mx6dlsabresd_defconfig deleted +0 -48

48 lines not on this page · raw message

configs/mx6qsabresd_defconfig deleted +0 -48

48 lines not on this page · raw message

configs/mx6sabresd_spl_defconfig deleted +0 -54

54 lines not on this page · raw message

include/configs/mx6sabresd.h +0 -23
index 4f6bb1b..df3ab6e 100644
@@ -51,34 +51,11 @@
 #define CONFIG_PCIE_IMX_POWER_GPIO	IMX_GPIO_NR(3, 19)
 #endif
 
-/* I2C Configs */
-#if defined(CONFIG_SYS_I2C_MXC) && !defined(CONFIG_DM_I2C)
-#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_MXC_I2C1		/* enable I2C bus 1 */
-#define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */
-#define CONFIG_SYS_I2C_MXC_I2C3		/* enable I2C bus 3 */
-#define CONFIG_SYS_I2C_SPEED		  100000
-#endif
-
-/* PMIC */
-#ifndef CONFIG_DM_PMIC_PFUZE100
-#define CONFIG_POWER
-#define CONFIG_POWER_I2C
-#define CONFIG_POWER_PFUZE100
-#define CONFIG_POWER_PFUZE100_I2C_ADDR	0x08
-#endif
-
 /* USB Configs */
 #ifdef CONFIG_USB_EHCI_MX6
 #define CONFIG_USB_HOST_ETHER
 #define CONFIG_USB_ETHER_ASIX
 #define CONFIG_MXC_USB_PORTSC		(PORT_PTS_UTMI | PORT_PTS_PTW)
-
-# ifndef CONFIG_DM_USB
-#  define CONFIG_MXC_USB_FLAGS		0
-#  define CONFIG_USB_MAX_CONTROLLER_COUNT	1 /* Enabled USB controller number */
-#  define CONFIG_EHCI_HCD_INIT_AFTER_RESET
-# endif
 #endif
 
 #endif                         /* __MX6QSABRESD_CONFIG_H */
Signature · 1 line
1.9.1
author
#32 lore raw

PATCH v3 27/31 ARM: i.MX6: %s/mx6sabresd/imx6sabresd

In reply to Jagan Teki

From: Jagan Teki <[email protected]>

Rename all mx6sabresd files and directories to imx6sabresd, this will eventually compatible with Linux i.MX file notations and also some of the boards(engicam) in the current tree are now following same convention.

Cc Stefano Babic <[email protected]>
Cc Fabio Estevam <[email protected]>
Cc Michael Trimarchi <[email protected]>
Signed-off-by Jagan Teki <[email protected]>
---
 arch/arm/cpu/armv7/mx6/Kconfig                                        | 2 +-
 board/freescale/{mx6sabresd => imx6sabresd}/Kconfig                   | 4 ++--
 board/freescale/{mx6sabresd => imx6sabresd}/MAINTAINERS               | 4 ++--
 board/freescale/{mx6sabresd => imx6sabresd}/Makefile                  | 2 +-
 board/freescale/{mx6sabresd => imx6sabresd}/README                    | 0
 .../freescale/{mx6sabresd/mx6sabresd.c => imx6sabresd/imx6sabresd.c}  | 0
 include/configs/{mx6sabresd.h => imx6sabresd.h}                       | 0
 7 files changed, 6 insertions(+), 6 deletions(-)
 rename board/freescale/{mx6sabresd => imx6sabresd}/Kconfig (70%)
 rename board/freescale/{mx6sabresd => imx6sabresd}/MAINTAINERS (73%)
 rename board/freescale/{mx6sabresd => imx6sabresd}/Makefile (86%)
 rename board/freescale/{mx6sabresd => imx6sabresd}/README (100%)
 rename board/freescale/{mx6sabresd/mx6sabresd.c => imx6sabresd/imx6sabresd.c} (100%)
 rename include/configs/{mx6sabresd.h => imx6sabresd.h} (100%)
arch/arm/cpu/armv7/mx6/Kconfig +1 -1
index 3170442..69bf645 100644
@@ -393,9 +393,9 @@ source "board/engicam/geam6ul/Kconfig"
 source "board/engicam/icorem6/Kconfig"
 source "board/engicam/icorem6_rqs/Kconfig"
 source "board/engicam/isiotmx6ul/Kconfig"
+source "board/freescale/imx6sabresd/Kconfig"
 source "board/freescale/mx6qarm2/Kconfig"
 source "board/freescale/mx6qsabreauto/Kconfig"
-source "board/freescale/mx6sabresd/Kconfig"
 source "board/freescale/mx6slevk/Kconfig"
 source "board/freescale/mx6sllevk/Kconfig"
 source "board/freescale/mx6sxsabresd/Kconfig"
board/freescale/imx6sabresd/Kconfig renamed from board/freescale/mx6sabresd/Kconfig +2 -2
similarity index 70%
rename from board/freescale/mx6sabresd/Kconfig
rename to board/freescale/imx6sabresd/Kconfig
index e87dea0..54eebf0 100644
@@ -1,12 +1,12 @@
 if TARGET_MX6SABRESD
 
 config SYS_BOARD
-	default "mx6sabresd"
+	default "imx6sabresd"
 
 config SYS_VENDOR
 	default "freescale"
 
 config SYS_CONFIG_NAME
-	default "mx6sabresd"
+	default "imx6sabresd"
 
 endif
board/freescale/imx6sabresd/MAINTAINERS renamed from board/freescale/mx6sabresd/MAINTAINERS +2 -2
similarity index 73%
rename from board/freescale/mx6sabresd/MAINTAINERS
rename to board/freescale/imx6sabresd/MAINTAINERS
index 6b3fee9..43f1eb7 100644
@@ -1,8 +1,8 @@
 MX6SABRESD BOARD
 M:	Fabio Estevam <[email protected]>
 S:	Maintained
-F:	board/freescale/mx6sabresd/
-F:	include/configs/mx6sabresd.h
+F:	board/freescale/imx6sabresd/
+F:	include/configs/imx6sabresd.h
 F:	configs/imx6dl_sabresd_defconfig
 F:	configs/imx6q_sabresd_defconfig
 F:	configs/imx6qp_sabresd_defconfig
board/freescale/imx6sabresd/Makefile renamed from board/freescale/mx6sabresd/Makefile +1 -1
similarity index 86%
rename from board/freescale/mx6sabresd/Makefile
rename to board/freescale/imx6sabresd/Makefile
index cfca2ef..5459f46 100644
@@ -6,4 +6,4 @@
 # SPDX-License-Identifier:	GPL-2.0+
 #
 
-obj-y  := mx6sabresd.o
+obj-y  := imx6sabresd.o
board/freescale/imx6sabresd/README renamed from board/freescale/mx6sabresd/README +0 -0
similarity index 100%
rename from board/freescale/mx6sabresd/README
rename to board/freescale/imx6sabresd/README
board/freescale/imx6sabresd/imx6sabresd.c renamed from board/freescale/mx6sabresd/mx6sabresd.c +0 -0
similarity index 100%
rename from board/freescale/mx6sabresd/mx6sabresd.c
rename to board/freescale/imx6sabresd/imx6sabresd.c
include/configs/imx6sabresd.h renamed from include/configs/mx6sabresd.h +0 -0
similarity index 100%
rename from include/configs/mx6sabresd.h
rename to include/configs/imx6sabresd.h
Signature · 1 line
1.9.1
author
#33 lore raw

PATCH v3 28/31 ARM: i.MX6: sabresd: Move DM_* and OF_CONTROL to arch Kconfig

In reply to Jagan Teki

From: Jagan Teki <[email protected]>

Since all defconfig have common CONFIG_DM_* for respective dm uclass configs move them on arch Kconfig and also move CONFIG_OF_CONTROL

Cc Stefano Babic <[email protected]>
Cc Fabio Estevam <[email protected]>
Cc Michael Trimarchi <[email protected]>
Signed-off-by Jagan Teki <[email protected]>
---
 arch/arm/cpu/armv7/mx6/Kconfig   | 8 ++++++++
 configs/imx6dl_sabresd_defconfig | 8 --------
 configs/imx6q_sabresd_defconfig  | 8 --------
 configs/imx6qp_sabresd_defconfig | 8 --------
 4 files changed, 8 insertions(+), 24 deletions(-)
arch/arm/cpu/armv7/mx6/Kconfig +8 -0
index 69bf645..f2474d5 100644
@@ -195,8 +195,16 @@ config TARGET_MX6SABRESD
 	bool "mx6sabresd"
 	select BOARD_LATE_INIT
 	select SUPPORT_SPL
+	select OF_CONTROL
 	select DM
+	select DM_ETH
+	select DM_GPIO
+	select DM_I2C
+	select DM_MMC
+	select DM_PMIC
+	select DM_REGULATOR
 	select DM_THERMAL
+	select DM_USB
 	select BOARD_EARLY_INIT_F
 
 config TARGET_MX6SLEVK
configs/imx6dl_sabresd_defconfig +0 -8
index 20dc1e0..fe2c981 100644
@@ -51,14 +51,6 @@ CONFIG_G_DNL_VENDOR_NUM=0x0525
 CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
 # CONFIG_VIDEO_SW_CURSOR is not set
 CONFIG_OF_LIBFDT=y
-CONFIG_OF_CONTROL=y
-CONFIG_DM_ETH=y
-CONFIG_DM_I2C=y
-CONFIG_DM_GPIO=y
-CONFIG_DM_MMC=y
-CONFIG_DM_PMIC=y
-CONFIG_DM_REGULATOR=y
-CONFIG_DM_USB=y
 # CONFIG_BLK is not set
 # CONFIG_DM_MMC_OPS is not set
 CONFIG_DM_PMIC_PFUZE100=y
configs/imx6q_sabresd_defconfig +0 -8
index 8c7baee..57c95c2 100644
@@ -51,14 +51,6 @@ CONFIG_G_DNL_VENDOR_NUM=0x0525
 CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
 # CONFIG_VIDEO_SW_CURSOR is not set
 CONFIG_OF_LIBFDT=y
-CONFIG_OF_CONTROL=y
-CONFIG_DM_ETH=y
-CONFIG_DM_I2C=y
-CONFIG_DM_GPIO=y
-CONFIG_DM_MMC=y
-CONFIG_DM_PMIC=y
-CONFIG_DM_REGULATOR=y
-CONFIG_DM_USB=y
 # CONFIG_BLK is not set
 # CONFIG_DM_MMC_OPS is not set
 CONFIG_DM_PMIC_PFUZE100=y
configs/imx6qp_sabresd_defconfig +0 -8
index cccb7b1..d6d22b8 100644
@@ -52,14 +52,6 @@ CONFIG_G_DNL_VENDOR_NUM=0x0525
 CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
 # CONFIG_VIDEO_SW_CURSOR is not set
 CONFIG_OF_LIBFDT=y
-CONFIG_OF_CONTROL=y
-CONFIG_DM_ETH=y
-CONFIG_DM_I2C=y
-CONFIG_DM_GPIO=y
-CONFIG_DM_MMC=y
-CONFIG_DM_PMIC=y
-CONFIG_DM_REGULATOR=y
-CONFIG_DM_USB=y
 # CONFIG_BLK is not set
 # CONFIG_DM_MMC_OPS is not set
 CONFIG_DM_PMIC_PFUZE100=y
Signature · 1 line
1.9.1
author
#34 lore raw

PATCH v3 29/31 ARM: i.MX6: sabresd: Update README

In reply to Jagan Teki

From: Jagan Teki <[email protected]>

Since all SabreSD boards support SPL and devicetree update README on respective image name changes while loading the SD card.

Cc Stefano Babic <[email protected]>
Cc Fabio Estevam <[email protected]>
Cc Michael Trimarchi <[email protected]>
Signed-off-by Jagan Teki <[email protected]>
---
 board/freescale/imx6sabresd/README | 53 ++++++++++++--------------------------
 1 file changed, 17 insertions(+), 36 deletions(-)
board/freescale/imx6sabresd/README +17 -36
index 43070e1..4e9abb8 100644
@@ -1,68 +1,49 @@
-How to use and build U-Boot on mx6sabresd:
-----------------------------------
+How to use and build U-Boot on imx6sabresd:
+------------------------------------------
 
-Currently there are three methods for booting mx6sabresd boards:
+Currently there are two methods for booting imx6sabresd boards:
 
-1. Booting via Normal U-Boot (u-boot.imx)
+1. Booting via SPL (SPL and u-boot-dtb.img)
 
-2. Booting via SPL (SPL and u-boot.img)
+2. Booting via Falcon mode (SPL launches the kernel directly)
 
-3. Booting via Falcon mode (SPL launches the kernel directly)
 
+1. Booting via SPL
+------------------
 
-1. Booting via Normal U-Boot
-----------------------------
-
-$ make mx6qsabresd_defconfig (If you want to build for mx6qsabresd)
+$ make imx6dl_sabresd_defconfig (If you want to build for imx6 duallite sabresd)
 
 or
 
-$ make mx6dlsabresd_defconfig (If you want to build for mx6dlsabresd)
-
-$ make
-
-This will generate the image called u-boot.imx.
-
-- Flash the u-boot.imx binary into the SD card:
-
-$ sudo dd if=u-boot.imx of=/dev/sdb bs=1K seek=1 && sync
+$ make imx6q_sabresd_defconfig (If you want to build for imx6 quad sabresd)
 
+or
 
-2. Booting via SPL
-------------------
-
-Other method for building U-Boot on mx6qsabresd and mx6qpsabresd is
-through SPL. In order to do so:
+$ make imx6qp_sabresd_defconfig (If you want to build for imx6 quad plus sabresd)
 
-$ make mx6sabresd_spl_defconfig
 $ make
 
-This will generate the SPL image called SPL and the u-boot.img.
+This will generate the SPL image called SPL and the u-boot-dtb.img.
 
 - Flash the SPL image into the SD card:
 
 $ sudo dd if=SPL of=/dev/sdb bs=1K seek=1 && sync
 
-- Flash the u-boot.img image into the SD card:
+- Flash the u-boot-dtb.img image into the SD card:
 
-$ sudo dd if=u-boot.img of=/dev/sdb bs=1K seek=69 && sync
+$ sudo dd if=u-boot-dtb.img of=/dev/sdb bs=1K seek=69 && sync
 
 
-3. Booting via Falcon mode
+2. Booting via Falcon mode
 --------------------------
 
-$ make mx6sabresd_spl_defconfig
-$ make
-
-This will generate the SPL image called SPL and the u-boot.img.
-
 - Flash the SPL image into the SD card:
 
 $ sudo dd if=SPL of=/dev/sdb bs=1K seek=1 oflag=sync status=none && sync
 
-- Flash the u-boot.img image into the SD card:
+- Flash the u-boot-dtb.img image into the SD card:
 
-$ sudo dd if=u-boot.img of=/dev/sdb bs=1K seek=69 oflag=sync status=none && sync
+$ sudo dd if=u-boot-dtb.img of=/dev/sdb bs=1K seek=69 oflag=sync status=none && sync
 
 Create a partition for root file system and extract it there:
Signature · 1 line
1.9.1
author
#35 lore raw

PATCH v3 30/31 ARM: i.MX6: sabresd: Drop checkboard

In reply to Jagan Teki

From: Jagan Teki <[email protected]>

Since SabreSD is supporting fdt, there is no use of printing the board name explicitly using checkboard because dtb supported u-boot will print model like this

Model: Freescale i.MX6 Quad Plus SABRE Smart Device Board

Cc Stefano Babic <[email protected]>
Cc Fabio Estevam <[email protected]>
Cc Michael Trimarchi <[email protected]>
Signed-off-by Jagan Teki <[email protected]>
---
 board/freescale/imx6sabresd/imx6sabresd.c | 6 ------
 1 file changed, 6 deletions(-)
board/freescale/imx6sabresd/imx6sabresd.c +0 -6
index 595e1db..3c00ea6 100644
@@ -449,12 +449,6 @@ int board_late_init(void)
 	return 0;
 }
 
-int checkboard(void)
-{
-	puts("Board: MX6-SabreSD\n");
-	return 0;
-}
-
 #ifdef CONFIG_SPL_BUILD
 #include <spl.h>
 #include <libfdt.h>
Signature · 1 line
1.9.1
author
#36 lore raw

PATCH v3 31/31 ARM: i.MX6: sabresd: Cleanup board code

In reply to Jagan Teki

From: Jagan Teki <[email protected]>

- Give proper tab alignment for display_info_t structure
- Add tab spaces UART_PAD_CTRL and SPI_PAD_CTRL
- Give proper alignment of reg init values on setup_display
- Add space and newline on board_init_f

Cc Stefano Babic <[email protected]>
Cc Fabio Estevam <[email protected]>
Cc Michael Trimarchi <[email protected]>
Signed-off-by Jagan Teki <[email protected]>
---
 board/freescale/imx6sabresd/imx6sabresd.c | 183 +++++++++++++++---------------
 1 file changed, 94 insertions(+), 89 deletions(-)
board/freescale/imx6sabresd/imx6sabresd.c +94 -89
index 3c00ea6..8d75873 100644
@@ -27,12 +27,11 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#define UART_PAD_CTRL  (PAD_CTL_PUS_100K_UP |			\
-	PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm |			\
-	PAD_CTL_SRE_FAST  | PAD_CTL_HYS)
-
-#define SPI_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_SPEED_MED | \
-		      PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST)
+#define UART_PAD_CTRL	(PAD_CTL_PUS_100K_UP |			\
+			PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm |	\
+			PAD_CTL_SRE_FAST  | PAD_CTL_HYS)
+#define SPI_PAD_CTRL	(PAD_CTL_HYS | PAD_CTL_SPEED_MED | \
+			PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST)
 
 int dram_init(void)
 {

@@ -201,67 +200,72 @@ static void do_enable_hdmi(struct display_info_t const *dev)
 	imx_enable_hdmi_phy();
 }
 
-struct display_info_t const displays[] = {{
-	.bus	= -1,
-	.addr	= 0,
-	.pixfmt	= IPU_PIX_FMT_RGB666,
-	.detect	= NULL,
-	.enable	= enable_lvds,
-	.mode	= {
-		.name           = "Hannstar-XGA",
-		.refresh        = 60,
-		.xres           = 1024,
-		.yres           = 768,
-		.pixclock       = 15384,
-		.left_margin    = 160,
-		.right_margin   = 24,
-		.upper_margin   = 29,
-		.lower_margin   = 3,
-		.hsync_len      = 136,
-		.vsync_len      = 6,
-		.sync           = FB_SYNC_EXT,
-		.vmode          = FB_VMODE_NONINTERLACED
-} }, {
-	.bus	= -1,
-	.addr	= 0,
-	.pixfmt	= IPU_PIX_FMT_RGB24,
-	.detect	= detect_hdmi,
-	.enable	= do_enable_hdmi,
-	.mode	= {
-		.name           = "HDMI",
-		.refresh        = 60,
-		.xres           = 1024,
-		.yres           = 768,
-		.pixclock       = 15384,
-		.left_margin    = 160,
-		.right_margin   = 24,
-		.upper_margin   = 29,
-		.lower_margin   = 3,
-		.hsync_len      = 136,
-		.vsync_len      = 6,
-		.sync           = FB_SYNC_EXT,
-		.vmode          = FB_VMODE_NONINTERLACED
-} }, {
-	.bus	= 0,
-	.addr	= 0,
-	.pixfmt	= IPU_PIX_FMT_RGB24,
-	.detect	= NULL,
-	.enable	= enable_rgb,
-	.mode	= {
-		.name           = "SEIKO-WVGA",
-		.refresh        = 60,
-		.xres           = 800,
-		.yres           = 480,
-		.pixclock       = 29850,
-		.left_margin    = 89,
-		.right_margin   = 164,
-		.upper_margin   = 23,
-		.lower_margin   = 10,
-		.hsync_len      = 10,
-		.vsync_len      = 10,
-		.sync           = 0,
-		.vmode          = FB_VMODE_NONINTERLACED
-} } };
+struct display_info_t const displays[] = {
+	{
+		.bus	= -1,
+		.addr	= 0,
+		.pixfmt	= IPU_PIX_FMT_RGB666,
+		.detect	= NULL,
+		.enable	= enable_lvds,
+		.mode	= {
+			.name           = "Hannstar-XGA",
+			.refresh        = 60,
+			.xres           = 1024,
+			.yres           = 768,
+			.pixclock       = 15384,
+			.left_margin    = 160,
+			.right_margin   = 24,
+			.upper_margin   = 29,
+			.lower_margin   = 3,
+			.hsync_len      = 136,
+			.vsync_len      = 6,
+			.sync           = FB_SYNC_EXT,
+			.vmode          = FB_VMODE_NONINTERLACED
+		}
+	}, {
+		.bus	= -1,
+		.addr	= 0,
+		.pixfmt	= IPU_PIX_FMT_RGB24,
+		.detect	= detect_hdmi,
+		.enable	= do_enable_hdmi,
+		.mode	= {
+			.name           = "HDMI",
+			.refresh        = 60,
+			.xres           = 1024,
+			.yres           = 768,
+			.pixclock       = 15384,
+			.left_margin    = 160,
+			.right_margin   = 24,
+			.upper_margin   = 29,
+			.lower_margin   = 3,
+			.hsync_len      = 136,
+			.vsync_len      = 6,
+			.sync           = FB_SYNC_EXT,
+			.vmode          = FB_VMODE_NONINTERLACED
+		}
+	}, {
+		.bus	= 0,
+		.addr	= 0,
+		.pixfmt	= IPU_PIX_FMT_RGB24,
+		.detect	= NULL,
+		.enable	= enable_rgb,
+		.mode	= {
+			.name           = "SEIKO-WVGA",
+			.refresh        = 60,
+			.xres           = 800,
+			.yres           = 480,
+			.pixclock       = 29850,
+			.left_margin    = 89,
+			.right_margin   = 164,
+			.upper_margin   = 23,
+			.lower_margin   = 10,
+			.hsync_len      = 10,
+			.vsync_len      = 10,
+			.sync           = 0,
+			.vmode          = FB_VMODE_NONINTERLACED
+		}
+	}
+};
 size_t display_count = ARRAY_SIZE(displays);
 
 static void setup_display(void)

@@ -283,10 +287,10 @@ static void setup_display(void)
 
 	/* set LDB0, LDB1 clk select to 011/011 */
 	reg = readl(&mxc_ccm->cs2cdr);
-	reg &= ~(MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_MASK
-		 | MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_MASK);
-	reg |= (3 << MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_OFFSET)
-	      | (3 << MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_OFFSET);
+	reg &= ~(MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_MASK |
+		MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_MASK);
+	reg |= (3 << MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_OFFSET) |
+		(3 << MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_OFFSET);
 	writel(reg, &mxc_ccm->cs2cdr);
 
 	reg = readl(&mxc_ccm->cscmr2);

@@ -294,28 +298,28 @@ static void setup_display(void)
 	writel(reg, &mxc_ccm->cscmr2);
 
 	reg = readl(&mxc_ccm->chsccdr);
-	reg |= (CHSCCDR_CLK_SEL_LDB_DI0
-		<< MXC_CCM_CHSCCDR_IPU1_DI0_CLK_SEL_OFFSET);
-	reg |= (CHSCCDR_CLK_SEL_LDB_DI0
-		<< MXC_CCM_CHSCCDR_IPU1_DI1_CLK_SEL_OFFSET);
+	reg |= (CHSCCDR_CLK_SEL_LDB_DI0 <<
+		MXC_CCM_CHSCCDR_IPU1_DI0_CLK_SEL_OFFSET);
+	reg |= (CHSCCDR_CLK_SEL_LDB_DI0 <<
+		MXC_CCM_CHSCCDR_IPU1_DI1_CLK_SEL_OFFSET);
 	writel(reg, &mxc_ccm->chsccdr);
 
-	reg = IOMUXC_GPR2_BGREF_RRMODE_EXTERNAL_RES
-	     | IOMUXC_GPR2_DI1_VS_POLARITY_ACTIVE_LOW
-	     | IOMUXC_GPR2_DI0_VS_POLARITY_ACTIVE_LOW
-	     | IOMUXC_GPR2_BIT_MAPPING_CH1_SPWG
-	     | IOMUXC_GPR2_DATA_WIDTH_CH1_18BIT
-	     | IOMUXC_GPR2_BIT_MAPPING_CH0_SPWG
-	     | IOMUXC_GPR2_DATA_WIDTH_CH0_18BIT
-	     | IOMUXC_GPR2_LVDS_CH0_MODE_DISABLED
-	     | IOMUXC_GPR2_LVDS_CH1_MODE_ENABLED_DI0;
+	reg = IOMUXC_GPR2_BGREF_RRMODE_EXTERNAL_RES |
+		IOMUXC_GPR2_DI1_VS_POLARITY_ACTIVE_LOW |
+		IOMUXC_GPR2_DI0_VS_POLARITY_ACTIVE_LOW |
+		IOMUXC_GPR2_BIT_MAPPING_CH1_SPWG |
+		IOMUXC_GPR2_DATA_WIDTH_CH1_18BIT |
+		IOMUXC_GPR2_BIT_MAPPING_CH0_SPWG |
+		IOMUXC_GPR2_DATA_WIDTH_CH0_18BIT |
+		IOMUXC_GPR2_LVDS_CH0_MODE_DISABLED |
+		IOMUXC_GPR2_LVDS_CH1_MODE_ENABLED_DI0;
 	writel(reg, &iomux->gpr[2]);
 
 	reg = readl(&iomux->gpr[3]);
-	reg = (reg & ~(IOMUXC_GPR3_LVDS1_MUX_CTL_MASK
-			| IOMUXC_GPR3_HDMI_MUX_CTL_MASK))
-	    | (IOMUXC_GPR3_MUX_SRC_IPU1_DI0
-	       << IOMUXC_GPR3_LVDS1_MUX_CTL_OFFSET);
+	reg = (reg & ~(IOMUXC_GPR3_LVDS1_MUX_CTL_MASK |
+		IOMUXC_GPR3_HDMI_MUX_CTL_MASK)) |
+		(IOMUXC_GPR3_MUX_SRC_IPU1_DI0 <<
+		IOMUXC_GPR3_LVDS1_MUX_CTL_OFFSET);
 	writel(reg, &iomux->gpr[3]);
 }
 #endif /* CONFIG_VIDEO_IPUV3 */

@@ -538,6 +542,7 @@ int board_mmc_init(bd_t *bis)
 {
 	struct src *psrc = (struct src *)SRC_BASE_ADDR;
 	unsigned reg = readl(&psrc->sbmr1) >> 11;
+
 	/*
 	 * Upon reading BOOT_CFG register the following map is done:
 	 * Bit 11 and 12 of BOOT_CFG register can determine the current

@@ -546,7 +551,6 @@ int board_mmc_init(bd_t *bis)
 	 * 0x2                  SD2
 	 * 0x3                  SD4
 	 */
-
 	switch (reg & 0x3) {
 	case 0x1:
 		imx_iomux_v3_setup_multiple_pads(

@@ -886,6 +890,7 @@ void board_init_f(ulong dummy)
 	arch_cpu_init();
 
 	ccgr_init();
+
 	gpr_init();
 
 	/* iomux and setup of i2c */
Signature · 1 line
1.9.1