PCI: rockchip: Use gpiod_set_value_cansleep() to allow reset via expanders
Subsystems (2)
PATCH RESEND 1/1 PCI: rockchip: Use gpiod_set_value_cansleep() to allow reset via expanders
The reset GPIO can be connected to a I2C or SPI IO expander, which may sleep, so it is safer to use the gpiod_set_value_cansleep() variant instead.
---
Changes since v1:
- Resending with Shawn Lin added on Cc.
drivers/pci/host/pcie-rockchip.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
drivers/pci/host/pcie-rockchip.c +2 -2
@@ -537,7 +537,7 @@ static int rockchip_pcie_init_port(struct rockchip_pcie *rockchip)int err, i;u32 status; -gpiod_set_value (rockchip->ep_gpio,0 ); +gpiod_set_value_cansleep (rockchip->ep_gpio,0 ); err =reset_control_assert (rockchip->aclk_rst);if (err) {
@@ -682,7 +682,7 @@ static int rockchip_pcie_init_port(struct rockchip_pcie *rockchip)rockchip_pcie_write (rockchip,PCIE_CLIENT_LINK_TRAIN_ENABLE ,PCIE_CLIENT_CONFIG ); -gpiod_set_value (rockchip->ep_gpio,1 ); +gpiod_set_value_cansleep (rockchip->ep_gpio,1 );/* 500ms timeout value should be enough for Gen1/2 training */ err = readl_poll_timeout(rockchip->apb_base + PCIE_CLIENT_BASIC_STATUS1,
Signature · 1 line
2.7.4
Quoted 4 lines · Fabio Estevam
The reset GPIO can be connected to a I2C or SPI IO expander, which may sleep, so it is safer to use the
gpiod_set_value_cansleep()variant instead.
Quoted 8 lines
Signed-off-by Fabio Estevam <[email protected]>---
Changes since v1:
- Resending with Shawn Lin added on Cc.drivers/pci/host/pcie-rockchip.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
Quoted 23 lines
drivers/pci/host/pcie-rockchip.c +2
-2@@ -537,7 +537,7 @@ static int rockchip_pcie_init_port(struct rockchip_pcie *rockchip)int err, i;u32 status; -gpiod_set_value (rockchip->ep_gpio,0 ); +gpiod_set_value_cansleep (rockchip->ep_gpio,0 ); err =reset_control_assert (rockchip->aclk_rst);if (err) {@@ -682,7 +682,7 @@ static int rockchip_pcie_init_port(struct rockchip_pcie *rockchip)rockchip_pcie_write (rockchip,PCIE_CLIENT_LINK_TRAIN_ENABLE ,PCIE_CLIENT_CONFIG ); -gpiod_set_value (rockchip->ep_gpio,1 ); +gpiod_set_value_cansleep (rockchip->ep_gpio,1 );/* 500ms timeout value should be enough for Gen1/2 training */ err = readl_poll_timeout(rockchip->apb_base + PCIE_CLIENT_BASIC_STATUS1,
Quoted 5 lines · Fabio Estevam
The reset GPIO can be connected to a I2C or SPI IO expander, which may sleep, so it is safer to use the
gpiod_set_value_cansleep()variant instead.Signed-off-by Fabio Estevam <[email protected]>
Applied with Shawn's ack to pci/host-rockchip for v4.14, thanks!
Quoted 32 lines
---
Changes since v1:
- Resending with Shawn Lin added on Cc.drivers/pci/host/pcie-rockchip.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)drivers/pci/host/pcie-rockchip.c +2
-2@@ -537,7 +537,7 @@ static int rockchip_pcie_init_port(struct rockchip_pcie *rockchip)int err, i;u32 status; -gpiod_set_value (rockchip->ep_gpio,0 ); +gpiod_set_value_cansleep (rockchip->ep_gpio,0 ); err =reset_control_assert (rockchip->aclk_rst);if (err) {@@ -682,7 +682,7 @@ static int rockchip_pcie_init_port(struct rockchip_pcie *rockchip)rockchip_pcie_write (rockchip,PCIE_CLIENT_LINK_TRAIN_ENABLE ,PCIE_CLIENT_CONFIG ); -gpiod_set_value (rockchip->ep_gpio,1 ); +gpiod_set_value_cansleep (rockchip->ep_gpio,1 );/* 500ms timeout value should be enough for Gen1/2 training */ err = readl_poll_timeout(rockchip->apb_base + PCIE_CLIENT_BASIC_STATUS1,Signature · 1 line
2.7.4