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PCI: rockchip: Use gpiod_set_value_cansleep() to allow reset via expanders

PATCH Superseded Fabio Estevam 4 participants 5 messages Aug 20, 2017 – Aug 28, 2017

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#0 lore raw

PATCH 1/1 PCI: rockchip: Use gpiod_set_value_cansleep() to allow reset via expanders

The reset GPIO can be connected to a I2C or SPI IO expander, which may sleep, so it is safer to use the gpiod_set_value_cansleep() variant instead.

---
 drivers/pci/host/pcie-rockchip.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
drivers/pci/host/pcie-rockchip.c +2 -2
index 2eccd53..124b280 100644
@@ -537,7 +537,7 @@ static int rockchip_pcie_init_port(struct rockchip_pcie *rockchip)
 	int err, i;
 	u32 status;
 
-	gpiod_set_value(rockchip->ep_gpio, 0);
+	gpiod_set_value_cansleep(rockchip->ep_gpio, 0);
 
 	err = reset_control_assert(rockchip->aclk_rst);
 	if (err) {
@@ -682,7 +682,7 @@ static int rockchip_pcie_init_port(struct rockchip_pcie *rockchip)
 	rockchip_pcie_write(rockchip, PCIE_CLIENT_LINK_TRAIN_ENABLE,
 			    PCIE_CLIENT_CONFIG);
 
-	gpiod_set_value(rockchip->ep_gpio, 1);
+	gpiod_set_value_cansleep(rockchip->ep_gpio, 1);
 
 	/* 500ms timeout value should be enough for Gen1/2 training */
 	err = readl_poll_timeout(rockchip->apb_base + PCIE_CLIENT_BASIC_STATUS1,
Signature · 1 line
2.7.4
#1 lore raw
Quoted 5 lines · Fabio Estevam

The reset GPIO can be connected to a I2C or SPI IO expander, which may sleep, so it is safer to use the gpiod_set_value_cansleep() variant instead.

Waiting for Shawn's ack...

Quoted 29 lines
---
 drivers/pci/host/pcie-rockchip.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
drivers/pci/host/pcie-rockchip.c +2 -2
index 2eccd53..124b280 100644
@@ -537,7 +537,7 @@ static int rockchip_pcie_init_port(struct rockchip_pcie *rockchip)
 	int err, i;
 	u32 status;
 
-	gpiod_set_value(rockchip->ep_gpio, 0);
+	gpiod_set_value_cansleep(rockchip->ep_gpio, 0);
 
 	err = reset_control_assert(rockchip->aclk_rst);
 	if (err) {
@@ -682,7 +682,7 @@ static int rockchip_pcie_init_port(struct rockchip_pcie *rockchip)
 	rockchip_pcie_write(rockchip, PCIE_CLIENT_LINK_TRAIN_ENABLE,
 			    PCIE_CLIENT_CONFIG);
 
-	gpiod_set_value(rockchip->ep_gpio, 1);
+	gpiod_set_value_cansleep(rockchip->ep_gpio, 1);
 
 	/* 500ms timeout value should be enough for Gen1/2 training */
 	err = readl_poll_timeout(rockchip->apb_base + PCIE_CLIENT_BASIC_STATUS1,
Signature · 1 line
2.7.4
maintainer
#2 lore raw

Am Donnerstag, 24. August 2017, 11:33:23 CEST schrieb Bjorn Helgaas:

Quoted 8 lines · Fabio Estevam
Quoted 5 lines

The reset GPIO can be connected to a I2C or SPI IO expander, which may sleep, so it is safer to use the gpiod_set_value_cansleep() variant instead.

Waiting for Shawn's ack...

we might want to include him then, as I'm not sure if he patrols the linux-pci list :-) . [I've added him]

Quoted 29 lines
Quoted 27 lines
---
 drivers/pci/host/pcie-rockchip.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
drivers/pci/host/pcie-rockchip.c +2 -2
index 2eccd53..124b280 100644
@@ -537,7 +537,7 @@ static int rockchip_pcie_init_port(struct rockchip_pcie *rockchip)
 	int err, i;
 	u32 status;
 
-	gpiod_set_value(rockchip->ep_gpio, 0);
+	gpiod_set_value_cansleep(rockchip->ep_gpio, 0);
 
 	err = reset_control_assert(rockchip->aclk_rst);
 	if (err) {
@@ -682,7 +682,7 @@ static int rockchip_pcie_init_port(struct rockchip_pcie *rockchip)
 	rockchip_pcie_write(rockchip, PCIE_CLIENT_LINK_TRAIN_ENABLE,
 			    PCIE_CLIENT_CONFIG);
 
-	gpiod_set_value(rockchip->ep_gpio, 1);
+	gpiod_set_value_cansleep(rockchip->ep_gpio, 1);
 
 	/* 500ms timeout value should be enough for Gen1/2 training */
 	err = readl_poll_timeout(rockchip->apb_base + PCIE_CLIENT_BASIC_STATUS1,
#3 lore raw
Quoted 4 lines · Heiko Stuebner
Quoted 1 line

Waiting for Shawn's ack...

we might want to include him then, as I'm not sure if he patrols the linux-pci list :-) . [I've added him]

Sorry, I missed to add Shawn on Cc. I have just resent the patch with him on Cc.

Thanks

#4 lore raw
Quoted 6 lines · Fabio Estevam
Quoted 4 lines · Heiko Stuebner
Quoted 1 line

Waiting for Shawn's ack...

we might want to include him then, as I'm not sure if he patrols the linux-pci list :-) . [I've added him]

Aha, I also patrol linux-rockchip for pcie-rockchip, but this patch didn't include it either.

Quoted 3 lines

Sorry, I missed to add Shawn on Cc. I have just resent the patch with him on Cc.

Don't worry. I will check it out ASAP.

Quoted 4 lines

Thanks