drm/i915: Add interface to reserve fence registers for vGPU
PATCH 1/1 drm/i915: Add interface to reserve fence registers for vGPU
From: Changbin Du <[email protected]>
In the past, vGPU alloc fence registers by walking through mm.fence_list to find fence which pin_count = 0 and vma is empty. vGPU may not find enough fence registers this way. Because a fence can be bind to vma even though it is not in using. We have found such failure many times these days.
An option to resolve this issue is that we can force-remove fence from vma in this case.
This patch added two new api to the fence management code:
- i915_reserve_one_fence() will try to find a free fence from fence_list and force-remove vma if need.
- i915_giveback_reserved_fence() reclaim a reserved fence after vGPU has finished.
With this change, the fence management is more clear to work with vGPU. GVTg do not need remove fence from fence_list in private.
--- drivers/gpu/drm/i915/gvt/aperture_gm.c | 26 +++++++++------------ drivers/gpu/drm/i915/i915_drv.h | 3 +++ drivers/gpu/drm/i915/i915_gem_fence_reg.c | 39 +++++++++++++++++++++++++++++++ 3 files changed, 53 insertions(+), 15 deletions(-)
drivers/gpu/drm/i915/gvt/aperture_gm.c +11 -15
@@ -173,8 +173,8 @@ static void free_vgpu_fence(struct intel_vgpu *vgpu)_clear_vgpu_fence (vgpu);for (i =0 ; i <vgpu_fence_sz (vgpu); i++) { reg = vgpu->fence.regs[i]; -list_add_tail (®->link, - &dev_priv->mm.fence_list); +i915_giveback_reserved_fence (reg); + vgpu->fence.regs[i] =NULL ; }mutex_unlock (&dev_priv->drm.struct_mutex);
@@ -187,24 +187,19 @@ static int alloc_vgpu_fence(struct intel_vgpu *vgpu)struct drm_i915_private *dev_priv = gvt->dev_priv;struct drm_i915_fence_reg *reg;int i; -struct list_head *pos, *q;intel_runtime_pm_get (dev_priv);/* Request fences from host */ mutex_lock (&dev_priv->drm.struct_mutex); - i =0 ; -list_for_each_safe (pos, q, &dev_priv->mm.fence_list) { - reg = list_entry(pos, struct drm_i915_fence_reg, link); -if (reg->pin_count || reg->vma) -continue ; -list_del (pos); + +for (i =0 ; i <vgpu_fence_sz (vgpu); i++) { + reg =i915_reserve_one_fence (dev_priv); +if (IS_ERR (reg)) + goto out_free_fence; + vgpu->fence.regs[i] = reg; -if (++i ==vgpu_fence_sz (vgpu)) -break ; } -if (i !=vgpu_fence_sz (vgpu)) - goto out_free_fence;_clear_vgpu_fence (vgpu);
@@ -212,13 +207,14 @@ static int alloc_vgpu_fence(struct intel_vgpu *vgpu)intel_runtime_pm_put (dev_priv);return 0 ; out_free_fence: +gvt_vgpu_err ("Failed to alloc fences\n" );/* Return fences to host, if fail */ for (i =0 ; i <vgpu_fence_sz (vgpu); i++) { reg = vgpu->fence.regs[i];if (!reg)continue ; -list_add_tail (®->link, - &dev_priv->mm.fence_list); +i915_giveback_reserved_fence (reg); + vgpu->fence.regs[i] =NULL ; }mutex_unlock (&dev_priv->drm.struct_mutex);intel_runtime_pm_put (dev_priv);
drivers/gpu/drm/i915/i915_drv.h +3 -0
@@ -3650,6 +3650,9 @@ i915_vm_to_ppgtt(struct i915_address_space *vm)/* i915_gem_fence_reg.c */ int __must_check i915_vma_get_fence (struct i915_vma *vma);int __must_check i915_vma_put_fence (struct i915_vma *vma); +struct drm_i915_fence_reg * +i915_reserve_one_fence (struct drm_i915_private *dev_priv); +void i915_giveback_reserved_fence (struct drm_i915_fence_reg *fence);void i915_gem_revoke_fences (struct drm_i915_private *dev_priv);void i915_gem_restore_fences (struct drm_i915_private *dev_priv);
drivers/gpu/drm/i915/i915_gem_fence_reg.c +39 -0
@@ -360,6 +360,45 @@ i915_vma_get_fence(struct i915_vma *vma) }/** +* i915_reserve_one_fence - Reserve a fence for vGPU +* @dev_priv: i915 device private +* +* This function walks the fence regs looking for a free one and remove +* it from the fence_list. It is used to reserve fence for vGPU to use. +*/ +struct drm_i915_fence_reg * +i915_reserve_one_fence (struct drm_i915_private *dev_priv) +{ +struct drm_i915_fence_reg *fence; +int ret; + + fence =fence_find (dev_priv); +if (IS_ERR (fence)) +return fence; + +if (fence->vma) { +/* Force-remove fence from VMA */ + ret =fence_update (fence,NULL ); +if (ret) +return ERR_PTR (ret); + } + +list_del (&fence->link); +return fence; +} + +/** +* i915_giveback_reserved_fence - Reclaim a reserved fence +* @fence: the fence reg +* +* This function add a reserved fence register from vGPU to the fence_list. +*/ +void i915_giveback_reserved_fence (struct drm_i915_fence_reg *fence) +{ +list_add_tail (&fence->link, &fence->i915->mm.fence_list); +} + +/** * i915_gem_revoke_fences - revoke fence state * @dev_priv: i915 device private *
Signature · 6 lines
2.7.4 _______________________________________________ Intel-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Patchwork
CI✓ Fi.CI.BAT: success for drm/i915: Add interface to reserve fence registers for vGPU
== Series Details ==
== Series Details ==
Series: drm/i915: Add interface to reserve fence registers for vGPU
URL : https://patchwork.freedesktop.org/series/29523/
State : success
== Summary ==
Series 29523v1 drm/i915: Add interface to reserve fence registers for vGPU
https://patchwork.freedesktop.org/api/1.0/series/29523/revisions/1/mbox/
Test kms_flip:
Subgroup basic-flip-vs-modeset:
pass -> SKIP (fi-skl-x1585l) fdo#101781fdo#101781 https://bugs.freedesktop.org/show_bug.cgi?id=101781
fi-bdw-5557u total:279 pass:268 dwarn:0 dfail:0 fail:0 skip:11 time:457s fi-bdw-gvtdvm total:279 pass:265 dwarn:0 dfail:0 fail:0 skip:14 time:440s fi-blb-e6850 total:279 pass:224 dwarn:1 dfail:0 fail:0 skip:54 time:359s fi-bsw-n3050 total:279 pass:243 dwarn:0 dfail:0 fail:0 skip:36 time:542s fi-bwr-2160 total:279 pass:184 dwarn:0 dfail:0 fail:0 skip:95 time:257s fi-bxt-j4205 total:279 pass:260 dwarn:0 dfail:0 fail:0 skip:19 time:523s fi-byt-j1900 total:279 pass:254 dwarn:1 dfail:0 fail:0 skip:24 time:522s fi-byt-n2820 total:279 pass:250 dwarn:1 dfail:0 fail:0 skip:28 time:515s fi-elk-e7500 total:279 pass:230 dwarn:0 dfail:0 fail:0 skip:49 time:437s fi-glk-2a total:279 pass:260 dwarn:0 dfail:0 fail:0 skip:19 time:613s fi-hsw-4770 total:279 pass:263 dwarn:0 dfail:0 fail:0 skip:16 time:447s fi-hsw-4770r total:279 pass:263 dwarn:0 dfail:0 fail:0 skip:16 time:425s fi-ilk-650 total:279 pass:229 dwarn:0 dfail:0 fail:0 skip:50 time:428s fi-ivb-3520m total:279 pass:261 dwarn:0 dfail:0 fail:0 skip:18 time:499s fi-ivb-3770 total:279 pass:261 dwarn:0 dfail:0 fail:0 skip:18 time:483s fi-kbl-7500u total:279 pass:261 dwarn:0 dfail:0 fail:0 skip:18 time:479s fi-kbl-7560u total:279 pass:269 dwarn:0 dfail:0 fail:0 skip:10 time:593s fi-kbl-r total:279 pass:261 dwarn:0 dfail:0 fail:0 skip:18 time:596s fi-pnv-d510 total:279 pass:223 dwarn:1 dfail:0 fail:0 skip:55 time:523s fi-skl-6260u total:279 pass:269 dwarn:0 dfail:0 fail:0 skip:10 time:463s fi-skl-6770hq total:279 pass:269 dwarn:0 dfail:0 fail:0 skip:10 time:492s fi-skl-gvtdvm total:279 pass:266 dwarn:0 dfail:0 fail:0 skip:13 time:440s fi-skl-x1585l total:279 pass:268 dwarn:0 dfail:0 fail:0 skip:11 time:479s fi-snb-2520m total:279 pass:251 dwarn:0 dfail:0 fail:0 skip:28 time:544s fi-snb-2600 total:279 pass:249 dwarn:0 dfail:0 fail:1 skip:29 time:401s
fi-skl-6700k failed to connect after reboot
6a305b78140aedc9008bdb7e78e70417a8413bbf drm-tip: 2017y-08m-30d-08h-12m-34s UTC integration manifest 26b12b402e67 drm/i915: Add interface to reserve fence registers for vGPU
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_5535/
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Quoting [email protected] (2017-08-30 09:54:21)
Quoted 5 lines
This patch added two new api to the fence management code:
-i915_reserve_one_fence()will try to find a free fence fromfence_listand force-remove vma if need.
-i915_giveback_reserved_fence()reclaim a reserved fence after vGPU has finished.
Symmetry: reserve_fence, unreserve_fence.
We need a safeguard here so that the host is able to always able allocate to allocate a fence for the display engine. (That requirement should be quite soft for modern hw, nevertheless it should be in the design to prevent overuse from leading to an unusable system.)
-Chris
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Hi chris,
Quoted 9 lines · Chris Wilson
Quoting [email protected] (2017-08-30 09:54:21)
Quoted 5 lines
This patch added two new api to the fence management code:
-i915_reserve_one_fence()will try to find a free fence fromfence_listand force-remove vma if need.
-i915_giveback_reserved_fence()reclaim a reserved fence after vGPU has finished.Symmetry:
reserve_fence,unreserve_fence.
ok, I will rename the functions.
Quoted 5 lines
We need a safeguard here so that the host is able to always able allocate to allocate a fence for the display engine. (That requirement should be quite soft for modern hw, nevertheless it should be in the design to prevent overuse from leading to an unusable system.)
-Chris
Yes, agree. Is there any other components always need a fence ready? otherwise, I will add a safeguard to ensure at least 1 fence register remained for host.
Signature · 2 lines
Thanks, Changbin Du
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Patchwork
CI✗ Fi.CI.IGT: failure for drm/i915: Add interface to reserve fence registers for vGPU
In reply to [email protected]== Series Details ==
== Series Details ==
Series: drm/i915: Add interface to reserve fence registers for vGPU
URL : https://patchwork.freedesktop.org/series/29523/
State : failure
== Summary ==
Test kms_atomic_transition:
Subgroup plane-all-transition-fencing:
skip -> PASS (shard-hsw)
Test kms_properties:
Subgroup plane-properties-legacy:
skip -> PASS (shard-hsw)
Test kms_plane:
Subgroup plane-position-hole-dpms-pipe-C-planes:
skip -> PASS (shard-hsw)
Subgroup plane-panning-bottom-right-suspend-pipe-B-planes:
pass -> SKIP (shard-hsw)
Test kms_plane_multiple:
Subgroup legacy-pipe-E-tiling-y:
incomplete -> SKIP (shard-hsw)
Test kms_flip:
Subgroup flip-vs-expired-vblank-interruptible:
pass -> FAIL (shard-hsw)
Subgroup plain-flip-fb-recreate-interruptible:
fail -> PASS (shard-hsw)shard-hsw total:2230 pass:1228 dwarn:0 dfail:0 fail:19 skip:983 time:9597s
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_5535/shards.html
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PATCH v2 1/1 drm/i915: Add interface to reserve fence registers for vGPU
In reply to [email protected]From: Changbin Du <[email protected]>
In the past, vGPU alloc fence registers by walking through mm.fence_list to find fence which pin_count = 0 and vma is empty. vGPU may not find enough fence registers this way. Because a fence can be bind to vma even though it is not in using. We have found such failure many times these days.
An option to resolve this issue is that we can force-remove fence from vma in this case.
This patch added two new api to the fence management code:
- i915_reserve_fence() will try to find a free fence from fence_list and force-remove vma if need.
- i915_unreserve_fence() reclaim a reserved fence after vGPU has finished.
With this change, the fence management is more clear to work with vGPU. GVTg do not need remove fence from fence_list in private.
v2: (Chris)
- Rename the new api for symmetry.
- Add safeguard to ensure at least 1 fence remained for host display.
--- drivers/gpu/drm/i915/gvt/aperture_gm.c | 26 ++++++++---------- drivers/gpu/drm/i915/i915_drv.h | 3 +++ drivers/gpu/drm/i915/i915_gem_fence_reg.c | 44 +++++++++++++++++++++++++++++++ 3 files changed, 58 insertions(+), 15 deletions(-)
drivers/gpu/drm/i915/gvt/aperture_gm.c +11 -15
@@ -173,8 +173,8 @@ static void free_vgpu_fence(struct intel_vgpu *vgpu)_clear_vgpu_fence (vgpu);for (i =0 ; i <vgpu_fence_sz (vgpu); i++) { reg = vgpu->fence.regs[i]; -list_add_tail (®->link, - &dev_priv->mm.fence_list); +i915_unreserve_fence (reg); + vgpu->fence.regs[i] =NULL ; }mutex_unlock (&dev_priv->drm.struct_mutex);
@@ -187,24 +187,19 @@ static int alloc_vgpu_fence(struct intel_vgpu *vgpu)struct drm_i915_private *dev_priv = gvt->dev_priv;struct drm_i915_fence_reg *reg;int i; -struct list_head *pos, *q;intel_runtime_pm_get (dev_priv);/* Request fences from host */ mutex_lock (&dev_priv->drm.struct_mutex); - i =0 ; -list_for_each_safe (pos, q, &dev_priv->mm.fence_list) { - reg = list_entry(pos, struct drm_i915_fence_reg, link); -if (reg->pin_count || reg->vma) -continue ; -list_del (pos); + +for (i =0 ; i <vgpu_fence_sz (vgpu); i++) { + reg =i915_reserve_fence (dev_priv); +if (IS_ERR (reg)) + goto out_free_fence; + vgpu->fence.regs[i] = reg; -if (++i ==vgpu_fence_sz (vgpu)) -break ; } -if (i !=vgpu_fence_sz (vgpu)) - goto out_free_fence;_clear_vgpu_fence (vgpu);
@@ -212,13 +207,14 @@ static int alloc_vgpu_fence(struct intel_vgpu *vgpu)intel_runtime_pm_put (dev_priv);return 0 ; out_free_fence: +gvt_vgpu_err ("Failed to alloc fences\n" );/* Return fences to host, if fail */ for (i =0 ; i <vgpu_fence_sz (vgpu); i++) { reg = vgpu->fence.regs[i];if (!reg)continue ; -list_add_tail (®->link, - &dev_priv->mm.fence_list); +i915_unreserve_fence (reg); + vgpu->fence.regs[i] =NULL ; }mutex_unlock (&dev_priv->drm.struct_mutex);intel_runtime_pm_put (dev_priv);
drivers/gpu/drm/i915/i915_drv.h +3 -0
@@ -3650,6 +3650,9 @@ i915_vm_to_ppgtt(struct i915_address_space *vm)/* i915_gem_fence_reg.c */ int __must_check i915_vma_get_fence (struct i915_vma *vma);int __must_check i915_vma_put_fence (struct i915_vma *vma); +struct drm_i915_fence_reg * +i915_reserve_fence (struct drm_i915_private *dev_priv); +void i915_unreserve_fence (struct drm_i915_fence_reg *fence);void i915_gem_revoke_fences (struct drm_i915_private *dev_priv);void i915_gem_restore_fences (struct drm_i915_private *dev_priv);
drivers/gpu/drm/i915/i915_gem_fence_reg.c +44 -0
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Signature · 6 lines
2.7.4 _______________________________________________ Intel-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Quoting [email protected] (2017-09-01 08:08:26)
Quoted 9 lines
drivers/gpu/drm/i915/i915_gem_fence_reg.c +1
-0@@ -360,6 +360,50 @@ i915_vma_get_fence(struct i915_vma *vma) }/** +* i915_reserve_fence - Reserve a fence for vGPU
drivers/gpu/drm/i915/i915_gem_fence_reg.c i915_vma_get_fence(struct i915_vma *vma) · line 373
Quoted 10 lines
drivers/gpu/drm/i915/i915_gem_fence_reg.c +10
-0+* @dev_priv: i915 device private +* +* This function walks the fence regs looking for a free one and remove +* it from the fence_list. It is used to reserve fence for vGPU to use. +*/ +struct drm_i915_fence_reg * +i915_reserve_fence (struct drm_i915_private *dev_priv) +{ +struct drm_i915_fence_reg *fence; +int ret;
lockdep_assert_held(&dev_priv->drm.struct_mutex);
A reminder for when we move fences to a seperate mutex.
drivers/gpu/drm/i915/i915_gem_fence_reg.c i915_vma_get_fence(struct i915_vma *vma) · line 378
Quoted 5 lines
drivers/gpu/drm/i915/i915_gem_fence_reg.c +5
-0+ +/* Host at least need one fence available for display engine. */ +if (unlikely (dev_priv->mm.fence_list.prev == + dev_priv->mm.fence_list.next)) +return ERR_PTR (-ENOSPC );
I would prefer one free fence.
int count;
/* Keep at least one fence available for the display engine */ count = 0;list_for_each_entry(fence, &dev_priv->mm.fence_list, link)
count += !fence->pin_count; if (count <= 1) return ERR_PTR(-ENOSPC);
Quoted 14 lines
drivers/gpu/drm/i915/i915_gem_fence_reg.c +14
-0+ + fence =fence_find (dev_priv); +if (IS_ERR (fence)) +return fence; + +if (fence->vma) { +/* Force-remove fence from VMA */ + ret =fence_update (fence,NULL ); +if (ret) +return ERR_PTR (ret); + } + +list_del (&fence->link); +return fence;
drivers/gpu/drm/i915/i915_gem_fence_reg.c i915_vma_get_fence(struct i915_vma *vma) · line 402
Quoted 10 lines
drivers/gpu/drm/i915/i915_gem_fence_reg.c +10
-0+} + +/** +* i915_unreserve_fence - Reclaim a reserved fence +* @fence: the fence reg +* +* This function add a reserved fence register from vGPU to the fence_list. +*/ +void i915_unreserve_fence (struct drm_i915_fence_reg *fence) +{
lockdep_assert_held(&dev_priv->drm.struct_mutex);
If you agree to "one free fence",
Otherwise, we need to look carefully at what happens when the search fails. And that may suggest we need to keep one free per crtc, or that we can survive without (but that usually means giving up on fbc and whatnot, thinking of fbc is why I want to keep one spare).
(Time to write some unittests for find-a-fence.)
-Chris
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Quoted 23 lines · Chris Wilson
Quoting [email protected] (2017-09-01 08:08:26)
Quoted 9 lines
drivers/gpu/drm/i915/i915_gem_fence_reg.c +1
-0@@ -360,6 +360,50 @@ i915_vma_get_fence(struct i915_vma *vma) }/** +* i915_reserve_fence - Reserve a fence for vGPU drivers/gpu/drm/i915/i915_gem_fence_reg.c i915_vma_get_fence(struct i915_vma *vma) · line 373
Quoted 10 lines
drivers/gpu/drm/i915/i915_gem_fence_reg.c +10
-0+* @dev_priv: i915 device private +* +* This function walks the fence regs looking for a free one and remove +* it from the fence_list. It is used to reserve fence for vGPU to use. +*/ +struct drm_i915_fence_reg * +i915_reserve_fence (struct drm_i915_private *dev_priv) +{ +struct drm_i915_fence_reg *fence; +int ret;
lockdep_assert_held(&dev_priv->drm.struct_mutex);
Quoted 2 lines
A reminder for when we move fences to a seperate mutex.
ok.
Quoted 8 lines
drivers/gpu/drm/i915/i915_gem_fence_reg.c i915_vma_get_fence(struct i915_vma *vma) · line 378
Quoted 5 lines
drivers/gpu/drm/i915/i915_gem_fence_reg.c +5
-0+ +/* Host at least need one fence available for display engine. */ +if (unlikely (dev_priv->mm.fence_list.prev == + dev_priv->mm.fence_list.next)) +return ERR_PTR (-ENOSPC );I would prefer one free fence.
Quoted 9 lines
int count;
/* Keep at least one fence available for the display engine */ count = 0;
list_for_each_entry(fence, &dev_priv->mm.fence_list, link)count += !fence->pin_count; if (count <= 1) return ERR_PTR(-ENOSPC);
Got your idea, will update.
Quoted 31 lines
Quoted 14 lines
drivers/gpu/drm/i915/i915_gem_fence_reg.c +14
-0+ + fence =fence_find (dev_priv); +if (IS_ERR (fence)) +return fence; + +if (fence->vma) { +/* Force-remove fence from VMA */ + ret =fence_update (fence,NULL ); +if (ret) +return ERR_PTR (ret); + } + +list_del (&fence->link); +return fence;drivers/gpu/drm/i915/i915_gem_fence_reg.c i915_vma_get_fence(struct i915_vma *vma) · line 402
Quoted 10 lines
drivers/gpu/drm/i915/i915_gem_fence_reg.c +10
-0+} + +/** +* i915_unreserve_fence - Reclaim a reserved fence +* @fence: the fence reg +* +* This function add a reserved fence register from vGPU to the fence_list. +*/ +void i915_unreserve_fence (struct drm_i915_fence_reg *fence) +{
lockdep_assert_held(&dev_priv->drm.struct_mutex);If you agree to "one free fence",
Reviewed-by Chris Wilson <[email protected]>
Quoted 7 lines
Otherwise, we need to look carefully at what happens when the search fails. And that may suggest we need to keep one free per crtc, or that we can survive without (but that usually means giving up on fbc and whatnot, thinking of fbc is why I want to keep one spare).
(Time to write some unittests for find-a-fence.)
-Chris
I agree to "one free fence", which is simpler. Currently GVTg will at most use 4x7=28 fence registers (4 per VM, and up to 7 VMs), so at least 4 will remained for host. I agree to your concern, it is significative.
Signature · 2 lines
Thanks, Changbin Du
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Patchwork
CI✓ Fi.CI.BAT: success for drm/i915: Add interface to reserve fence registers for vGPU (rev2)
In reply to [email protected]== Series Details ==
== Series Details ==
Series: drm/i915: Add interface to reserve fence registers for vGPU (rev2)
URL : https://patchwork.freedesktop.org/series/29523/
State : success
== Summary ==
Series 29523v2 drm/i915: Add interface to reserve fence registers for vGPU
https://patchwork.freedesktop.org/api/1.0/series/29523/revisions/2/mbox/
Test gem_exec_flush:
Subgroup basic-batch-kernel-default-uc:
pass -> FAIL (fi-snb-2600) fdo#100007
Test kms_cursor_legacy:
Subgroup basic-busy-flip-before-cursor-legacy:
fail -> PASS (fi-snb-2600) fdo#100215
Subgroup basic-flip-after-cursor-varying-size:
fail -> PASS (fi-hsw-4770) fdo#102402 +1fdo#100007 https://bugs.freedesktop.org/show_bug.cgi?id=100007
fdo#100215 https://bugs.freedesktop.org/show_bug.cgi?id=100215
fdo#102402 https://bugs.freedesktop.org/show_bug.cgi?id=102402
fi-bdw-5557u total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:457s fi-bdw-gvtdvm total:288 pass:265 dwarn:0 dfail:0 fail:0 skip:23 time:449s fi-blb-e6850 total:288 pass:224 dwarn:1 dfail:0 fail:0 skip:63 time:360s fi-bsw-n3050 total:288 pass:243 dwarn:0 dfail:0 fail:0 skip:45 time:563s fi-bwr-2160 total:288 pass:184 dwarn:0 dfail:0 fail:0 skip:104 time:255s fi-bxt-j4205 total:288 pass:260 dwarn:0 dfail:0 fail:0 skip:28 time:525s fi-byt-j1900 total:288 pass:254 dwarn:1 dfail:0 fail:0 skip:33 time:518s fi-byt-n2820 total:288 pass:250 dwarn:1 dfail:0 fail:0 skip:37 time:519s fi-elk-e7500 total:288 pass:230 dwarn:0 dfail:0 fail:0 skip:58 time:437s fi-glk-2a total:288 pass:260 dwarn:0 dfail:0 fail:0 skip:28 time:610s fi-hsw-4770 total:288 pass:263 dwarn:0 dfail:0 fail:0 skip:25 time:443s fi-hsw-4770r total:288 pass:263 dwarn:0 dfail:0 fail:0 skip:25 time:425s fi-ilk-650 total:288 pass:229 dwarn:0 dfail:0 fail:0 skip:59 time:428s fi-ivb-3520m total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:508s fi-ivb-3770 total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:478s fi-kbl-7500u total:288 pass:264 dwarn:1 dfail:0 fail:0 skip:23 time:517s fi-kbl-7560u total:288 pass:269 dwarn:0 dfail:0 fail:0 skip:19 time:604s fi-kbl-r total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:596s fi-pnv-d510 total:288 pass:223 dwarn:1 dfail:0 fail:0 skip:64 time:529s fi-skl-6260u total:288 pass:269 dwarn:0 dfail:0 fail:0 skip:19 time:468s fi-skl-6700k total:288 pass:265 dwarn:0 dfail:0 fail:0 skip:23 time:531s fi-skl-6770hq total:288 pass:269 dwarn:0 dfail:0 fail:0 skip:19 time:487s fi-skl-gvtdvm total:288 pass:266 dwarn:0 dfail:0 fail:0 skip:22 time:440s fi-skl-x1585l total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:501s fi-snb-2520m total:288 pass:251 dwarn:0 dfail:0 fail:0 skip:37 time:549s fi-snb-2600 total:288 pass:249 dwarn:0 dfail:0 fail:1 skip:38 time:407s
ccf4ca2d93383fe1a234aba83df9c21400216433 drm-tip: 2017y-08m-31d-18h-37m-46s UTC integration manifest f108c11aabb5 drm/i915: Add interface to reserve fence registers for vGPU
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_5557/
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Patchwork
CI✗ Fi.CI.IGT: warning for drm/i915: Add interface to reserve fence registers for vGPU (rev2)
In reply to [email protected]== Series Details ==
== Series Details ==
Series: drm/i915: Add interface to reserve fence registers for vGPU (rev2)
URL : https://patchwork.freedesktop.org/series/29523/
State : warning
== Summary ==
Test kms_vblank:
Subgroup wait-busy:
pass -> SKIP (shard-hsw)shard-hsw total:2265 pass:1231 dwarn:0 dfail:0 fail:17 skip:1017 time:9611s
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_5557/shards.html
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