ARM: dts: meson8b-odroidc1: ethernet support
Subsystems (2)
PATCH 2/2 ARM: dts: meson8b-odroidc1: ethernet support
The Odroid-C1+ board is equipped with an RTL8211F ethernet PHY which supports 10/100/1000 Mbps ethernet.
This patch adds the PHY description to the board DT,
setting the maximum speed to 1 Gbps, and enables the ethernet controller.
--- arch/arm/boot/dts/meson8b-odroidc1.dts | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+)
arch/arm/boot/dts/meson8b-odroidc1.dts +32 -0
@@ -99,3 +99,35 @@ &usb1 { status = "okay"; }; + +ðmac { + status = "okay"; + + snps,reset-gpio = <&gpio GPIOH_4 GPIO_ACTIVE_HIGH>; + snps,reset-active-low; + snps,reset-delays-us = <0 10000 30000>; + + pinctrl-0 = <ð_rgmii_pins>; + pinctrl-names = "default"; + + phy-mode = "rgmii"; + phy-handle = <ð_phy>; + amlogic,tx-delay-ns = <4>; + + mdio { + compatible = "snps,dwmac-mdio"; + #address-cells = <1>; + #size-cells = <0>; + + eth_phy: ethernet-phy at 0 { + /* ethernet PHY RTL8211F */ + compatible = "ethernet-phy-id001c.c916", + "ethernet-phy-ieee802.3-c22"; + reg = <0>; + max-speed = <1000>; + eee-broken-1000t; + interrupt-parent = <&gpio_intc>; + interrupts = <17 IRQ_TYPE_LEVEL_LOW>; + }; + }; +};
Signature · 12 lines
2.15.1
From khilman at baylibre.com Tue Jan 16 17:04:21 2018
From: [email protected] (Kevin Hilman)
Date: Tue, 16 Jan 2018 17:04:21 -0800
Subject: [PATCH v3] ARM64: dts: meson-axg: enable IR controller
In-Reply-To: <[email protected]> (Yixun Lan's
message of "Fri, 15 Dec 2017 22:59:06 +0800")
References: <[email protected]>
Message-ID: <[email protected]>Quoted 3 lines · Yixun Lan
Enable IR remote controller which found in Amlogic's Meson-AXG SoCs.
Signed-off-by Yixun Lan <[email protected]>
I think I forgot to reply to this one, but for the record, this was applied to v4.16/dt64.
Kevin
A message that is not in the archive (sent off-list or not yet received): CAFBinCAYWvZ=kK7+_4DbGr0S8cWTJJ=PzJRdaGG9QSQx-bFUHQ@mail.gmail.com
PATCH 2/2 ARM: dts: meson8b-odroidc1: ethernet support
Hi Martin,
thanks for the review.
Quoted 47 lines · Martin Blumenstingl
Hi Emiliano,
Quoted 6 lines · Emiliano Ingrassia
The Odroid-C1+ board is equipped with an RTL8211F ethernet PHY which supports 10/100/1000 Mbps ethernet.
This patch adds the PHY description to the board DT,
setting the maximum speed to 1 Gbps, and enables the ethernet controller.Signed-off-by Emiliano Ingrassia <[email protected]>I have two minor change-requests - with these you can add my:
Reviewed-by Martin Blumenstingl <[email protected]>Quoted 34 lines
--- arch/arm/boot/dts/meson8b-odroidc1.dts | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+)arch/arm/boot/dts/meson8b-odroidc1.dts +22
-0@@ -99,3 +99,35 @@ &usb1 { status = "okay"; }; + +ðmac { + status = "okay"; + + snps,reset-gpio = <&gpio GPIOH_4 GPIO_ACTIVE_HIGH>; + snps,reset-active-low; + snps,reset-delays-us = <0 10000 30000>; + + pinctrl-0 = <ð_rgmii_pins>; + pinctrl-names = "default"; + + phy-mode = "rgmii"; + phy-handle = <ð_phy>; + amlogic,tx-delay-ns = <4>; + + mdio { + compatible = "snps,dwmac-mdio"; + #address-cells = <1>; + #size-cells = <0>; + + eth_phy: ethernet-phy at 0 { + /* ethernet PHY RTL8211F */
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arch/arm/boot/dts/meson8b-odroidc1.dts line 125
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arch/arm/boot/dts/meson8b-odroidc1.dts +2
-0+ compatible = "ethernet-phy-id001c.c916", + "ethernet-phy-ieee802.3-c22";could you please remove the "ethernet-phy-id001c.c916" compatible? the Ethernet PHY documentation [0] states: 'If the PHY reports an incorrect ID (or none at all) then the "compatible" list may contain an entry with the correct PHY ID'
I have not seen any Amlogic board where the RTL8211F PHY reported an incorrect ID yet
OK, you're correct! I'll test without this and submit a second version.
Quoted 4 lines
On Odroid-C2 we simply add the ID to the comment above:
/* Realtek RTL8211F (0x001cc916) */
Ok.
Quoted 3 lines
the "ethernet-phy-ieee802.3-c22" compatible is fine - but I'm also fine if you remove the whole compatible property (like we have it on Odroid-C2)
Ok, that is also the default so no need to indicate explicitly.
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arch/arm/boot/dts/meson8b-odroidc1.dts line 129
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arch/arm/boot/dts/meson8b-odroidc1.dts +4
-0+ reg = <0>; + max-speed = <1000>; + eee-broken-1000t; + interrupt-parent = <&gpio_intc>;
Quoted 13 lines
could you please add a comment here (which will allow us to specify the IRQs by their GPIO #define later on, without having to calculate what "17" means in the context of Meson8b, as this calculation depends on the SoC) - for example:
/*GPIOH_3*/Quoted 7 lines
arch/arm/boot/dts/meson8b-odroidc1.dts +4
-1+ interrupts = <17 IRQ_TYPE_LEVEL_LOW>; + }; + }; +}; --2.15.1
Ok, sure!
Quoted 2 lines
many thanks for your work!
Thanks for your work and support!
Quoted 5 lines
Regards,
Martin
Regards,
Emiliano
A message that is not in the archive (sent off-list or not yet received): [email protected]
PATCH 2/2 ARM: dts: meson8b-odroidc1: ethernet support
Hi Jerome,
thanks for the review.
Quoted 42 lines · Jerome Brunet
Quoted 41 lines · Emiliano Ingrassia
The Odroid-C1+ board is equipped with an RTL8211F ethernet PHY which supports 10/100/1000 Mbps ethernet.
This patch adds the PHY description to the board DT,
setting the maximum speed to 1 Gbps, and enables the ethernet controller.Signed-off-by Emiliano Ingrassia <[email protected]>--- arch/arm/boot/dts/meson8b-odroidc1.dts | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+)arch/arm/boot/dts/meson8b-odroidc1.dts +23
-0@@ -99,3 +99,35 @@ &usb1 { status = "okay"; }; + +ðmac { + status = "okay"; + + snps,reset-gpio = <&gpio GPIOH_4 GPIO_ACTIVE_HIGH>; + snps,reset-active-low; + snps,reset-delays-us = <0 10000 30000>; + + pinctrl-0 = <ð_rgmii_pins>; + pinctrl-names = "default"; + + phy-mode = "rgmii"; + phy-handle = <ð_phy>; + amlogic,tx-delay-ns = <4>; + + mdio { + compatible = "snps,dwmac-mdio"; + #address-cells = <1>; + #size-cells = <0>; + + eth_phy: ethernet-phy at 0 { + /* ethernet PHY RTL8211F */ + compatible = "ethernet-phy-id001c.c916",
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arch/arm/boot/dts/meson8b-odroidc1.dts line 128
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arch/arm/boot/dts/meson8b-odroidc1.dts +4
-0+ "ethernet-phy-ieee802.3-c22"; + reg = <0>; + max-speed = <1000>; + eee-broken-1000t;You should test against the issue before adding this flags.
Did you have any hang issue while doing iperf test at Gbit speed ? It happens quickly if you are impacted as the c2 is.
Of course I tested for this issue. I experiment a high packet loss while pinging the board without it.
Should I report this in message log?
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arch/arm/boot/dts/meson8b-odroidc1.dts +5
-0+ interrupt-parent = <&gpio_intc>; + interrupts = <17 IRQ_TYPE_LEVEL_LOW>; + }; + }; +};
Jerome Brunet
reviewerPATCH 2/2 ARM: dts: meson8b-odroidc1: ethernet support
Quoted 42 lines · Emiliano Ingrassia
Hi Jerome,
thanks for the review.
Quoted 37 lines · Jerome Brunet
Quoted 36 lines · Emiliano Ingrassia
The Odroid-C1+ board is equipped with an RTL8211F ethernet PHY which supports 10/100/1000 Mbps ethernet.
This patch adds the PHY description to the board DT,
setting the maximum speed to 1 Gbps, and enables the ethernet controller.Signed-off-by Emiliano Ingrassia <[email protected]>--- arch/arm/boot/dts/meson8b-odroidc1.dts | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+)arch/arm/boot/dts/meson8b-odroidc1.dts +18
-0@@ -99,3 +99,35 @@ &usb1 { status = "okay"; }; + +ðmac { + status = "okay"; + + snps,reset-gpio = <&gpio GPIOH_4 GPIO_ACTIVE_HIGH>; + snps,reset-active-low; + snps,reset-delays-us = <0 10000 30000>; + + pinctrl-0 = <ð_rgmii_pins>; + pinctrl-names = "default"; + + phy-mode = "rgmii"; + phy-handle = <ð_phy>; + amlogic,tx-delay-ns = <4>; + + mdio { + compatible = "snps,dwmac-mdio"; + #address-cells = <1>;
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arch/arm/boot/dts/meson8b-odroidc1.dts line 127
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arch/arm/boot/dts/meson8b-odroidc1.dts +8
-0+ #size-cells = <0>; + + eth_phy: ethernet-phy at 0 { + /* ethernet PHY RTL8211F */ + compatible = "ethernet-phy-id001c.c916", + "ethernet-phy-ieee802.3-c22"; + reg = <0>; + max-speed = <1000>;
Do we really this property ? I might be mistaken, but I think it is only useful we you to restrict the available speed. It does not look like it here.
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arch/arm/boot/dts/meson8b-odroidc1.dts line 128
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arch/arm/boot/dts/meson8b-odroidc1.dts +1
-0+ eee-broken-1000t;You should test against the issue before adding this flags.
Did you have any hang issue while doing iperf test at Gbit speed ? It happens quickly if you are impacted as the c2 is.Of course I tested for this issue. I experiment a high packet loss while pinging the board without it.
Should I report this in message log?
I wouldn't have asked if you did, so yes.
Thx
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arch/arm/boot/dts/meson8b-odroidc1.dts +5
-0+ interrupt-parent = <&gpio_intc>; + interrupts = <17 IRQ_TYPE_LEVEL_LOW>; + }; + }; +};
PATCH 2/2 ARM: dts: meson8b-odroidc1: ethernet support
Quoted 46 lines · Jerome Brunet
Quoted 45 lines · Emiliano Ingrassia
Hi Jerome,
thanks for the review.
Quoted 40 lines · Jerome Brunet
Quoted 39 lines · Emiliano Ingrassia
The Odroid-C1+ board is equipped with an RTL8211F ethernet PHY which supports 10/100/1000 Mbps ethernet.
This patch adds the PHY description to the board DT,
setting the maximum speed to 1 Gbps, and enables the ethernet controller.Signed-off-by Emiliano Ingrassia <[email protected]>--- arch/arm/boot/dts/meson8b-odroidc1.dts | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+)arch/arm/boot/dts/meson8b-odroidc1.dts +21
-0@@ -99,3 +99,35 @@ &usb1 { status = "okay"; }; + +ðmac { + status = "okay"; + + snps,reset-gpio = <&gpio GPIOH_4 GPIO_ACTIVE_HIGH>; + snps,reset-active-low; + snps,reset-delays-us = <0 10000 30000>; + + pinctrl-0 = <ð_rgmii_pins>; + pinctrl-names = "default"; + + phy-mode = "rgmii"; + phy-handle = <ð_phy>; + amlogic,tx-delay-ns = <4>; + + mdio { + compatible = "snps,dwmac-mdio"; + #address-cells = <1>; + #size-cells = <0>; + + eth_phy: ethernet-phy at 0 {
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arch/arm/boot/dts/meson8b-odroidc1.dts line 127
Quoted 5 lines
arch/arm/boot/dts/meson8b-odroidc1.dts +5
-0+ /* ethernet PHY RTL8211F */ + compatible = "ethernet-phy-id001c.c916", + "ethernet-phy-ieee802.3-c22"; + reg = <0>; + max-speed = <1000>;Do we really this property ? I might be mistaken, but I think it is only useful we you to restrict the available speed. It does not look like it here.
Ok, the realtek driver has this information in per phy model structures so no need to specify it.
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arch/arm/boot/dts/meson8b-odroidc1.dts line 128
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arch/arm/boot/dts/meson8b-odroidc1.dts +1
-0+ eee-broken-1000t;You should test against the issue before adding this flags.
Did you have any hang issue while doing iperf test at Gbit speed ? It happens quickly if you are impacted as the c2 is.Of course I tested for this issue. I experiment a high packet loss while pinging the board without it.
Should I report this in message log?I wouldn't have asked if you did, so yes.
ThxQuoted 1 line
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arch/arm/boot/dts/meson8b-odroidc1.dts line 133
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arch/arm/boot/dts/meson8b-odroidc1.dts +5
-0+ interrupt-parent = <&gpio_intc>; + interrupts = <17 IRQ_TYPE_LEVEL_LOW>; + }; + }; +};
Thanks,
Emiliano