clk: aspeed: Prevent reset if clock is enabled

According to the Aspeed specification, the reset and enable sequence should be done when the clock is stopped. The specification doesn't define behavior if the reset is done while the clock is enabled.

From testing on the AST2500, the LPC Controller has problems if the clock is reset while enabled.

Therefore, check whether the clock is enabled or not before performing the reset and enable sequence in the Aspeed clock driver.

---

Changes since v1:
- Check and return before the spinlock

 drivers/clk/clk-aspeed.c | 6 ++++++
 1 file changed, 6 insertions(+)

index b67ba14..a26a94f 100644
@@ -221,6 +221,12 @@ static int aspeed_clk_enable(struct clk_hw *hw)
 	u32 clk = BIT(gate->clock_idx);
 	u32 rst = BIT(gate->reset_idx);
 	u32 enval;
+	u32 reg;
+
+	/* Only reset/enable/unreset if clock is stopped */
+	regmap_read(gate->map, ASPEED_CLK_STOP_CTRL, &reg);
+	if (!(reg & clk))
+		return 0;
 
 	spin_lock_irqsave(gate->lock, flags);
 

1.8.3.1