Add SDRAM ECC support for Stratix10
v2 cover Add SDRAM ECC support for Stratix10
From: Thor Thayer <[email protected]>
The Intel Stratix10 platform is an ARM64 but still has many register definitions that are similar to the Arria10. One significant difference is the Stratix10 Secure Monitor handles registers that may be shared by guest OSes at a different exception level. Register access is through an ARM SMC call. Currently, SMC handling is implemented in Stratix10 U-Boot.
Thor Thayer (3):
Documentation: dt: socfpga: Add Stratix10 ECC Manager binding
edac: altera: Add support for Stratix10 SDRAM EDAC
arm64: dts: stratix10: add sdram ecc
.../bindings/arm/altera/socfpga-eccmgr.txt | 35 ++ arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi | 12 + drivers/edac/Kconfig | 2 +- drivers/edac/altera_edac.c | 455 ++++++++++++++++++++- drivers/edac/altera_edac.h | 126 +++++- 5 files changed, 602 insertions(+), 28 deletions(-)
Signature · 1 line
2.7.4
PATCH v2 1/3 Documentation: dt: socfpga: Add Stratix10 ECC Manager binding
From: Thor Thayer <[email protected]>
Add the device tree bindings needed to support the Stratix10 ECC Manager and SDRAM ECC.
---
v2 Remove unused System Manager syscon.
Remove unused SDRAM ECC register defines. Remove unused address, size and range from bindings.
--- .../bindings/arm/altera/socfpga-eccmgr.txt | 35 ++++++++++++++++++++++ 1 file changed, 35 insertions(+)
Documentation/devicetree/bindings/arm/altera/socfpga-eccmgr.txt +35 -0
@@ -231,3 +231,38 @@ Example: <48 IRQ_TYPE_LEVEL_HIGH>; }; }; + +Stratix10 SoCFPGA ECC Manager +The Stratix10 SoC ECC Manager handles the IRQs for each peripheral +in a shared register similar to the Arria10. However, ECC requires +access to registers that can only be read from Secure Monitor with +SMC calls. Therefore the device tree is slightly different. + +Required Properties: +- compatible : Should be "altr,socfpga-s10-ecc-manager" +- interrupts : Should be single bit error interrupt, then double bit error + interrupt. +- interrupt-controller : boolean indicator that ECC Manager is an interrupt controller +- #interrupt-cells : must be set to 2. + +Subcomponents: + +SDRAM ECC +Required Properties: +- compatible : Should be "altr,sdram-edac-s10" +- interrupts : Should be single bit error interrupt, then double bit error + interrupt, in this order. + +Example: + + eccmgr { + compatible = "altr,socfpga-s10-ecc-manager"; + interrupts = <0 15 4>, <0 95 4>; + interrupt-controller; + #interrupt-cells = <2>; + + sdramedac { + compatible = "altr,sdram-edac-s10"; + interrupts = <16 4>, <48 4>; + }; + };
Signature · 1 line
2.7.4
Rob Herring
maintainerPATCH v2 1/3 Documentation: dt: socfpga: Add Stratix10 ECC Manager binding
Quoted 5 lines · thor.thayer at linux.intel.com
From: Thor Thayer <[email protected]>
Add the device tree bindings needed to support the Stratix10 ECC Manager and SDRAM ECC.
Quoted 8 lines
Signed-off-by Thor Thayer <[email protected]>---
v2 Remove unused System Manager syscon.
Remove unused SDRAM ECC register defines. Remove unused address, size and range from bindings.--- .../bindings/arm/altera/socfpga-eccmgr.txt | 35 ++++++++++++++++++++++ 1 file changed, 35 insertions(+)
This should move to bindings/edac/. Can you do that as a follow-up patch?
PATCH v2 2/3 edac: altera: Add support for Stratix10 SDRAM EDAC
In reply to thor.thayer at linux.intel.comFrom: Thor Thayer <[email protected]>
Support for Stratix10 SDRAM ECC requires the use of SMC calls to Secure Monitor for accessing registers.
---
v2 Use ARCH_STRATIX10 for Kconfig dependency.
Use SPDX license headers.
Remove unused SysMan syscon and regmap. Remove unused SDRAM ECC register mapping. Remove spinlock. Not needed until more ECC blocks.
--- drivers/edac/Kconfig | 2 +- drivers/edac/altera_edac.c | 455 +++++++++++++++++++++++++++++++++++++++++++-- drivers/edac/altera_edac.h | 126 +++++++++++-- 3 files changed, 555 insertions(+), 28 deletions(-)
drivers/edac/Kconfig +1 -1
@@ -374,7 +374,7 @@ config EDAC_THUNDERX config EDAC_ALTERA bool "Altera SOCFPGA ECC" - depends on EDAC=y && ARCH_SOCFPGA + depends on EDAC=y && (ARCH_SOCFPGA || ARCH_STRATIX10) help Support for error detection and correction on the Altera SOCs. This must be selected for SDRAM ECC.
drivers/edac/altera_edac.c +441 -14
491 lines not on this page · raw message
drivers/edac/altera_edac.h +113 -13
164 lines not on this page · raw message
Signature · 1 line
2.7.4
PATCH v2 3/3 arm64: dts: stratix10: add sdram ecc
In reply to thor.thayer at linux.intel.comFrom: Thor Thayer <[email protected]>
Add the Stratix10 ECC Manager and SDRAM EDAC nodes to the device tree.
---
v2 Remove unused SysMan syscon
Remove unused SDRAM ECC register defines Remove unused address, size and range from device tree.
--- arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+)
arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi +12 -0
@@ -387,5 +387,17 @@ resets = <&rst WATCHDOG3_RESET>; status = "disabled"; }; + + eccmgr { + compatible = "altr,socfpga-s10-ecc-manager"; + interrupts = <0 15 4>, <0 95 4>; + interrupt-controller; + #interrupt-cells = <2>; + + sdramedac { + compatible = "altr,sdram-edac-s10"; + interrupts = <16 4>, <48 4>; + }; + }; }; };
Signature · 1 line
2.7.4
Borislav Petkov
maintainerPATCH v2 3/3 arm64: dts: stratix10: add sdram ecc
Quoted 40 lines · thor.thayer at linux.intel.com
From: Thor Thayer <[email protected]>
Add the Stratix10 ECC Manager and SDRAM EDAC nodes to the device tree.
Signed-off-by Thor Thayer <[email protected]>---
v2 Remove unused SysMan syscon
Remove unused SDRAM ECC register defines Remove unused address, size and range from device tree.--- arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+)arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi +12
-0@@ -387,5 +387,17 @@ resets = <&rst WATCHDOG3_RESET>; status = "disabled"; }; + + eccmgr { + compatible = "altr,socfpga-s10-ecc-manager"; + interrupts = <0 15 4>, <0 95 4>; + interrupt-controller; + #interrupt-cells = <2>; + + sdramedac { + compatible = "altr,sdram-edac-s10"; + interrupts = <16 4>, <48 4>; + }; + }; }; };Signature · 3 lines
2.7.4 --
Hey Rob,
ACK here too?
Also, this one:
https://lkml.kernel.org/r/1525203036-21774-1-git-send-email-thor.thayer at linux.intel.com
?
Thx.
Signature · 4 lines
Regards/Gruss,
Boris.
Good mailing practices for 400: avoid top-posting and trim the reply.PATCH v2 3/3 arm64: dts: stratix10: add sdram ecc
Quoted 44 lines · Borislav Petkov
Quoted 39 lines · thor.thayer at linux.intel.com
From: Thor Thayer <[email protected]>
Add the Stratix10 ECC Manager and SDRAM EDAC nodes to the device tree.
Signed-off-by Thor Thayer <[email protected]>---
v2 Remove unused SysMan syscon
Remove unused SDRAM ECC register defines Remove unused address, size and range from device tree.--- arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+)arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi +12
-1@@ -387,5 +387,17 @@ resets = <&rst WATCHDOG3_RESET>; status = "disabled"; }; + + eccmgr { + compatible = "altr,socfpga-s10-ecc-manager"; + interrupts = <0 15 4>, <0 95 4>; + interrupt-controller; + #interrupt-cells = <2>; + + sdramedac { + compatible = "altr,sdram-edac-s10"; + interrupts = <16 4>, <48 4>; + }; + }; }; }; --2.7.4
Quoted 1 line
--
Hey Rob,
Quoted 8 lines
ACK here too?
Also, this one:
https://lkml.kernel.org/r/1525203036-21774-1-git-send-email-thor.thayer at linux.intel.com
?
Just in case you need mine, since the edits here match what was in the in the bindings doc.
Thanks,
Dinh
PATCH v2 3/3 arm64: dts: stratix10: add sdram ecc
Hi Boris,
Quoted 51 lines · Dinh Nguyen
Quoted 50 lines · Borislav Petkov
Quoted 39 lines · thor.thayer at linux.intel.com
From: Thor Thayer <[email protected]>
Add the Stratix10 ECC Manager and SDRAM EDAC nodes to the device tree.
Signed-off-by Thor Thayer <[email protected]>---
v2 Remove unused SysMan syscon
Remove unused SDRAM ECC register defines Remove unused address, size and range from device tree.--- arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+)arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi +12
-1@@ -387,5 +387,17 @@ resets = <&rst WATCHDOG3_RESET>; status = "disabled"; }; + + eccmgr { + compatible = "altr,socfpga-s10-ecc-manager"; + interrupts = <0 15 4>, <0 95 4>; + interrupt-controller; + #interrupt-cells = <2>; + + sdramedac { + compatible = "altr,sdram-edac-s10"; + interrupts = <16 4>, <48 4>; + }; + }; }; }; --2.7.4
Quoted 1 line
--
Hey Rob,
ACK here too?
Also, this one:
https://lkml.kernel.org/r/1525203036-21774-1-git-send-email-thor.thayer at linux.intel.com
Quoted 8 lines
Quoted 2 lines
?
Just in case you need mine, since the edits here match what was in the in the bindings doc.
Acked-by Dinh Nguyen <[email protected]>
Do you mind if I take this patch through arm-soc? I have a pull request to arm-soc that is pending.
http://lists.infradead.org/pipermail/linux-arm-kernel/2018-April/573133.html
In that pull request, there is a patch:
This patch has some major changes to the socfpga_stratix10.dtsi file that will conflict with this patch.
If it's okay with you.
Thanks,
Dinh
Borislav Petkov
maintainerPATCH v2 3/3 arm64: dts: stratix10: add sdram ecc
Quoted 1 line · Dinh Nguyen
Do you mind if I take this patch through arm-soc?
Sure, but you have to give me an immutable branch which I can merge into my tree so that the functionality in 2/3 can get used when it lands in linux-next and later in mainline.
So please take it and give me the tag (I see you're using tags) which you're sending up.
Thx.
Signature · 4 lines
Regards/Gruss,
Boris.
Good mailing practices for 400: avoid top-posting and trim the reply.PATCH v2 3/3 arm64: dts: stratix10: add sdram ecc
Hi Boris,
Quoted 10 lines · Borislav Petkov
Quoted 1 line · Dinh Nguyen
Do you mind if I take this patch through arm-soc?
Sure, but you have to give me an immutable branch which I can merge into my tree so that the functionality in 2/3 can get used when it lands in linux-next and later in mainline.
So please take it and give me the tag (I see you're using tags) which you're sending up.
Please this tag socfpga_updates_for_v4.18_part2 at :
git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux.git
Thanks,
Dinh