Add suppport for sn65dsi86 bridge chip and Innolux 2k edp panel
Subsystems (6)
v9 cover Add suppport for sn65dsi86 bridge chip and Innolux 2k edp panel
Changes in current patchset:
- Remove dsi register/attach from bridge probe, since dsi dev register completion also waits for any panel or bridge to get added. This creates deadlock situation when bridge driver calls dsi dev register and attach before bridge add, in its probe function.
- Fix issues faced during testing of bridge driver on actual HW.
Sandeep Panda (4):
drm/bridge: add support for sn65dsi86 bridge driver
dt-bindings: drm/bridge: Document sn65dsi86 bridge bindings drm/panel: add Innolux TV123WAM panel driver support
dt-bindings: drm/panel: Document Innolux TV123WAM panel bindings
.../bindings/display/bridge/ti,sn65dsi86.txt | 90 +++ .../bindings/display/panel/innolux,tv123wam.txt | 20 + drivers/gpu/drm/bridge/Kconfig | 9 + drivers/gpu/drm/bridge/Makefile | 1 + drivers/gpu/drm/bridge/ti-sn65dsi86.c | 691 +++++++++++++++++++++ drivers/gpu/drm/panel/panel-simple.c | 27 + 6 files changed, 838 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/bridge/ti,sn65dsi86.txt create mode 100644 Documentation/devicetree/bindings/display/panel/innolux,tv123wam.txt create mode 100644 drivers/gpu/drm/bridge/ti-sn65dsi86.c
Signature · 7 lines
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project _______________________________________________ Freedreno mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/freedreno
A message that is not in the archive (sent off-list or not yet received): 1528888127-31954-1-git-send-email-spanda-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org
PATCH v9 2/4 dt-bindings: drm/bridge: Document sn65dsi86 bridge bindings
Document the bindings used for the sn65dsi86 DSI to eDP bridge.
Changes in v1:
- Rephrase the dt-binding descriptions to be more inline with existing bindings (Andrzej Hajda).
- Add missing dt-binding that are parsed by corresponding driver (Andrzej Hajda).
Changes in v2:
- Remove edp panel specific dt-binding entries. Only keep bridge
specific entries (Sean Paul).
- Remove custom-modes dt entry since its usage is removed from driver also (Sean Paul).
- Remove is-pluggable dt entry since this will not be needed anymore (Sean Paul).
Changes in v3:
- Remove irq-gpio dt entry and instead populate is an interrupt property (Rob Herring).
Changes in v4:
- Add link to bridge chip datasheet (Stephen Boyd)
- Add vpll and vcc regulator supply bindings (Stephen Boyd)
- Add ref clk optional dt binding (Stephen Boyd)
- Add gpio-controller optional dt binding (Stephen Boyd)
Changes in v5:
- Use clock property to specify the input refclk (Stephen Boyd).
- Update gpio cell and pwm cell numbers (Stephen Boyd).
Changes in v6:
- Add property to mention the lane mapping scheme and polarity inversion (Stephen Boyd).
Changes in v7:
- Detail description of lane mapping scheme dt property (Andrzej Hajda/ Rob Herring).
- Removed HDP gpio binding, since the bridge uses IRQ signal to determine HPD, and IRQ property is already documented in binding.
Changes in v8:
- Removed unnecessary explanation of lane mapping and polarity dt property, since these are already explained in media/video-interface dt binidng (Rob Herring).
--- .../bindings/display/bridge/ti,sn65dsi86.txt | 90 ++++++++++++++++++++++ 1 file changed, 90 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/bridge/ti,sn65dsi86.txt
Documentation/devicetree/bindings/display/bridge/ti,sn65dsi86.txt new file +90 -0
@@ -0,0 +1,90 @@ +SN65DSI86 DSI to eDP bridge chip +-------------------------------- + +This is the binding for Texas Instruments SN65DSI86 bridge. +http://www.ti.com/general/docs/lit/getliterature.tsp?genericPartNumber=sn65dsi86&fileType=pdf + +Required properties: +- compatible: Must be "ti,sn65dsi86" +- reg: i2c address of the chip, 0x2d as per datasheet +- enable-gpios: OF device-tree gpio specification for bridge_en pin (active high) + +- vccio-supply: A 1.8V supply that powers up the digital IOs. +- vpll-supply: A 1.8V supply that powers up the displayport PLL. +- vcca-supply: A 1.2V supply that powers up the analog circuits. +- vcc-supply: A 1.2V supply that powers up the digital core. + +Optional properties: +- interrupts: Specifier for the SN65DSI86 interrupt line. + +- ddc-i2c-bus: phandle of the I2C controller used for DDC EDID probing + +- gpio-controller: Marks the device has a GPIO controller. +- #gpio-cells : Should be two. The first cell is the pin number and + the second cell is used to specify flags. + See ../../gpio/gpio.txt for more information. +- #pwm-cells : Should be one. See ../../pwm/pwm.txt for description of + the cell formats. + +- clock-names: should be "refclk" +- clocks: Specification for input reference clock. The reference + clock rate must be 12 MHz, 19.2 MHz, 26 MHz, 27 MHz or 38.4 MHz. + +- data-lanes: Specification to describe the logical to physical lane + mapping scheme. See ../../media/video-interface.txt for more + information. +- lane-polarities: Specification to describe the polarity of physical lanes. + See ../../media/video-interface.txt for more information. + +Required nodes: +This device has two video ports. Their connections are modelled using the +OF graph bindings specified in Documentation/devicetree/bindings/graph.txt. + +- Video port 0 for DSI input +- Video port 1 for eDP output + +Example +------- + +edp-bridge@2d { + compatible = "ti,sn65dsi86"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x2d>; + + enable-gpios = <&msmgpio 33 GPIO_ACTIVE_HIGH>; + interrupt-parent = <&gpio3>; + interrupts = <4 IRQ_TYPE_EDGE_FALLING>; + + vccio-supply = <&pm8916_l17>; + vcca-supply = <&pm8916_l6>; + vpll-supply = <&pm8916_l17>; + vcc-supply = <&pm8916_l6>; + + clock-names = "refclk"; + clocks = <&input_refclk>; + + data-lanes = <2 1 3 0>; + lane-polarities = <0 1 0 1>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + edp_bridge_in: endpoint { + remote-endpoint = <&dsi_out>; + }; + }; + + port@1 { + reg = <1>; + + edp_bridge_out: endpoint { + remote-endpoint = <&edp_panel_in>; + }; + }; + }; +}
Signature · 7 lines
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project _______________________________________________ Freedreno mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/freedreno
A message that is not in the archive (sent off-list or not yet received): 1528888127-31954-3-git-send-email-spanda-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org
Re: [PATCH v9 2/4] dt-bindings: drm/bridge: Document sn65dsi86 bridge bindings
Quoted 82 lines · Sandeep Panda
Document the bindings used for the sn65dsi86 DSI to eDP bridge.
Changes in v1:
- Rephrase the dt-binding descriptions to be more inline with existing bindings (Andrzej Hajda).
- Add missing dt-binding that are parsed by corresponding driver (Andrzej Hajda).Changes in v2:
- Remove edp panel specific dt-binding entries. Only keep bridge
specific entries (Sean Paul).
- Remove custom-modes dt entry since its usage is removed from driver also (Sean Paul).
- Remove is-pluggable dt entry since this will not be needed anymore (Sean Paul).Changes in v3:
- Remove irq-gpio dt entry and instead populate is an interrupt property (Rob Herring).Changes in v4:
- Add link to bridge chip datasheet (Stephen Boyd)
- Add vpll and vcc regulator supply bindings (Stephen Boyd)
- Add ref clk optional dt binding (Stephen Boyd)
- Add gpio-controller optional dt binding (Stephen Boyd)Changes in v5:
- Use clock property to specify the input refclk (Stephen Boyd).
- Update gpio cell and pwm cell numbers (Stephen Boyd).Changes in v6:
- Add property to mention the lane mapping scheme and polarity inversion (Stephen Boyd).Changes in v7:
- Detail description of lane mapping scheme dt property (Andrzej Hajda/ Rob Herring).
- Removed HDP gpio binding, since the bridge uses IRQ signal to determine HPD, and IRQ property is already documented in binding.Changes in v8:
- Removed unnecessary explanation of lane mapping and polarity dt property, since these are already explained in media/video-interface dt binidng (Rob Herring).Signed-off-by Sandeep Panda <[email protected]>--- .../bindings/display/bridge/ti,sn65dsi86.txt | 90 ++++++++++++++++++++++ 1 file changed, 90 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/bridge/ti,sn65dsi86.txtDocumentation/devicetree/bindings/display/bridge/ti,sn65dsi86.txt new file +27
-0@@ -0,0 +1,90 @@ +SN65DSI86 DSI to eDP bridge chip +-------------------------------- + +This is the binding for Texas Instruments SN65DSI86 bridge. +http://www.ti.com/general/docs/lit/getliterature.tsp?genericPartNumber=sn65dsi86&fileType=pdf + +Required properties: +- compatible: Must be "ti,sn65dsi86" +- reg: i2c address of the chip, 0x2d as per datasheet +- enable-gpios: OF device-tree gpio specification for bridge_en pin (active high) + +- vccio-supply: A 1.8V supply that powers up the digital IOs. +- vpll-supply: A 1.8V supply that powers up the displayport PLL. +- vcca-supply: A 1.2V supply that powers up the analog circuits. +- vcc-supply: A 1.2V supply that powers up the digital core. + +Optional properties: +- interrupts: Specifier for the SN65DSI86 interrupt line. + +- ddc-i2c-bus: phandle of the I2C controller used for DDC EDID probing + +- gpio-controller: Marks the device has a GPIO controller. +- #gpio-cells : Should be two. The first cell is the pin number and + the second cell is used to specify flags. + See ../../gpio/gpio.txt for more information. +- #pwm-cells : Should be one. See ../../pwm/pwm.txt for description of + the cell formats.
Documentation/devicetree/bindings/display/bridge/ti,sn65dsi86.txt line 37
Quoted 10 lines
Documentation/devicetree/bindings/display/bridge/ti,sn65dsi86.txt new file +10
-0+ +- clock-names: should be "refclk" +- clocks: Specification for input reference clock. The reference + clock rate must be 12 MHz, 19.2 MHz, 26 MHz, 27 MHz or 38.4 MHz. + +- data-lanes: Specification to describe the logical to physical lane + mapping scheme. See ../../media/video-interface.txt for more + information. +- lane-polarities: Specification to describe the polarity of physical lanes. + See ../../media/video-interface.txt for more information.
You are still defining the properties here. All you need is:
data-lanes: See ../../media/video-interface.txt
Perhaps you need to say should be 4 lanes, but OTOH everything tends to be 4 lanes.
Rob
_______________________________________________
Freedreno mailing list
[email protected]
https://lists.freedesktop.org/mailman/listinfo/freedreno
A message that is not in the archive (sent off-list or not yet received): CAL_JsqKFDwkf4+J2=sev3Dxj-hwB_7VTBa8ASDFL53s1dSc4Ug-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org
Re: [PATCH v9 2/4] dt-bindings: drm/bridge: Document sn65dsi86 bridge bindings
Quoting Rob Herring (2018-06-13 08:03:53)
Quoted 25 lines · Sandeep Panda
Quoted 11 lines
Documentation/devicetree/bindings/display/bridge/ti,sn65dsi86.txt new file +11
-0+Optional properties: +- interrupts: Specifier for the SN65DSI86 interrupt line. + +- ddc-i2c-bus: phandle of the I2C controller used for DDC EDID probing + +- gpio-controller: Marks the device has a GPIO controller. +- #gpio-cells : Should be two. The first cell is the pin number and + the second cell is used to specify flags. + See ../../gpio/gpio.txt for more information. +- #pwm-cells : Should be one. See ../../pwm/pwm.txt for description of + the cell formats.Documentation/devicetree/bindings/display/bridge/ti,sn65dsi86.txt line 37
Quoted 10 lines
Documentation/devicetree/bindings/display/bridge/ti,sn65dsi86.txt new file +10
-0+ +- clock-names: should be "refclk" +- clocks: Specification for input reference clock. The reference + clock rate must be 12 MHz, 19.2 MHz, 26 MHz, 27 MHz or 38.4 MHz. + +- data-lanes: Specification to describe the logical to physical lane + mapping scheme. See ../../media/video-interface.txt for more + information. +- lane-polarities: Specification to describe the polarity of physical lanes. + See ../../media/video-interface.txt for more information.You are still defining the properties here. All you need is:
Quoted 5 lines
data-lanes: See
../../media/video-interface.txtPerhaps you need to say should be 4 lanes, but OTOH everything tends to be 4 lanes.
Maybe also indicate what logical to physical data lanes are being remapped by saying something to the effect of "logical to physical DSI lane mapping scheme".
_______________________________________________
Freedreno mailing list
[email protected]
https://lists.freedesktop.org/mailman/listinfo/freedreno
PATCH v9 3/4 drm/panel: add Innolux TV123WAM panel driver support
In reply to a message not in the archiveAdd support for Innolux TV123WAM, which is a 12.3" eDP display panel with 2160x1440 resolution.
Changes in v1:
- Add the compatibility string, display_mode and panel_desc structures in alphabetical order (Sean Paul).
--- drivers/gpu/drm/panel/panel-simple.c | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+)
drivers/gpu/drm/panel/panel-simple.c +27 -0
@@ -1190,6 +1190,30 @@ static void panel_simple_shutdown(struct device *dev) }, }; +static const struct drm_display_mode innolux_tv123wam_mode = { + .clock =206016 , + .hdisplay =2160 , + .hsync_start =2160 +48 , + .hsync_end =2160 +48 +32 , + .htotal =2160 +48 +32 +80 , + .vdisplay =1440 , + .vsync_start =1440 +3 , + .vsync_end =1440 +3 +10 , + .vtotal =1440 +3 +10 +27 , + .vrefresh =60 , + .flags =DRM_MODE_FLAG_PHSYNC |DRM_MODE_FLAG_PVSYNC , +}; + +static const struct panel_desc innolux_tv123wam = { + .modes = &innolux_tv123wam_mode, + .num_modes =1 , + .bpc =8 , + .size = { + .width =259 , + .height =173 , + }, +}; +static const struct drm_display_mode innolux_zj070na_01p_mode = { .clock =51501 , .hdisplay =1024 ,
@@ -2037,6 +2061,9 @@ static void panel_simple_shutdown(struct device *dev) .compatible = "innolux,n156bge-l21", .data = &innolux_n156bge_l21, }, { + .compatible = "innolux,tv123wam", + .data = &innolux_tv123wam, + }, { .compatible = "innolux,zj070na-01p", .data = &innolux_zj070na_01p, }, {
Signature · 7 lines
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project _______________________________________________ Freedreno mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/freedreno
PATCH v9 4/4 dt-bindings: drm/panel: Document Innolux TV123WAM panel bindings
In reply to a message not in the archiveInnolux TV123WAM is a 12.3" eDP display panel with 2160x1440 resolution, which can be supported by simple panel driver.
Changes in v1:
- Make use of simple panel driver instead of creating a new driver for this panel (Sean Paul).
- Combine dt-binding and driver changes into one patch as done by other existing panel support changes.
Changes in v2:
- Separate driver change from dt-binding documentation (Rob Herring).
- Add the properties from simple-panel binding that are applicable to this panel (Rob Herring).
--- .../bindings/display/panel/innolux,tv123wam.txt | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/panel/innolux,tv123wam.txt
Documentation/devicetree/bindings/display/panel/innolux,tv123wam.txt new file +20 -0
@@ -0,0 +1,20 @@ +Innolux TV123WAM 12.3 inch eDP 2K display panel + +This binding is compatible with the simple-panel binding, which is specified +in simple-panel.txt in this directory. + +Required properties: +- compatible: should be "innolux,tv123wam" +- power-supply: regulator to provide the supply voltage + +Optional properties: +- enable-gpios: GPIO pin to enable or disable the panel +- backlight: phandle of the backlight device attached to the panel + +Example: + panel_edp: panel-edp { + compatible = "innolux,tv123wam"; + enable-gpios = <&msmgpio 31 GPIO_ACTIVE_LOW>; + power-supply = <&pm8916_l2>; + backlight = <&backlight>; + };
Signature · 7 lines
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project _______________________________________________ Freedreno mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/freedreno