x86: QEMU side support on MSR based features

Define FeatureWordType.
Expand FeatureWordInfo to support both CPUID type feature word as well as MSR type's.
Change feature_word_info[] accordingly.

Signed-off-by Robert Hoo <[email protected]>

---
 target/i386/cpu.c | 133 ++++++++++++++++++++++++++++++++++++++----------------
 target/i386/cpu.h |   5 ++
 2 files changed, 99 insertions(+), 39 deletions(-)

target/i386/cpu.c +17 -5

index ba7abe5..f7c70d9 100644
@@ -770,17 +770,36 @@ static void x86_cpu_vendor_words2str(char *dst, uint32_t vendor1,
           /* missing:
           CPUID_XSAVE_XSAVEC, CPUID_XSAVE_XSAVES */
 
+typedef enum FeatureWordType {
+   CPUID_FEATURE_WORD,
+   MSR_FEATURE_WORD,
+} FeatureWordType;
+
 typedef struct FeatureWordInfo {
-    /* feature flags names are taken from "Intel Processor Identification and
+    FeatureWordType type;
+   /* feature flags names are taken from "Intel Processor Identification and
      * the CPUID Instruction" and AMD's "CPUID Specification".
      * In cases of disagreement between feature naming conventions,
      * aliases may be added.
      */
     const char *feat_names[32];
-    uint32_t cpuid_eax;   /* Input EAX for CPUID */
-    bool cpuid_needs_ecx; /* CPUID instruction uses ECX as input */
-    uint32_t cpuid_ecx;   /* Input ECX value for CPUID */
-    int cpuid_reg;        /* output register (R_* constant) */
+    union {
+        /* If type==CPUID_FEATURE_WORD */
+        struct {
+            uint32_t eax;   /* Input EAX for CPUID */
+            bool needs_ecx; /* CPUID instruction uses ECX as input */
+            uint32_t ecx;   /* Input ECX value for CPUID */
+            int reg;        /* output register (R_* constant) */
+        } cpuid;
+        /* If type==MSR_FEATURE_WORD */
+        struct {

target/i386/cpu.c +8 -0

+    /*Below are MSR exposed features*/
+    [FEATURE_WORDS_ARCH_CAPABILITIES] = {
+        .type = MSR_FEATURE_WORD,
+        .feat_names = {
+            "rdctl-no", "ibrs-all", "rsba", NULL,
+            "ssb-no", NULL, NULL, NULL,
+            NULL, NULL, NULL, NULL,
+            NULL, NULL, NULL, NULL,

};

typedef struct X86RegisterInfo32 {

target/i386/cpu.h +5 -0

index cddf9d9..9e8879e 100644
@@ -502,9 +502,14 @@ typedef enum FeatureWord {
     FEAT_6_EAX,         /* CPUID[6].EAX */
     FEAT_XSAVE_COMP_LO, /* CPUID[EAX=0xd,ECX=0].EAX */
     FEAT_XSAVE_COMP_HI, /* CPUID[EAX=0xd,ECX=0].EDX */
+    FEATURE_WORDS_NUM_CPUID,
+    FEATURE_WORDS_FIRST_MSR = FEATURE_WORDS_NUM_CPUID,
+    FEATURE_WORDS_ARCH_CAPABILITIES = FEATURE_WORDS_FIRST_MSR,
     FEATURE_WORDS,
 } FeatureWord;
 
+#define FEATURE_WORDS_NUM_MSRS (FEATURE_WORDS - FEATURE_WORDS_FIRST_MSR)
+
 typedef uint32_t FeatureWordArray[FEATURE_WORDS];
 
 /* cpuid_features bits */

Signature · 1 line

1.8.3.1

Quoted 24 lines

target/i386/cpu.c +13 -5

+
 typedef struct FeatureWordInfo {
-    /* feature flags names are taken from "Intel Processor Identification and
+    FeatureWordType type;
+   /* feature flags names are taken from "Intel Processor Identification and
      * the CPUID Instruction" and AMD's "CPUID Specification".
      * In cases of disagreement between feature naming conventions,
      * aliases may be added.
      */
     const char *feat_names[32];
-    uint32_t cpuid_eax;   /* Input EAX for CPUID */
-    bool cpuid_needs_ecx; /* CPUID instruction uses ECX as input */
-    uint32_t cpuid_ecx;   /* Input ECX value for CPUID */
-    int cpuid_reg;        /* output register (R_* constant) */
+    union {
+        /* If type==CPUID_FEATURE_WORD */
+        struct {
+            uint32_t eax;   /* Input EAX for CPUID */
+            bool needs_ecx; /* CPUID instruction uses ECX as input */
+            uint32_t ecx;   /* Input ECX value for CPUID */
+            int reg;        /* output register (R_* constant) */
+        } cpuid;
+        /* If type==MSR_FEATURE_WORD */
+        struct {

target/i386/cpu.c static void x86_cpu_vendor_words2str(char *dst, uint32_t vendor1, · line 805

Quoted 10 lines

target/i386/cpu.c +7 -0

+            uint32_t index;
+            struct {   /*CPUID that enumerate this MSR*/
+                FeatureWord cpuid_class;
+                uint32_t    cpuid_flag;
+            } cpuid_dep;
+        } msr;
+    };
     uint32_t tcg_features; /* Feature flags supported by TCG */
     uint32_t unmigratable_flags; /* Feature flags known to be unmigratable */
     uint32_t migratable_flags; /* Feature flags known to be migratable */

The data structure change looks good, but you are breaking the build if you touch them without updating the existing code. If you break the build in your series, you break git-bisect.

[...]

Quoted 8 lines

target/i386/cpu.c +8 -0

+    /*Below are MSR exposed features*/
+    [FEATURE_WORDS_ARCH_CAPABILITIES] = {
+        .type = MSR_FEATURE_WORD,
+        .feat_names = {
+            "rdctl-no", "ibrs-all", "rsba", NULL,
+            "ssb-no", NULL, NULL, NULL,
+            NULL, NULL, NULL, NULL,
+            NULL, NULL, NULL, NULL,

target/i386/cpu.c static FeatureWordInfo feature_word_info[FEATURE_WORDS] = { · line 1143

Quoted 10 lines

target/i386/cpu.c +10 -0

+            NULL, NULL, NULL, NULL,
+            NULL, NULL, NULL, NULL,
+            NULL, NULL, NULL, NULL,
+            NULL, NULL, NULL, NULL,
+        },
+        .msr = { .index = MSR_IA32_ARCH_CAPABILITIES,
+                .cpuid_dep = { FEAT_7_0_EDX,
+                    CPUID_7_0_EDX_ARCH_CAPABILITIES }
+                },
+    },

I suggest moving this hunk to a separate patch: first we refactor the existing code without changing behavior or adding new features, then we add the new features.

Quoted 26 lines

};

typedef struct X86RegisterInfo32 {

target/i386/cpu.h +5 -0

index cddf9d9..9e8879e 100644
@@ -502,9 +502,14 @@ typedef enum FeatureWord {
     FEAT_6_EAX,         /* CPUID[6].EAX */
     FEAT_XSAVE_COMP_LO, /* CPUID[EAX=0xd,ECX=0].EAX */
     FEAT_XSAVE_COMP_HI, /* CPUID[EAX=0xd,ECX=0].EDX */
+    FEATURE_WORDS_NUM_CPUID,
+    FEATURE_WORDS_FIRST_MSR = FEATURE_WORDS_NUM_CPUID,
+    FEATURE_WORDS_ARCH_CAPABILITIES = FEATURE_WORDS_FIRST_MSR,
     FEATURE_WORDS,
 } FeatureWord;
 
+#define FEATURE_WORDS_NUM_MSRS (FEATURE_WORDS - FEATURE_WORDS_FIRST_MSR)
+
 typedef uint32_t FeatureWordArray[FEATURE_WORDS];
 
 /* cpuid_features bits */

Signature · 1 line

1.8.3.1

On Fri, 2018-08-17 at 00:10 -0300, Eduardo Habkost wrote:
[trim...]

Quoted 35 lines

Quoted 24 lines

target/i386/cpu.c +13 -5

+
 typedef struct FeatureWordInfo {
-    /* feature flags names are taken from "Intel Processor Identification and
+    FeatureWordType type;
+   /* feature flags names are taken from "Intel Processor Identification and
      * the CPUID Instruction" and AMD's "CPUID Specification".
      * In cases of disagreement between feature naming conventions,
      * aliases may be added.
      */
     const char *feat_names[32];
-    uint32_t cpuid_eax;   /* Input EAX for CPUID */
-    bool cpuid_needs_ecx; /* CPUID instruction uses ECX as input */
-    uint32_t cpuid_ecx;   /* Input ECX value for CPUID */
-    int cpuid_reg;        /* output register (R_* constant) */
+    union {
+        /* If type==CPUID_FEATURE_WORD */
+        struct {
+            uint32_t eax;   /* Input EAX for CPUID */
+            bool needs_ecx; /* CPUID instruction uses ECX as input */
+            uint32_t ecx;   /* Input ECX value for CPUID */
+            int reg;        /* output register (R_* constant) */
+        } cpuid;
+        /* If type==MSR_FEATURE_WORD */
+        struct {

target/i386/cpu.c static void x86_cpu_vendor_words2str(char *dst, uint32_t vendor1, · line 805

Quoted 10 lines

target/i386/cpu.c +7 -0

+            uint32_t index;
+            struct {   /*CPUID that enumerate this MSR*/
+                FeatureWord cpuid_class;
+                uint32_t    cpuid_flag;
+            } cpuid_dep;
+        } msr;
+    };
     uint32_t tcg_features; /* Feature flags supported by TCG */
     uint32_t unmigratable_flags; /* Feature flags known to be unmigratable */
     uint32_t migratable_flags; /* Feature flags known to be migratable */

Quoted 4 lines

The data structure change looks good, but you are breaking the build if you touch them without updating the existing code. If you break the build in your series, you break git-bisect.

I had tested in my environment before send out, build has no even a warning. Is it because this patch is based on master + previous icelake cpu model set? I see you are pulling in previous icelake cpu model patch set. I will rebase this patch to then master. Will previous icelake cpu model patch set appear in master soon?

Quoted 21 lines

[...]

Quoted 8 lines

target/i386/cpu.c +8 -0

+    /*Below are MSR exposed features*/
+    [FEATURE_WORDS_ARCH_CAPABILITIES] = {
+        .type = MSR_FEATURE_WORD,
+        .feat_names = {
+            "rdctl-no", "ibrs-all", "rsba", NULL,
+            "ssb-no", NULL, NULL, NULL,
+            NULL, NULL, NULL, NULL,
+            NULL, NULL, NULL, NULL,

target/i386/cpu.c static FeatureWordInfo feature_word_info[FEATURE_WORDS] = { · line 1143

Quoted 10 lines

target/i386/cpu.c +10 -0

+            NULL, NULL, NULL, NULL,
+            NULL, NULL, NULL, NULL,
+            NULL, NULL, NULL, NULL,
+            NULL, NULL, NULL, NULL,
+        },
+        .msr = { .index = MSR_IA32_ARCH_CAPABILITIES,
+                .cpuid_dep = { FEAT_7_0_EDX,
+                    CPUID_7_0_EDX_ARCH_CAPABILITIES }
+                },
+    },

Quoted 4 lines

I suggest moving this hunk to a separate patch: first we refactor the existing code without changing behavior or adding new features, then we add the new features.

Sure.

Quoted 27 lines

Quoted 26 lines

};

typedef struct X86RegisterInfo32 {

target/i386/cpu.h +5 -0

index cddf9d9..9e8879e 100644
@@ -502,9 +502,14 @@ typedef enum FeatureWord {
     FEAT_6_EAX,         /* CPUID[6].EAX */
     FEAT_XSAVE_COMP_LO, /* CPUID[EAX=0xd,ECX=0].EAX */
     FEAT_XSAVE_COMP_HI, /* CPUID[EAX=0xd,ECX=0].EDX */
+    FEATURE_WORDS_NUM_CPUID,
+    FEATURE_WORDS_FIRST_MSR = FEATURE_WORDS_NUM_CPUID,
+    FEATURE_WORDS_ARCH_CAPABILITIES = FEATURE_WORDS_FIRST_MSR,
     FEATURE_WORDS,
 } FeatureWord;
 
+#define FEATURE_WORDS_NUM_MSRS (FEATURE_WORDS - FEATURE_WORDS_FIRST_MSR)
+
 typedef uint32_t FeatureWordArray[FEATURE_WORDS];
 
 /* cpuid_features bits */

Signature · 1 line

1.8.3.1

From: "Robert Hoo" <[email protected]>
To: "Eduardo Habkost" <[email protected]>
Cc: "robert hu" <[email protected]>, "robert hu" <[email protected]>, [email protected], [email protected], "thomas lendacky" <[email protected]>, [email protected], "jingqi liu" <[email protected]>
Sent: Saturday, August 18, 2018 7:48:43 AM
Subject: Re: [Qemu-devel] [PATCH v3 1/3] x86: Data structure changes to support MSR based features

Quoted 45 lines · Robert Hoo

On Fri, 2018-08-17 at 00:10 -0300, Eduardo Habkost wrote:
[trim...]

Quoted 39 lines

Quoted 28 lines

target/i386/cpu.c +1 -1

+
 typedef struct FeatureWordInfo {
-    /* feature flags names are taken from "Intel Processor

Identification and

(quoted diff) +2 -0

+    FeatureWordType type;
+   /* feature flags names are taken from "Intel Processor

Identification and
* the CPUID Instruction" and AMD's "CPUID Specification".
* In cases of disagreement between feature naming conventions,
* aliases may be added.
*/
const char *feat_names[32];

target/i386/cpu.c +12 -4

-    uint32_t cpuid_eax;   /* Input EAX for CPUID */
-    bool cpuid_needs_ecx; /* CPUID instruction uses ECX as input */
-    uint32_t cpuid_ecx;   /* Input ECX value for CPUID */
-    int cpuid_reg;        /* output register (R_* constant) */
+    union {
+        /* If type==CPUID_FEATURE_WORD */
+        struct {
+            uint32_t eax;   /* Input EAX for CPUID */
+            bool needs_ecx; /* CPUID instruction uses ECX as input */
+            uint32_t ecx;   /* Input ECX value for CPUID */
+            int reg;        /* output register (R_* constant) */
+        } cpuid;
+        /* If type==MSR_FEATURE_WORD */
+        struct {
+            uint32_t index;
+            struct {   /*CPUID that enumerate this MSR*/

target/i386/cpu.c static void x86_cpu_vendor_words2str(char *dst, uint32_t vendor1,

Quoted 10 lines

target/i386/cpu.c +5 -0

+                FeatureWord cpuid_class;
+                uint32_t    cpuid_flag;
+            } cpuid_dep;
+        } msr;
+    };
     uint32_t tcg_features; /* Feature flags supported by TCG */
     uint32_t unmigratable_flags; /* Feature flags known to be
     unmigratable */
     uint32_t migratable_flags; /* Feature flags known to be migratable
     */

Quoted 4 lines

The data structure change looks good, but you are breaking the build if you touch them without updating the existing code. If you break the build in your series, you break git-bisect.

Quoted 5 lines

I had tested in my environment before send out, build has no even a warning. Is it because this patch is based on master + previous icelake cpu model set? I see you are pulling in previous icelake cpu model patch set. I will rebase this patch to then master. Will previous icelake cpu model patch set appear in master soon?

or you mean each single patch in a series should be individually built pass? then it will a huge one here: data structure changes + reference functions.

target/i386/cpu.c static void x86_cpu_vendor_words2str(char *dst, uint32_t vendor1, · line 776

Quoted 4 lines · Robert Hoo

target/i386/cpu.c +4 -0

+typedef enum FeatureWordType {
+   CPUID_FEATURE_WORD,
+   MSR_FEATURE_WORD,
+} FeatureWordType;

This enum probably should be defined with QAPI, so that it can be reused in the feature-words property:

# @X86CPUFeatureWordType:
#
# Kinds of X86 CPU feature words
#
# @cpuid: A CPUID leaf
#
# @msr: An MSR
##
{ 'enum': 'X86CPUFeatureWordType',
'data': 'cpuid', 'msr' }

The names will be X86_CPU_FEATURE_WORD_TYPE_CPUID and X86_CPU_FEATURE_WORD_TYPE_MSR.

Quoted 2 lines

The names will be X86_CPU_FEATURE_WORD_TYPE_CPUID and X86_CPU_FEATURE_WORD_TYPE_MSR.

I wouldn't like to make this an external API unless really necessary. I would rather deprecate the "feature-words" property because nobody ended up using it.

Quoted 5 lines · Eduardo Habkost

Quoted 2 lines

The names will be X86_CPU_FEATURE_WORD_TYPE_CPUID and X86_CPU_FEATURE_WORD_TYPE_MSR.

I wouldn't like to make this an external API unless really necessary. I would rather deprecate the "feature-words" property because nobody ended up using it.

I think we should either remove it directly, or extend it to support MSR features. Deprecating and only supporting CPUID features is the worst of both worlds...

So let's do what's necessary to remove it. But I don't think the removal of "feature-words" should block the inclusion of this series.

Now, should QOM properties follow our feature deprecation policy, or they were never a supported external API and we can remove it immediately?

CCing Jiri and libvir-list, because I just found that there's code on libvirt that uses it, but I don't know exactly it does with that info.

Quoted 11 lines · Eduardo Habkost

So let's do what's necessary to remove it. But I don't think the removal of "feature-words" should block the inclusion of this series.

Now, should QOM properties follow our feature deprecation policy, or they were never a supported external API and we can remove it immediately?

CCing Jiri and libvir-list, because I just found that there's code on libvirt that uses it, but I don't know exactly it does with that info.

It is used to check whether the host supports invtsc and pv-unhalt and avoid changing the guest ABI when migrating: see
https://marc.info/?l=libvir-list&m=152445761414746&w=2 for a patch that introduces one user.

I think we should extend it to MSRs, not remove it.

Add kvm_get_supported_feature_msrs() to get supported MSR feature index list. Add kvm_arch_get_supported_msr_feature() to get each MSR features value.

kvm_get_supported_feature_msrs() is called in kvm_arch_init(). kvm_arch_get_supported_msr_feature() is called by x86_cpu_get_supported_feature_word().

Signed-off-by Robert Hoo <[email protected]>

---
 include/sysemu/kvm.h |  2 ++
 target/i386/kvm.c    | 79 ++++++++++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 81 insertions(+)

include/sysemu/kvm.h +2 -0

index 0b64b8e..97d8d9d 100644
@@ -463,6 +463,8 @@ int kvm_vm_check_extension(KVMState *s, unsigned int extension);
 
 uint32_t kvm_arch_get_supported_cpuid(KVMState *env, uint32_t function,
                                       uint32_t index, int reg);
+uint32_t kvm_arch_get_supported_msr_feature(KVMState *s, uint32_t index);
+
 
 void kvm_set_sigmask_len(KVMState *s, unsigned int sigmask_len);
 

target/i386/kvm.c +0 -0

index 9313602..70d8606 100644

target/i386/kvm.c +5 -0

 int kvm_has_pit_state2(void)
 {

@@ -420,6 +421,41 @@ uint32_t kvm_arch_get_supported_cpuid(KVMState *s, uint32_t function,
     return ret;
 }
 
+uint32_t kvm_arch_get_supported_msr_feature(KVMState *s, uint32_t index)
+{
+    struct {
+        struct kvm_msrs info;
+        struct kvm_msr_entry entries[1];

target/i386/kvm.c +5 -0

 static int kvm_get_supported_msrs(KVMState *s)
 {
     static int kvm_supported_msrs;

@@ -1400,6 +1474,11 @@ int kvm_arch_init(MachineState *ms, KVMState *s)
         return ret;
     }
 
+    ret = kvm_get_supported_feature_msrs(s);
+    if (ret < 0) {
+        return ret;
+    }
+
     uname(&utsname);
     lm_capable_kernel = strcmp(utsname.machine, "x86_64") == 0;
 

Signature · 1 line

1.8.3.1

Thanks for the patch, comments below:

Quoted 31 lines · Robert Hoo

Add kvm_get_supported_feature_msrs() to get supported MSR feature index list. Add kvm_arch_get_supported_msr_feature() to get each MSR features value.

kvm_get_supported_feature_msrs() is called in kvm_arch_init(). kvm_arch_get_supported_msr_feature() is called by x86_cpu_get_supported_feature_word().

Signed-off-by Robert Hoo <[email protected]>

---
 include/sysemu/kvm.h |  2 ++
 target/i386/kvm.c    | 79 ++++++++++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 81 insertions(+)

include/sysemu/kvm.h +2 -0

index 0b64b8e..97d8d9d 100644
@@ -463,6 +463,8 @@ int kvm_vm_check_extension(KVMState *s, unsigned int extension);
 
 uint32_t kvm_arch_get_supported_cpuid(KVMState *env, uint32_t function,
                                       uint32_t index, int reg);
+uint32_t kvm_arch_get_supported_msr_feature(KVMState *s, uint32_t index);
+
 
 void kvm_set_sigmask_len(KVMState *s, unsigned int sigmask_len);
 

target/i386/kvm.c +0 -0

index 9313602..70d8606 100644

target/i386/kvm.c static int has_pit_state2; · line 110

Quoted 4 lines

target/i386/kvm.c +1 -0

@@ -107,6 +107,7 @@ static int has_pit_state2;
 static bool has_msr_mcg_ext_ctl;
 
 static struct kvm_cpuid2 *cpuid_cache;
+static struct kvm_msr_list *kvm_feature_msrs;

I was going to suggest moving this to KVMState, but KVMState is a arch-independent struct. I guess we'll have to live with this by now.

Quoted 19 lines

target/i386/kvm.c +12 -0

 int kvm_has_pit_state2(void)
 {

@@ -420,6 +421,41 @@ uint32_t kvm_arch_get_supported_cpuid(KVMState *s, uint32_t function,
     return ret;
 }
 
+uint32_t kvm_arch_get_supported_msr_feature(KVMState *s, uint32_t index)
+{
+    struct {
+        struct kvm_msrs info;
+        struct kvm_msr_entry entries[1];
+    } msr_data;
+    uint32_t ret;
+
+    /*Check if the requested feature MSR is supported*/
+    int i;
+    for (i = 0; i < kvm_feature_msrs->nmsrs; i++) {
+        if (index == kvm_feature_msrs->indices[i]) {

target/i386/kvm.c uint32_t kvm_arch_get_supported_cpuid(KVMState *s, uint32_t function, · line 438

Quoted 3 lines

target/i386/kvm.c +3 -0

+            break;
+        }
+    }

We are duplicating the logic that's already inside KVM (checking the list of supported MSRs and returning an error). Can't we make this simpler and just remove this check? If the MSR is not supported, KVM_GET_MSRS would just return 0.

target/i386/kvm.c uint32_t kvm_arch_get_supported_cpuid(KVMState *s, uint32_t function, · line 440

Quoted 3 lines

target/i386/kvm.c +2 -0

+    if (i >= kvm_feature_msrs->nmsrs) {
+        fprintf(stderr, "Requested MSR (index= %d) is not supported.\n", index);

This error message is meaningless for QEMU users. Do we really need to print it?

target/i386/kvm.c uint32_t kvm_arch_get_supported_cpuid(KVMState *s, uint32_t function, · line 441

Quoted 1 line

target/i386/kvm.c +1 -0

+        return 0;

Returning 0 for MSRs that are not supported is probably OK, but we need to see this function being used, to be sure (I didn't look at all the patches in this series yet).

target/i386/kvm.c uint32_t kvm_arch_get_supported_cpuid(KVMState *s, uint32_t function, · line 452

Quoted 11 lines

target/i386/kvm.c +11 -0

+    }
+
+    msr_data.info.nmsrs = 1;
+    msr_data.entries[0].index = index;
+
+    ret = kvm_ioctl(s, KVM_GET_MSRS, &msr_data);
+
+    if (ret != 1) {
+        fprintf(stderr, "KVM get MSR (index=0x%x) feature failed, %s\n",
+            index, strerror(-ret));
+        exit(1);

I'm not a fan of APIs that write to stdout/stderr or exit(), unless they are clearly just initialization functions that should never fail in normal circumstances.

But if you call KVM_GET_MSRS for all MSRs at kvm_get_supported_feature_msrs() below, this function would never need to report an error.

We are already going through the trouble of allocating kvm_feature_msrs in kvm_get_supported_feature_msrs() anyway.

Quoted 11 lines

target/i386/kvm.c +6 -0

+    }
+
+    return msr_data.entries[0].data;
+}
+
+
 typedef struct HWPoisonPage {
     ram_addr_t ram_addr;
     QLIST_ENTRY(HWPoisonPage) list;

target/i386/kvm.c void kvm_arch_do_init_vcpu(X86CPU *cpu) · line 1276

Quoted 3 lines

target/i386/kvm.c +0 -0

@@ -1238,7 +1274,45 @@ void kvm_arch_do_init_vcpu(X86CPU *cpu)
         env->mp_state = KVM_MP_STATE_INIT_RECEIVED;
     }
 }

Nit: please add an extra newline between functions.

target/i386/kvm.c void kvm_arch_do_init_vcpu(X86CPU *cpu) · line 1282

Quoted 6 lines

target/i386/kvm.c +6 -0

+static int kvm_get_supported_feature_msrs(KVMState *s)
+{
+    static int kvm_supported_feature_msrs;
+    int ret = 0;
+
+    if (kvm_supported_feature_msrs == 0) {

Do you really need the kvm_supported_feature_msrs variable? You could just check if kvm_feature_msrs is NULL.

I also suggest doing this:

    if (already initialized) {
       return 0;
    }

    /* regular initialization code here */

to reduce one indentation level.

target/i386/kvm.c void kvm_arch_do_init_vcpu(X86CPU *cpu) · line 1290

Quoted 9 lines

target/i386/kvm.c +8 -0

+        struct kvm_msr_list msr_list;
+
+        kvm_supported_feature_msrs++;
+
+        msr_list.nmsrs = 0;
+        ret = kvm_ioctl(s, KVM_GET_MSR_FEATURE_INDEX_LIST, &msr_list);
+        if (ret < 0 && ret != -E2BIG) {
+            return ret;

What if the host KVM version doesn't support
KVM_GET_MSR_FEATURE_INDEX_LIST?

target/i386/kvm.c void kvm_arch_do_init_vcpu(X86CPU *cpu) · line 1297

Quoted 8 lines

target/i386/kvm.c +7 -0

+        }
+
+        assert(msr_list.nmsrs > 0);
+        kvm_feature_msrs = (struct kvm_msr_list *) \
+            g_malloc0(sizeof(msr_list) +
+                     msr_list.nmsrs * sizeof(msr_list.indices[0]));
+        if (kvm_feature_msrs == NULL) {

g_malloc0() never returns NULL on failure. See
https://developer.gnome.org/glib/2.56/glib-Memory-Allocation.html#glib-Memory-Allocation.description

target/i386/kvm.c void kvm_arch_do_init_vcpu(X86CPU *cpu) · line 1306

Quoted 9 lines

target/i386/kvm.c +8 -0

+            fprintf(stderr, "Failed to allocate space for KVM Feature MSRs"
+                "which has %d MSRs\n", msr_list.nmsrs);
+            return -1;
+        }
+
+        kvm_feature_msrs->nmsrs = msr_list.nmsrs;
+        ret = kvm_ioctl(s, KVM_GET_MSR_FEATURE_INDEX_LIST, kvm_feature_msrs);
 
+        if (ret < 0) {  /*ioctl failure*/

Small nit: the "ioctl failure" comment seems unnecessary, I would just remove it.

target/i386/kvm.c void kvm_arch_do_init_vcpu(X86CPU *cpu) · line 1315

Quoted 9 lines

target/i386/kvm.c +9 -0

+            fprintf(stderr, "Fetch KVM feature MSRs failed: %s\n",
+                strerror(-ret));
+            g_free(kvm_feature_msrs);
+            return ret;
+        }
+    }
+
+    return 0;
+}

Same as above: please add an extra newline between functions.

Quoted 19 lines

target/i386/kvm.c +5 -0

 static int kvm_get_supported_msrs(KVMState *s)
 {
     static int kvm_supported_msrs;

@@ -1400,6 +1474,11 @@ int kvm_arch_init(MachineState *ms, KVMState *s)
         return ret;
     }
 
+    ret = kvm_get_supported_feature_msrs(s);
+    if (ret < 0) {
+        return ret;
+    }
+
     uname(&utsname);
     lm_capable_kernel = strcmp(utsname.machine, "x86_64") == 0;
 

Signature · 1 line

1.8.3.1

Quoted 62 lines · Eduardo Habkost

Thanks for the patch, comments below:

Quoted 31 lines · Robert Hoo

Add kvm_get_supported_feature_msrs() to get supported MSR feature index list. Add kvm_arch_get_supported_msr_feature() to get each MSR features value.

kvm_get_supported_feature_msrs() is called in kvm_arch_init(). kvm_arch_get_supported_msr_feature() is called by x86_cpu_get_supported_feature_word().

Signed-off-by Robert Hoo <[email protected]>

---
 include/sysemu/kvm.h |  2 ++
 target/i386/kvm.c    | 79 ++++++++++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 81 insertions(+)

include/sysemu/kvm.h +2 -0

index 0b64b8e..97d8d9d 100644
@@ -463,6 +463,8 @@ int kvm_vm_check_extension(KVMState *s, unsigned int extension);
 
 uint32_t kvm_arch_get_supported_cpuid(KVMState *env, uint32_t function,
                                       uint32_t index, int reg);
+uint32_t kvm_arch_get_supported_msr_feature(KVMState *s, uint32_t index);
+
 
 void kvm_set_sigmask_len(KVMState *s, unsigned int sigmask_len);
 

target/i386/kvm.c +0 -0

index 9313602..70d8606 100644

target/i386/kvm.c static int has_pit_state2; · line 110

Quoted 4 lines

target/i386/kvm.c +1 -0

@@ -107,6 +107,7 @@ static int has_pit_state2;
 static bool has_msr_mcg_ext_ctl;
 
 static struct kvm_cpuid2 *cpuid_cache;
+static struct kvm_msr_list *kvm_feature_msrs;

I was going to suggest moving this to KVMState, but KVMState is a arch-independent struct. I guess we'll have to live with this by now.

Quoted 19 lines

target/i386/kvm.c +12 -0

 int kvm_has_pit_state2(void)
 {

@@ -420,6 +421,41 @@ uint32_t kvm_arch_get_supported_cpuid(KVMState *s, uint32_t function,
     return ret;
 }
 
+uint32_t kvm_arch_get_supported_msr_feature(KVMState *s, uint32_t index)
+{
+    struct {
+        struct kvm_msrs info;
+        struct kvm_msr_entry entries[1];
+    } msr_data;
+    uint32_t ret;
+
+    /*Check if the requested feature MSR is supported*/
+    int i;
+    for (i = 0; i < kvm_feature_msrs->nmsrs; i++) {
+        if (index == kvm_feature_msrs->indices[i]) {

Quoted 8 lines

target/i386/kvm.c uint32_t kvm_arch_get_supported_cpuid(KVMState *s, uint32_t function, · line 438

Quoted 3 lines

target/i386/kvm.c +3 -0

+            break;
+        }
+    }

We are duplicating the logic that's already inside KVM (checking the list of supported MSRs and returning an error). Can't we make this simpler and just remove this check? If the MSR is not supported, KVM_GET_MSRS would just return 0.

Yes, seems dup. but if we remove this hunk, the kvm_get_supported_feature_msrs() is unnecessary at all.

Quoted 29 lines

target/i386/kvm.c uint32_t kvm_arch_get_supported_cpuid(KVMState *s, uint32_t function, · line 440

Quoted 3 lines

target/i386/kvm.c +2 -0

+    if (i >= kvm_feature_msrs->nmsrs) {
+        fprintf(stderr, "Requested MSR (index= %d) is not supported.\n", index);

This error message is meaningless for QEMU users. Do we really need to print it?

target/i386/kvm.c uint32_t kvm_arch_get_supported_cpuid(KVMState *s, uint32_t function, · line 441

Quoted 1 line

target/i386/kvm.c +1 -0

+        return 0;

Returning 0 for MSRs that are not supported is probably OK, but we need to see this function being used, to be sure (I didn't look at all the patches in this series yet).

target/i386/kvm.c uint32_t kvm_arch_get_supported_cpuid(KVMState *s, uint32_t function, · line 452

Quoted 11 lines

target/i386/kvm.c +11 -0

+    }
+
+    msr_data.info.nmsrs = 1;
+    msr_data.entries[0].index = index;
+
+    ret = kvm_ioctl(s, KVM_GET_MSRS, &msr_data);
+
+    if (ret != 1) {
+        fprintf(stderr, "KVM get MSR (index=0x%x) feature failed, %s\n",
+            index, strerror(-ret));
+        exit(1);

I'm not a fan of APIs that write to stdout/stderr or exit(), unless they are clearly just initialization functions that should never fail in normal circumstances.

Quoted 6 lines

But if you call KVM_GET_MSRS for all MSRs at kvm_get_supported_feature_msrs() below, this function would never need to report an error.

We are already going through the trouble of allocating kvm_feature_msrs in kvm_get_supported_feature_msrs() anyway.

I had looked into KVM KVM_GET_MSRS handling, though less likely, still have changes copy_from/to_user() fail. Therefore I added the check and warning here, in that seldom case happens.

exit() or not, I'm also not sure. Seems not necessary, while my usual programming philosophy is never let wrong goes further. For in the case of ioctl(KVM_GET_MSRS) returns failure, something goes wrong underlying, I would prefer to let user know this, rather than let it pass and goes further.

Quoted 1 line

Quoted 11 lines

target/i386/kvm.c void kvm_arch_do_init_vcpu(X86CPU *cpu) · line 1290

Quoted 8 lines

target/i386/kvm.c +8 -0

+        struct kvm_msr_list msr_list;
+
+        kvm_supported_feature_msrs++;
+
+        msr_list.nmsrs = 0;
+        ret = kvm_ioctl(s, KVM_GET_MSR_FEATURE_INDEX_LIST, &msr_list);
+        if (ret < 0 && ret != -E2BIG) {
+            return ret;

What if the host KVM version doesn't support
KVM_GET_MSR_FEATURE_INDEX_LIST?

Going to add kvm_check_extension(s, KVM_CAP_GET_MSR_FEATURES) before this ioctl. if not support, return -1. (Then the kvm_init will fail and exit.)

Quoted 28 lines

Quoted 27 lines

Quoted 12 lines

int kvm_has_pit_state2(void)
{

target/i386/kvm.c +5 -0

@@ -420,6 +421,41 @@ uint32_t kvm_arch_get_supported_cpuid(KVMState *s, uint32_t function,
     return ret;
 }
 
+uint32_t kvm_arch_get_supported_msr_feature(KVMState *s, uint32_t index)
+{
+    struct {
+        struct kvm_msrs info;
+        struct kvm_msr_entry entries[1];

target/i386/kvm.c uint32_t kvm_arch_get_supported_cpuid(KVMState *s, uint32_t function, · line 438

Quoted 10 lines

target/i386/kvm.c +10 -0

+    } msr_data;
+    uint32_t ret;
+
+    /*Check if the requested feature MSR is supported*/
+    int i;
+    for (i = 0; i < kvm_feature_msrs->nmsrs; i++) {
+        if (index == kvm_feature_msrs->indices[i]) {
+            break;
+        }
+    }

We are duplicating the logic that's already inside KVM (checking the list of supported MSRs and returning an error). Can't we make this simpler and just remove this check? If the MSR is not supported, KVM_GET_MSRS would just return 0.

Quoted 2 lines

Yes, seems dup. but if we remove this hunk, the kvm_get_supported_feature_msrs() is unnecessary at all.

So maybe kvm_get_supported_feature_msrs() really is unnecessary?

We seem to have two alternatives:
* calling KVM_GET_MSRS for all MSRs only once, at kvm_get_supported_feature_msrs() (as I had suggested previously);
* calling KVM_GET_MSRS for one MSR unconditionally here, but _not_ treating 0 as a fatal error.

I prefer the former, but I would be OK with both alternatives. Note that we need to check for KVM capabilities in both cases.

Quoted 40 lines

Quoted 29 lines

target/i386/kvm.c uint32_t kvm_arch_get_supported_cpuid(KVMState *s, uint32_t function, · line 440

Quoted 3 lines

target/i386/kvm.c +2 -0

+    if (i >= kvm_feature_msrs->nmsrs) {
+        fprintf(stderr, "Requested MSR (index= %d) is not supported.\n", index);

This error message is meaningless for QEMU users. Do we really need to print it?

Review uint32_t kvm_arch_get_supported_cpuid(KVMState *s, uint32_t function, · line 441

Quoted 1 line

(quoted diff) +1 -0

+        return 0;

Returning 0 for MSRs that are not supported is probably OK, but we need to see this function being used, to be sure (I didn't look at all the patches in this series yet).

target/i386/kvm.c uint32_t kvm_arch_get_supported_cpuid(KVMState *s, uint32_t function, · line 452

Quoted 11 lines

target/i386/kvm.c +11 -0

+    }
+
+    msr_data.info.nmsrs = 1;
+    msr_data.entries[0].index = index;
+
+    ret = kvm_ioctl(s, KVM_GET_MSRS, &msr_data);
+
+    if (ret != 1) {
+        fprintf(stderr, "KVM get MSR (index=0x%x) feature failed, %s\n",
+            index, strerror(-ret));
+        exit(1);

I'm not a fan of APIs that write to stdout/stderr or exit(), unless they are clearly just initialization functions that should never fail in normal circumstances.

Quoted 6 lines

But if you call KVM_GET_MSRS for all MSRs at kvm_get_supported_feature_msrs() below, this function would never need to report an error.

We are already going through the trouble of allocating kvm_feature_msrs in kvm_get_supported_feature_msrs() anyway.

I had looked into KVM KVM_GET_MSRS handling, though less likely, still have changes copy_from/to_user() fail. Therefore I added the check and warning here, in that seldom case happens.

Quoted 5 lines

exit() or not, I'm also not sure. Seems not necessary, while my usual programming philosophy is never let wrong goes further. For in the case of ioctl(KVM_GET_MSRS) returns failure, something goes wrong underlying, I would prefer to let user know this, rather than let it pass and goes further.

We probably have no option other than exiting if KVM_GET_MSRS returns an unexpected error. It's just that I find the code harder to review, because we need to be sure this won't terminate QEMU under normal circumstances.

But if you demonstrate that all errors here are truly fatal and unexpected, calling exit() may be OK. (See the KVM_CAP_GET_MSR_FEATURES comment below for one example where exiting is not going to be OK.)

Proper error reporting using Error** would be even better than exiting, but considering that none of the functions at i386/cpu.c return errors using Error**, I won't force you to do that.

Quoted 2 lines

Quoted 2 lines

[...]

Quoted 12 lines

Quoted 11 lines

target/i386/kvm.c void kvm_arch_do_init_vcpu(X86CPU *cpu) · line 1290

Quoted 8 lines

target/i386/kvm.c +8 -0

+        struct kvm_msr_list msr_list;
+
+        kvm_supported_feature_msrs++;
+
+        msr_list.nmsrs = 0;
+        ret = kvm_ioctl(s, KVM_GET_MSR_FEATURE_INDEX_LIST, &msr_list);
+        if (ret < 0 && ret != -E2BIG) {
+            return ret;

What if the host KVM version doesn't support
KVM_GET_MSR_FEATURE_INDEX_LIST?

Quoted 3 lines

Going to add kvm_check_extension(s, KVM_CAP_GET_MSR_FEATURES) before this ioctl. if not support, return -1. (Then the kvm_init will fail and exit.)

We don't want QEMU to refuse to run if the kernel doesn't have KVM_CAP_GET_MSR_FEATURES. We can treat missing capability as equivalent to returning an empty list of MSRs.

On Sat, 2018-08-18 at 12:05 -0300, Eduardo Habkost wrote:

Quoted 3 lines

We don't want QEMU to refuse to run if the kernel doesn't have KVM_CAP_GET_MSR_FEATURES. We can treat missing capability as equivalent to returning an empty list of MSRs.

Yes. I'll let caller (kvm_arch_init) ignore the return value but a simple warning.

Quoted 5 lines

Quoted 3 lines

We don't want QEMU to refuse to run if the kernel doesn't have KVM_CAP_GET_MSR_FEATURES. We can treat missing capability as equivalent to returning an empty list of MSRs.

Yes. I'll let caller (kvm_arch_init) ignore the return value but a simple warning.

Warnings tend to be ignored and are generally a sign that QEMU isn't doing the right thing. Sometimes we have no choice, but I don't think that's the case here.

As far as I can see, we have only two possibilities here:
1) The host can run a VM that behaves exactly as requested on the command-line (no warning required).
2) The host can't run the requested configuration (fatal error, not a warning).

Quoted 9 lines · Eduardo Habkost

Quoted 5 lines

Quoted 3 lines

We don't want QEMU to refuse to run if the kernel doesn't have KVM_CAP_GET_MSR_FEATURES. We can treat missing capability as equivalent to returning an empty list of MSRs.

Yes. I'll let caller (kvm_arch_init) ignore the return value but a simple warning.

Warnings tend to be ignored and are generally a sign that QEMU isn't doing the right thing. Sometimes we have no choice, but I don't think that's the case here.

Quoted 5 lines

As far as I can see, we have only two possibilities here:
1) The host can run a VM that behaves exactly as requested on the command-line (no warning required).
2) The host can't run the requested configuration (fatal error, not a warning).

Right, but if KVM_CAP_GET_MSR_FEATURES is not available I guess you can assume the MSRs to be zero for everything except "-cpu host".

Quoted 2 lines

Right, but if KVM_CAP_GET_MSR_FEATURES is not available I guess you can assume the MSRs to be zero for everything except "-cpu host".

Yes, that would be simplest way to implement the above. Then QEMU would refuse to run if the feature was part of the requested configuration (2), or not care at all because the feature was not set in the configuration (1).

But I'm not sure I follow the suggestion to not consider the MSR to be zero on "-cpu host". If we don't need and KVM-side code to support a given MSR feature, we can enable it on all models.

Quoted 7 lines · Eduardo Habkost

Quoted 2 lines

Right, but if KVM_CAP_GET_MSR_FEATURES is not available I guess you can assume the MSRs to be zero for everything except "-cpu host".

Yes, that would be simplest way to implement the above. Then QEMU would refuse to run if the feature was part of the requested configuration (2), or not care at all because the feature was not set in the configuration (1).

Quoted 3 lines

But I'm not sure I follow the suggestion to not consider the MSR to be zero on "-cpu host". If we don't need and KVM-side code to support a given MSR feature, we can enable it on all models.

The case I was thinking about, is where there is no KVM-side code to support the MSR feature, but you still need the host CPU to have it. Without KVM's feature MSR support, you cannot read the host value of the MSR.

My idea was that feature MSRs will default to the host value returned by KVM_GET_MSR on the /dev/kvm file descriptor, so "-cpu host" could just ignore KVM_CAP_GET_MSR_FEATURES and use KVM's default value of the MSRs.

However, I guess we can just use the default value for _all_ CPU models, because in practice the only effect would be on nested VMX MSRs, and nested VMX can only be migrated on kernels that have KVM_CAP_GET_MSR_FEATURES. So in practice people using nested VMX are using "-cpu host" anyway, not "-cpu SandyBridge,+vmx".

My proposalis: basically, if KVM_CAP_GET_MSR_FEATURES is unavailable:

- MSR-based features would cause an error if specified on the command line;

- kvm_arch_init_vcpu would skip the KVM_SET_MSR for feature MSRs completely.

Quoted 1 line · Robert Hoo

On Sat, 2018-08-18 at 12:05 -0300, Eduardo Habkost wrote:

[...]

Quoted 5 lines

Quoted 3 lines

We don't want QEMU to refuse to run if the kernel doesn't have KVM_CAP_GET_MSR_FEATURES. We can treat missing capability as equivalent to returning an empty list of MSRs.

Yes. I'll let caller (kvm_arch_init) ignore the return value but a simple warning.

Warnings tend to be ignored and are generally a sign that QEMU isn't doing the right thing. Sometimes we have no choice, but I don't think that's the case here.

As far as I can see, we have only two possibilities here:
1) The host can run a VM that behaves exactly as requested on the command-line (no warning required).
2) The host can't run the requested configuration (fatal error, not a warning).

Quoted 13 lines · Eduardo Habkost

Quoted 1 line · Robert Hoo

On Sat, 2018-08-18 at 12:05 -0300, Eduardo Habkost wrote:

[...]

Quoted 5 lines

Quoted 3 lines

We don't want QEMU to refuse to run if the kernel doesn't have KVM_CAP_GET_MSR_FEATURES. We can treat missing capability as equivalent to returning an empty list of MSRs.

Yes. I'll let caller (kvm_arch_init) ignore the return value but a simple warning.

Warnings tend to be ignored and are generally a sign that QEMU isn't doing the right thing. Sometimes we have no choice, but I don't think that's the case here.

Quoted 6 lines

As far as I can see, we have only two possibilities here:
1) The host can run a VM that behaves exactly as requested on the command-line (no warning required).
2) The host can't run the requested configuration (fatal error, not a warning).

I mean the kvm_arch_init() --> kvm_get_supported_feature_msrs(), when kvm_get_supported_feature_msrs() returns error, can we ignore it? The cases of kvm_get_supported_feature_msrs() returning error:
1) underlying KVM doesn't support GET_MSR_FEATURES capability.
2) error in KVM_GET_MSR_FEATURE_INDEX_LIST.

given the principle you guided before, I think we can ignore above error cases, and later kvm_arch_get_supported_msr_feature() would always return 0 (of course, except those special cases like IA32_ARCH_CAPABILITIES.RSBA)

Add an util function feature_word_description(), which help construct the string

describing the feature word (both CPUID and MSR types).

report_unavailable_features(): add MSR_FEATURE_WORD type support. x86_cpu_get_feature_words(): limit to CPUID_FEATURE_WORD only. x86_cpu_get_supported_feature_word(): add MSR_FEATURE_WORD type support. x86_cpu_adjust_feat_level(): assert the requested feature must be CPUID_FEATURE_WORD type.

Signed-off-by Robert Hoo <[email protected]>

---
  target/i386/cpu.c | 77 +++++++++++++++++++++++++++++++++++++++++--------------
  1 file changed, 58 insertions(+), 19 deletions(-)

target/i386/cpu.c +0 -0

index f7c70d9..21ed599 100644

target/i386/cpu.c +23 -0

+    int ret;
+
+    assert(f->type == CPUID_FEATURE_WORD ||
+        f->type == MSR_FEATURE_WORD);
+    switch (f->type) {
+    case CPUID_FEATURE_WORD:
+        {
+            const char *reg = get_register_name_32(f->cpuid.reg);
+            assert(reg);
+            ret = snprintf(str, FEATURE_WORD_DESCPTION_LEN,
+                "CPUID.%02XH:%s%s%s [bit %d]",
+                f->cpuid.eax, reg,
+                f->feat_names[bit] ? "." : "",
+                f->feat_names[bit] ? f->feat_names[bit] : "", bit);
+            break;
+        }
+    case MSR_FEATURE_WORD:
+        ret = snprintf(str, FEATURE_WORD_DESCPTION_LEN,
+            "MSR(%xH).%s [bit %d]",
+            f->msr.index,
+            f->feat_names[bit] ? f->feat_names[bit] : "", bit);
+        break;
+    }

On 08/10/2018 09:06 AM, Robert Hoo wrote:

In the subject: s/funcitons/functions/

Also, it may be worth using a topic prefix (most of our commit messages resemble:

topic: Description of patch

to make it easier to spot patches by topic).

Quoted 1 line

Add an util function feature_word_description(), which help construct the string

s/an util/a util/
s/help/helps/

Quoted 18 lines

describing the feature word (both CPUID and MSR types).

report_unavailable_features(): add MSR_FEATURE_WORD type support. x86_cpu_get_feature_words(): limit to CPUID_FEATURE_WORD only. x86_cpu_get_supported_feature_word(): add MSR_FEATURE_WORD type support. x86_cpu_adjust_feat_level(): assert the requested feature must be CPUID_FEATURE_WORD type.

Signed-off-by Robert Hoo <[email protected]>

---
  target/i386/cpu.c | 77 +++++++++++++++++++++++++++++++++++++++++--------------
  1 file changed, 58 insertions(+), 19 deletions(-)

target/i386/cpu.c +0 -0

index f7c70d9..21ed599 100644

target/i386/cpu.c static const TypeInfo host_x86_cpu_type_info = { · line 3030

Quoted 7 lines

target/i386/cpu.c +4 -0

@@ -3024,21 +3024,51 @@ static const TypeInfo host_x86_cpu_type_info = {
 
  #endif
 
+/*
+*caller should have input str no less than 64 byte length.
+*/
+#define FEATURE_WORD_DESCPTION_LEN 64

s/DESCPTION/DESCRIPTION/

target/i386/cpu.c static const TypeInfo host_x86_cpu_type_info = { · line 3033

Quoted 3 lines

target/i386/cpu.c +3 -0

+static int feature_word_description(char str[], FeatureWordInfo *f,
+                                            uint32_t bit)
+{

Prone to buffer overflow if the caller doesn't pass in the length. Would it be better to just g_strdup_printf() into a malloc'd result instead of trying to snprintf()'ing into a buffer that you hope the caller sized large enough?

Quoted 23 lines

target/i386/cpu.c +23 -0

+    int ret;
+
+    assert(f->type == CPUID_FEATURE_WORD ||
+        f->type == MSR_FEATURE_WORD);
+    switch (f->type) {
+    case CPUID_FEATURE_WORD:
+        {
+            const char *reg = get_register_name_32(f->cpuid.reg);
+            assert(reg);
+            ret = snprintf(str, FEATURE_WORD_DESCPTION_LEN,
+                "CPUID.%02XH:%s%s%s [bit %d]",
+                f->cpuid.eax, reg,
+                f->feat_names[bit] ? "." : "",
+                f->feat_names[bit] ? f->feat_names[bit] : "", bit);
+            break;
+        }
+    case MSR_FEATURE_WORD:
+        ret = snprintf(str, FEATURE_WORD_DESCPTION_LEN,
+            "MSR(%xH).%s [bit %d]",
+            f->msr.index,
+            f->feat_names[bit] ? f->feat_names[bit] : "", bit);
+        break;
+    }

Add an util function feature_word_description(), which help construct the string describing the feature word (both CPUID and MSR types).

report_unavailable_features(): add MSR_FEATURE_WORD type support. x86_cpu_get_feature_words(): limit to CPUID_FEATURE_WORD only. x86_cpu_get_supported_feature_word(): add MSR_FEATURE_WORD type support. x86_cpu_adjust_feat_level(): assert the requested feature must be CPUID_FEATURE_WORD type.

Signed-off-by Robert Hoo <[email protected]>

---
 target/i386/cpu.c | 77 +++++++++++++++++++++++++++++++++++++++++--------------
 1 file changed, 58 insertions(+), 19 deletions(-)

target/i386/cpu.c +0 -0

index f7c70d9..21ed599 100644

target/i386/cpu.c +12 -0

+{
+    int ret;
+
+    assert(f->type == CPUID_FEATURE_WORD ||
+        f->type == MSR_FEATURE_WORD);
+    switch (f->type) {
+    case CPUID_FEATURE_WORD:
+        {
+            const char *reg = get_register_name_32(f->cpuid.reg);
+            assert(reg);
+            ret = snprintf(str, FEATURE_WORD_DESCPTION_LEN,
+                "CPUID.%02XH:%s%s%s [bit %d]",

target/i386/cpu.c +12 -10

+        break;
+    }
+    return ret > 0;
+}
+
 static void report_unavailable_features(FeatureWord w, uint32_t mask)
 {
     FeatureWordInfo *f = &feature_word_info[w];
     int i;
+    char feat_word_dscrp_str[FEATURE_WORD_DESCPTION_LEN];
 
     for (i = 0; i < 32; ++i) {
         if ((1UL << i) & mask) {
-            const char *reg = get_register_name_32(f->cpuid_reg);
-            assert(reg);
-            warn_report("%s doesn't support requested feature: "
-                        "CPUID.%02XH:%s%s%s [bit %d]",
+            feature_word_description(feat_word_dscrp_str, f, i);
+            warn_report("%s doesn't support requested feature: %s",
                         accel_uses_host_cpuid() ? "host" : "TCG",
-                        f->cpuid_eax, reg,
-                        f->feat_names[i] ? "." : "",
-                        f->feat_names[i] ? f->feat_names[i] : "", i);
+                        feat_word_dscrp_str);
         }
     }
 }

@@ -3276,17 +3306,17 @@ static void x86_cpu_get_feature_words(Object *obj, Visitor *v,
 {
     uint32_t *array = (uint32_t *)opaque;
     FeatureWord w;
-    X86CPUFeatureWordInfo word_infos[FEATURE_WORDS] = { };
-    X86CPUFeatureWordInfoList list_entries[FEATURE_WORDS] = { };
+    X86CPUFeatureWordInfo word_infos[FEATURE_WORDS_NUM_CPUID] = { };
+    X86CPUFeatureWordInfoList list_entries[FEATURE_WORDS_NUM_CPUID] = { };
     X86CPUFeatureWordInfoList *list = NULL;
 
-    for (w = 0; w < FEATURE_WORDS; w++) {
+    for (w = 0; w < FEATURE_WORDS_NUM_CPUID; w++) {

target/i386/cpu.c +1 -4

         qwi->features = array[w];
 
         /* List will be in reverse order, but order shouldn't matter */

@@ -3659,12 +3689,20 @@ static uint32_t x86_cpu_get_supported_feature_word(FeatureWord w,
                                                    bool migratable_only)
 {
     FeatureWordInfo *wi = &feature_word_info[w];
-    uint32_t r;
+    uint32_t r = 0;
 
     if (kvm_enabled()) {
-        r = kvm_arch_get_supported_cpuid(kvm_state, wi->cpuid_eax,
-                                                    wi->cpuid_ecx,
-                                                    wi->cpuid_reg);

target/i386/cpu.c +3 -1

+        }
     } else if (hvf_enabled()) {
         r = hvf_get_supported_cpuid(wi->cpuid_eax,
                                     wi->cpuid_ecx,

@@ -4732,9 +4770,10 @@ static void x86_cpu_adjust_feat_level(X86CPU *cpu, FeatureWord w)
 {
     CPUX86State *env = &cpu->env;
     FeatureWordInfo *fi = &feature_word_info[w];
-    uint32_t eax = fi->cpuid_eax;
+    uint32_t eax = fi->cpuid.eax;
     uint32_t region = eax & 0xF0000000;
 
+    assert(feature_word_info[w].type == CPUID_FEATURE_WORD);
     if (!env->features[w]) {
         return;
     }

Signature · 1 line

1.8.3.1

Quoted 22 lines · Robert Hoo

Add an util function feature_word_description(), which help construct the string describing the feature word (both CPUID and MSR types).

report_unavailable_features(): add MSR_FEATURE_WORD type support. x86_cpu_get_feature_words(): limit to CPUID_FEATURE_WORD only. x86_cpu_get_supported_feature_word(): add MSR_FEATURE_WORD type support. x86_cpu_adjust_feat_level(): assert the requested feature must be CPUID_FEATURE_WORD type.

Signed-off-by Robert Hoo <[email protected]>

---
 target/i386/cpu.c | 77 +++++++++++++++++++++++++++++++++++++++++--------------
 1 file changed, 58 insertions(+), 19 deletions(-)

target/i386/cpu.c +0 -0

index f7c70d9..21ed599 100644
@@ -3024,21 +3024,51 @@ static const TypeInfo host_x86_cpu_type_info = {
 
 #endif
 

target/i386/cpu.c static const TypeInfo host_x86_cpu_type_info = { · line 3032

Quoted 6 lines

target/i386/cpu.c +6 -0

+/*
+*caller should have input str no less than 64 byte length.
+*/
+#define FEATURE_WORD_DESCPTION_LEN 64
+static int feature_word_description(char str[], FeatureWordInfo *f,
+                                            uint32_t bit)

I agree with Eric: g_strup_printf() would be much simpler here.

Quoted 12 lines

target/i386/cpu.c +12 -0

+{
+    int ret;
+
+    assert(f->type == CPUID_FEATURE_WORD ||
+        f->type == MSR_FEATURE_WORD);
+    switch (f->type) {
+    case CPUID_FEATURE_WORD:
+        {
+            const char *reg = get_register_name_32(f->cpuid.reg);
+            assert(reg);
+            ret = snprintf(str, FEATURE_WORD_DESCPTION_LEN,
+                "CPUID.%02XH:%s%s%s [bit %d]",

target/i386/cpu.c static const TypeInfo host_x86_cpu_type_info = { · line 3054

Quoted 10 lines

target/i386/cpu.c +10 -0

+                f->cpuid.eax, reg,
+                f->feat_names[bit] ? "." : "",
+                f->feat_names[bit] ? f->feat_names[bit] : "", bit);
+            break;
+        }
+    case MSR_FEATURE_WORD:
+        ret = snprintf(str, FEATURE_WORD_DESCPTION_LEN,
+            "MSR(%xH).%s [bit %d]",
+            f->msr.index,
+            f->feat_names[bit] ? f->feat_names[bit] : "", bit);

What about leaving the (f->feat_names[bit] ? ... : ...) part in report_unavailable_features() and just make this function return "CPUID[...]" or "MSR[...]"?

Quoted 39 lines

target/i386/cpu.c +12 -10

+        break;
+    }
+    return ret > 0;
+}
+
 static void report_unavailable_features(FeatureWord w, uint32_t mask)
 {
     FeatureWordInfo *f = &feature_word_info[w];
     int i;
+    char feat_word_dscrp_str[FEATURE_WORD_DESCPTION_LEN];
 
     for (i = 0; i < 32; ++i) {
         if ((1UL << i) & mask) {
-            const char *reg = get_register_name_32(f->cpuid_reg);
-            assert(reg);
-            warn_report("%s doesn't support requested feature: "
-                        "CPUID.%02XH:%s%s%s [bit %d]",
+            feature_word_description(feat_word_dscrp_str, f, i);
+            warn_report("%s doesn't support requested feature: %s",
                         accel_uses_host_cpuid() ? "host" : "TCG",
-                        f->cpuid_eax, reg,
-                        f->feat_names[i] ? "." : "",
-                        f->feat_names[i] ? f->feat_names[i] : "", i);
+                        feat_word_dscrp_str);
         }
     }
 }

@@ -3276,17 +3306,17 @@ static void x86_cpu_get_feature_words(Object *obj, Visitor *v,
 {
     uint32_t *array = (uint32_t *)opaque;
     FeatureWord w;
-    X86CPUFeatureWordInfo word_infos[FEATURE_WORDS] = { };
-    X86CPUFeatureWordInfoList list_entries[FEATURE_WORDS] = { };
+    X86CPUFeatureWordInfo word_infos[FEATURE_WORDS_NUM_CPUID] = { };
+    X86CPUFeatureWordInfoList list_entries[FEATURE_WORDS_NUM_CPUID] = { };
     X86CPUFeatureWordInfoList *list = NULL;
 
-    for (w = 0; w < FEATURE_WORDS; w++) {
+    for (w = 0; w < FEATURE_WORDS_NUM_CPUID; w++) {

target/i386/cpu.c static void x86_cpu_get_feature_words(Object *obj, Visitor *v, · line 3319

Quoted 10 lines

target/i386/cpu.c +4 -4

         FeatureWordInfo *wi = &feature_word_info[w];
         X86CPUFeatureWordInfo *qwi = &word_infos[w];
-        qwi->cpuid_input_eax = wi->cpuid_eax;
-        qwi->has_cpuid_input_ecx = wi->cpuid_needs_ecx;
-        qwi->cpuid_input_ecx = wi->cpuid_ecx;
-        qwi->cpuid_register = x86_reg_info_32[wi->cpuid_reg].qapi_enum;
+        qwi->cpuid_input_eax = wi->cpuid.eax;
+        qwi->has_cpuid_input_ecx = wi->cpuid.needs_ecx;
+        qwi->cpuid_input_ecx = wi->cpuid.ecx;
+        qwi->cpuid_register = x86_reg_info_32[wi->cpuid.reg].qapi_enum;

Looks OK, but I would add an
assert(wi->type == CPUID_FEATURE_WORD) on every block of code that uses the wi->cpuid field.

I would also get rid of FEATURE_WORDS_NUM_CPUID and FEATURE_WORDS_FIRST_MSR to reduce the chance of future mistakes. We can use FEATURE_WORDS in this loop and just check wi->type on each iteration.

Quoted 14 lines

target/i386/cpu.c +1 -4

         qwi->features = array[w];
 
         /* List will be in reverse order, but order shouldn't matter */

@@ -3659,12 +3689,20 @@ static uint32_t x86_cpu_get_supported_feature_word(FeatureWord w,
                                                    bool migratable_only)
 {
     FeatureWordInfo *wi = &feature_word_info[w];
-    uint32_t r;
+    uint32_t r = 0;
 
     if (kvm_enabled()) {
-        r = kvm_arch_get_supported_cpuid(kvm_state, wi->cpuid_eax,
-                                                    wi->cpuid_ecx,
-                                                    wi->cpuid_reg);

target/i386/cpu.c static uint32_t x86_cpu_get_supported_feature_word(FeatureWord w, · line 3704

Quoted 10 lines

target/i386/cpu.c +10 -0

+        switch (wi->type) {
+        case CPUID_FEATURE_WORD:
+            r = kvm_arch_get_supported_cpuid(kvm_state, wi->cpuid.eax,
+                                                wi->cpuid.ecx,
+                                                wi->cpuid.reg);
+            break;
+        case MSR_FEATURE_WORD:
+            r = kvm_arch_get_supported_msr_feature(kvm_state,
+                        wi->msr.index);
+            break;

I'm not sure this is correct in the case of IA32_ARCH_CAPABILITIES.RSBA: we do want to be able to set RSBA even if the host doesn't have it set.

Probably you need to handle IA32_ARCH_CAPABILITIES.RSBA as a special case inside kvm_arch_get_supported_msr_feature().

(And we do want to warn the user in some way if RSBA is set in the host but not in the guest. But that's a separate problem.)

Quoted 21 lines

target/i386/cpu.c +3 -1

+        }
     } else if (hvf_enabled()) {
         r = hvf_get_supported_cpuid(wi->cpuid_eax,
                                     wi->cpuid_ecx,

@@ -4732,9 +4770,10 @@ static void x86_cpu_adjust_feat_level(X86CPU *cpu, FeatureWord w)
 {
     CPUX86State *env = &cpu->env;
     FeatureWordInfo *fi = &feature_word_info[w];
-    uint32_t eax = fi->cpuid_eax;
+    uint32_t eax = fi->cpuid.eax;
     uint32_t region = eax & 0xF0000000;
 
+    assert(feature_word_info[w].type == CPUID_FEATURE_WORD);
     if (!env->features[w]) {
         return;
     }

Signature · 1 line

1.8.3.1

Quoted 23 lines · Eduardo Habkost

Quoted 22 lines · Robert Hoo

Add an util function feature_word_description(), which help construct the string describing the feature word (both CPUID and MSR types).

report_unavailable_features(): add MSR_FEATURE_WORD type support. x86_cpu_get_feature_words(): limit to CPUID_FEATURE_WORD only. x86_cpu_get_supported_feature_word(): add MSR_FEATURE_WORD type support. x86_cpu_adjust_feat_level(): assert the requested feature must be CPUID_FEATURE_WORD type.

Signed-off-by Robert Hoo <[email protected]>

---
 target/i386/cpu.c | 77 +++++++++++++++++++++++++++++++++++++++++--------------
 1 file changed, 58 insertions(+), 19 deletions(-)

target/i386/cpu.c +0 -0

index f7c70d9..21ed599 100644
@@ -3024,21 +3024,51 @@ static const TypeInfo host_x86_cpu_type_info = {
 
 #endif
 

Quoted 9 lines

target/i386/cpu.c static const TypeInfo host_x86_cpu_type_info = { · line 3032

Quoted 6 lines

target/i386/cpu.c +6 -0

+/*
+*caller should have input str no less than 64 byte length.
+*/
+#define FEATURE_WORD_DESCPTION_LEN 64
+static int feature_word_description(char str[], FeatureWordInfo *f,
+                                            uint32_t bit)

I agree with Eric: g_strup_printf() would be much simpler here.

1 question: I think caller should g_free() the returned str after it warn_report(), right?

Quoted 119 lines

Quoted 12 lines

target/i386/cpu.c +12 -0

+{
+    int ret;
+
+    assert(f->type == CPUID_FEATURE_WORD ||
+        f->type == MSR_FEATURE_WORD);
+    switch (f->type) {
+    case CPUID_FEATURE_WORD:
+        {
+            const char *reg = get_register_name_32(f->cpuid.reg);
+            assert(reg);
+            ret = snprintf(str, FEATURE_WORD_DESCPTION_LEN,
+                "CPUID.%02XH:%s%s%s [bit %d]",

target/i386/cpu.c static const TypeInfo host_x86_cpu_type_info = { · line 3054

Quoted 10 lines

target/i386/cpu.c +10 -0

+                f->cpuid.eax, reg,
+                f->feat_names[bit] ? "." : "",
+                f->feat_names[bit] ? f->feat_names[bit] : "", bit);
+            break;
+        }
+    case MSR_FEATURE_WORD:
+        ret = snprintf(str, FEATURE_WORD_DESCPTION_LEN,
+            "MSR(%xH).%s [bit %d]",
+            f->msr.index,
+            f->feat_names[bit] ? f->feat_names[bit] : "", bit);

What about leaving the (f->feat_names[bit] ? ... : ...) part in report_unavailable_features() and just make this function return "CPUID[...]" or "MSR[...]"?

Quoted 39 lines

target/i386/cpu.c +12 -10

+        break;
+    }
+    return ret > 0;
+}
+
 static void report_unavailable_features(FeatureWord w, uint32_t mask)
 {
     FeatureWordInfo *f = &feature_word_info[w];
     int i;
+    char feat_word_dscrp_str[FEATURE_WORD_DESCPTION_LEN];
 
     for (i = 0; i < 32; ++i) {
         if ((1UL << i) & mask) {
-            const char *reg = get_register_name_32(f->cpuid_reg);
-            assert(reg);
-            warn_report("%s doesn't support requested feature: "
-                        "CPUID.%02XH:%s%s%s [bit %d]",
+            feature_word_description(feat_word_dscrp_str, f, i);
+            warn_report("%s doesn't support requested feature: %s",
                         accel_uses_host_cpuid() ? "host" : "TCG",
-                        f->cpuid_eax, reg,
-                        f->feat_names[i] ? "." : "",
-                        f->feat_names[i] ? f->feat_names[i] : "", i);
+                        feat_word_dscrp_str);
         }
     }
 }

@@ -3276,17 +3306,17 @@ static void x86_cpu_get_feature_words(Object *obj, Visitor *v,
 {
     uint32_t *array = (uint32_t *)opaque;
     FeatureWord w;
-    X86CPUFeatureWordInfo word_infos[FEATURE_WORDS] = { };
-    X86CPUFeatureWordInfoList list_entries[FEATURE_WORDS] = { };
+    X86CPUFeatureWordInfo word_infos[FEATURE_WORDS_NUM_CPUID] = { };
+    X86CPUFeatureWordInfoList list_entries[FEATURE_WORDS_NUM_CPUID] = { };
     X86CPUFeatureWordInfoList *list = NULL;
 
-    for (w = 0; w < FEATURE_WORDS; w++) {
+    for (w = 0; w < FEATURE_WORDS_NUM_CPUID; w++) {

target/i386/cpu.c static void x86_cpu_get_feature_words(Object *obj, Visitor *v, · line 3319

Quoted 10 lines

target/i386/cpu.c +4 -4

         FeatureWordInfo *wi = &feature_word_info[w];
         X86CPUFeatureWordInfo *qwi = &word_infos[w];
-        qwi->cpuid_input_eax = wi->cpuid_eax;
-        qwi->has_cpuid_input_ecx = wi->cpuid_needs_ecx;
-        qwi->cpuid_input_ecx = wi->cpuid_ecx;
-        qwi->cpuid_register = x86_reg_info_32[wi->cpuid_reg].qapi_enum;
+        qwi->cpuid_input_eax = wi->cpuid.eax;
+        qwi->has_cpuid_input_ecx = wi->cpuid.needs_ecx;
+        qwi->cpuid_input_ecx = wi->cpuid.ecx;
+        qwi->cpuid_register = x86_reg_info_32[wi->cpuid.reg].qapi_enum;

Looks OK, but I would add an
assert(wi->type == CPUID_FEATURE_WORD) on every block of code that uses the wi->cpuid field.

I would also get rid of FEATURE_WORDS_NUM_CPUID and FEATURE_WORDS_FIRST_MSR to reduce the chance of future mistakes. We can use FEATURE_WORDS in this loop and just check wi->type on each iteration.

Quoted 14 lines

target/i386/cpu.c +1 -4

         qwi->features = array[w];
 
         /* List will be in reverse order, but order shouldn't matter */

@@ -3659,12 +3689,20 @@ static uint32_t x86_cpu_get_supported_feature_word(FeatureWord w,
                                                    bool migratable_only)
 {
     FeatureWordInfo *wi = &feature_word_info[w];
-    uint32_t r;
+    uint32_t r = 0;
 
     if (kvm_enabled()) {
-        r = kvm_arch_get_supported_cpuid(kvm_state, wi->cpuid_eax,
-                                                    wi->cpuid_ecx,
-                                                    wi->cpuid_reg);

target/i386/cpu.c static uint32_t x86_cpu_get_supported_feature_word(FeatureWord w, · line 3704

Quoted 10 lines

target/i386/cpu.c +10 -0

+        switch (wi->type) {
+        case CPUID_FEATURE_WORD:
+            r = kvm_arch_get_supported_cpuid(kvm_state, wi->cpuid.eax,
+                                                wi->cpuid.ecx,
+                                                wi->cpuid.reg);
+            break;
+        case MSR_FEATURE_WORD:
+            r = kvm_arch_get_supported_msr_feature(kvm_state,
+                        wi->msr.index);
+            break;

I'm not sure this is correct in the case of IA32_ARCH_CAPABILITIES.RSBA: we do want to be able to set RSBA even if the host doesn't have it set.

Probably you need to handle IA32_ARCH_CAPABILITIES.RSBA as a special case inside kvm_arch_get_supported_msr_feature().

Quoted 2 lines

(And we do want to warn the user in some way if RSBA is set in the host but not in the guest. But that's a separate problem.)

The first part is easy to do. the latter, "to warn the user in some way if RSBA is set in the host but not in the guest", in kvm_arch_get_supported_msr_feature(), how can I know if guest has enabled IA32_ARCH_CAPABILITIES.RSBA or not? or you mean check in some other place, where is it?

x86_cpu_get_feature_words(): limit to CPUID_FEATURE_WORD only.

Quoted 1 line · Robert Hoo

x86_cpu_get_feature_words(): limit to CPUID_FEATURE_WORD only.

This should also grow support for MSR feature words.

My suggestion is that you add another patch after patch 1 that expands the definition of X86CPUFeatureWordInfo like this, and adjusts x86_cpu_get_feature_words() to match the new C structs. Then this patch can add MSR feature support somewhat easily.

The QAPI definitions would then look like this:

qapi/misc.json +36 -3

index d450cfef21..eae9243976 100644
@@ -2663,9 +2663,9 @@
   'data': [ 'EAX', 'EBX', 'ECX', 'EDX', 'ESP', 'EBP', 'ESI', 'EDI' ] }
 
 ##
-# @X86CPUFeatureWordInfo:
+# @X86CPUIDFeatureWordInfo:
 #
-# Information about a X86 CPU feature word
+# Information about an X86 CPUID feature word
 #
 # @cpuid-input-eax: Input EAX value for CPUID instruction for that feature word
 #

@@ -2678,12 +2690,45 @@
 #
 # Since: 1.5
 ##
-{ 'struct': 'X86CPUFeatureWordInfo',
+{ 'struct': 'X86CPUIDFeatureWordInfo',
   'data': { 'cpuid-input-eax': 'int',
             '*cpuid-input-ecx': 'int',
             'cpuid-register': 'X86CPURegister32',
             'features': 'int' } }
 
+##
+# @X86MSRFeatureWordInfo:
+#
+# Information about an X86 MSR feature word
+#
+# @index: Index of the model specific register
+#
+# @cpuid-feature: CPUID feature name that communicates the existance of the MSR
+#
+# @features: value of output register, containing the feature bits
+#
+# Since: 3.1
+##
+{ 'struct': 'X86MSRFeatureWordInfo',
+  'data': { 'index': 'int',
+            'cpuid-feature': 'str',
+            'features': 'int' } }
+
+##
+# @X86CPUFeatureWordInfo:
+#
+# A discriminated record of X86 CPU feature words
+#
+# Since: 3.1
+##
+
+{ 'union': 'X86CPUFeatureWordInfo',
+  'base': { 'type': 'X86CPUFeatureWordType' },
+  'discriminator': 'type',
+  'data': {
+    'cpuid': 'X86CPUIDFeatureWordInfo',
+    'msr': 'X86MSRFeatureWordInfo' }}
+
 ##
 # @DummyForceArrays:
 #

I'm not sure if the cpuid-feature field is useful for libvirt and other management applications. Eduardo, what do you think?

Thanks,

Paolo

Quoted 1 line · Robert Hoo

x86_cpu_get_feature_words(): limit to CPUID_FEATURE_WORD only.

This should also grow support for MSR feature words.

My suggestion is that you add another patch after patch 1 that expands the definition of X86CPUFeatureWordInfo like this, and adjusts x86_cpu_get_feature_words() to match the new C structs. Then this patch can add MSR feature support somewhat easily.

The QAPI definitions would then look like this:

qapi/misc.json +29 -3

index d450cfef21..eae9243976 100644
@@ -2663,9 +2663,9 @@
   'data': [ 'EAX', 'EBX', 'ECX', 'EDX', 'ESP', 'EBP', 'ESI', 'EDI' ] }
 
 ##
-# @X86CPUFeatureWordInfo:
+# @X86CPUIDFeatureWordInfo:
 #
-# Information about a X86 CPU feature word
+# Information about an X86 CPUID feature word
 #
 # @cpuid-input-eax: Input EAX value for CPUID instruction for that feature word
 #

@@ -2678,12 +2690,45 @@
 #
 # Since: 1.5
 ##
-{ 'struct': 'X86CPUFeatureWordInfo',
+{ 'struct': 'X86CPUIDFeatureWordInfo',
   'data': { 'cpuid-input-eax': 'int',
             '*cpuid-input-ecx': 'int',
             'cpuid-register': 'X86CPURegister32',
             'features': 'int' } }
 
+##
+# @X86MSRFeatureWordInfo:
+#
+# Information about an X86 MSR feature word
+#
+# @index: Index of the model specific register
+#
+# @cpuid-feature: CPUID feature name that communicates the existance of the MSR
+#
+# @features: value of output register, containing the feature bits
+#
+# Since: 3.1
+##
+{ 'struct': 'X86MSRFeatureWordInfo',
+  'data': { 'index': 'int',
+            'cpuid-feature': 'str',
+            'features': 'int' } }
+
+##
+# @X86CPUFeatureWordInfo:
+#
+# A discriminated record of X86 CPU feature words
+#
+# Since: 3.1
+##
+

I'm not sure if the cpuid-feature field is useful for libvirt and other management applications. Eduardo, what do you think?

Thanks,

Paolo

Quoted 65 lines · Paolo Bonzini

Quoted 1 line · Robert Hoo

x86_cpu_get_feature_words(): limit to CPUID_FEATURE_WORD only.

This should also grow support for MSR feature words.

My suggestion is that you add another patch after patch 1 that expands the definition of X86CPUFeatureWordInfo like this, and adjusts x86_cpu_get_feature_words() to match the new C structs. Then this patch can add MSR feature support somewhat easily.

The QAPI definitions would then look like this:

qapi/misc.json +29 -3

index d450cfef21..eae9243976 100644
@@ -2663,9 +2663,9 @@
   'data': [ 'EAX', 'EBX', 'ECX', 'EDX', 'ESP', 'EBP', 'ESI', 'EDI' ] }
 
 ##
-# @X86CPUFeatureWordInfo:
+# @X86CPUIDFeatureWordInfo:
 #
-# Information about a X86 CPU feature word
+# Information about an X86 CPUID feature word
 #
 # @cpuid-input-eax: Input EAX value for CPUID instruction for that feature word
 #

@@ -2678,12 +2690,45 @@
 #
 # Since: 1.5
 ##
-{ 'struct': 'X86CPUFeatureWordInfo',
+{ 'struct': 'X86CPUIDFeatureWordInfo',
   'data': { 'cpuid-input-eax': 'int',
             '*cpuid-input-ecx': 'int',
             'cpuid-register': 'X86CPURegister32',
             'features': 'int' } }
 
+##
+# @X86MSRFeatureWordInfo:
+#
+# Information about an X86 MSR feature word
+#
+# @index: Index of the model specific register
+#
+# @cpuid-feature: CPUID feature name that communicates the existance of the MSR
+#
+# @features: value of output register, containing the feature bits
+#
+# Since: 3.1
+##
+{ 'struct': 'X86MSRFeatureWordInfo',
+  'data': { 'index': 'int',
+            'cpuid-feature': 'str',
+            'features': 'int' } }
+
+##
+# @X86CPUFeatureWordInfo:
+#
+# A discriminated record of X86 CPU feature words
+#
+# Since: 3.1
+##
+

qapi/misc.json line 2734

Quoted 10 lines

qapi/misc.json +7 -0

+{ 'union': 'X86CPUFeatureWordInfo',
+  'base': { 'type': 'X86CPUFeatureWordType' },
+  'discriminator': 'type',
+  'data': {
+    'cpuid': 'X86CPUIDFeatureWordInfo',
+    'msr': 'X86MSRFeatureWordInfo' }}
+
 ##
 # @DummyForceArrays:
 #

[root@robert-ivt qemu]# git diff qapi/misc.json

qapi/misc.json +2 -3

index d450cfe..7351dc2 100644
@@ -2663,25 +2663,25 @@
   'data': [ 'EAX', 'EBX', 'ECX', 'EDX', 'ESP', 'EBP', 'ESI', 'EDI' ] }
 
 ##
-# @X86CPUFeatureWordInfo:
+# @X86CPUIDFeatureWordInfo:
 #
-# Information about a X86 CPU feature word
+# Information about a X86 CPUID feature word
 #
-# @cpuid-input-eax: Input EAX value for CPUID instruction for that

feature word
+# @input-eax: Input EAX value for CPUID instruction for that feature word
#

qapi/misc.json +14 -6

-# @cpuid-input-ecx: Input ECX value for CPUID instruction for that
+# @input-ecx: Input ECX value for CPUID instruction for that
 #                   feature word
 #
-# @cpuid-register: Output register containing the feature bits
+# @register: Output register containing the feature bits
 #
 # @features: value of output register, containing the feature bits
 #
 # Since: 1.5
 ##
-{ 'struct': 'X86CPUFeatureWordInfo',
-  'data': { 'cpuid-input-eax': 'int',
-            '*cpuid-input-ecx': 'int',
-            'cpuid-register': 'X86CPURegister32',
+{ 'struct': 'X86CPUIDFeatureWordInfo',
+  'data': { 'input-eax': 'int',
+            '*input-ecx': 'int',
+            'register': 'X86CPURegister32',
             'features': 'int' } }
 
 ##

@@ -2694,6 +2694,50 @@
 { 'struct': 'DummyForceArrays',
   'data': { 'unused': ['X86CPUFeatureWordInfo'] } }
 
+##
+# @X86MSRFeatureWordInfo:
+#
+# Information about an X86 MSR feature word
+#
+# @index: Index of the model specific register
+#
+# @cpuid-feature: CPUID feature name that communicates the existance of

the MSR

qapi/misc.json +25 -0

+#
+# @features: value of output register, containing the feature bits
+#
+# Since: 3.1
+##
+{ 'struct': 'X86MSRFeatureWordInfo',
+  'data': { 'index': 'int',
+            'cpuid-feature': 'str',
+            'features': 'int' } }
+
+##
+# @X86CPUFeatureWordType:
+#
+# Kinds of X86 CPU feature words
+#
+# @cpuid: A CPUID leaf
+#
+# @msr: An MSR
+##
+{ 'enum': 'X86CPUFeatureWordType',
+  'data': [ 'cpuid', 'msr' ] }
+
+##
+# @X86CPUFeatureWordInfo:
+#

+

##
# @NumaOptionsType:

Hi Paolo,

above is my draft change on the qapi json file. 1 question:

struct X86MSRFeatureWordInfo {
    int64_t index;
    char *cpuid_feature;
    int64_t features;
};

how to have a "const" prefix the "char *"?

Quoted 3 lines

I'm not sure if the cpuid-feature field is useful for libvirt and other management applications. Eduardo, what do you think?

Quoted 4 lines

Thanks,

Paolo

Question to the QAPI schema maintainers below:

Review

Quoted 10 lines

##

(quoted diff) +4 -4

-{ 'struct': 'X86CPUFeatureWordInfo',
-  'data': { 'cpuid-input-eax': 'int',
-            '*cpuid-input-ecx': 'int',
-            'cpuid-register': 'X86CPURegister32',
+{ 'struct': 'X86CPUIDFeatureWordInfo',
+  'data': { 'input-eax': 'int',
+            '*input-ecx': 'int',
+            'register': 'X86CPURegister32',
              'features': 'int' } }

Question to the QAPI maintainers: is this really allowed? With this change, data that conforms to the new schema may not conform to the old schema, because now the "input-eax" field will become optional.

AFAICS, this will break the existing libvirt code: it will make qemuMonitorJSONParseCPUx86Features() error out because it won't find the "input-eax" field on all X86CPUFeatureWordInfo elements.

Quoted 13 lines · Eduardo Habkost

Question to the QAPI schema maintainers below:

Review

Quoted 10 lines

##

(quoted diff) +4 -4

-{ 'struct': 'X86CPUFeatureWordInfo',
-  'data': { 'cpuid-input-eax': 'int',
-            '*cpuid-input-ecx': 'int',
-            'cpuid-register': 'X86CPURegister32',
+{ 'struct': 'X86CPUIDFeatureWordInfo',
+  'data': { 'input-eax': 'int',
+            '*input-ecx': 'int',
+            'register': 'X86CPURegister32',
              'features': 'int' } }

You are renaming the struct (which is not visible over the wire), as well as renaming members within the struct (which is visible, if this type appears on the wire).

However, 'grep FeatureWordInfo qapi/qapi-introspect.c' has no hits either before or after this patch (well, first you have to build with my currently-pending patch as part of Markus' pull request for this trick to work, https://lists.gnu.org/archive/html/qemu-devel/2018-08/msg05968.html).
Or, even without my patch, grepping for 'input-eax' has no hits as a member name in any struct. Which means that there are no QMP commands currently exposing this struct over the wire.

Quoted 7 lines

Question to the QAPI maintainers: is this really allowed? With this change, data that conforms to the new schema may not conform to the old schema, because now the "input-eax" field will become optional.

Yes, you can do whatever you want to QAPI structs that are not part of the QMP API, since they exist merely to make your C code easier. You don't have to worry about backwards compatibility, because the only clients of such structs are being compiled at the same time as you make modifications to that struct. Only once the struct appears in QMP introspection do you start having to worry about back-compat. There, the rules are the struct names don't matter, but member names do; if the struct is used on input, then removing members is bad, adding mandatory members is bad, but adding optional members is okay (older clients don't know to pass in the new members, and may continue to pass in the member name you no longer want to use); if the struct is used on output, then removing non-optional members is bad, removing optional members is okay, and adding members is okay (clients are supposed to ignore unknown members, but may break if a previously mandatory member disappears).

Quoted 1 line

Quoted 3 lines

AFAICS, this will break the existing libvirt code: it will make qemuMonitorJSONParseCPUx86Features() error out because it won't find the "input-eax" field on all X86CPUFeatureWordInfo elements.

No, this change can't break libvirt, since I just proved there is no QMP command that libvirt could be using that either supplies an input member or expects an output member named "input-eax" in the first place.

Quoted 19 lines · Eric Blake

Quoted 13 lines · Eduardo Habkost

Question to the QAPI schema maintainers below:

Review

Quoted 10 lines

   ##

(quoted diff) +4 -4

-{ 'struct': 'X86CPUFeatureWordInfo',
-  'data': { 'cpuid-input-eax': 'int',
-            '*cpuid-input-ecx': 'int',
-            'cpuid-register': 'X86CPURegister32',
+{ 'struct': 'X86CPUIDFeatureWordInfo',
+  'data': { 'input-eax': 'int',
+            '*input-ecx': 'int',
+            'register': 'X86CPURegister32',
               'features': 'int' } }

You are renaming the struct (which is not visible over the wire), as well as renaming members within the struct (which is visible, if this type appears on the wire).

Quoted 7 lines

However, 'grep FeatureWordInfo qapi/qapi-introspect.c' has no hits either before or after this patch (well, first you have to build with my currently-pending patch as part of Markus' pull request for this trick to work, https://lists.gnu.org/archive/html/qemu-devel/2018-08/msg05968.html).
Or, even without my patch, grepping for 'input-eax' has no hits as a member name in any struct. Which means that there are no QMP commands currently exposing this struct over the wire.

There is one: qom-get.

Quoted 4 lines

Quoted 3 lines

AFAICS, this will break the existing libvirt code: it will make qemuMonitorJSONParseCPUx86Features() error out because it won't find the "input-eax" field on all X86CPUFeatureWordInfo elements.

Quoted 3 lines

No, this change can't break libvirt, since I just proved there is no QMP command that libvirt could be using that either supplies an input member or expects an output member named "input-eax" in the first place.

I'm sure it will break libvirt. libvirt uses "qom-get path=<cpu-path> property=feature-words" to get X86FeatureWordInfo data, and it expects the returned data to have a "input-eax" field.

-----Original Message-----
From: Eric Blake [mailto:[email protected]]
Sent: Thursday, September 6, 2018 1:41
To: Eduardo Habkost <[email protected]>
Cc: Robert Hoo <[email protected]>; Paolo Bonzini <[email protected]>; Hu, Robert <[email protected]>; [email protected]; [email protected]; [email protected]; Liu, Jingqi <[email protected]>; Markus Armbruster <[email protected]>; Jiri Denemark <[email protected]>
Subject: Re: [PATCH v3 3/3] Change other funcitons referring to feature_word_info[]

Quoted 20 lines · Eduardo Habkost

Quoted 19 lines · Eric Blake

Quoted 13 lines · Eduardo Habkost

Question to the QAPI schema maintainers below:

Review

Quoted 10 lines

   ##

(quoted diff) +4 -4

-{ 'struct': 'X86CPUFeatureWordInfo',
-  'data': { 'cpuid-input-eax': 'int',
-            '*cpuid-input-ecx': 'int',
-            'cpuid-register': 'X86CPURegister32',
+{ 'struct': 'X86CPUIDFeatureWordInfo',
+  'data': { 'input-eax': 'int',
+            '*input-ecx': 'int',
+            'register': 'X86CPURegister32',
               'features': 'int' } }

You are renaming the struct (which is not visible over the wire), as well as renaming members within the struct (which is visible, if this type appears on the wire).

Quoted 4 lines

Quoted 4 lines

However, 'grep FeatureWordInfo qapi/qapi-introspect.c' has no hits either before or after this patch (well, first you have to build with my currently-pending patch as part of Markus' pull request for this trick to work, https://lists.gnu.org/archive/html/qemu-devel/2018-

08/msg05968.html).

Quoted 5 lines

Quoted 3 lines

Or, even without my patch, grepping for 'input-eax' has no hits as a member name in any struct. Which means that there are no QMP commands currently exposing this struct over the wire.

There is one: qom-get.

Oh, right, the nasty exception that is not visible to introspection :(

Quoted 8 lines

Quoted 7 lines

Quoted 3 lines

AFAICS, this will break the existing libvirt code: it will make qemuMonitorJSONParseCPUx86Features() error out because it won't find the "input-eax" field on all X86CPUFeatureWordInfo elements.

No, this change can't break libvirt, since I just proved there is no QMP command that libvirt could be using that either supplies an input member or expects an output member named "input-eax" in the first place.

Quoted 3 lines

I'm sure it will break libvirt. libvirt uses "qom-get path=<cpu-path> property=feature-words" to get X86FeatureWordInfo data, and it expects the returned data to have a "input-eax" field.

Yeah, since this type is used in the qom-get backdoor that evades introspection, it's even more important that you follow the backwards-compatibility rules and not rename or delete any previously-mandatory members, since libvirt CAN'T introspect if such changes have happened.

--
Eric Blake, Principal Software Engineer
Red Hat, Inc. +1-919-301-3266
Virtualization: qemu.org | libvirt.org

Quoted 55 lines

-----Original Message-----
From: Eric Blake [mailto:[email protected]]
Sent: Thursday, September 6, 2018 1:41
To: Eduardo Habkost <[email protected]>
Cc: Robert Hoo <[email protected]>; Paolo Bonzini <[email protected]>; Hu, Robert <[email protected]>; [email protected]; [email protected]; [email protected]; Liu, Jingqi <[email protected]>; Markus Armbruster <[email protected]>; Jiri Denemark <[email protected]>
Subject: Re: [PATCH v3 3/3] Change other funcitons referring to feature_word_info[]

Quoted 20 lines · Eduardo Habkost

Quoted 19 lines · Eric Blake

Quoted 13 lines · Eduardo Habkost

Question to the QAPI schema maintainers below:

Review

Quoted 10 lines

   ##

(quoted diff) +4 -4

-{ 'struct': 'X86CPUFeatureWordInfo',
-  'data': { 'cpuid-input-eax': 'int',
-            '*cpuid-input-ecx': 'int',
-            'cpuid-register': 'X86CPURegister32',
+{ 'struct': 'X86CPUIDFeatureWordInfo',
+  'data': { 'input-eax': 'int',
+            '*input-ecx': 'int',
+            'register': 'X86CPURegister32',
               'features': 'int' } }

You are renaming the struct (which is not visible over the wire), as well as renaming members within the struct (which is visible, if this type appears on the wire).

Quoted 4 lines

Quoted 4 lines

However, 'grep FeatureWordInfo qapi/qapi-introspect.c' has no hits either before or after this patch (well, first you have to build with my currently-pending patch as part of Markus' pull request for this trick to work, https://lists.gnu.org/archive/html/qemu-devel/2018-

08/msg05968.html).

Quoted 5 lines

Quoted 3 lines

Or, even without my patch, grepping for 'input-eax' has no hits as a member name in any struct. Which means that there are no QMP commands currently exposing this struct over the wire.

There is one: qom-get.

Oh, right, the nasty exception that is not visible to introspection :(

Quoted 8 lines

Quoted 7 lines

Quoted 3 lines

AFAICS, this will break the existing libvirt code: it will make qemuMonitorJSONParseCPUx86Features() error out because it won't find the "input-eax" field on all X86CPUFeatureWordInfo elements.

No, this change can't break libvirt, since I just proved there is no QMP command that libvirt could be using that either supplies an input member or expects an output member named "input-eax" in the first place.

Quoted 9 lines

Quoted 3 lines

I'm sure it will break libvirt. libvirt uses "qom-get path=<cpu-path> property=feature-words" to get X86FeatureWordInfo data, and it expects the returned data to have a "input-eax" field.

Yeah, since this type is used in the qom-get backdoor that evades introspection, it's even more important that you follow the backwards-compatibility rules and not rename or delete any previously-mandatory members, since libvirt CAN'T introspect if such changes have happened.

[Robert Hoo]
Oh, this is more complicated than my thought.
So, Eduardo, how about leave the QAPI expansion for MSR based features to other professional people?

Quoted 11 lines · Robert

Quoted 10 lines

Yeah, since this type is used in the qom-get backdoor that evades introspection,
it's even more important that you follow the backwards- compatibility rules and
not rename or delete any previously-mandatory members, since libvirt CAN'T
introspect if such changes have happened.

Quoted 5 lines

[Robert Hoo]
Oh, this is more complicated than my thought.
So, Eduardo, how about leave the QAPI expansion for MSR based features to other
professional people?

I think it's now clear that we can't add MSR features to "feature-words" in a compatible way, so any mechanism to introspect MSR features will need a separate property or QMP command.

I also think "feature-words" needs to be replaced with something better.  Probably libvirt should be able to grab all information it needs by looking at the boolean QOM properties instead of the low-level info at "feature-words".

This means I agree to leave this functionality out of the MSR feature patch series for now.