Add support for LPASS clock controller for SDM845
Subsystems (3)
PATCH v8 1/1 Add support for LPASS clock controller for SDM845
[v8]
* Add CLK_IS_CRITICAL for GCC lpass clocks for lpass clocks access to go through always.
[v7]
* Cleanup header file inclusions.
* Move the comments along with the flags.
* Update the commit with details for CLK_IGNORE_UNUSED.
[v6]
* Update the logic to register the lpass clocks when the device tree property is not present.
* Add the CLK_IGNORE_UNUSED flag for the lpass clocks to not gate the clocks at late_init.
[v5]
* Address the comments in device tree binding to update the reg-names, update the unit address in lpass clock node example and also add reg property for the gcc clock node.
* Update the lpass driver to take care of the reg-names.
[v4]
* Update the description in GCC Documentation binding for 'qcom,lpass-protected'.
* Remove 'qcom,lpass-protected' from LPASS Documentation binding.
* Update KConfig to use Low Power Audio Subsystem.
* Add module_exit() and also update return value for devm_ioremap_resource failure.
[v3]
* Add a device tree property to identify lpass protected GCC clocks.
* Update the GCC driver code to register the lpass clocks when the flag is defined.
* Add comment for clocks using the BRANCH_HALT_SKIP flag.
* Use platform APIs instead of of_address_to_resource.
* Replace devm_ioremap with devm_ioremap_resource.
* Use fixed index for 'lpass_cc' & 'lpass_qdsp6ss' in probe.
[v2]
* Make gcc_lpass_sway_clk static.
* Remove using child nodes and use reg-names to differentiate various domains of LPASS CC.
Add support for the lpass clock controller found on SDM845 based devices. This would allow lpass peripheral loader drivers to control the clocks to bring the subsystem out of reset.
*** BLURB HERE ***
Taniya Das (1):
clk: qcom: Add lpass clock controller driver for SDM845
drivers/clk/qcom/Kconfig | 9 ++ drivers/clk/qcom/Makefile | 1 + drivers/clk/qcom/gcc-sdm845.c | 37 ++++++++ drivers/clk/qcom/lpasscc-sdm845.c | 192 ++++++++++++++++++++++++++++++++++++++ 4 files changed, 239 insertions(+) create mode 100644 drivers/clk/qcom/lpasscc-sdm845.c
--
Qualcomm INDIA, on behalf of Qualcomm Innovation Center, Inc.is a member of the Code Aurora Forum, hosted by the Linux Foundation.
PATCH v8 1/1 clk: qcom: Add lpass clock controller driver for SDM845
Add support for the lpass clock controller found on SDM845 based devices. This would allow lpass peripheral loader drivers to control the clocks to bring the subsystem out of reset.
LPASS clocks present on the global clock controller would be registered with the clock framework based on the device tree flag. Also do not gate these clocks if they are left unused, as the lpass clocks require the global clock controller lpass clocks to be enabled before they are accessed. Mark the GCC lpass clocks as CRITICAL, for the LPASS clock access.
--- drivers/clk/qcom/Kconfig | 9 ++ drivers/clk/qcom/Makefile | 1 + drivers/clk/qcom/gcc-sdm845.c | 37 ++++++++ drivers/clk/qcom/lpasscc-sdm845.c | 192 ++++++++++++++++++++++++++++++++++++++ 4 files changed, 239 insertions(+) create mode 100644 drivers/clk/qcom/lpasscc-sdm845.c
drivers/clk/qcom/Kconfig +9 -0
@@ -293,6 +293,15 @@ config SDM_DISPCC_845 Say Y if you want to support display devices and functionality such as splash screen. +config SDM_LPASSCC_845 + tristate "SDM845 Low Power Audio Subsystem (LPAAS) Clock Controller" + depends on COMMON_CLK_QCOM + select SDM_GCC_845 + help + Support for the LPASS clock controller on SDM845 devices. + Say Y if you want to use the LPASS branch clocks of the LPASS clock + controller to reset the LPASS subsystem. + config SPMI_PMIC_CLKDIV tristate "SPMI PMIC clkdiv Support" depends on (COMMON_CLK_QCOM && SPMI) || COMPILE_TEST
drivers/clk/qcom/Makefile +1 -0
@@ -46,6 +46,7 @@ obj-$(CONFIG_SDM_CAMCC_845) += camcc-sdm845.o obj-$(CONFIG_SDM_DISPCC_845) += dispcc-sdm845.o obj-$(CONFIG_SDM_GCC_660) += gcc-sdm660.o obj-$(CONFIG_SDM_GCC_845) += gcc-sdm845.o +obj-$(CONFIG_SDM_LPASSCC_845) += lpasscc-sdm845.o obj-$(CONFIG_SDM_VIDEOCC_845) += videocc-sdm845.o obj-$(CONFIG_SPMI_PMIC_CLKDIV) += clk-spmi-pmic-div.o obj-$(CONFIG_KPSS_XCC) += kpss-xcc.o
drivers/clk/qcom/gcc-sdm845.c +37 -0
@@ -3169,6 +3169,34 @@ enum { }, }; +static struct clk_branch gcc_lpass_q6_axi_clk = { + .halt_reg =0x47000 , + .halt_check =BRANCH_HALT , + .clkr = { + .enable_reg =0x47000 , + .enable_mask =BIT (0 ), + .hw.init = &(struct clk_init_data ){ + .name ="gcc_lpass_q6_axi_clk" , + .flags =CLK_IS_CRITICAL , + .ops = &clk_branch2_ops, + }, + }, +}; + +static struct clk_branch gcc_lpass_sway_clk = { + .halt_reg =0x47008 , + .halt_check =BRANCH_HALT , + .clkr = { + .enable_reg =0x47008 , + .enable_mask =BIT (0 ), + .hw.init = &(struct clk_init_data ){ + .name ="gcc_lpass_sway_clk" , + .flags =CLK_IS_CRITICAL , + .ops = &clk_branch2_ops, + }, + }, +}; +static struct gdsc pcie_0_gdsc = { .gdscr =0x6b004 , .pd = {
@@ -3469,6 +3497,8 @@ enum { [GCC_QSPI_CORE_CLK_SRC] = &gcc_qspi_core_clk_src.clkr, [GCC_QSPI_CORE_CLK] = &gcc_qspi_core_clk.clkr, [GCC_QSPI_CNOC_PERIPH_AHB_CLK] = &gcc_qspi_cnoc_periph_ahb_clk.clkr, + [GCC_LPASS_Q6_AXI_CLK] = NULL, + [GCC_LPASS_SWAY_CLK] = NULL, };static const struct qcom_reset_map gcc_sdm845_resets[] = {
@@ -3583,6 +3613,13 @@ static int gcc_sdm845_probe(struct platform_device *pdev)if (ret)return ret; +if (!of_property_read_bool (pdev->dev.of_node,"qcom,lpass-protected" )) { + gcc_sdm845_clocks[GCC_LPASS_Q6_AXI_CLK ] = + &gcc_lpass_q6_axi_clk.clkr; + gcc_sdm845_clocks[GCC_LPASS_SWAY_CLK ] = + &gcc_lpass_sway_clk.clkr; + } +return qcom_cc_really_probe (pdev, &gcc_sdm845_desc, regmap); }
drivers/clk/qcom/lpasscc-sdm845.c new file +192 -0
192 lines not on this page · raw message
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Qualcomm INDIA, on behalf of Qualcomm Innovation Center, Inc.is a member of the Code Aurora Forum, hosted by the Linux Foundation.
Stephen Boyd
maintainerRe: [PATCH v8] clk: qcom: Add lpass clock controller driver for SDM845
Quoting Taniya Das (2018-10-28 00:35:40)
Quoted 9 lines
Add support for the lpass clock controller found on SDM845 based devices. This would allow lpass peripheral loader drivers to control the clocks to bring the subsystem out of reset.
LPASS clocks present on the global clock controller would be registered with the clock framework based on the device tree flag. Also do not gate these clocks if they are left unused, as the lpass clocks require the global clock controller lpass clocks to be enabled before they are accessed. Mark the GCC lpass clocks as CRITICAL, for the LPASS clock access.
Thanks for the useful commit text!
drivers/clk/qcom/gcc-sdm845.c static int gcc_sdm845_probe(struct platform_device *pdev) · line 3616
Quoted 10 lines
drivers/clk/qcom/gcc-sdm845.c +1
-0@@ -3583,6 +3613,13 @@ static int gcc_sdm845_probe(struct platform_device *pdev)if (ret)return ret; +if (!of_property_read_bool (pdev->dev.of_node,"qcom,lpass-protected" )) {
Bjorn told me over IRC that the QSPI clks are also protected on MTP and can't be read. So we're now causing MTP to fail on linus' tree. I think we need to add a generic property to the GCC node to indicate what clks are protected and shouldn't be touched by the OS. The function would go and knock out any protected clks by replacing their pointers with NULL. The property would be:
protected-clocks = <clock-specifier-list>;
So for this node it would look like:
gcc: clock-controller@f000 {
reg = <0xf00 0xbaf>; protected-clocks = <&gcc GCC_LPASS_Q6_AXI_CLK>,
<&gcc GCC_LPASS_SWAY_CLK>,
<&gcc GCC_QSPI_CORE_CLK_SRC>,
etc.};
Sorry for derailing this patch series so late in the process. This patch will need to be updated to work with that new DT property instead of having a custom qcom property. Otherwise the patch looks good and I think we're ready to merge it when the merge window closes and I can rewind clk-next.
Re: [PATCH v8] clk: qcom: Add lpass clock controller driver for SDM845
Hello Stephen,
Quoted 44 lines · Stephen Boyd
Quoting Taniya Das (2018-10-28 00:35:40)
Quoted 9 lines
Add support for the lpass clock controller found on SDM845 based devices. This would allow lpass peripheral loader drivers to control the clocks to bring the subsystem out of reset.
LPASS clocks present on the global clock controller would be registered with the clock framework based on the device tree flag. Also do not gate these clocks if they are left unused, as the lpass clocks require the global clock controller lpass clocks to be enabled before they are accessed. Mark the GCC lpass clocks as CRITICAL, for the LPASS clock access.Thanks for the useful commit text!
drivers/clk/qcom/gcc-sdm845.c static int gcc_sdm845_probe(struct platform_device *pdev) · line 3616
Quoted 10 lines
drivers/clk/qcom/gcc-sdm845.c +1
-0@@ -3583,6 +3613,13 @@ static int gcc_sdm845_probe(struct platform_device *pdev)if (ret)return ret; +if (!of_property_read_bool (pdev->dev.of_node,"qcom,lpass-protected" )) {Bjorn told me over IRC that the QSPI clks are also protected on MTP and can't be read. So we're now causing MTP to fail on linus' tree. I think we need to add a generic property to the GCC node to indicate what clks are protected and shouldn't be touched by the OS. The function would go and knock out any protected clks by replacing their pointers with NULL. The property would be:
protected-clocks = <clock-specifier-list>;So for this node it would look like:
gcc: clock-controller@f000 { reg = <0xf00 0xbaf>; protected-clocks = <&gcc GCC_LPASS_Q6_AXI_CLK>, <&gcc GCC_LPASS_SWAY_CLK>, <&gcc GCC_QSPI_CORE_CLK_SRC>, etc. };
Quoted 6 lines
Sorry for derailing this patch series so late in the process. This patch will need to be updated to work with that new DT property instead of having a custom qcom property. Otherwise the patch looks good and I think we're ready to merge it when the merge window closes and I can rewind clk-next.
How about moving the QSPI clocks too under this qcom property? Later could add the support?
Signature · 4 lines
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation. --
Stephen Boyd
maintainerRe: [PATCH v8] clk: qcom: Add lpass clock controller driver for SDM845
Quoting Taniya Das (2018-11-02 20:16:20)
Quoted 6 lines · Stephen Boyd
Quoted 2 lines
Quoting Taniya Das (2018-10-28 00:35:40)
How about moving the QSPI clocks too under this qcom property? Later could add the support?
Yes the plan would be to have QSPI clks there too. Bjorn has sent the patch now.
Re: [PATCH v8] clk: qcom: Add lpass clock controller driver for SDM845
Thanks Stephen.
Quoted 5 lines · Stephen Boyd
Quoting Taniya Das (2018-11-02 20:16:20)
Quoted 4 lines · Stephen Boyd
Quoted 2 lines
Quoting Taniya Das (2018-10-28 00:35:40)
Quoted 8 lines
Quoted 2 lines
How about moving the QSPI clocks too under this qcom property? Later could add the support?
Yes the plan would be to have QSPI clks there too. Bjorn has sent the patch now.
Would you be merging the code soon and then I should submit the cleaned up LPASS next series?
Please suggest.
Signature · 4 lines
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation. --
Stephen Boyd
maintainerRe: [PATCH v8] clk: qcom: Add lpass clock controller driver for SDM845
Quoting Taniya Das (2018-11-07 22:43:43)
Quoted 11 lines
Thanks Stephen.
Quoted 8 lines · Stephen Boyd
Quoting Taniya Das (2018-11-02 20:16:20)
Quoted 6 lines · Stephen Boyd
Quoted 2 lines
Quoting Taniya Das (2018-10-28 00:35:40)
How about moving the QSPI clocks too under this qcom property? Later could add the support?
Quoted 8 lines
Quoted 5 lines
Yes the plan would be to have QSPI clks there too. Bjorn has sent the patch now.
Would you be merging the code soon and then I should submit the cleaned up LPASS next series?
Yes, if you want to resubmit on top of that series it would make it easier for me to apply these patches. I'm currently waiting for any DT review from Rob Herring, and having the patches ready and staged can be done regardless of that.