dt-bindings: msm: disp: add yaml schemas for DPU bindings
Subsystems (5)
PATCH v10 1/4 dt-bindings: msm: disp: add yaml schemas for DPU bindings
MSM Mobile Display Subsytem (MDSS) encapsulates sub-blocks like DPU display controller, DSI etc. Add YAML schema for DPU device tree bindings.
Changes in v2:
- Changed dpu to DPU (Sam Ravnborg)
- Fixed indentation issues (Sam Ravnborg)
- Added empty line between different properties (Sam Ravnborg)
- Replaced reference txt files with their corresponding yaml files (Sam Ravnborg)
- Modified the file to use "|" only when it is necessary (Sam Ravnborg)
Changes in v3:
- Corrected the license used (Rob Herring)
- Added maxItems for properties (Rob Herring)
- Dropped generic descriptions (Rob Herring)
- Added ranges property (Rob Herring)
- Corrected the indendation (Rob Herring)
- Added additionalProperties (Rob Herring)
- Split dsi file into two, one for dsi controller and another one for dsi phy per target (Rob Herring)
- Corrected description for pinctrl-names (Rob Herring)
- Corrected the examples used in yaml file (Rob Herring)
- Delete dsi.txt and dpu.txt (Rob Herring)
Changes in v4:
- Move schema up by one level (Rob Herring)
- Add patternProperties for mdp node (Rob Herring)
- Corrected description of some properties (Rob Herring)
Changes in v5:
- Correct the indentation (Rob Herring)
- Remove unnecessary description from properties (Rob Herring)
- Correct the number of interconnect entries (Rob Herring)
- Add interconnect names for sc7180 (Rob Herring)
- Add description for ports (Rob Herring)
- Remove common properties (Rob Herring)
- Add unevalutatedProperties (Rob Herring)
- Reference existing dsi controller yaml in the common dsi controller file (Rob Herring)
- Correct the description of clock names to include only the clocks that are required (Rob Herring)
- Remove properties which are already covered under the common binding (Rob Herring)
- Add dsi phy supply nodes which are required for sc7180 and sdm845 targets (Rob Herring)
- Add type ref for syscon-sfpb (Rob Herring)
Changes in v6:
- Fixed errors during dt_binding_check (Rob Herring)
- Add maxItems for phys and phys-names (Rob Herring)
- Use unevaluatedProperties wherever required (Rob Herring)
- Removed interrupt controller from required properties for dsi controller (Rob Herring)
- Add constraints for dsi-phy reg-names based on the compatible phy version (Rob Herring)
- Add constraints for dsi-phy supply nodes based on the compatible phy version (Rob Herring)
Changes in v7:
- Add default value for qcom,mdss-mdp-transfer-time-us (Rob Herring)
- Modify the schema for data-lanes (Rob Herring)
- Split the phy schema into separate schemas based on the phy version (Rob Herring)
Changes in v8:
- Resolve merge conflicts with latest dsi.txt file
- Include dp yaml change also in the same series
Changes in v9:
- Combine target specific dsi controller yaml files to a single yaml file (Rob Herring)
- Combine target specific dsi phy yaml files into a single yaml file (Rob Herring)
- Use unevaluatedProperties and additionalProperties wherever required
- Remove duplicate properties from common yaml files
Changes in v10:
- Split the patch into separate patches for DPU, DSI and PHY (Stephen Boyd)
- Drop unnecessary fullstop (Stephen Boyd)
- Add newline whereever required (Stephen Boyd)
- Add description for clock used (Stephen Boyd)
- Modify the description for interconnect entries (Stephen Boyd)
- Drop assigned clock entries as it a generic property (Stephen Boyd)
- Correct the definition for interrupts (Stephen Boyd)
- Drop clock names from required properties (Stephen Boyd)
- Drop labels for display nodes from example (Stephen Boyd)
- Drop flags from interrupts entries (Stephen Boyd)
--- .../bindings/display/msm/dpu-sc7180.yaml | 213 +++++++++++++++++++++ .../bindings/display/msm/dpu-sdm845.yaml | 199 +++++++++++++++++++ .../devicetree/bindings/display/msm/dpu.txt | 141 -------------- 3 files changed, 412 insertions(+), 141 deletions(-) create mode 100644 Documentation/devicetree/bindings/display/msm/dpu-sc7180.yaml create mode 100644 Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml delete mode 100644 Documentation/devicetree/bindings/display/msm/dpu.txt
Documentation/devicetree/bindings/display/msm/dpu-sc7180.yaml new file +213 -0
@@ -0,0 +1,213 @@ +# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/msm/dpu-sc7180.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Description of Qualcomm Display DPU dt properties + +maintainers: + - Krishna Manikandan <[email protected]> + +description: | + Device tree bindings for MSM Mobile Display Subsytem(MDSS) that encapsulates + sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree + bindings of MDSS and DPU are mentioned for SC7180 target. + +properties: + compatible: + items: + - const: qcom,sc7180-mdss + + reg: + maxItems: 1 + + reg-names: + const: mdss + + power-domains: + maxItems: 1 + + clocks: + maxItems: 3 + items: + - description: Display AHB clock from gcc + - description: Display AHB clock from dispcc + - description: Display core clock + + clock-names: + items: + - const: iface + - const: ahb + - const: core + + interrupts: + minItems: 1 + + interrupt-controller: true + + "#interrupt-cells": + const: 1 + + iommus: + maxItems: 1 + + "#address-cells": + const: 2 + + "#size-cells": + const: 2 + + ranges: true + + interconnects: + description: | + Interconnect path specifier for MDSS according to + Documentation/devicetree/bindings/interconnect/interconnect.txt. + minItems: 1 + + interconnect-names: + items: + - const: mdp0-mem + +patternProperties: + "^mdp@[0-9a-f]+$": + type: object + description: Node containing the properties of DPU. + + properties: + compatible: + items: + - const: qcom,sc7180-dpu + + reg: + maxItems: 2 + + reg-names: + items: + - const: mdp + - const: vbif + + clocks: + maxItems: 6 + items: + - description: Display hf axi clock + - description: Display ahb clock + - description: Display rotator clock + - description: Display lut clock + - description: Display core clock + - description: Display vsync clock + + clock-names: + items: + - const: bus + - const: iface + - const: rot + - const: lut + - const: core + - const: vsync + + interrupts: + minItems: 1 + + ports: + type: object + description: | + Contains the list of output ports from DPU device. These ports + connect to interfaces that are external to the DPU hardware, + such as DSI, DP etc. Each output port contains an endpoint that + describes how it is connected to an external interface. These + are described by the standard properties documented in files + mentioned below. + + Documentation/devicetree/bindings/graph.txt + Documentation/devicetree/bindings/media/video-interfaces.txt + + properties: + port@0: + type: object + description: DPU_INTF1 (DSI1) + + port@1: + type: object + description: DPU_INTF2 (DSI2) + +required: + - compatible + - reg + - reg-names + - power-domains + - clocks + - interrupts + - interrupt-controller + - iommus + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/qcom,dispcc-sc7180.h> + #include <dt-bindings/clock/qcom,gcc-sc7180.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/interconnect/qcom,sdm845.h> + + soc { + #address-cells = <2>; + #size-cells = <2>; + + mdss@ae00000 { + compatible = "qcom,sc7180-mdss"; + #address-cells = <2>; + #size-cells = <2>; + reg = <0 0xae00000 0 0x1000>; + reg-names = "mdss"; + power-domains = <&dispcc MDSS_GDSC>; + + clocks = <&gcc GCC_DISP_AHB_CLK>, + <&dispcc DISP_CC_MDSS_AHB_CLK>, + <&dispcc DISP_CC_MDSS_MDP_CLK>; + clock-names = "iface", "ahb", "core"; + + interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; + interrupt-controller; + #interrupt-cells = <1>; + + interconnects = <&mmss_noc MASTER_MDP0 &mc_virt SLAVE_EBI1>; + interconnect-names = "mdp0-mem"; + + iommus = <&apps_smmu 0x800 0x2>; + + mdp@ae01000 { + compatible = "qcom,sc7180-dpu"; + reg = <0 0x0ae01000 0 0x8f000>, + <0 0x0aeb0000 0 0x2008>; + + reg-names = "mdp", "vbif"; + + clocks = <&gcc GCC_DISP_HF_AXI_CLK>, + <&dispcc DISP_CC_MDSS_AHB_CLK>, + <&dispcc DISP_CC_MDSS_ROT_CLK>, + <&dispcc DISP_CC_MDSS_MDP_LUT_CLK>, + <&dispcc DISP_CC_MDSS_MDP_CLK>, + <&dispcc DISP_CC_MDSS_VSYNC_CLK>; + clock-names = "bus", "iface", "rot", "lut", "core", + "vsync"; + + interrupt-parent = <&mdss>; + interrupts = <0>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + dpu_intf1_out: endpoint { + remote-endpoint = <&dsi0_in>; + }; + }; + }; + }; + }; + }; +...
Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml new file +199 -0
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Documentation/devicetree/bindings/display/msm/dpu.txt deleted +0 -141
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Signature · 1 line
2.7.4
PATCH v10 2/4 dt-bindings: msm: dsi: add yaml schemas for DSI bindings
Add YAML schema for the device tree bindings for DSI controller.
Changes in v1:
- Separate dsi controller bindings to a separate patch (Stephen Boyd)
- Merge dsi-common-controller.yaml and dsi-controller-main.yaml to a single file (Stephen Boyd)
- Drop supply entries and definitions from properties (Stephen Boyd)
- Modify phy-names property for dsi controller (Stephen Boyd)
- Remove boolean from description (Stephen Boyd)
- Drop pinctrl properties as they are standard entries (Stephen Boyd)
- Modify the description for ports property and keep the reference to the generic binding where this is defined (Stephen Boyd)
- Add description to clock names (Stephen Boyd)
- Correct the indendation (Stephen Boyd)
- Drop the label for display dt nodes and correct the node name (Stephen Boyd)
--- .../bindings/display/msm/dsi-controller-main.yaml | 233 +++++++++++++++++++ .../devicetree/bindings/display/msm/dsi.txt | 249 --------------------- 2 files changed, 233 insertions(+), 249 deletions(-) create mode 100644 Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml delete mode 100644 Documentation/devicetree/bindings/display/msm/dsi.txt
Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml new file +233 -0
@@ -0,0 +1,233 @@ +# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/msm/dsi-controller-main.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Description of Qualcomm Display DSI controller dt properties + +maintainers: + - Krishna Manikandan <[email protected]> + +description: | + Common Device tree bindings for DSI controller. + +allOf: + - $ref: "../dsi-controller.yaml#" + +properties: + compatible: + items: + - const: qcom,mdss-dsi-ctrl + + reg: + maxItems: 1 + + reg-names: + const: dsi_ctrl + + interrupts: + maxItems: 1 + + clocks: + maxItems: 6 + items: + - description: Display byte clock + - description: Display byte interface clock + - description: Display pixel clock + - description: Display escape clock + - description: Display AHB clock + - description: Display AXI clock + + clock-names: + items: + - const: byte + - const: byte_intf + - const: pixel + - const: core + - const: iface + - const: bus + + phys: + minItems: 1 + + phy-names: + const: dsi + + syscon-sfpb: + description: A phandle to mmss_sfpb syscon node (only for DSIv2). + $ref: "/schemas/types.yaml#/definitions/phandle" + + qcom,mdss-mdp-transfer-time-us: + description: | + Specifies the DSI transfer time for command mode + panels in microseconds. Driver uses this number to adjust + the clock rate according to the expected transfer time. + Increasing this value would slow down the mdp processing + and can result in slower performance. + Decreasing this value can speed up the mdp processing, + but this can also impact power consumption. + As a rule this time should not be higher than the time + that would be expected with the processing at the + DSI link rate since anyways this would be the maximum + transfer time that could be achieved. + If ping pong split is enabled, this time should not be higher + than two times the DSI link rate time. + This is an optional property. + default: 14000 + + qcom,dual-dsi-mode: + type: boolean + description: | + Indicates if the DSI controller is driving a panel which needs + 2 DSI links. + + qcom,master-dsi: + type: boolean + description: | + Indicates if the DSI controller is driving the master link of + the 2-DSI panel. + + qcom,sync-dual-dsi: + type: boolean + description: | + Indicates if the DSI controller is driving a 2-DSI panel whose + 2 links need receive command simultaneously. + + ports: + type: object + description: | + Contains DSI controller input and output ports as children, each + containing one endpoint subnode as defined in + Documentation/devicetree/bindings/graph.txt and + Documentation/devicetree/bindings/media/video-interfaces.txt. + + properties: + port@0: + type: object + description: | + Input endpoints of the controller. + + properties: + reg: + const: 0 + + endpoint: + type: object + properties: + remote-endpoint: + description: | + For port@0, set to phandle of the connected panel/bridge's + input endpoint. For port@1, set to the MDP interface output. + See Documentation/devicetree/bindings/graph.txt for + device graph info. + + data-lanes: + description: | + This describes how the physical DSI data lanes are mapped + to the logical lanes on the given platform. The value contained in + index n describes what physical lane is mapped to the logical lane n + (DATAn, where n lies between 0 and 3). The clock lane position is fixed + and can't be changed. Hence, they aren't a part of the DT bindings. See + Documentation/devicetree/bindings/media/video-interfaces.txt for + more info on the data-lanes property. + + items: + - const: 0 + - const: 1 + - const: 2 + - const: 3 + port@1: + type: object + description: | + Output endpoints of the controller. + properties: + reg: + const: 1 + + endpoint: + type: object + properties: + remote-endpoint: true + data-lanes: + items: + - const: 0 + - const: 1 + - const: 2 + - const: 3 + +required: + - compatible + - reg + - reg-names + - interrupts + - clocks + - clock-names + - phys + - phy-names + - ports + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/clock/qcom,dispcc-sdm845.h> + #include <dt-bindings/clock/qcom,gcc-sdm845.h> + + soc { + #address-cells = <2>; + #size-cells = <2>; + + mdss@ae00000 { + #address-cells = <2>; + #size-cells = <2>; + reg = <0 0xae00000 0 0x1000>; + interrupt-controller; + #interrupt-cells = <1>; + + dsi@ae94000 { + compatible = "qcom,mdss-dsi-ctrl"; + reg = <0 0x0ae94000 0 0x400>; + reg-names = "dsi_ctrl"; + + interrupt-parent = <&mdss>; + interrupts = <4>; + + clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK>, + <&dispcc DISP_CC_MDSS_BYTE0_INTF_CLK>, + <&dispcc DISP_CC_MDSS_PCLK0_CLK>, + <&dispcc DISP_CC_MDSS_ESC0_CLK>, + <&dispcc DISP_CC_MDSS_AHB_CLK>, + <&dispcc DISP_CC_MDSS_AXI_CLK>; + clock-names = "byte", + "byte_intf", + "pixel", + "core", + "iface", + "bus"; + + phys = <&dsi0_phy>; + phy-names = "dsi"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + dsi0_in: endpoint { + remote-endpoint = <&dpu_intf1_out>; + }; + }; + + port@1 { + reg = <1>; + dsi0_out: endpoint { + }; + }; + }; + }; + }; + }; +...
Documentation/devicetree/bindings/display/msm/dsi.txt deleted +0 -249
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Signature · 1 line
2.7.4
Re: [PATCH v10 2/4] dt-bindings: msm: dsi: add yaml schemas for DSI bindings
Quoting Krishna Manikandan (2021-02-03 22:42:17)
Quoted 55 lines
Add YAML schema for the device tree bindings for DSI controller.
Signed-off-by Krishna Manikandan <[email protected]>Changes in v1:
- Separate dsi controller bindings to a separate patch (Stephen Boyd)
- Mergedsi-common-controller.yamlanddsi-controller-main.yamlto a single file (Stephen Boyd)
- Drop supply entries and definitions from properties (Stephen Boyd)
- Modify phy-names property for dsi controller (Stephen Boyd)
- Remove boolean from description (Stephen Boyd)
- Drop pinctrl properties as they are standard entries (Stephen Boyd)
- Modify the description for ports property and keep the reference to the generic binding where this is defined (Stephen Boyd)
- Add description to clock names (Stephen Boyd)
- Correct the indendation (Stephen Boyd)
- Drop the label for display dt nodes and correct the node name (Stephen Boyd)--- .../bindings/display/msm/dsi-controller-main.yaml | 233 +++++++++++++++++++ .../devicetree/bindings/display/msm/dsi.txt | 249 --------------------- 2 files changed, 233 insertions(+), 249 deletions(-) create mode 100644 Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml delete mode 100644 Documentation/devicetree/bindings/display/msm/dsi.txtDocumentation/devicetree/bindings/display/msm/dsi-controller-main.yaml new file +23
-0@@ -0,0 +1,233 @@ +# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/msm/dsi-controller-main.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Description of Qualcomm Display DSI controller dt properties + +maintainers: + - Krishna Manikandan <[email protected]> + +description: | + Common Device tree bindings for DSI controller. + +allOf: + - $ref: "../dsi-controller.yaml#" + +properties: + compatible: + items: + - const: qcom,mdss-dsi-ctrl + + reg:
Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml line 33
Quoted 10 lines
Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml new file +10
-0+ maxItems: 1 + + reg-names: + const: dsi_ctrl + + interrupts: + maxItems: 1 + + clocks: + maxItems: 6
Drop maxItems? Or are some clks optional sometimes?
Quoted 34 lines
Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml new file +34
-0+ items: + - description: Display byte clock + - description: Display byte interface clock + - description: Display pixel clock + - description: Display escape clock + - description: Display AHB clock + - description: Display AXI clock + + clock-names: + items: + - const: byte + - const: byte_intf + - const: pixel + - const: core + - const: iface + - const: bus + + phys: + minItems: 1 + + phy-names: + const: dsi + + syscon-sfpb: + description: A phandle to mmss_sfpb syscon node (only for DSIv2). + $ref: "/schemas/types.yaml#/definitions/phandle" + + qcom,mdss-mdp-transfer-time-us: + description: | + Specifies the DSI transfer time for command mode + panels in microseconds. Driver uses this number to adjust + the clock rate according to the expected transfer time. + Increasing this value would slow down the mdp processing + and can result in slower performance.
Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml line 77
Quoted 10 lines
Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml new file +10
-0+ Decreasing this value can speed up the mdp processing, + but this can also impact power consumption. + As a rule this time should not be higher than the time + that would be expected with the processing at the + DSI link rate since anyways this would be the maximum + transfer time that could be achieved. + If ping pong split is enabled, this time should not be higher + than two times the DSI link rate time. + This is an optional property. + default: 14000
Why is this in DT vs. being tweaked from userspace? This was there before but it isn't used anywhere in an upstream DTS file so please drop it.
Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml line 83
Quoted 6 lines
Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml new file +6
-0+ + qcom,dual-dsi-mode: + type: boolean + description: | + Indicates if the DSI controller is driving a panel which needs + 2 DSI links.
Shouldn't this be apparent from the OF graph indicating two DSI endpoints?
Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml line 89
Quoted 6 lines
Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml new file +6
-0+ + qcom,master-dsi: + type: boolean + description: | + Indicates if the DSI controller is driving the master link of + the 2-DSI panel.
When is this not the case? This property looks like some sort of workaround for driver probe ordering. It was there before though so I guess this is fine.
Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml line 95
Quoted 6 lines
Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml new file +6
-0+ + qcom,sync-dual-dsi: + type: boolean + description: | + Indicates if the DSI controller is driving a 2-DSI panel whose + 2 links need receive command simultaneously.
Feels like it should be a property of the panel node?
Quoted 75 lines
Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml new file +75
-0+ + ports: + type: object + description: | + Contains DSI controller input and output ports as children, each + containing one endpoint subnode as defined in + Documentation/devicetree/bindings/graph.txt and + Documentation/devicetree/bindings/media/video-interfaces.txt. + + properties: + port@0: + type: object + description: | + Input endpoints of the controller. + + properties: + reg: + const: 0 + + endpoint: + type: object + properties: + remote-endpoint: + description: | + For port@0, set to phandle of the connected panel/bridge's + input endpoint. For port@1, set to the MDP interface output. + See Documentation/devicetree/bindings/graph.txt for + device graph info. + + data-lanes: + description: | + This describes how the physical DSI data lanes are mapped + to the logical lanes on the given platform. The value contained in + index n describes what physical lane is mapped to the logical lane n + (DATAn, where n lies between 0 and 3). The clock lane position is fixed + and can't be changed. Hence, they aren't a part of the DT bindings. See + Documentation/devicetree/bindings/media/video-interfaces.txt for + more info on the data-lanes property. + + items: + - const: 0 + - const: 1 + - const: 2 + - const: 3 + port@1: + type: object + description: | + Output endpoints of the controller. + properties: + reg: + const: 1 + + endpoint: + type: object + properties: + remote-endpoint: true + data-lanes: + items: + - const: 0 + - const: 1 + - const: 2 + - const: 3 + +required: + - compatible + - reg + - reg-names + - interrupts + - clocks + - clock-names + - phys + - phy-names + - ports + +unevaluatedProperties: false
Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml line 180
Quoted 10 lines
Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml new file +10
-0+ +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/clock/qcom,dispcc-sdm845.h> + #include <dt-bindings/clock/qcom,gcc-sdm845.h> + + soc { + #address-cells = <2>; + #size-cells = <2>;
The soc node can be left out.
Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml line 182
Quoted 2 lines
Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml new file +2
-0+ + mdss@ae00000 {
subsystem?
Quoted 8 lines
Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml new file +8
-0+ #address-cells = <2>; + #size-cells = <2>; + reg = <0 0xae00000 0 0x1000>; + interrupt-controller; + #interrupt-cells = <1>; + + dsi@ae94000 { + compatible = "qcom,mdss-dsi-ctrl";
Re: [PATCH v10 2/4] dt-bindings: msm: dsi: add yaml schemas for DSI bindings
Quoted 134 lines · Stephen Boyd
Quoting Krishna Manikandan (2021-02-03 22:42:17)
Quoted 64 lines
Add YAML schema for the device tree bindings for DSI controller.
Signed-off-by Krishna Manikandan <[email protected]>Changes in v1:
- Separate dsi controller bindings to a separate patch (Stephen
Boyd)
- Mergedsi-common-controller.yamlanddsi-controller-main.yamlto a single file (Stephen Boyd)
- Drop supply entries and definitions from properties (Stephen
Boyd)
- Modify phy-names property for dsi controller (Stephen Boyd)
- Remove boolean from description (Stephen Boyd)
- Drop pinctrl properties as they are standard entries (Stephen
Boyd)
- Modify the description for ports property and keep the reference to the generic binding where this is defined (Stephen Boyd)
- Add description to clock names (Stephen Boyd)
- Correct the indendation (Stephen Boyd)
- Drop the label for display dt nodes and correct the node name (Stephen Boyd)--- .../bindings/display/msm/dsi-controller-main.yaml | 233 +++++++++++++++++++ .../devicetree/bindings/display/msm/dsi.txt | 249 --------------------- 2 files changed, 233 insertions(+), 249 deletions(-) create mode 100644 Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml delete mode 100644
Documentation/devicetree/bindings/display/msm/dsi.txt(quoted diff) +0
-0
b/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yamlDocumentation/devicetree/bindings/display/msm/dsi-controller-main.yaml new file +4
-0@@ -0,0 +1,233 @@ +# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause +%YAML 1.2 +--- +$id:http://devicetree.org/schemas/display/msm/dsi-controller-main.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml new file +18
-0+ +title: Description of Qualcomm Display DSI controller dt properties + +maintainers: + - Krishna Manikandan <[email protected]> + +description: | + Common Device tree bindings for DSI controller. + +allOf: + - $ref: "../dsi-controller.yaml#" + +properties: + compatible: + items: + - const: qcom,mdss-dsi-ctrl + + reg:Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml line 33
Quoted 10 lines
Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml new file +10
-0+ maxItems: 1 + + reg-names: + const: dsi_ctrl + + interrupts: + maxItems: 1 + + clocks: + maxItems: 6Drop maxItems? Or are some clks optional sometimes?
Quoted 34 lines
Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml new file +34
-0+ items: + - description: Display byte clock + - description: Display byte interface clock + - description: Display pixel clock + - description: Display escape clock + - description: Display AHB clock + - description: Display AXI clock + + clock-names: + items: + - const: byte + - const: byte_intf + - const: pixel + - const: core + - const: iface + - const: bus + + phys: + minItems: 1 + + phy-names: + const: dsi + + syscon-sfpb: + description: A phandle to mmss_sfpb syscon node (only for DSIv2). + $ref: "/schemas/types.yaml#/definitions/phandle" + + qcom,mdss-mdp-transfer-time-us: + description: | + Specifies the DSI transfer time for command mode + panels in microseconds. Driver uses this number to adjust + the clock rate according to the expected transfer time. + Increasing this value would slow down the mdp processing + and can result in slower performance.Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml line 77
Quoted 10 lines
Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml new file +10
-0+ Decreasing this value can speed up the mdp processing, + but this can also impact power consumption. + As a rule this time should not be higher than the time + that would be expected with the processing at the + DSI link rate since anyways this would be the maximum + transfer time that could be achieved. + If ping pong split is enabled, this time should not be higher + than two times the DSI link rate time. + This is an optional property. + default: 14000Why is this in DT vs. being tweaked from userspace? This was there before but it isn't used anywhere in an upstream DTS file so please drop it.
Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml line 83
Quoted 6 lines
Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml new file +6
-0+ + qcom,dual-dsi-mode: + type: boolean + description: | + Indicates if the DSI controller is driving a panel which needs + 2 DSI links.
Quoted 2 lines
Shouldn't this be apparent from the OF graph indicating two DSI endpoints?
Yes Stephen, you are correct. But these properties ( qcom,dual-dsi-mode and qcom,master-dsi) are defined in sdm845 dtsi file and the current code is parsing these properties during dsi probe. That is why I defined these properties here.
Quoted 12 lines
Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml line 89
Quoted 7 lines
Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml new file +6
-0+ + qcom,master-dsi: + type: boolean + description: | + Indicates if the DSI controller is driving the master link of + the 2-DSI panel.When is this not the case? This property looks like some sort of workaround for driver probe ordering. It was there before though so I guess this is fine.
Quoted 8 lines
Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml line 95
Quoted 6 lines
Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml new file +6
-0+ + qcom,sync-dual-dsi: + type: boolean + description: | + Indicates if the DSI controller is driving a 2-DSI panel whose + 2 links need receive command simultaneously.Feels like it should be a property of the panel node?
We are not using this property in any of the targets. I will remove this property.
Quoted 89 lines
Quoted 89 lines
Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml new file +5
-0+ + ports: + type: object + description: | + Contains DSI controller input and output ports as children,each
Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml new file +20
-0+ containing one endpoint subnode as defined in + Documentation/devicetree/bindings/graph.txt and + Documentation/devicetree/bindings/media/video-interfaces.txt. + + properties: + port@0: + type: object + description: | + Input endpoints of the controller. + + properties: + reg: + const: 0 + + endpoint: + type: object + properties: + remote-endpoint: + description: | + For port@0, set to phandle of the connectedpanel/bridge's
+ input endpoint. For port@1, set to the MDP
interface output.Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml new file +6
-0+ See Documentation/devicetree/bindings/graph.txt for + device graph info. + + data-lanes: + description: | + This describes how the physical DSI data lanes aremapped
+ to the logical lanes on the given platform. The
value contained in
+ index n describes what physical lane is mapped to
the logical lane n
+ (DATAn, where n lies between 0 and 3). The clock
lane position is fixed
+ and can't be changed. Hence, they aren't a part of
the DT bindings. See
+Documentation/devicetree/bindings/media/video-interfaces.txtforDocumentation/devicetree/bindings/display/msm/dsi-controller-main.yaml new file +42
-0+ more info on the data-lanes property. + + items: + - const: 0 + - const: 1 + - const: 2 + - const: 3 + port@1: + type: object + description: | + Output endpoints of the controller. + properties: + reg: + const: 1 + + endpoint: + type: object + properties: + remote-endpoint: true + data-lanes: + items: + - const: 0 + - const: 1 + - const: 2 + - const: 3 + +required: + - compatible + - reg + - reg-names + - interrupts + - clocks + - clock-names + - phys + - phy-names + - ports + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h>
Quoted 8 lines
Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml line 180
Quoted 6 lines
Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml new file +6
-0+ #include <dt-bindings/clock/qcom,dispcc-sdm845.h> + #include <dt-bindings/clock/qcom,gcc-sdm845.h> + + soc { + #address-cells = <2>; + #size-cells = <2>;The soc node can be left out.
Should I follow the same approach that you suggested in DP yaml patch here also ?
ie. soc {
#address-cells = <2>;
#size-cells = <2>;
dsi@ae9400000{
...
}
}Comment:
Please look at section "2.2.2 Generic Names Recommendation"
of the DT
spec[1] to find a proper name. I don't see 'subsystem' there
but that
may be because it shouldn't really exist as a node. Instead
we should
have the child nodes sit directly under the SoC node.
Quoted 14 lines
Review
Quoted 3 lines
(quoted diff) +2
-0+ + mdss@ae00000 {subsystem?
Quoted 8 lines
Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml new file +8
-0+ #address-cells = <2>; + #size-cells = <2>; + reg = <0 0xae00000 0 0x1000>; + interrupt-controller; + #interrupt-cells = <1>; + + dsi@ae94000 { + compatible = "qcom,mdss-dsi-ctrl";
Re: [PATCH v10 2/4] dt-bindings: msm: dsi: add yaml schemas for DSI bindings
Quoting [email protected] (2021-02-09 02:53:41)
Quoted 23 lines · Stephen Boyd
Quoted 12 lines
Quoted 12 lines
Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml new file +12
-0+ - interrupts + - clocks + - clock-names + - phys + - phy-names + - ports + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h>Quoted 8 lines
Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml line 180
Quoted 6 lines
Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml new file +6
-0+ #include <dt-bindings/clock/qcom,dispcc-sdm845.h> + #include <dt-bindings/clock/qcom,gcc-sdm845.h> + + soc { + #address-cells = <2>; + #size-cells = <2>;The soc node can be left out.
Should I follow the same approach that you suggested in DP yaml patch here also ?
Quoted 8 lines
ie. soc {
#address-cells = <2>;
#size-cells = <2>;
dsi@ae9400000{
...
}
}Yes.
Quoted 10 lines
Link :
https://patchwork.kernel.org/project/linux-arm-msm/patch/[email protected]/
Comment:
Please look at section "2.2.2 Generic Names Recommendation"
of the DT
spec[1] to find a proper name. I don't see 'subsystem' there
but that
may be because it shouldn't really exist as a node. Instead
we should
have the child nodes sit directly under the SoC node.
PATCH v10 3/4 dt-bindings: msm: dsi: add yaml schemas for DSI PHY bindings
In reply to Krishna ManikandanAdd YAML schema for the device tree bindings for DSI PHY.
Changes in v1:
- Merge dsi-phy.yaml and dsi-phy-10nm.yaml (Stephen Boyd)
- Remove qcom,dsi-phy-regulator-ldo-mode (Stephen Boyd)
- Add clock cells properly (Stephen Boyd)
- Remove unnecessary decription from clock names (Stephen Boyd)
- Add pin names for the supply entries for 10nm phy which is used in sc7180 and sdm845 (Stephen Boyd)
- Remove unused header files from examples (Stephen Boyd)
- Drop labels for display nodes and correct node name (Stephen Boyd)
--- .../bindings/display/msm/dsi-phy-10nm.yaml | 93 ++++++++++++++++++++++ .../bindings/display/msm/dsi-phy-14nm.yaml | 56 +++++++++++++ .../bindings/display/msm/dsi-phy-20nm.yaml | 59 ++++++++++++++ .../bindings/display/msm/dsi-phy-28nm.yaml | 56 +++++++++++++ 4 files changed, 264 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/msm/dsi-phy-10nm.yaml create mode 100644 Documentation/devicetree/bindings/display/msm/dsi-phy-14nm.yaml create mode 100644 Documentation/devicetree/bindings/display/msm/dsi-phy-20nm.yaml create mode 100644 Documentation/devicetree/bindings/display/msm/dsi-phy-28nm.yaml
Documentation/devicetree/bindings/display/msm/dsi-phy-10nm.yaml new file +93 -0
@@ -0,0 +1,93 @@ +# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/msm/dsi-phy-10nm.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Description of Qualcomm Display DSI 10nm PHY dt properties + +maintainers: + - Krishna Manikandan <[email protected]> + +description: | + Common Device tree bindings for DSI 10nm PHY. + +properties: + compatible: + oneOf: + - const: qcom,dsi-phy-10nm + - const: qcom,dsi-phy-10nm-8998 + + reg-names: + items: + - const: dsi_phy + - const: dsi_phy_lane + - const: dsi_pll + + "#clock-cells": + const: 1 + + power-domains: + maxItems: 1 + + clocks: + maxItems: 2 + items: + - description: Display AHB clock + - description: Board XO source + + clock-names: + items: + - const: iface + - const: ref + + vdds-supply: + description: | + Phandle to vdds regulator device node. This supply will be connected to + DSI0_MIPI_DSI_PLL_VDDA0P9 pin. + +required: + - compatible + - reg + - reg-names + - clocks + - clock-names + - vdds-supply + +additionalProperties: true + +examples: + - | + #include <dt-bindings/clock/qcom,dispcc-sdm845.h> + #include <dt-bindings/clock/qcom,rpmh.h> + + soc { + #address-cells = <2>; + #size-cells = <2>; + + mdss@ae00000 { + #address-cells = <2>; + #size-cells = <2>; + reg = <0 0xae00000 0 0x1000>; + + dsi-phy@ae94400 { + compatible = "qcom,dsi-phy-10nm"; + reg = <0 0x0ae94400 0 0x200>, + <0 0x0ae94600 0 0x280>, + <0 0x0ae94a00 0 0x1e0>; + reg-names = "dsi_phy", + "dsi_phy_lane", + "dsi_pll"; + + #clock-cells = <1>; + #phy-cells = <0>; + + vdds-supply = <&vdda_mipi_dsi0_pll>; + clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>, + <&rpmhcc RPMH_CXO_CLK>; + clock-names = "iface", "ref"; + + }; + }; + }; +...
Documentation/devicetree/bindings/display/msm/dsi-phy-14nm.yaml new file +56 -0
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Documentation/devicetree/bindings/display/msm/dsi-phy-20nm.yaml new file +59 -0
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Documentation/devicetree/bindings/display/msm/dsi-phy-28nm.yaml new file +56 -0
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Signature · 1 line
2.7.4
Re: [PATCH v10 3/4] dt-bindings: msm: dsi: add yaml schemas for DSI PHY bindings
Quoting Krishna Manikandan (2021-02-03 22:42:18)
Quoted 43 lines
Documentation/devicetree/bindings/display/msm/dsi-phy-10nm.yaml new file +37
-0@@ -0,0 +1,93 @@ +# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/msm/dsi-phy-10nm.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Description of Qualcomm Display DSI 10nm PHY dt properties + +maintainers: + - Krishna Manikandan <[email protected]> + +description: | + Common Device tree bindings for DSI 10nm PHY. + +properties: + compatible: + oneOf: + - const: qcom,dsi-phy-10nm + - const: qcom,dsi-phy-10nm-8998 + + reg-names: + items: + - const: dsi_phy + - const: dsi_phy_lane + - const: dsi_pll + + "#clock-cells": + const: 1 + + power-domains: + maxItems: 1 + + clocks: + maxItems: 2 + items: + - description: Display AHB clock + - description: Board XO source
Documentation/devicetree/bindings/display/msm/dsi-phy-10nm.yaml line 47
Quoted 10 lines
Documentation/devicetree/bindings/display/msm/dsi-phy-10nm.yaml new file +10
-0+ + clock-names: + items: + - const: iface + - const: ref + + vdds-supply: + description: | + Phandle to vdds regulator device node. This supply will be connected to + DSI0_MIPI_DSI_PLL_VDDA0P9 pin.
Cool, can we get this same description for the other SoCs? It helps SoC integrators understand the pin on the SoC and how it relates to this supply because the name is different.
Quoted 9 lines
Documentation/devicetree/bindings/display/msm/dsi-phy-10nm.yaml new file +9
-0+ +required: + - compatible + - reg + - reg-names + - clocks + - clock-names + - vdds-supply +
Documentation/devicetree/bindings/display/msm/dsi-phy-10nm.yaml line 66
Quoted 10 lines
Documentation/devicetree/bindings/display/msm/dsi-phy-10nm.yaml new file +10
-0+additionalProperties: true + +examples: + - | + #include <dt-bindings/clock/qcom,dispcc-sdm845.h> + #include <dt-bindings/clock/qcom,rpmh.h> + + soc { + #address-cells = <2>; + #size-cells = <2>;
You can leave out the soc node.
Quoted 118 lines
Documentation/devicetree/bindings/display/msm/dsi-phy-10nm.yaml new file +27
-0+ + mdss@ae00000 { + #address-cells = <2>; + #size-cells = <2>; + reg = <0 0xae00000 0 0x1000>; + + dsi-phy@ae94400 { + compatible = "qcom,dsi-phy-10nm"; + reg = <0 0x0ae94400 0 0x200>, + <0 0x0ae94600 0 0x280>, + <0 0x0ae94a00 0 0x1e0>; + reg-names = "dsi_phy", + "dsi_phy_lane", + "dsi_pll"; + + #clock-cells = <1>; + #phy-cells = <0>; + + vdds-supply = <&vdda_mipi_dsi0_pll>; + clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>, + <&rpmhcc RPMH_CXO_CLK>; + clock-names = "iface", "ref"; + + }; + }; + }; +...Documentation/devicetree/bindings/display/msm/dsi-phy-14nm.yaml new file +56
-0@@ -0,0 +1,56 @@ +# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/msm/dsi-phy-14nm.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Description of Qualcomm Display DSI 14nm PHY dt properties + +maintainers: + - Krishna Manikandan <[email protected]> + +description: | + Common Device tree bindings for DSI 14nm PHY. + +properties: + compatible: + oneOf: + - const: qcom,dsi-phy-14nm + - const: qcom,dsi-phy-14nm-660 + + reg-names: + items: + - const: dsi_phy + - const: dsi_phy_lane + - const: dsi_pll + + "#clock-cells": + const: 1 + + power-domains: + maxItems: 1 + + clocks: + maxItems: 2 + items: + - description: Display AHB clock + - description: Board XO source + + clock-names: + items: + - const: iface + - const: ref + + vcca-supply: + description: Phandle to vcca regulator device node. + +required: + - compatible + - reg + - reg-names + - clocks + - clock-names + - vcca-supply + +additionalProperties: true +...Documentation/devicetree/bindings/display/msm/dsi-phy-20nm.yaml new file +23
-0@@ -0,0 +1,59 @@ +# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/msm/dsi-phy-20nm.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Description of Qualcomm Display DSI 20nm PHY dt properties + +maintainers: + - Krishna Manikandan <[email protected]> + +description: | + Common Device tree bindings for DSI 20nm PHY. + +properties: + compatible: + oneOf: + - const: qcom,dsi-phy-20nm + + reg-names: + items: + - const: dsi_pll + - const: dsi_phy
Documentation/devicetree/bindings/display/msm/dsi-phy-20nm.yaml line 33
Quoted 10 lines
Documentation/devicetree/bindings/display/msm/dsi-phy-20nm.yaml new file +10
-0+ - const: dsi_phy_regulator + + "#clock-cells": + const: 1 + + power-domains: + maxItems: 1 + + clocks: + maxItems: 2
There's a maxItems but then clocks is required. Does that mean sometimes no clocks are required? Seems like maxItems should be dropped.
Quoted 16 lines
Documentation/devicetree/bindings/display/msm/dsi-phy-20nm.yaml new file +16
-0+ items: + - description: Display AHB clock + - description: Board XO source + + clock-names: + items: + - const: iface + - const: ref + + vcca-supply: + description: Phandle to vcca regulator device node. + + vddio-supply: + description: Phandle to vdd-io regulator device node. + +required:
Documentation/devicetree/bindings/display/msm/dsi-phy-20nm.yaml line 59
Quoted 10 lines
Documentation/devicetree/bindings/display/msm/dsi-phy-20nm.yaml new file +10
-0+ - compatible + - reg + - reg-names + - clocks + - clock-names + - vddio-supply + - vcca-supply + +additionalProperties: true +...
Where's the example?
Quoted 52 lines
Documentation/devicetree/bindings/display/msm/dsi-phy-28nm.yaml new file +46
-0@@ -0,0 +1,56 @@ +# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/msm/dsi-phy-28nm.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Description of Qualcomm Display DSI 28nm PHY dt properties + +maintainers: + - Krishna Manikandan <[email protected]> + +description: | + Common Device tree bindings for DSI 28nm PHY. + +properties: + compatible: + oneOf: + - const: qcom,dsi-phy-28nm-hpm + - const: qcom,dsi-phy-28nm-lp + - const: qcom,dsi-phy-28nm-8960 + + reg-names: + items: + - const: dsi_pll + - const: dsi_phy + - const: dsi_phy_regulator + + "#clock-cells": + const: 1 + + power-domains: + maxItems: 1 + + clocks: + maxItems: 2 + items: + - description: Display AHB clock + - description: Board XO source + + clock-names: + items: + - const: iface + - const: ref + + vddio-supply: + description: Phandle to vdd-io regulator device node.
Documentation/devicetree/bindings/display/msm/dsi-phy-28nm.yaml line 56
Quoted 10 lines
Documentation/devicetree/bindings/display/msm/dsi-phy-28nm.yaml new file +10
-0+ +required: + - compatible + - reg + - reg-names + - clocks + - vddio-supply + +additionalProperties: true +...
Where's the example?
PATCH v10 4/4 dt-bindings: msm/dp: Add bindings of MSM DisplayPort controller
In reply to Krishna ManikandanAdd bindings for Snapdragon DisplayPort controller driver.
---
Changes in V2:
-Provide details about sel-gpio
Changes in V4:
-Provide details about max dp lanes
-Change the commit text
Changes in V5:
-moved dp.txt to yaml file
Changes in v6:
- Squash all AUX LUT properties into one pattern Property
- Make aux-cfg[0-9]-settings properties optional
- Remove PLL/PHY bindings from DP controller dts
- Add DP clocks description
- Remove _clk suffix from clock names
- Rename pixel clock to stream_pixel
- Remove redundant bindings (GPIO, PHY, HDCP clock, etc..)
- Fix indentation
- Add Display Port as interface of DPU in DPU bindings and add port mapping accordingly.
Chages in v7:
- Add dp-controller.yaml file common between multiple SOC
- Rename dp-sc7180.yaml to dp-controller-sc7180.yaml
- change compatible string and add SOC name to it.
- Remove Root clock generator for pixel clock
- Add assigned-clocks and assigned-clock-parents bindings
- Remove redundant properties, descriptions and blank lines
- Add DP port in DPU bindings
- Update depends-on tag in commit message and rebase change accordingly
Changes in v8:
- Add MDSS AHB clock in bindings
Changes in v9:
- Remove redundant reg-name property
- Change assigned-clocks and assigned-clocks-parents counts to 2
- Use IRQ flags in example dts
Changes in v10:
- Change title of this patch as it does not contain PLL bindings anymore
- Remove redundant properties
- Remove use of IRQ flag
- Fix ports property
Changes in v11:
- add ports required of both #address-cells and #size-cells
- add required operating-points-v2
- add required #sound-dai-cells
- add required power-domains
- update maintainer list
--- .../bindings/display/msm/dp-controller.yaml | 157 +++++++++++++++++++++ .../bindings/display/msm/dpu-sc7180.yaml | 10 ++ 2 files changed, 167 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/msm/dp-controller.yaml
Documentation/devicetree/bindings/display/msm/dp-controller.yaml new file +157 -0
@@ -0,0 +1,157 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/msm/dp-controller.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MSM Display Port Controller + +maintainers: + - Chandan Uddaraju <[email protected]> + - Vara Reddy <[email protected]> + - Kuogee Hsieh <[email protected]> + +description: | + Device tree bindings for DisplayPort host controller for MSM targets + that are compatible with VESA DisplayPort interface specification. + +properties: + compatible: + enum: + - qcom,sc7180-dp + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + items: + - description: AHB clock to enable register access + - description: Display Port AUX clock + - description: Display Port Link clock + - description: Link interface clock between DP and PHY + - description: Display Port Pixel clock + + clock-names: + items: + - const: core_iface + - const: core_aux + - const: ctrl_link + - const: ctrl_link_iface + - const: stream_pixel + + phys: + maxItems: 1 + + phy-names: + items: + - const: dp + + operating-points-v2: + maxItems: 1 + + power-domains: + maxItems: 1 + + "#sound-dai-cells": + const: 0 + + ports: + type: object + description: | + A ports node with endpoint definitions as defined in + Documentation/devicetree/bindings/media/video-interfaces.txt. + properties: + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + + port@0: + type: object + description: Input endpoint of the controller + + port@1: + type: object + description: Output endpoint of the controller + + required: + - "#address-cells" + - "#size-cells" + + additionalProperties: false + + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + - phys + - phy-names + - "#sound-dai-cells" + - power-domains + - ports + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/clock/qcom,dispcc-sc7180.h> + #include <dt-bindings/power/qcom-aoss-qmp.h> + #include <dt-bindings/power/qcom-rpmpd.h> + + mdss@ae00000 { + #address-cells = <2>; + #size-cells = <2>; + reg = <0xae00000 0x1000>, /* mdss */ + <0xae90000 0x1400>; /* dp */ + reg-names = "mdss", "dp"; + + displayport-controller@ae90000 { + compatible = "qcom,sc7180-dp"; + reg = <0 0xae90000 0 0x1400>; + interrupt-parent = <&mdss>; + interrupts = <12>; + clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>, + <&dispcc DISP_CC_MDSS_DP_AUX_CLK>, + <&dispcc DISP_CC_MDSS_DP_LINK_CLK>, + <&dispcc DISP_CC_MDSS_DP_LINK_INTF_CLK>, + <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK>; + clock-names = "core_iface", "core_aux", + "ctrl_link", + "ctrl_link_iface", "stream_pixel"; + + phys = <&dp_phy>; + phy-names = "dp"; + + #sound-dai-cells = <0>; + + power-domains = <&rpmhpd SC7180_CX>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + endpoint { + remote-endpoint = <&dpu_intf0_out>; + }; + }; + + port@1 { + reg = <1>; + endpoint { + remote-endpoint = <&typec>; + }; + }; + }; + }; + }; +...
Documentation/devicetree/bindings/display/msm/dpu-sc7180.yaml +10 -0
@@ -131,6 +131,9 @@ patternProperties: port@1: type: object description: DPU_INTF2 (DSI2) + port@2: + type: object + description: DPU_INTF0 (DP) required: - compatible
@@ -206,6 +209,13 @@ examples: remote-endpoint = <&dsi0_in>; }; }; + + port@2 { + reg = <2>; + dpu_intf0_out: endpoint { + remote-endpoint = <&dp_in>; + }; + }; }; }; };
Signature · 1 line
2.7.4
Re: [PATCH v10 4/4] dt-bindings: msm/dp: Add bindings of MSM DisplayPort controller
Quoting Krishna Manikandan (2021-02-03 22:42:19)
Quoted 7 lines
Add bindings for Snapdragon DisplayPort controller driver.
Signed-off-by Chandan Uddaraju <[email protected]>Signed-off-by Vara Reddy <[email protected]>Signed-off-by Tanmay Shah <[email protected]>Signed-off-by Kuogee Hsieh <[email protected]>
[...]
Quoted 7 lines
Changes in v11:
- add ports required of both #address-cells and #size-cells
- add required operating-points-v2
- add required #sound-dai-cells
- add required power-domains
- update maintainer list
Where's that maintainer file update?
Quoted 12 lines
--- .../bindings/display/msm/dp-controller.yaml | 157 +++++++++++++++++++++ .../bindings/display/msm/dpu-sc7180.yaml | 10 ++ 2 files changed, 167 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/msm/dp-controller.yamlDocumentation/devicetree/bindings/display/msm/dp-controller.yaml new file +0
-0
Documentation/devicetree/bindings/display/msm/dp-controller.yaml line 10
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Documentation/devicetree/bindings/display/msm/dp-controller.yaml new file +10
-0@@ -0,0 +1,157 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/msm/dp-controller.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MSM Display Port Controller + +maintainers: + - Chandan Uddaraju <[email protected]>
This email is bouncing. Please remove Chandan.
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Documentation/devicetree/bindings/display/msm/dp-controller.yaml new file +89
-0+ - Vara Reddy <[email protected]> + - Kuogee Hsieh <[email protected]> + +description: | + Device tree bindings for DisplayPort host controller for MSM targets + that are compatible with VESA DisplayPort interface specification. + +properties: + compatible: + enum: + - qcom,sc7180-dp + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + items: + - description: AHB clock to enable register access + - description: Display Port AUX clock + - description: Display Port Link clock + - description: Link interface clock between DP and PHY + - description: Display Port Pixel clock + + clock-names: + items: + - const: core_iface + - const: core_aux + - const: ctrl_link + - const: ctrl_link_iface + - const: stream_pixel + + phys: + maxItems: 1 + + phy-names: + items: + - const: dp + + operating-points-v2: + maxItems: 1 + + power-domains: + maxItems: 1 + + "#sound-dai-cells": + const: 0 + + ports: + type: object + description: | + A ports node with endpoint definitions as defined in + Documentation/devicetree/bindings/media/video-interfaces.txt. + properties: + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + + port@0: + type: object + description: Input endpoint of the controller + + port@1: + type: object + description: Output endpoint of the controller + + required: + - "#address-cells" + - "#size-cells" + + additionalProperties: false + + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + - phys + - phy-names + - "#sound-dai-cells" + - power-domains + - ports +
Documentation/devicetree/bindings/display/msm/dp-controller.yaml line 109
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Documentation/devicetree/bindings/display/msm/dp-controller.yaml new file +10
-0+additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/clock/qcom,dispcc-sc7180.h> + #include <dt-bindings/power/qcom-aoss-qmp.h> + #include <dt-bindings/power/qcom-rpmpd.h> + + mdss@ae00000 {
mdss is not a standard node name. Maybe 'subsystem'?
Documentation/devicetree/bindings/display/msm/dp-controller.yaml line 113
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Documentation/devicetree/bindings/display/msm/dp-controller.yaml new file +4
-0+ #address-cells = <2>; + #size-cells = <2>; + reg = <0xae00000 0x1000>, /* mdss */ + <0xae90000 0x1400>; /* dp */
This second reg property shouldn't be here.
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Documentation/devicetree/bindings/display/msm/dp-controller.yaml new file +3
-0+ reg-names = "mdss", "dp"; + + displayport-controller@ae90000 {
Re: [PATCH v10 4/4] dt-bindings: msm/dp: Add bindings of MSM DisplayPort controller
Quoted 10 lines · Stephen Boyd
Quoting Krishna Manikandan (2021-02-03 22:42:19)
Quoted 7 lines
Add bindings for Snapdragon DisplayPort controller driver.
Signed-off-by Chandan Uddaraju <[email protected]>Signed-off-by Vara Reddy <[email protected]>Signed-off-by Tanmay Shah <[email protected]>Signed-off-by Kuogee Hsieh <[email protected]>[...]
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Changes in v11:
- add ports required of both #address-cells and #size-cells
- add required operating-points-v2
- add required #sound-dai-cells
- add required power-domains
- update maintainer listWhere's that maintainer file update?
I had deleted Tanmay.
Anyway, I will removed Chandan at next upload.
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--- .../bindings/display/msm/dp-controller.yaml | 157 +++++++++++++++++++++ .../bindings/display/msm/dpu-sc7180.yaml | 10 ++ 2 files changed, 167 insertions(+) create mode 100644
Documentation/devicetree/bindings/display/msm/dp-controller.yamlDocumentation/devicetree/bindings/display/msm/dp-controller.yaml new file +4
-0@@ -0,0 +1,157 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/msm/dp-controller.yaml#
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Documentation/devicetree/bindings/display/msm/dp-controller.yaml line 10
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Documentation/devicetree/bindings/display/msm/dp-controller.yaml new file +6
-0+$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MSM Display Port Controller + +maintainers: + - Chandan Uddaraju <[email protected]>This email is bouncing. Please remove Chandan.
ok
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Documentation/devicetree/bindings/display/msm/dp-controller.yaml new file +5
-0+ - Vara Reddy <[email protected]> + - Kuogee Hsieh <[email protected]> + +description: | + Device tree bindings for DisplayPort host controller for MSMtargets
Documentation/devicetree/bindings/display/msm/dp-controller.yaml new file +88
-0+ that are compatible with VESA DisplayPort interface specification. + +properties: + compatible: + enum: + - qcom,sc7180-dp + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + items: + - description: AHB clock to enable register access + - description: Display Port AUX clock + - description: Display Port Link clock + - description: Link interface clock between DP and PHY + - description: Display Port Pixel clock + + clock-names: + items: + - const: core_iface + - const: core_aux + - const: ctrl_link + - const: ctrl_link_iface + - const: stream_pixel + + phys: + maxItems: 1 + + phy-names: + items: + - const: dp + + operating-points-v2: + maxItems: 1 + + power-domains: + maxItems: 1 + + "#sound-dai-cells": + const: 0 + + ports: + type: object + description: | + A ports node with endpoint definitions as defined in + Documentation/devicetree/bindings/media/video-interfaces.txt. + properties: + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + + port@0: + type: object + description: Input endpoint of the controller + + port@1: + type: object + description: Output endpoint of the controller + + required: + - "#address-cells" + - "#size-cells" + + additionalProperties: false + + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + - phys + - phy-names + - "#sound-dai-cells" + - power-domains + - ports + +additionalProperties: false + +examples: + - |
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Documentation/devicetree/bindings/display/msm/dp-controller.yaml line 109
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Documentation/devicetree/bindings/display/msm/dp-controller.yaml new file +6
-0+ #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/clock/qcom,dispcc-sc7180.h> + #include <dt-bindings/power/qcom-aoss-qmp.h> + #include <dt-bindings/power/qcom-rpmpd.h> + + mdss@ae00000 {mdss is not a standard node name. Maybe 'subsystem'?
Can you give me more details regrading this.
I had double checked both ti/ti,am65x-dss.yaml and msm/dsi-phy.yaml and can not find any clue for this. Can I just followed msm/dsi-phy.yaml for this?
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Documentation/devicetree/bindings/display/msm/dp-controller.yaml line 113
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Documentation/devicetree/bindings/display/msm/dp-controller.yaml new file +4
-0+ #address-cells = <2>; + #size-cells = <2>; + reg = <0xae00000 0x1000>, /* mdss */ + <0xae90000 0x1400>; /* dp */This second reg property shouldn't be here.
ok
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Documentation/devicetree/bindings/display/msm/dp-controller.yaml new file +3
-0+ reg-names = "mdss", "dp"; + + displayport-controller@ae90000 {
Re: [PATCH v10 4/4] dt-bindings: msm/dp: Add bindings of MSM DisplayPort controller
Quoting [email protected] (2021-02-05 12:55:47)
Quoted 8 lines · Stephen Boyd
Quoted 7 lines
Quoting Krishna Manikandan (2021-02-03 22:42:19)
Quoted 6 lines
Add bindings for Snapdragon DisplayPort controller driver.
Signed-off-by Chandan Uddaraju <[email protected]>Signed-off-by Vara Reddy <[email protected]>Signed-off-by Tanmay Shah <[email protected]>Signed-off-by Kuogee Hsieh <[email protected]>
Krishna is sending these patches, so there should be an SoB line here from Krishna. Please add it next time.
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[...]
Quoted 7 lines
Changes in v11:
- add ports required of both #address-cells and #size-cells
- add required operating-points-v2
- add required #sound-dai-cells
- add required power-domains
- update maintainer list
Quoted 3 lines
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Where's that maintainer file update?
I had deleted Tanmay.
Anyway, I will removed Chandan at next upload.
Ok.
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--- .../bindings/display/msm/dp-controller.yaml | 157 +++++++++++++++++++++ .../bindings/display/msm/dpu-sc7180.yaml | 10 ++ 2 files changed, 167 insertions(+) create mode 100644
Documentation/devicetree/bindings/display/msm/dp-controller.yaml(quoted diff) +0
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a/Documentation/devicetree/bindings/display/msm/dp-controller.yamlb/Documentation/devicetree/bindings/display/msm/dp-controller.yamlnew file mode 100644
index 0000000..2b71c7aDocumentation/devicetree/bindings/display/msm/dp-controller.yaml new file +1
-0@@ -0,0 +1,157 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
[...]
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Documentation/devicetree/bindings/display/msm/dp-controller.yaml new file +16
-0+required: + - compatible + - reg + - interrupts + - clocks + - clock-names + - phys + - phy-names + - "#sound-dai-cells" + - power-domains + - ports + +additionalProperties: false + +examples: + - |Quoted 8 lines
Documentation/devicetree/bindings/display/msm/dp-controller.yaml line 109
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Documentation/devicetree/bindings/display/msm/dp-controller.yaml new file +6
-0+ #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/clock/qcom,dispcc-sc7180.h> + #include <dt-bindings/power/qcom-aoss-qmp.h> + #include <dt-bindings/power/qcom-rpmpd.h> + + mdss@ae00000 {mdss is not a standard node name. Maybe 'subsystem'?
Quoted 4 lines
Can you give me more details regrading this.
I had double checked bothti/ti,am65x-dss.yamlandmsm/dsi-phy.yamland can not find any clue for this.
Can I just followedmsm/dsi-phy.yamlfor this?
Please look at section "2.2.2 Generic Names Recommendation" of the DT spec[1] to find a proper name. I don't see 'subsystem' there but that may be because it shouldn't really exist as a node. Instead we should have the child nodes sit directly under the SoC node.