arm64: dts: qcom: sc7280: Add WPSS remoteproc node
Subsystems (4)
PATCH v2 1/1 arm64: dts: qcom: sc7280: Add WPSS remoteproc node
Add the WPSS remoteproc node in dts for
PIL loading.
--- arch/arm64/boot/dts/qcom/sc7280-idp.dts | 4 +++ arch/arm64/boot/dts/qcom/sc7280.dtsi | 57 +++++++++++++++++++++++++++++++++ 2 files changed, 61 insertions(+)
arch/arm64/boot/dts/qcom/sc7280-idp.dts +4 -0
@@ -68,3 +68,7 @@ qcom,pre-scaling = <1 1>; }; }; + +&remoteproc_wpss { + status = "okay"; +};
arch/arm64/boot/dts/qcom/sc7280.dtsi +57 -0
69 lines not on this page · raw message
Signature · 1 line
2.7.4
Quoting Rakesh Pillai (2021-08-10 11:11:29)
arch/arm64/boot/dts/qcom/sc7280.dtsi line 81
Quoted 13 lines
arch/arm64/boot/dts/qcom/sc7280.dtsi +5
-0@@ -74,6 +74,16 @@ reg = <0 0x8b700000 0 0x10000>; no-map; }; + + wlan_fw_mem: memory@80c00000 { + no-map; + reg = <0x0 0x80c00000 0x0 0xc00000>; + };
Please try to keep this sorted by reg address. 80c00000 comes before 8b700000.
Quoted 12 lines
arch/arm64/boot/dts/qcom/sc7280.dtsi +5
-0+ + wpss_mem: memory@9ae00000 { + no-map; + reg = <0x0 0x9ae00000 0x0 0x1900000>; + }; }; cpus {@@ -1270,6 +1280,53 @@ }; };
arch/arm64/boot/dts/qcom/sc7280.dtsi line 1292
Quoted 10 lines
arch/arm64/boot/dts/qcom/sc7280.dtsi +10
-0+ remoteproc_wpss: remoteproc@8a00000 { + compatible = "qcom,sc7280-wpss-pil"; + reg = <0 0x08a00000 0 0x10000>; + + interrupts-extended = <&intc GIC_SPI 587 IRQ_TYPE_EDGE_RISING>, + <&wpss_smp2p_in 0 IRQ_TYPE_NONE>, + <&wpss_smp2p_in 1 IRQ_TYPE_NONE>, + <&wpss_smp2p_in 2 IRQ_TYPE_NONE>, + <&wpss_smp2p_in 3 IRQ_TYPE_NONE>, + <&wpss_smp2p_in 7 IRQ_TYPE_NONE>;
Is this IRQ_TYPE_EDGE_RISING? Please add some type of edge or level flag.
Quoted 15 lines
arch/arm64/boot/dts/qcom/sc7280.dtsi +15
-0+ interrupt-names = "wdog", "fatal", "ready", "handover", + "stop-ack", "shutdown-ack"; + + clocks = <&gcc GCC_WPSS_AHB_BDG_MST_CLK>, + <&gcc GCC_WPSS_AHB_CLK>, + <&gcc GCC_WPSS_RSCP_CLK>, + <&rpmhcc RPMH_CXO_CLK>; + clock-names = "gcc_wpss_ahb_bdg_mst_clk", + "gcc_wpss_ahb_clk", + "gcc_wpss_rscp_clk", + "xo"; + + memory-region = <&wpss_mem>; + + qcom,smem-states = <&wpss_smp2p_out 0>;
Quoted 22 lines
-----Original Message-----
From: Stephen Boyd <[email protected]>
Sent: Wednesday, August 11, 2021 1:22 AM
To: Rakesh Pillai <[email protected]>; [email protected]; [email protected]; [email protected]
Cc: [email protected]; [email protected]; linux- [email protected]; [email protected]; [email protected]
Subject: Re: [PATCH v2] arm64: dts: qcom: sc7280: Add WPSS remoteproc nodeQuoting Rakesh Pillai (2021-08-10 11:11:29)
Quoted 9 lines
arch/arm64/boot/dts/qcom/sc7280.dtsi +0
-0@@ -74,6 +74,16 @@ reg = <0 0x8b700000 0 0x10000>; no-map; };
Quoted 9 lines
arch/arm64/boot/dts/qcom/sc7280.dtsi line 81
Quoted 5 lines
arch/arm64/boot/dts/qcom/sc7280.dtsi +5
-0+ + wlan_fw_mem: memory@80c00000 { + no-map; + reg = <0x0 0x80c00000 0x0 0xc00000>; + };Please try to keep this sorted by reg address.
80c00000comes before8b700000.
Hi Stephen,
I will fix this and send v3 for this patch.
Quoted 18 lines
Quoted 9 lines
arch/arm64/boot/dts/qcom/sc7280.dtsi +5
-0+ + wpss_mem: memory@9ae00000 { + no-map; + reg = <0x0 0x9ae00000 0x0 0x1900000>; + }; }; cpus {arch/arm64/boot/dts/qcom/sc7280.dtsi line 1287
Quoted 8 lines
arch/arm64/boot/dts/qcom/sc7280.dtsi +5
-0@@ -1270,6 +1280,53 @@ }; }; + remoteproc_wpss: remoteproc@8a00000 { + compatible = "qcom,sc7280-wpss-pil"; + reg = <0 0x08a00000 0 0x10000>; + + interrupts-extended = <&intc GIC_SPI 587
IRQ_TYPE_EDGE_RISING>,
Quoted 8 lines
arch/arm64/boot/dts/qcom/sc7280.dtsi
Quoted 6 lines
arch/arm64/boot/dts/qcom/sc7280.dtsi +6
-0+ <&wpss_smp2p_in 0 IRQ_TYPE_NONE>, + <&wpss_smp2p_in 1 IRQ_TYPE_NONE>, + <&wpss_smp2p_in 2 IRQ_TYPE_NONE>, + <&wpss_smp2p_in 3 IRQ_TYPE_NONE>, + <&wpss_smp2p_in 7 + IRQ_TYPE_NONE>;Is this
IRQ_TYPE_EDGE_RISING? Please add some type of edge or level flag.
I will change it to IRQ_TYPE_EDGE_RISING and send out the next revision.
Quoted 16 lines
Quoted 16 lines
arch/arm64/boot/dts/qcom/sc7280.dtsi +15
-0+ interrupt-names = "wdog", "fatal", "ready", "handover", + "stop-ack", "shutdown-ack"; + + clocks = <&gcc GCC_WPSS_AHB_BDG_MST_CLK>, + <&gcc GCC_WPSS_AHB_CLK>, + <&gcc GCC_WPSS_RSCP_CLK>, + <&rpmhcc RPMH_CXO_CLK>; + clock-names = "gcc_wpss_ahb_bdg_mst_clk", + "gcc_wpss_ahb_clk", + "gcc_wpss_rscp_clk", + "xo"; + + memory-region = <&wpss_mem>; + + qcom,smem-states = <&wpss_smp2p_out 0>;