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arm64: dts: qcom: sc7280: Add bluetooth node on SC7280

PATCH Superseded Balakrishna Godavarthi 2 participants 4 messages Oct 12, 2021 – Oct 13, 2021

Subsystems (5)

v2 of 4 Superseded Latest is v4 →

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PATCH v2 1/1 arm64: dts: qcom: sc7280: Add bluetooth node on SC7280

Add bluetooth SoC WCN6750 node for SC7280 IDP boards.

---
v2:
* merged two patches into one
* Removed unused comments
* Removed pinmux & pin conf.
* Addressed reviewers comments

v1: initial patch

---
 arch/arm64/boot/dts/qcom/sc7280-idp.dts  |  6 ++++++
 arch/arm64/boot/dts/qcom/sc7280-idp.dtsi | 25 +++++++++++++++++++++++++
 arch/arm64/boot/dts/qcom/sc7280-idp2.dts |  6 ++++++
 3 files changed, 37 insertions(+)
arch/arm64/boot/dts/qcom/sc7280-idp.dts +6 -0
index 64fc22a..d8b9262 100644
@@ -16,7 +16,9 @@
 	compatible = "qcom,sc7280-idp", "google,senor", "qcom,sc7280";
 
 	aliases {
+		bluetooth0 = &bluetooth;
 		serial0 = &uart5;
+		serial1 = &uart7;
 	};
 
 	chosen {
@@ -68,3 +70,7 @@
 		qcom,pre-scaling = <1 1>;
 	};
 };
+
+&bluetooth {
+	vddio-supply = <&vreg_l19b_1p8>;
+};
arch/arm64/boot/dts/qcom/sc7280-idp.dtsi +25 -0
index 272d5ca..09adc802 100644
@@ -393,6 +393,23 @@
 				<&tlmm 31 IRQ_TYPE_EDGE_FALLING>;
 	pinctrl-names = "default", "sleep";
 	pinctrl-1 = <&qup_uart7_sleep_cts>, <&qup_uart7_sleep_rts>, <&qup_uart7_sleep_tx>, <&qup_uart7_sleep_rx>;
+
+	bluetooth: wcn6750-bt {
+		compatible = "qcom,wcn6750-bt";
+		pinctrl-names = "default";
+		pinctrl-0 = <&bt_en_default>;
+		enable-gpios = <&tlmm 85 GPIO_ACTIVE_HIGH>;
+		swctrl-gpios = <&tlmm 86 GPIO_ACTIVE_HIGH>;
+		vddaon-supply = <&vreg_s7b_0p9>;
+		vddbtcxmx-supply = <&vreg_s7b_0p9>;
+		vddrfacmn-supply = <&vreg_s7b_0p9>;
+		vddrfa0p8-supply = <&vreg_s7b_0p9>;
+		vddrfa1p7-supply = <&vreg_s1b_1p8>;
+		vddrfa1p2-supply = <&vreg_s8b_1p2>;
+		vddrfa2p2-supply = <&vreg_s1c_2p2>;
+		vddasd-supply = <&vreg_l11c_2p8>;
+		max-speed = <3200000>;
+	};
 };
 
 /* PINCTRL - additions to nodes defined in sc7280.dtsi */
@@ -504,6 +521,14 @@
 		 */
 		bias-pull-up;
 	};
+
+	bt_en_default: bt_en_default {
+		pins = "gpio85";
+		function = "gpio";
+		drive-strength = <2>;
+		output-low;
+		bias-pull-down;
+	};
 };
 
 &sdc1_on {
arch/arm64/boot/dts/qcom/sc7280-idp2.dts +6 -0
index 1fc2add..e60fa88 100644
@@ -14,10 +14,16 @@
 	compatible = "qcom,sc7280-idp2", "google,piglin", "qcom,sc7280";
 
 	aliases {
+		bluetooth0 = &bluetooth;
 		serial0 = &uart5;
+		serial1 = &uart7;
 	};
 
 	chosen {
 		stdout-path = "serial0:115200n8";
 	};
 };
+
+&bluetooth {
+	vddio-supply = <&vreg_l18b_1p8>;
+};
Signature · 2 lines
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
#1 lore raw

Quoting Balakrishna Godavarthi (2021-10-12 06:01:38)

arch/arm64/boot/dts/qcom/sc7280-idp.dtsi line 397

Quoted 10 lines
arch/arm64/boot/dts/qcom/sc7280-idp.dtsi +2 -0
index 272d5ca..09adc802 100644
@@ -393,6 +393,23 @@
                                <&tlmm 31 IRQ_TYPE_EDGE_FALLING>;
        pinctrl-names = "default", "sleep";
        pinctrl-1 = <&qup_uart7_sleep_cts>, <&qup_uart7_sleep_rts>, <&qup_uart7_sleep_tx>, <&qup_uart7_sleep_rx>;
+
+       bluetooth: wcn6750-bt {

bluetooth: bluetooth {

Node names should be generic.

arch/arm64/boot/dts/qcom/sc7280-idp.dtsi line 402

Quoted 5 lines
arch/arm64/boot/dts/qcom/sc7280-idp.dtsi +5 -0
+               compatible = "qcom,wcn6750-bt";
+               pinctrl-names = "default";
+               pinctrl-0 = <&bt_en_default>;
+               enable-gpios = <&tlmm 85 GPIO_ACTIVE_HIGH>;
+               swctrl-gpios = <&tlmm 86 GPIO_ACTIVE_HIGH>;

Is there any pinctrl config for gpio 86?

Quoted 14 lines
arch/arm64/boot/dts/qcom/sc7280-idp.dtsi +10 -0
+               vddaon-supply = <&vreg_s7b_0p9>;
+               vddbtcxmx-supply = <&vreg_s7b_0p9>;
+               vddrfacmn-supply = <&vreg_s7b_0p9>;
+               vddrfa0p8-supply = <&vreg_s7b_0p9>;
+               vddrfa1p7-supply = <&vreg_s1b_1p8>;
+               vddrfa1p2-supply = <&vreg_s8b_1p2>;
+               vddrfa2p2-supply = <&vreg_s1c_2p2>;
+               vddasd-supply = <&vreg_l11c_2p8>;
+               max-speed = <3200000>;
+       };
 };
 
 /* PINCTRL - additions to nodes defined in sc7280.dtsi */

arch/arm64/boot/dts/qcom/sc7280-idp.dtsi line 525

Quoted 5 lines
arch/arm64/boot/dts/qcom/sc7280-idp.dtsi +2 -0
@@ -504,6 +521,14 @@
                 */
                bias-pull-up;
        };
+
+       bt_en_default: bt_en_default {

bt_en: bt-en {

Node names shouldn't have underscores and 'default' is redundant.

arch/arm64/boot/dts/qcom/sc7280-idp.dtsi line 530

Quoted 5 lines
arch/arm64/boot/dts/qcom/sc7280-idp.dtsi +5 -0
+               pins = "gpio85";
+               function = "gpio";
+               drive-strength = <2>;
+               output-low;
+               bias-pull-down;

Why is there a pull down on an output gpio? Shouldn't this be bias-disable?

Quoted 4 lines
arch/arm64/boot/dts/qcom/sc7280-idp.dtsi +1 -0
+       };
 };
 
 &sdc1_on {
#2 lore raw

Hi Stephen Boyd,

Quoted 15 lines · Stephen Boyd

Quoting Balakrishna Godavarthi (2021-10-12 06:01:38)

arch/arm64/boot/dts/qcom/sc7280-idp.dtsi line 398

Quoted 11 lines
arch/arm64/boot/dts/qcom/sc7280-idp.dtsi +2 -0
index 272d5ca..09adc802 100644
@@ -393,6 +393,23 @@
                                <&tlmm 31 IRQ_TYPE_EDGE_FALLING>;
        pinctrl-names = "default", "sleep";
        pinctrl-1 = <&qup_uart7_sleep_cts>, <&qup_uart7_sleep_rts>, 
 <&qup_uart7_sleep_tx>, <&qup_uart7_sleep_rx>;
+
+       bluetooth: wcn6750-bt {

bluetooth: bluetooth {

Quoted 2 lines

Node names should be generic.

[Bala]: will update in next patch.

Quoted 8 lines

arch/arm64/boot/dts/qcom/sc7280-idp.dtsi line 402

Quoted 5 lines
arch/arm64/boot/dts/qcom/sc7280-idp.dtsi +5 -0
+               compatible = "qcom,wcn6750-bt";
+               pinctrl-names = "default";
+               pinctrl-0 = <&bt_en_default>;
+               enable-gpios = <&tlmm 85 GPIO_ACTIVE_HIGH>;
+               swctrl-gpios = <&tlmm 86 GPIO_ACTIVE_HIGH>;

Is there any pinctrl config for gpio 86?

[Bala]: This is input GPIO to apps, BT SOC will handle configurations.

Quoted 22 lines
Quoted 14 lines
arch/arm64/boot/dts/qcom/sc7280-idp.dtsi +10 -0
+               vddaon-supply = <&vreg_s7b_0p9>;
+               vddbtcxmx-supply = <&vreg_s7b_0p9>;
+               vddrfacmn-supply = <&vreg_s7b_0p9>;
+               vddrfa0p8-supply = <&vreg_s7b_0p9>;
+               vddrfa1p7-supply = <&vreg_s1b_1p8>;
+               vddrfa1p2-supply = <&vreg_s8b_1p2>;
+               vddrfa2p2-supply = <&vreg_s1c_2p2>;
+               vddasd-supply = <&vreg_l11c_2p8>;
+               max-speed = <3200000>;
+       };
 };
 

/* PINCTRL - additions to nodes defined in sc7280.dtsi */

arch/arm64/boot/dts/qcom/sc7280-idp.dtsi line 525

Quoted 5 lines
arch/arm64/boot/dts/qcom/sc7280-idp.dtsi +2 -0
@@ -504,6 +521,14 @@
                 */
                bias-pull-up;
        };
+
+       bt_en_default: bt_en_default {

bt_en: bt-en {

Quoted 2 lines

Node names shouldn't have underscores and 'default' is redundant.

[Bala]: will update in next patch.

Quoted 9 lines

arch/arm64/boot/dts/qcom/sc7280-idp.dtsi line 530

Quoted 5 lines
arch/arm64/boot/dts/qcom/sc7280-idp.dtsi +5 -0
+               pins = "gpio85";
+               function = "gpio";
+               drive-strength = <2>;
+               output-low;
+               bias-pull-down;

Why is there a pull down on an output gpio? Shouldn't this be bias-disable?

[Bala]: BT_EN pin is OP of apps and input to BT SoC.
by default we want the state of BT_EN to be low. so used pull down instead of bias-disable as AFAIK bias-disable may trigger a tristate on BT_EN pin, which may trigger BT SoC enable if it is not actually triggered.

Quoted 4 lines
Quoted 4 lines
arch/arm64/boot/dts/qcom/sc7280-idp.dtsi +1 -0
+       };
 };
 
 &sdc1_on {
#3 lore raw

Quoting [email protected] (2021-10-12 22:30:50)

Quoted 15 lines · Stephen Boyd
Quoted 14 lines

Quoting Balakrishna Godavarthi (2021-10-12 06:01:38)

arch/arm64/boot/dts/qcom/sc7280-idp.dtsi line 402

Quoted 10 lines
arch/arm64/boot/dts/qcom/sc7280-idp.dtsi +5 -0
index 272d5ca..09adc802 100644
+               compatible = "qcom,wcn6750-bt";
+               pinctrl-names = "default";
+               pinctrl-0 = <&bt_en_default>;
+               enable-gpios = <&tlmm 85 GPIO_ACTIVE_HIGH>;
+               swctrl-gpios = <&tlmm 86 GPIO_ACTIVE_HIGH>;

Is there any pinctrl config for gpio 86?

Quoted 1 line

[Bala]: This is input GPIO to apps, BT SOC will handle configurations.

Ok. So there should be some pinctrl stating that the function is "gpio" and the biasing is probably bias-disable. The BT SOC will handle setting any pull, either up or down?

Quoted 33 lines
Quoted 23 lines
Quoted 15 lines
arch/arm64/boot/dts/qcom/sc7280-idp.dtsi +10 -0
+               vddaon-supply = <&vreg_s7b_0p9>;
+               vddbtcxmx-supply = <&vreg_s7b_0p9>;
+               vddrfacmn-supply = <&vreg_s7b_0p9>;
+               vddrfa0p8-supply = <&vreg_s7b_0p9>;
+               vddrfa1p7-supply = <&vreg_s1b_1p8>;
+               vddrfa1p2-supply = <&vreg_s8b_1p2>;
+               vddrfa2p2-supply = <&vreg_s1c_2p2>;
+               vddasd-supply = <&vreg_l11c_2p8>;
+               max-speed = <3200000>;
+       };
 };
 
 /* PINCTRL - additions to nodes defined in sc7280.dtsi */

arch/arm64/boot/dts/qcom/sc7280-idp.dtsi line 525

Quoted 5 lines
arch/arm64/boot/dts/qcom/sc7280-idp.dtsi +2 -0
@@ -504,6 +521,14 @@
                 */
                bias-pull-up;
        };
+
+       bt_en_default: bt_en_default {

bt_en: bt-en {

Quoted 2 lines

Node names shouldn't have underscores and 'default' is redundant.

[Bala]: will update in next patch.

Quoted 6 lines
Quoted 5 lines
arch/arm64/boot/dts/qcom/sc7280-idp.dtsi +5 -0
+               pins = "gpio85";
+               function = "gpio";
+               drive-strength = <2>;
+               output-low;
+               bias-pull-down;
Quoted 7 lines
Quoted 3 lines

Why is there a pull down on an output gpio? Shouldn't this be bias-disable?

[Bala]: BT_EN pin is OP of apps and input to BT SoC.
by default we want the state of BT_EN to be low. so used pull down instead of bias-disable

The pin state will be low because of the 'output-low' property.

Quoted 3 lines

as AFAIK bias-disable may trigger a tristate on BT_EN pin, which may trigger BT SoC enable
if it is not actually triggered.

Is the pin ever "turned around" and made an input? If not then it will be output and be driving low until the enable-gpios is set to output active. The pull down is probably wasting power when the pin is being driven either high or low.