arm64: dts: qcom: sc7280: Add bluetooth node on SC7280

PATCH Superseded Balakrishna Godavarthi 2 participants 3 messages Dec 7, 2021 – Dec 15, 2021

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Balakrishna Godavarthi

author

2021-12-07 06:13 UTC #0 lore raw

PATCH v3 1/1 arm64: dts: qcom: sc7280: Add bluetooth node on SC7280

From: Balakrishna Godavarthi <[email protected]>

Add bluetooth SoC WCN6750 node for SC7280 IDP boards.

Signed-off-by Balakrishna Godavarthi <[email protected]>

---
v3:
* Addressed reviewers comments
* Added pin config for sw_ctrl line.
v2:
* merged two patches into one
* Removed unused comments
* Removed pinmux & pin conf.
* Addressed reviewers comments

v1: initial patch

---
 arch/arm64/boot/dts/qcom/sc7280-idp.dts  |  4 ++++
 arch/arm64/boot/dts/qcom/sc7280-idp.dtsi | 37 ++++++++++++++++++++++++++++++++
 arch/arm64/boot/dts/qcom/sc7280-idp2.dts |  4 ++++
 3 files changed, 45 insertions(+)

arch/arm64/boot/dts/qcom/sc7280-idp.dts +4 -0

index 9b991ba..19bd228 100644
@@ -56,6 +56,10 @@
 	};
 };
 
+&bluetooth {
+	vddio-supply = <&vreg_l19b_1p8>;
+};
+
 &ipa {
 	status = "okay";
 	modem-init;

arch/arm64/boot/dts/qcom/sc7280-idp.dtsi +37 -0

index d623d71..b8b00dc 100644
@@ -14,6 +14,11 @@
 #include "pmk8350.dtsi"
 
 / {
+	aliases {
+		bluetooth0 = &bluetooth;
+		serial1 = &uart7;
+	};
+
 	gpio-keys {
 		compatible = "gpio-keys";
 		label = "gpio-keys";

@@ -422,6 +427,23 @@
 				<&tlmm 31 IRQ_TYPE_EDGE_FALLING>;
 	pinctrl-names = "default", "sleep";
 	pinctrl-1 = <&qup_uart7_sleep_cts>, <&qup_uart7_sleep_rts>, <&qup_uart7_sleep_tx>, <&qup_uart7_sleep_rx>;
+
+	bluetooth: bluetooth {
+		compatible = "qcom,wcn6750-bt";
+		pinctrl-names = "default";
+		pinctrl-0 = <&bt_en>, <&swctrl_gpio>;
+		enable-gpios = <&tlmm 85 GPIO_ACTIVE_HIGH>;
+		swctrl-gpios = <&tlmm 86 GPIO_ACTIVE_HIGH>;
+		vddaon-supply = <&vreg_s7b_0p9>;
+		vddbtcxmx-supply = <&vreg_s7b_0p9>;
+		vddrfacmn-supply = <&vreg_s7b_0p9>;
+		vddrfa0p8-supply = <&vreg_s7b_0p9>;
+		vddrfa1p7-supply = <&vreg_s1b_1p8>;
+		vddrfa1p2-supply = <&vreg_s8b_1p2>;
+		vddrfa2p2-supply = <&vreg_s1c_2p2>;
+		vddasd-supply = <&vreg_l11c_2p8>;
+		max-speed = <3200000>;
+	};
 };
 
 /* PINCTRL - additions to nodes defined in sc7280.dtsi */

@@ -491,6 +513,14 @@
 };
 
 &tlmm {
+	bt_en: bt-en {
+		pins = "gpio85";
+		function = "gpio";
+		drive-strength = <2>;
+		output-low;
+		bias-disable;
+	};
+
 	nvme_pwren: nvme-pwren {
 		function = "gpio";
 	};

@@ -554,6 +584,13 @@
 		 */
 		bias-pull-up;
 	};
+
+	swctrl_gpio: swctrl-gpio {
+		pins = "gpio86";
+		function = "gpio";
+		input-enable;
+		bias-pull-down;
+	};
 };
 
 &sdc1_on {

arch/arm64/boot/dts/qcom/sc7280-idp2.dts +4 -0

index 0382c77..73b9911 100644
@@ -23,6 +23,10 @@
 	};
 };
 
+&bluetooth {
+	vddio-supply = <&vreg_l18b_1p8>;
+};
+
 &nvme_pwren {
 	pins = "gpio51";
 };

Signature · 2 lines

The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project

Matthias Kaehlcke

2021-12-07 14:48 UTC #1 lore raw

Quoted 1 line · Balakrishna Godavarthi

Subject: arm64: dts: qcom: sc7280: Add bluetooth node on SC7280

nit: the node is added to the IDP boards, not sc7280 in general

Quoted 8 lines

From: Balakrishna Godavarthi <[email protected]>
Add bluetooth SoC WCN6750 node for SC7280 IDP boards.
Signed-off-by Balakrishna Godavarthi <[email protected]>
---
v3:
* Addressed reviewers comments

that's not overly useful, instead you should describe what changed

Quoted 70 lines

* Added pin config for sw_ctrl line.
v2:
* merged two patches into one
* Removed unused comments
* Removed pinmux & pin conf.
* Addressed reviewers comments

v1: initial patch

---
 arch/arm64/boot/dts/qcom/sc7280-idp.dts  |  4 ++++
 arch/arm64/boot/dts/qcom/sc7280-idp.dtsi | 37 ++++++++++++++++++++++++++++++++
 arch/arm64/boot/dts/qcom/sc7280-idp2.dts |  4 ++++
 3 files changed, 45 insertions(+)

arch/arm64/boot/dts/qcom/sc7280-idp.dts +4 -0

index 9b991ba..19bd228 100644
@@ -56,6 +56,10 @@
 	};
 };
 
+&bluetooth {
+	vddio-supply = <&vreg_l19b_1p8>;
+};
+
 &ipa {
 	status = "okay";
 	modem-init;

arch/arm64/boot/dts/qcom/sc7280-idp.dtsi +22 -0

index d623d71..b8b00dc 100644
@@ -14,6 +14,11 @@
 #include "pmk8350.dtsi"
 
 / {
+	aliases {
+		bluetooth0 = &bluetooth;
+		serial1 = &uart7;
+	};
+
 	gpio-keys {
 		compatible = "gpio-keys";
 		label = "gpio-keys";

@@ -422,6 +427,23 @@
 				<&tlmm 31 IRQ_TYPE_EDGE_FALLING>;
 	pinctrl-names = "default", "sleep";
 	pinctrl-1 = <&qup_uart7_sleep_cts>, <&qup_uart7_sleep_rts>, <&qup_uart7_sleep_tx>, <&qup_uart7_sleep_rx>;
+
+	bluetooth: bluetooth {
+		compatible = "qcom,wcn6750-bt";
+		pinctrl-names = "default";
+		pinctrl-0 = <&bt_en>, <&swctrl_gpio>;
+		enable-gpios = <&tlmm 85 GPIO_ACTIVE_HIGH>;
+		swctrl-gpios = <&tlmm 86 GPIO_ACTIVE_HIGH>;
+		vddaon-supply = <&vreg_s7b_0p9>;
+		vddbtcxmx-supply = <&vreg_s7b_0p9>;
+		vddrfacmn-supply = <&vreg_s7b_0p9>;
+		vddrfa0p8-supply = <&vreg_s7b_0p9>;
+		vddrfa1p7-supply = <&vreg_s1b_1p8>;
+		vddrfa1p2-supply = <&vreg_s8b_1p2>;
+		vddrfa2p2-supply = <&vreg_s1c_2p2>;
+		vddasd-supply = <&vreg_l11c_2p8>;
+		max-speed = <3200000>;
+	};
 };
 
 /* PINCTRL - additions to nodes defined in sc7280.dtsi */

arch/arm64/boot/dts/qcom/sc7280-idp.dtsi line 519

Quoted 7 lines

arch/arm64/boot/dts/qcom/sc7280-idp.dtsi +4 -0

@@ -491,6 +513,14 @@
 };
 
 &tlmm {
+	bt_en: bt-en {
+		pins = "gpio85";
+		function = "gpio";
+		drive-strength = <2>;

is it really necessary to specify the drive strength?

Documentation/devicetree/bindings/pinctrl/qcom,sc7280-pinctrl.yaml:

drive-strength:

    enum: [2, 4, 6, 8, 10, 12, 14, 16]
    default: 2

The default is 2, so it shouldn't be needed.

arch/arm64/boot/dts/qcom/sc7280-idp.dtsi line 588

Quoted 13 lines

arch/arm64/boot/dts/qcom/sc7280-idp.dtsi +6 -0

+		output-low;
+		bias-disable;
+	};
+
 	nvme_pwren: nvme-pwren {
 		function = "gpio";
 	};

@@ -554,6 +584,13 @@
 		 */
 		bias-pull-up;
 	};
+
+	swctrl_gpio: swctrl-gpio {

The 'gpio' suffix isn't really useful.

I suggest to use the signal name from the schematics "mos-sw-ctrl" or call it "bt-sw-ctrl". If you use the schematic name then this should be also done for the enable pin.

[email protected]

author

2021-12-15 16:55 UTC #2 lore raw

Hi Matthias,

Quoted 6 lines · Matthias Kaehlcke

Quoted 1 line · Balakrishna Godavarthi
Subject: arm64: dts: qcom: sc7280: Add bluetooth node on SC7280
nit: the node is added to the IDP boards, not sc7280 in general

[Bala]: will update it.

Quoted 93 lines

Quoted 8 lines
From: Balakrishna Godavarthi <[email protected]>
Add bluetooth SoC WCN6750 node for SC7280 IDP boards.
Signed-off-by Balakrishna Godavarthi <[email protected]>
---
v3:
* Addressed reviewers comments
that's not overly useful, instead you should describe what changed
Quoted 72 lines
* Added pin config for sw_ctrl line.
v2:
* merged two patches into one
* Removed unused comments
* Removed pinmux & pin conf.
* Addressed reviewers comments
v1: initial patch
---
 arch/arm64/boot/dts/qcom/sc7280-idp.dts  |  4 ++++
 arch/arm64/boot/dts/qcom/sc7280-idp.dtsi | 37 
++++++++++++++++++++++++++++++++
 arch/arm64/boot/dts/qcom/sc7280-idp2.dts |  4 ++++
 3 files changed, 45 insertions(+)
arch/arm64/boot/dts/qcom/sc7280-idp.dts +4 -0
index 9b991ba..19bd228 100644
@@ -56,6 +56,10 @@
 	};
 };
 
+&bluetooth {
+	vddio-supply = <&vreg_l19b_1p8>;
+};
+
 &ipa {
 	status = "okay";
 	modem-init;
arch/arm64/boot/dts/qcom/sc7280-idp.dtsi +22 -0
index d623d71..b8b00dc 100644
@@ -14,6 +14,11 @@
 #include "pmk8350.dtsi"
 
 / {
+	aliases {
+		bluetooth0 = &bluetooth;
+		serial1 = &uart7;
+	};
+
 	gpio-keys {
 		compatible = "gpio-keys";
 		label = "gpio-keys";
@@ -422,6 +427,23 @@
 				<&tlmm 31 IRQ_TYPE_EDGE_FALLING>;
 	pinctrl-names = "default", "sleep";
 	pinctrl-1 = <&qup_uart7_sleep_cts>, <&qup_uart7_sleep_rts>, 
 <&qup_uart7_sleep_tx>, <&qup_uart7_sleep_rx>;
+
+	bluetooth: bluetooth {
+		compatible = "qcom,wcn6750-bt";
+		pinctrl-names = "default";
+		pinctrl-0 = <&bt_en>, <&swctrl_gpio>;
+		enable-gpios = <&tlmm 85 GPIO_ACTIVE_HIGH>;
+		swctrl-gpios = <&tlmm 86 GPIO_ACTIVE_HIGH>;
+		vddaon-supply = <&vreg_s7b_0p9>;
+		vddbtcxmx-supply = <&vreg_s7b_0p9>;
+		vddrfacmn-supply = <&vreg_s7b_0p9>;
+		vddrfa0p8-supply = <&vreg_s7b_0p9>;
+		vddrfa1p7-supply = <&vreg_s1b_1p8>;
+		vddrfa1p2-supply = <&vreg_s8b_1p2>;
+		vddrfa2p2-supply = <&vreg_s1c_2p2>;
+		vddasd-supply = <&vreg_l11c_2p8>;
+		max-speed = <3200000>;
+	};
 };
 
/* PINCTRL - additions to nodes defined in sc7280.dtsi */
arch/arm64/boot/dts/qcom/sc7280-idp.dtsi line 519
Quoted 7 lines
arch/arm64/boot/dts/qcom/sc7280-idp.dtsi +4 -0
@@ -491,6 +513,14 @@
 };
 
 &tlmm {
+	bt_en: bt-en {
+		pins = "gpio85";
+		function = "gpio";
+		drive-strength = <2>;
is it really necessary to specify the drive strength?

Quoted 8 lines

Documentation/devicetree/bindings/pinctrl/qcom,sc7280-pinctrl.yaml:
drive-strength:
    enum: [2, 4, 6, 8, 10, 12, 14, 16]
    default: 2
The default is 2, so it shouldn't be needed.

[Bala]: will update it.

Quoted 16 lines

arch/arm64/boot/dts/qcom/sc7280-idp.dtsi line 588
Quoted 13 lines
arch/arm64/boot/dts/qcom/sc7280-idp.dtsi +6 -0
+		output-low;
+		bias-disable;
+	};
+
 	nvme_pwren: nvme-pwren {
 		function = "gpio";
 	};
@@ -554,6 +584,13 @@
 		 */
 		bias-pull-up;
 	};
+
+	swctrl_gpio: swctrl-gpio {
The 'gpio' suffix isn't really useful.

Quoted 3 lines

I suggest to use the signal name from the schematics "mos-sw-ctrl" or call it "bt-sw-ctrl". If you use the schematic name then this should be also done for the enable pin.

[Bala]: will update it.