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Multiple vector domain support - introduce gsv

RFC PATCH In review Kenji Kaneshige 2 participants 3 messages Jul 14, 2005 – Jul 16, 2005

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#0 lore raw

RFC PATCH 3/10 Multiple vector domain support - introduce gsv

This patch adds "Global System Vector" to make it easier to handle vectors and domains. The concept of GSV is sililar to globbal system interrupt (GSI). Suppose that there are two domains, domain 0 and domain 1, and suppose that each of them have 256 interrupt vectors. In this case, GSV 10 would be corresponding to vector 10 in domain 0, and GSV 266 would be corresponding to vector 10 in domain 1.

---

 linux-2.6.13-rc1-kanesige/arch/ia64/kernel/irq_ia64.c |   17 ++++
 linux-2.6.13-rc1-kanesige/include/asm-ia64/hw_irq.h   |   66 +++++++++++++++++-
 linux-2.6.13-rc1-kanesige/include/asm-ia64/irq.h      |    2 
 3 files changed, 84 insertions(+), 1 deletion(-)
arch/ia64/kernel/irq_ia64.c renamed from arch/ia64/kernel/irq_ia64.c~vector-domain-ia64-handle-gsv +17 -0
diff -puN arch/ia64/kernel/irq_ia64.c~vector-domain-ia64-handle-gsv arch/ia64/kernel/irq_ia64.c
@@ -60,6 +60,9 @@ __u8 isa_irq_to_vector_map[16] = {
 };
 EXPORT_SYMBOL(isa_irq_to_vector_map);
 
+int ia64_irq_to_gsv_map[NR_IRQS] = { [0 ... NR_IRQS-1] = -1 };
+int ia64_gsv_to_irq_map[NR_GSVS] = { [0 ... NR_GSVS-1] = -1 };
+
 static unsigned long ia64_vector_mask[BITS_TO_LONGS(IA64_NUM_DEVICE_VECTORS)];
 
 int
@@ -290,8 +293,22 @@ ia64_send_ipi (int cpu, int vector, int 
 void __init
 ia64_vector_domain_init (void)
 {
+	int domain, vec, gsv;
+
 	/* Attach BSP to domain #0 */
 	ia64_attach_cpu_to_domain(0);
+
+	/*
+	 * Make special mapping between per CPU IRQs and GSVs
+	 */
+	for (gsv = 0; gsv < NR_GSVS; gsv++) {
+		vec = gsv_to_vector(gsv);
+		if (vec < IA64_FIRST_DEVICE_VECTOR ||
+		    vec > IA64_LAST_DEVICE_VECTOR) {
+			ia64_gsv_to_irq_map[gsv] = vec;
+			ia64_irq_to_gsv_map[vec] = vec;
+		}
+	}
 }
 
 #ifdef CONFIG_VECTOR_DOMAIN
include/asm-ia64/hw_irq.h renamed from include/asm-ia64/hw_irq.h~vector-domain-ia64-handle-gsv +65 -1

76 lines not on this page · raw message

include/asm-ia64/irq.h renamed from include/asm-ia64/irq.h~vector-domain-ia64-handle-gsv +2 -0
diff -puN include/asm-ia64/irq.h~vector-domain-ia64-handle-gsv include/asm-ia64/irq.h
@@ -20,6 +20,8 @@
 #define NR_IRQS		(256 * NR_VECTOR_DOMAINS)
 #define NR_IRQ_VECTORS	NR_IRQS
 
+#define NR_GSVS		(IA64_NUM_VECTORS * NR_VECTOR_DOMAINS)
+
 static __inline__ int
 irq_canonicalize (int irq)
 {

_

#1 lore raw

On Thu, Jul 14, 2005 at 06:24:14PM +0900, Kenji Kaneshige wrote:

Hi Kaneshige,

Iam in the process of reviewing in detail, but here are a few that came by,

Quoted 9 lines

int

arch/ia64/kernel/irq_ia64.c renamed from arch/ia64/kernel/irq_ia64.c~vector-domain-ia64-handle-gsv +2 -0
@@ -290,8 +293,22 @@ ia64_send_ipi (int cpu, int vector, int 
 void __init
 ia64_vector_domain_init (void)
 {
+	int domain, vec, gsv;
+
 	/* Attach BSP to domain #0 */
 	ia64_attach_cpu_to_domain(0);

arch/ia64/kernel/irq_ia64.c ia64_send_ipi (int cpu, int vector, int · line 309

Quoted 10 lines
arch/ia64/kernel/irq_ia64.c renamed from arch/ia64/kernel/irq_ia64.c~vector-domain-ia64-handle-gsv +10 -0
+
+	/*
+	 * Make special mapping between per CPU IRQs and GSVs
+	 */
+	for (gsv = 0; gsv < NR_GSVS; gsv++) {
+		vec = gsv_to_vector(gsv);
+		if (vec < IA64_FIRST_DEVICE_VECTOR ||
+		    vec > IA64_LAST_DEVICE_VECTOR) {
+			ia64_gsv_to_irq_map[gsv] = vec;
+			ia64_irq_to_gsv_map[vec] = vec;

Should the above be = gsv instead of vec?

arch/ia64/kernel/irq_ia64.c ia64_send_ipi (int cpu, int vector, int · line 309

Quoted 1 line
arch/ia64/kernel/irq_ia64.c renamed from arch/ia64/kernel/irq_ia64.c~vector-domain-ia64-handle-gsv +1 -0
+			ia64_irq_to_gsv_map[vec] = vec;

---------------------------------------------------^^^^

include/asm-ia64/hw_irq.h hw_resend_irq (struct hw_interrupt_type · line 130

Quoted 8 lines
include/asm-ia64/hw_irq.h renamed from include/asm-ia64/hw_irq.h~vector-domain-ia64-handle-gsv +8 -0
+
+/*
+ * Convert global system vector to the corresponding IRQ.
+ */
+static inline int
+gsv_to_irq (unsigned int gsv)
+{
+	if (gsv > NR_GSVS)

Should the above be (gsv >= NR_GSVS)??

Quoted 4 lines
include/asm-ia64/hw_irq.h renamed from include/asm-ia64/hw_irq.h~vector-domain-ia64-handle-gsv +4 -0
+		return -1;
+	return ia64_gsv_to_irq_map[gsv];
+}
+
Signature · 3 lines
Cheers,
Ashok Raj
- Open Source Technology Center
#2 lore raw

Re: [RFC][patch 3/10] Multiple vector domain support - introduce

In reply to Kenji Kaneshige

Hi Ashok,

Thank you for comments.

Quoted 14 lines

arch/ia64/kernel/irq_ia64.c ia64_send_ipi (int cpu, int vector, int · line 309

Quoted 10 lines
arch/ia64/kernel/irq_ia64.c renamed from arch/ia64/kernel/irq_ia64.c~vector-domain-ia64-handle-gsv +10 -0
+
+	/*
+	 * Make special mapping between per CPU IRQs and GSVs
+	 */
+	for (gsv = 0; gsv < NR_GSVS; gsv++) {
+		vec = gsv_to_vector(gsv);
+		if (vec < IA64_FIRST_DEVICE_VECTOR ||
+		    vec > IA64_LAST_DEVICE_VECTOR) {
+			ia64_gsv_to_irq_map[gsv] = vec;
+			ia64_irq_to_gsv_map[vec] = vec;

Should the above be = gsv instead of vec?

Quoted 3 lines

arch/ia64/kernel/irq_ia64.c ia64_send_ipi (int cpu, int vector, int · line 309

Quoted 1 line
arch/ia64/kernel/irq_ia64.c renamed from arch/ia64/kernel/irq_ia64.c~vector-domain-ia64-handle-gsv +1 -0
+			ia64_irq_to_gsv_map[vec] = vec;

---------------------------------------------------^^^^

I did this by intent, but we can also use "= gsv" instead of "= vec".
In my patch, all per CPU interrupts are mapped to the same IRQ regardless of what domain the cpu belongs to. So multiple gsvs are mappied to one IRQ for per CPU interrupts.

Quoted 11 lines

include/asm-ia64/hw_irq.h hw_resend_irq (struct hw_interrupt_type · line 130

Quoted 7 lines
include/asm-ia64/hw_irq.h renamed from include/asm-ia64/hw_irq.h~vector-domain-ia64-handle-gsv +7 -0
+/*
+ * Convert global system vector to the corresponding IRQ.
+ */
+static inline int
+gsv_to_irq (unsigned int gsv)
+{
+	if (gsv > NR_GSVS)

Should the above be (gsv >= NR_GSVS)??

Yes, it's a bug.
Thank you for finding this out.

Thanks,
Kenji Kaneshige