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RFC Multiple vector domain support

Kenji Kaneshige linux-ia64 1 version In review

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  1. v1 RFC Latest10 patches 6 repliesIn review

Patches in v1 No applies recorded yet

#Subject and filesSizeRepliesApplied
1/10Multiple vector domain support - change ia64 Kconfigarch/ia64/Kconfig include/asm-ia64/irq.h+24 -10 replies
2/10Multiple vector domain support - cpu and domainarch/ia64/kernel/irq_ia64.c arch/ia64/kernel/setup.c arch/ia64/kernel/smpboot.c +1 more+41 -04 replies
3/10Multiple vector domain support - introduce gsvarch/ia64/kernel/irq_ia64.c include/asm-ia64/hw_irq.h include/asm-ia64/irq.h+84 -12 replies
4/10Multiple vector domain support - per domain vectorarch/ia64/kernel/irq_ia64.c include/asm-ia64/hw_irq.h+107 -260 replies
5/10Multiple vector domain support - change __ia64_local_vector_to_irqarch/ia64/kernel/irq.c include/asm-ia64/hw_irq.h+4 -20 replies
6/10Multiple vector domain support - change irq_to_vectorinclude/asm-ia64/hw_irq.h+1 -10 replies
7/10Multiple vector domain support - IOSAPIC supportarch/ia64/kernel/iosapic.c+220 -1340 replies
8/10Multiple vector domain support - stop hardwarearch/ia64/kernel/iosapic.c arch/ia64/kernel/sal.c+19 -50 replies
9/10Multiple vector domain support - inter domain interruptarch/ia64/kernel/iosapic.c arch/ia64/kernel/irq_ia64.c include/asm-ia64/hw_irq.h+83 -220 replies
10/10Multiple vector domain support+0 -00 replies

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Cover letter [RFC][patch 0/10] Multiple vector domain support

Hi,

I'm attaching the series of patches for handling huge number of interrtupt sources. This patch is to increase vector spaces by separating processors into some domains. This idea is the same as "per node IDT" posted by Zwane Mwaikambo at:

    http://marc.theaimsgroup.com/?l=linux-kernel&m2103551401596&w=2

The ia64 linux already have vector sharing to handle huge number of level-triggered interrupt sources via I/O SAPIC, but I think we also need per domain vector approach because:

o Supporting vector shairng for edge-triggered interrupts is difficult (or impossible)

o Vector domain approach has better performance than vector sharing

o Need to support MSI based interrupts

This series of patches is still under development, and has following TBD items.

o How to create vector domains

Need to consider how to create vector domains(per CPU?, per node? or others...)

o MSI support

Attached patch only supports vector domain for I/O SAPIC interrupts. We need to consider how to support vector domain for MSI interrupts.

o /proc interface

o How to handle CPU hotplug

o and so on..

Any comments and questions are welcomed.

Thanks,
Kenji Kaneshige

Read the cover letter in its thread