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simple SPI controller implementation on PXA2xx SSP port

PATCH In review Stephen Street 1 participant 1 message Oct 4, 2005 SPI

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PATCH 1/2 simple SPI controller implementation on PXA2xx SSP port

This is a prototype interrupt driven SPI "controller" for Intel's PXA2xx series SOC. The driver plugs into the lightweight SPI framework developed by David Brownell. Hardwired configuration information is provided via spi_board_info structures initialized in arch/arm/mach_pxa board initialization code (see include/linux/spi.h for details).

The driver is built around a spi_message fifo serviced by two tasklets. The first tasklet (pump_messages) is responsible for queuing SPI transactions and scheduling SPI transfers. The second tasklet (pump_transfers) is responsible to setting up and launching the interrupt driven transfers. Per transfer chip select and delay control is available.

This is a prototype driver, so you mileage will vary. It has only been tested on the NSSP port.

Known Limitations:
Does not handle invert chip select polarity. Heavy loaded systems may see transaction failures. Wordsize support is untested.
Internal NSSP chip select is not support (i.e. NSSPSRFM)

---- snip ----

 drivers/spi/Kconfig                       |   12 
 drivers/spi/Makefile                      |    2 
 drivers/spi/pxa2xx_spi_ssp.c              |  741 ++++++++++++++++++++++++++++++
 include/asm-arm/arch-pxa/pxa2xx_spi_ssp.h |   36 +
 4 files changed, 791 insertions(+)
drivers/spi/Kconfig 2005-10-04 14:00:12.279449000 -0700 renamed from drivers/spi/Kconfig 2005-10-04 14:07:18.000000000 -0700 +12 -0
@@ -65,6 +65,12 @@
 comment "SPI Master Controller Drivers"
 
 
+config SPI_PXA_SSP
+       tristate "PXA SSP controller as SPI master"
+       depends on ARCH_PXA
+       help
+         This implements SPI master mode using an SSP controller.
+
 #
 # Add new SPI master controllers in alphabetical order above this line
 #
@@ -77,6 +83,12 @@
 comment "SPI Protocol Masters"
 
 
+config SPI_CS8415A
+       tristate "CS8415A SPD/IF decoder"
+       help
+         This chip provides an 8 channel SPD/IF switcher with complete
+         SPD/IF decoding.
+
 #
 # Add new SPI protocol masters in alphabetical order above this line
 #
drivers/spi/Makefile 2005-10-04 14:00:12.279449000 -0700 renamed from drivers/spi/Makefile 2005-10-04 14:07:18.000000000 -0700 +2 -0
@@ -11,9 +11,11 @@
 obj-$(CONFIG_SPI_MASTER)               += spi.o
 
 # SPI master controller drivers (bus)
+obj-$(CONFIG_SPI_PXA_SSP)              += pxa2xx_spi_ssp.o
 #      ... add above this line ...
 
 # SPI protocol drivers (device/link on bus)
+obj-$(CONFIG_SPI_CS8415A)              += cs8415a.o
 #      ... add above this line ...
 
 # SPI slave controller drivers (upstream link)
drivers/spi/pxa2xx_spi_ssp.c 2005-10-04 12:50:10.699272000 -0700 renamed from drivers/spi/pxa2xx_spi_ssp.c 1969-12-31 16:00:00.000000000 -0800 +741 -0

741 lines not on this page · raw message

include/asm-arm/arch-pxa/pxa2xx_spi_ssp.h 2005-10-04 12:50:22.922007000 -0700 renamed from include/asm-arm/arch-pxa/pxa2xx_spi_ssp.h 1969-12-31 16:00:00.000000000 -0800 +36 -0
@@ -0,0 +1,36 @@
+/* Copyright (C) 2005 Stephen Street / StreetFire Sound Labs
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef PXA2XX_SPI_SSP_H_
+#define PXA2XX_SPI_SSP_H_
+
+struct pxa2xx_spi_master {
+ u16 bus_num;
+ u32 clock_enable;
+ u16 num_chipselect;
+};
+
+struct pxa2xx_spi_chip {
+ u8 mode;
+ u8 tx_threshold;
+ u8 rx_threshold;
+ u8 bits_per_word;
+ u16 chip_select_gpio;
+ u32 timeout_microsecs;
+};
+
+#endif /*PXA2XX_SPI_SSP_H_*/