Few patches needed to support QE USB on MPC8360E-{MDS,RDK} boards
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cover Few patches needed to support QE USB on MPC8360E-{MDS,RDK} boards
Hi Kumar,
I'm resending the QE USB patches, the old ones started to cause rejects.
Could you apply them for 2.6.28? Especially the first patch, since it is holding the FHCI driver. I still hope that Greg would apply the driver post -rc1. ;-)
Thanks!
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Anton Vorontsov email: [email protected] irc://irc.freenode.net/bd2
PATCH 1/4 powerpc/QE: implement QE Pin Multiplexing API
With this API we're able to set a QE pin to the GPIO mode or a dedicated peripheral function.
The API relies on the fact that QE gpio controllers are registered. If they aren't, the API won't work (gracefully though).
There is one caveat though: if anybody occupied the node->data before us, or overwrote it, then bad things will happen. Luckily this is all in the platform code that we fully control, so this should never happen.
I could implement more checks (for example we could create a list of successfully registered QE controllers, and compare the node->data in the qe_pin_request()), but this is unneeded if nobody is going to do silly things behind our back.
--- arch/powerpc/include/asm/qe.h | 9 ++ arch/powerpc/sysdev/qe_lib/gpio.c | 195 +++++++++++++++++++++++++++++++++++++ 2 files changed, 204 insertions(+), 0 deletions(-)
arch/powerpc/include/asm/qe.h +9 -0
@@ -112,6 +112,15 @@ extern int par_io_config_pin(u8 port, u8 pin, int dir, int open_drain, int assignment, int has_irq);extern int par_io_data_set (u8 port,u8 pin,u8 val); +/* +* Pin multiplexing functions. +*/ +struct qe_pin ; +extern struct qe_pin *qe_pin_request (struct device_node *np,int index); +extern void qe_pin_free (struct qe_pin *qe_pin); +extern void qe_pin_set_gpio (struct qe_pin *qe_pin); +extern void qe_pin_set_dedicated (struct qe_pin *pin); +/* QE internal API */ int qe_issue_cmd (u32 cmd,u32 device,u8 mcn_protocol,u32 cmd_input);enum qe_clock qe_clock_source (const char *source);
arch/powerpc/sysdev/qe_lib/gpio.c +195 -0
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1.5.6.3
PATCH 2/4 powerpc: add driver for simple GPIO banks
In reply to Anton VorontsovThe driver supports very simple GPIO controllers, that is, when a controller provides just a 'data' register. Such controllers may be found in various BCSRs (Board's FPGAs used to control board's switches, LEDs, chip-selects, Ethernet/USB PHY power, etc).
So far we support only 1-byte GPIO banks. Support for other widths may be implemented when/if needed.
p.s.
To avoid "made up" compatible entries (like compatible = "simple-gpio"), boards must call the simple_gpiochip_init() to pass the compatible string.
--- Documentation/powerpc/dts-bindings/fsl/board.txt | 30 ++++ arch/powerpc/platforms/Kconfig | 10 ++ arch/powerpc/sysdev/Makefile | 1 + arch/powerpc/sysdev/simple_gpio.c | 156 ++++++++++++++++++++++ arch/powerpc/sysdev/simple_gpio.h | 13 ++ 5 files changed, 210 insertions(+), 0 deletions(-) create mode 100644 arch/powerpc/sysdev/simple_gpio.c create mode 100644 arch/powerpc/sysdev/simple_gpio.h
Documentation/powerpc/dts-bindings/fsl/board.txt +30 -0
@@ -27,3 +27,33 @@ Example (MPC8610HPCD): compatible = "fsl,fpga-pixis"; reg = <0xe8000000 32>; }; + +* Freescale BCSR GPIO banks + +Some BCSR registers act as simple GPIO controllers, each such +register can be represented by the gpio-controller node. + +Required properities: +- compatible : Should be "fsl,<board>-bcsr-gpio"; +- reg : Should contain the address and the lenght of the GPIO bank + register; +- #gpio-cells : Should be two. The first cell is the pin number and the + second cell is used to specify optional paramters (currently unused); +- gpio-controller : Marks the port as GPIO controller. + +Example: + + bcsr@1,0 { + #address-cells = <1>; + #size-cells = <1>; + device_type = "board-control"; + reg = <1 0 0x8000>; + ranges = <0 1 0 0x8000>; + + bcsr13: gpio-controller@d { + #gpio-cells = <2>; + compatible = "fsl,mpc8360mds-bcsr-gpio"; + reg = <0xd 1>; + gpio-controller; + }; + };
arch/powerpc/platforms/Kconfig +10 -0
@@ -312,4 +312,14 @@ config MPC8xxx_GPIO Say Y here if you're going to use hardware that connects to the MPC831x/834x/837x/8572/8610 GPIOs. +config SIMPLE_GPIO + bool "Support for simple, memory-mapped GPIO controllers" + depends on PPC + select GENERIC_GPIO + select ARCH_REQUIRE_GPIOLIB + help + Say Y here to support simple, memory-mapped GPIO controllers. + These are usually BCSRs used to control board's switches, LEDs, + chip-selects, Ethernet/USB PHY's power and various other small + on-board peripherals. endmenu
arch/powerpc/sysdev/Makefile +1 -0
@@ -34,6 +34,7 @@ obj-$(CONFIG_4xx) += uic.o obj-$(CONFIG_4xx_SOC) += ppc4xx_soc.o obj-$(CONFIG_XILINX_VIRTEX) += xilinx_intc.o obj-$(CONFIG_OF_RTC) += of_rtc.o +obj-$(CONFIG_SIMPLE_GPIO) += simple_gpio.o ifeq ($(CONFIG_PCI),y) obj-$(CONFIG_4xx) += ppc4xx_pci.o endif
arch/powerpc/sysdev/simple_gpio.c new file +156 -0
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arch/powerpc/sysdev/simple_gpio.h new file +13 -0
@@ -0,0 +1,13 @@ +#ifndef __SYSDEV_SIMPLE_GPIO_H +#define __SYSDEV_SIMPLE_GPIO_H + +#ifdef CONFIG_SIMPLE_GPIO +extern int __init simple_gpiochip_init (const char *compatible); +#else +static inline int __init simple_gpiochip_init (const char *compatible) +{ +return -ENODEV ; +} +#endif /* CONFIG_SIMPLE_GPIO */ + +#endif /* __SYSDEV_SIMPLE_GPIO_H */
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1.5.6.3
PATCH 3/4 powerpc/83xx: add USB Host/Gadget support for the MPC8360E-MDS boards
In reply to Anton Vorontsov- Update the device tree per QE USB bindings;
- Add timer (FSL GTM) node;
- Add gpio-controller node for BCSR13 bank (GPIOs on that bank are used to control the USB transceiver);
- Set up other BCSR registers;
- Configure the QE Par IO.
The work is loosely based on Li Yang's patch[1], which is used to support peripheral mode only.
[1] http://ozlabs.org/pipermail/linuxppc-dev/2008-August/061357.html
The s-o-b line of the original patch preserved here.
--- arch/powerpc/boot/dts/mpc836x_mds.dts | 43 ++++++++++++++++++++++- arch/powerpc/platforms/83xx/mpc836x_mds.c | 52 ++++++++++++++++++++++++++++- 2 files changed, 92 insertions(+), 3 deletions(-)
arch/powerpc/boot/dts/mpc836x_mds.dts +41 -2
@@ -69,8 +69,18 @@ }; bcsr@1,0 { + #address-cells = <1>; + #size-cells = <1>; device_type = "board-control"; reg = <1 0 0x8000>; + ranges = <0 1 0 0x8000>; + + bcsr13: gpio-controller@d { + #gpio-cells = <2>; + compatible = "fsl,mpc8360mds-bcsr-gpio"; + reg = <0xd 1>; + gpio-controller; + }; }; };
@@ -195,10 +205,21 @@ }; par_io@1400 { + #address-cells = <1>; + #size-cells = <1>; reg = <0x1400 0x100>; + ranges = <0 0x1400 0x100>; device_type = "par_io"; num-ports = <7>; + qe_pio_b: gpio-controller@18 { + #gpio-cells = <2>; + compatible = "fsl,mpc8360-qe-pario-bank", + "fsl,mpc8323-qe-pario-bank"; + reg = <0x18 0x18>; + gpio-controller; + }; + pio1: ucc_pin@01 { pio-map = < /* port pin dir open_drain assignment has_irq */
@@ -282,6 +303,15 @@ }; }; + timer@440 { + compatible = "fsl,mpc8360-qe-gtm", + "fsl,qe-gtm", "fsl,gtm"; + reg = <0x440 0x40>; + clock-frequency = <132000000>; + interrupts = <12 13 14 15>; + interrupt-parent = <&qeic>; + }; + spi@4c0 { cell-index = <0>; compatible = "fsl,spi";
@@ -301,11 +331,20 @@ }; usb@6c0 { - compatible = "qe_udc"; + compatible = "fsl,mpc8360-qe-usb", + "fsl,mpc8323-qe-usb"; reg = <0x6c0 0x40 0x8b00 0x100>; interrupts = <11>; interrupt-parent = <&qeic>; - mode = "slave"; + fsl,fullspeed-clock = "clk21"; + fsl,lowspeed-clock = "brg9"; + gpios = <&qe_pio_b 2 0 /* USBOE */ + &qe_pio_b 3 0 /* USBTP */ + &qe_pio_b 8 0 /* USBTN */ + &qe_pio_b 9 0 /* USBRP */ + &qe_pio_b 11 0 /* USBRN */ + &bcsr13 5 0 /* SPEED */ + &bcsr13 4 1>; /* POWER */ }; enet0: ucc@2000 {
arch/powerpc/platforms/83xx/mpc836x_mds.c +51 -1
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1.5.6.3
PATCH 4/4 powerpc/83xx: add USB Host support for the MPC8360E-RDK boards
In reply to Anton VorontsovSimply add the usb node to support USB host on the MPC8360E-RDK boards.
Currently U-Boot doesn't fill the clock-frequency property for timer nodes, so for now we have to fill it manually.
--- arch/powerpc/boot/dts/mpc836x_rdk.dts | 19 +++++++++++++++++-- 1 files changed, 17 insertions(+), 2 deletions(-)
arch/powerpc/boot/dts/mpc836x_rdk.dts +17 -2
@@ -218,8 +218,23 @@ reg = <0x440 0x40>; interrupts = <12 13 14 15>; interrupt-parent = <&qeic>; - /* filled by u-boot */ - clock-frequency = <0>; + clock-frequency = <166666666>; + }; + + usb@6c0 { + compatible = "fsl,mpc8360-qe-usb", + "fsl,mpc8323-qe-usb"; + reg = <0x6c0 0x40 0x8b00 0x100>; + interrupts = <11>; + interrupt-parent = <&qeic>; + fsl,fullspeed-clock = "clk21"; + gpios = <&qe_pio_b 2 0 /* USBOE */ + &qe_pio_b 3 0 /* USBTP */ + &qe_pio_b 8 0 /* USBTN */ + &qe_pio_b 9 0 /* USBRP */ + &qe_pio_b 11 0 /* USBRN */ + &qe_pio_e 20 0 /* SPEED */ + &qe_pio_e 21 1 /* POWER */>; }; spi@4c0 {
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1.5.6.3