mm: uncached vma support with writenotify

mm/mmap.c +7 -1

@@ -1209,8 +1209,20 @@ munmap_back:
 	pgoff = vma->vm_pgoff;
 	vm_flags = vma->vm_flags;
 
-	if (vma_wants_writenotify(vma))
+	if (vma_wants_writenotify(vma)) {
+		pgprot_t pprot = vma->vm_page_prot;
+
+		/* Can vma->vm_page_prot have changed??
+		 *
+		 * Answer: Yes, drivers may have changed it in their
+		 *         f_op->mmap method.

Quoted 15 lines · Magnus Damm

mm/mmap.c +7 -1

@@ -1209,8 +1209,20 @@ munmap_back:
 	pgoff = vma->vm_pgoff;
 	vm_flags = vma->vm_flags;
 
-	if (vma_wants_writenotify(vma))
+	if (vma_wants_writenotify(vma)) {
+		pgprot_t pprot = vma->vm_page_prot;
+
+		/* Can vma->vm_page_prot have changed??
+		 *
+		 * Answer: Yes, drivers may have changed it in their
+		 *         f_op->mmap method.

mm/mmap.c munmap_back: · line 1228

Quoted 10 lines

mm/mmap.c +6 -0

+		 *
+		 * Ensures that vmas marked as uncached stay that way.
+		 */
 		vma->vm_page_prot = vm_get_page_prot(vm_flags & ~VM_SHARED);
+		if (pgprot_val(pprot) == pgprot_val(pgprot_noncached(pprot)))
+			vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
+	}
 
 	vma_link(mm, vma, prev, rb_link, rb_parent);
 	file = vma->vm_file;

I guess the only real issue here is that we presently have no generic interface in the kernel for setting a VMA uncached. pgprot_noncached() is the closest approximation we have, but there are still architectures that do not implement it.

Given that this comes up at least once a month, perhaps it makes sense to see which platforms are still outstanding. At least cris, h8300, m68knommu, s390, and xtensa all presently lack a definition for it. The nommu cases are easily handled, but the rest still require some attention from their architecture maintainers before we can really start treating this as a generic interface.

Until then, you will have to do what every other user of pgprot_noncached() code does in generic code:

	#ifdef pgprot_noncached
		vma->vm_page_prot = pgprot_noncached(...);
	#endif

OTOH, I guess we could just add something like:

	#define pgprot_noncached(x)	(x) 

which works fine for the nommu case, and which functionally is no different from what happens right now anyways for the users that don't wire it up sanely.

Arnd, what do you think about throwing this at asm-generic?

 include/asm-generic/pgtable.h |    4 ++++
 1 file changed, 4 insertions(+)

include/asm-generic/pgtable.h +0 -0

index e410f60..e2bd73e 100644

Quoted 11 lines

I guess the only real issue here is that we presently have no generic interface in the kernel for setting a VMA uncached. pgprot_noncached() is the closest approximation we have, but there are still architectures that do not implement it.

Given that this comes up at least once a month, perhaps it makes sense to see which platforms are still outstanding. At least cris, h8300, m68knommu, s390, and xtensa all presently lack a definition for it. The nommu cases are easily handled, but the rest still require some attention from their architecture maintainers before we can really start treating this as a generic interface.

Quoted 6 lines

which works fine for the nommu case, and which functionally is no different from what happens right now anyways for the users that don't wire it up sanely.

Arnd, what do you think about throwing this at asm-generic?

I think Arnd fell asleep ;)

From: Paul Mundt <[email protected]>

Most architectures now provide a pgprot_noncached(), the remaining ones can simply use an dummy default implementation, except for cris and xtensa, which should override the default appropriately.

Signed-off-by Arnd Bergmann <[email protected]>

Cc Jesper Nilsson <[email protected]>

Cc Chris Zankel <[email protected]>

Cc Magnus Damm <[email protected]>

On cris, the high address bit controls caching, which means that we can add a pgprot_noncached() macro that sets this bit in the address.

Signed-off-by Arnd Bergmann <[email protected]>

---

Jesper, does this patch make any sense to you? I could well be misunderstanding how cris works.

 arch/cris/include/arch-v10/arch/mmu.h |    9 +++++----
 arch/cris/include/arch-v32/arch/mmu.h |   10 ++++++----
 arch/cris/include/asm/pgtable.h       |    2 ++
 3 files changed, 13 insertions(+), 8 deletions(-)

arch/cris/include/arch-v10/arch/mmu.h +5 -4

index df84f17..e829e5a 100644
@@ -33,10 +33,10 @@ typedef struct
 
 /* CRIS PTE bits (see R_TLB_LO in the register description)
  *
- *   Bit:  31-13 12-------4    3        2       1       0  
- *         ________________________________________________
- *        | pfn | reserved | global | valid | kernel | we  |
- *        |_____|__________|________|_______|________|_____|
+ *   Bit:  31     30-13 12-------4    3        2       1       0
+ *         _______________________________________________________
+ *        | cache |pfn | reserved | global | valid | kernel | we  |
+ *        |_______|____|__________|________|_______|________|_____|
  *
  * (pfn = physical frame number)
  */

@@ -53,6 +53,7 @@ typedef struct
 #define _PAGE_VALID	   (1<<2) /* page is valid */
 #define _PAGE_SILENT_READ  (1<<2) /* synonym */
 #define _PAGE_GLOBAL       (1<<3) /* global page - context is ignored */
+#define _PAGE_NO_CACHE	   (1<<31) /* part of the uncached memory map */
 
 /* Bits the HW doesn't care about but the kernel uses them in SW */
 

arch/cris/include/arch-v32/arch/mmu.h +6 -4

index 6bcdc3f..a05b033 100644
@@ -28,10 +28,10 @@ typedef struct
 /*
  * CRISv32 PTE bits:
  *
- *  Bit:  31-13  12-5     4        3       2        1        0
- *       +-----+------+--------+-------+--------+-------+---------+
- *       | pfn | zero | global | valid | kernel | write | execute |
- *       +-----+------+--------+-------+--------+-------+---------+
+ *  Bit:   31     30-13  12-5     4        3       2        1        0
+ *       +-------+-----+------+--------+-------+--------+-------+---------+
+ *       | cache | pfn | zero | global | valid | kernel | write | execute |
+ *       +-------+-----+------+--------+-------+--------+-------+---------+
  */
 
 /*

@@ -45,6 +45,8 @@ typedef struct
 #define _PAGE_VALID         (1 << 3)	/* Page is valid. */
 #define _PAGE_SILENT_READ   (1 << 3)	/* Same as above. */
 #define _PAGE_GLOBAL        (1 << 4)	/* Global page. */
+#define _PAGE_NO_CACHE	    (1 <<31)	/* part of the uncached memory map */
+
 
 /*
  * The hardware doesn't care about these bits, but the kernel uses them in

arch/cris/include/asm/pgtable.h +0 -0

index 50aa974..1fcce00 100644

No, this looks good to me.
Do you want me to grab it for the CRIS tree or do you want to keep it as a series?

Quoted 3 lines · Jesper Nilsson

No, this looks good to me.
Do you want me to grab it for the CRIS tree or do you want to keep it as a series?

I'd prefer you to take it. The order of the four patches is entirely arbitrary anyway and there are no other dependencies on it once the asm-generic version is merged.

	Arnd <><