imx cleanup series
Subsystems (3)
cover imx cleanup series
Hello,
this series is the next step of a big cleanup of arch-mx* + plat-mxc.
The patch by Wolfgang Denk is included because otherwise it would conflict with the series.
diffstat and shortlog are below.
I think I will add some more patches until the next merge window opens, I send now to get some feedback and make people aware of these changes. Note that the branch may change in a non-fast-forward manner.
Best regards
Uwe
The following changes since commit 8bea8672edfca7ec5f661cafb218f1205863b343:
Stephen Rothwell (1):
mfd: compile fix for twl4030 renaming
are available in the git repository at:
git://git.pengutronix.de/git/ukl/linux-2.6.git imx
Uwe Kleine-K?nig (19):
imx/mx2: fold crm_regs.h into its only consumer imx/clock-imx21: use a macro to define registers imx/clock-imx27: use a macro to define registers
imx/mach-mx2: use constants namespaced by the corresponding SOC (easy part) imx/mach-mx3: use constants namespaced by the corresponding SOC (easy part) imx/mx3: rename clock.c and iomux.c to {clock,iomux}-imx31.c imx/mx1: add newline at end of Makefile
imx/mx1: rename files defining a machine to mach-$mach.c
imx: rename Kconfig symbol for "Eukrea CPUIMX27 module"
imx: rename Kconfig symbol for "LogicPD MX27 LITEKIT platform" imx/mx2: rename files defining a machine to mach-$mach.c imx/mx3: rename files defining a machine to mach-$mach.c
imx: provide helper macro to define IO_ADDRESS
imx21: define and use MX21_IO_ADDRESS
imx27: define and use MX27_IO_ADDRESS
imx31: define and use MX31_IO_ADDRESS
imx25: redefine MX25_IO_ADDRESS using IMX_IO_ADDRESS
imx35: define and use MX35_IO_ADDRESS
mx3/kzm_arm11_01: define and use board specific IO_ADDRESS macro
Wolfgang Denk (1):
ARM: MX3: make CPU revision number detection work on all boards
arch/arm/configs/mx27_defconfig | 2 +-
arch/arm/mach-mx1/Makefile | 4 +-
arch/arm/mach-mx1/{mx1ads.c => mach-mx1ads.c} | 2 +-
arch/arm/mach-mx1/{scb9328.c => mach-scb9328.c} | 2 +-
arch/arm/mach-mx2/Kconfig | 8 +-
arch/arm/mach-mx2/Makefile | 17 +-
arch/arm/mach-mx2/clock_imx21.c | 236 ++++++++++++++++++-
arch/arm/mach-mx2/clock_imx27.c | 33 ++--
arch/arm/mach-mx2/cpu_imx27.c | 3 +-
arch/arm/mach-mx2/crm_regs.h | 258 --------------------
.../{eukrea_cpuimx27.c => mach-cpuimx27.c} | 12 +-
arch/arm/mach-mx2/{mx27lite.c => mach-imx27lite.c} | 4 +-
arch/arm/mach-mx2/{mx21ads.c => mach-mx21ads.c} | 10 +-
arch/arm/mach-mx2/{mx27pdk.c => mach-mx27_3ds.c} | 4 +-
arch/arm/mach-mx2/{mx27ads.c => mach-mx27ads.c} | 6 +-
arch/arm/mach-mx2/{mxt_td60.c => mach-mxt_td60.c} | 4 +-
arch/arm/mach-mx2/{pca100.c => mach-pca100.c} | 4 +-
arch/arm/mach-mx2/{pcm038.c => mach-pcm038.c} | 8 +-
arch/arm/mach-mx2/pcm970-baseboard.c | 4 +-
arch/arm/mach-mx3/Makefile | 24 +-
arch/arm/mach-mx3/{clock.c => clock-imx31.c} | 5 +-
arch/arm/mach-mx3/clock-imx35.c | 4 +-
arch/arm/mach-mx3/crm_regs.h | 2 +-
arch/arm/mach-mx3/{iomux.c => iomux-imx31.c} | 2 +-
.../{armadillo5x0.c => mach-armadillo5x0.c} | 12 +-
.../mach-mx3/{kzmarm11.c => mach-kzm_arm11_01.c} | 32 ++-
arch/arm/mach-mx3/{mx31pdk.c => mach-mx31_3ds.c} | 15 +-
arch/arm/mach-mx3/{mx31ads.c => mach-mx31ads.c} | 19 +-
.../arm/mach-mx3/{mx31lilly.c => mach-mx31lilly.c} | 8 +-
arch/arm/mach-mx3/{mx31lite.c => mach-mx31lite.c} | 19 +-
.../mach-mx3/{mx31moboard.c => mach-mx31moboard.c} | 4 +-
arch/arm/mach-mx3/{mx35pdk.c => mach-mx35pdk.c} | 4 +-
arch/arm/mach-mx3/{pcm037.c => mach-pcm037.c} | 16 +-
arch/arm/mach-mx3/{pcm043.c => mach-pcm043.c} | 4 +-
arch/arm/mach-mx3/{qong.c => mach-qong.c} | 14 +-
arch/arm/mach-mx3/mm.c | 5 +
arch/arm/plat-mxc/include/mach/board-mx31ads.h | 2 +-
arch/arm/plat-mxc/include/mach/hardware.h | 4 +
arch/arm/plat-mxc/include/mach/mx21.h | 7 +
arch/arm/plat-mxc/include/mach/mx25.h | 19 +-
arch/arm/plat-mxc/include/mach/mx27.h | 7 +
arch/arm/plat-mxc/include/mach/mx31.h | 9 +
arch/arm/plat-mxc/include/mach/mx35.h | 8 +
43 files changed, 433 insertions(+), 433 deletions(-)
rename arch/arm/mach-mx1/{mx1ads.c => mach-mx1ads.c} (98%)
rename arch/arm/mach-mx1/{scb9328.c => mach-scb9328.c} (98%)
delete mode 100644 arch/arm/mach-mx2/crm_regs.h
rename arch/arm/mach-mx2/{eukrea_cpuimx27.c => mach-cpuimx27.c} (94%)
rename arch/arm/mach-mx2/{mx27lite.c => mach-imx27lite.c} (96%)
rename arch/arm/mach-mx2/{mx21ads.c => mach-mx21ads.c} (96%)
rename arch/arm/mach-mx2/{mx27pdk.c => mach-mx27_3ds.c} (96%)
rename arch/arm/mach-mx2/{mx27ads.c => mach-mx27ads.c} (98%)
rename arch/arm/mach-mx2/{mxt_td60.c => mach-mxt_td60.c} (98%)
rename arch/arm/mach-mx2/{pca100.c => mach-pca100.c} (98%)
rename arch/arm/mach-mx2/{pcm038.c => mach-pcm038.c} (97%)
rename arch/arm/mach-mx3/{clock.c => clock-imx31.c} (99%)
rename arch/arm/mach-mx3/{iomux.c => iomux-imx31.c} (98%)
rename arch/arm/mach-mx3/{armadillo5x0.c => mach-armadillo5x0.c} (97%)
rename arch/arm/mach-mx3/{kzmarm11.c => mach-kzm_arm11_01.c} (89%)
rename arch/arm/mach-mx3/{mx31pdk.c => mach-mx31_3ds.c} (95%)
rename arch/arm/mach-mx3/{mx31ads.c => mach-mx31ads.c} (96%)
rename arch/arm/mach-mx3/{mx31lilly.c => mach-mx31lilly.c} (97%)
rename arch/arm/mach-mx3/{mx31lite.c => mach-mx31lite.c} (94%)
rename arch/arm/mach-mx3/{mx31moboard.c => mach-mx31moboard.c} (99%)
rename arch/arm/mach-mx3/{mx35pdk.c => mach-mx35pdk.c} (97%)
rename arch/arm/mach-mx3/{pcm037.c => mach-pcm037.c} (97%)
rename arch/arm/mach-mx3/{pcm043.c => mach-pcm043.c} (98%)
rename arch/arm/mach-mx3/{qong.c => mach-qong.c} (95%)Signature · 2 lines
Pengutronix e.K. | Uwe Kleine-K?nig | Industrial Linux Solutions | http://www.pengutronix.de/ |
PATCH 1/20 ARM: MX3: make CPU revision number detection work on all boards
From: Wolfgang Denk <[email protected]>
Commit 52939c03 (ARM: MX3: fix CPU revision number detection) started using the CPU's SREV register for revision number detection. This makes it mandatory to have a valid SPBA0 mapping. Add this to the global map_io code instead of adding multiple copies for each board.
Signed-off-by Wolfgang Denk <[email protected]>
Cc Daniel Mack <[email protected]>
Cc Sascha Hauer <[email protected]>
Tested on Qong (EVB-Lite)
Tested-by Wolfgang Denk <[email protected]>
Signed-off-by Uwe Kleine-K?nig <[email protected]>
--- arch/arm/mach-mx3/mm.c | 5 +++++ arch/arm/mach-mx3/mx31ads.c | 5 ----- arch/arm/mach-mx3/mx31lite.c | 5 ----- arch/arm/mach-mx3/mx31pdk.c | 5 ----- 4 files changed, 5 insertions(+), 15 deletions(-)
arch/arm/mach-mx3/mm.c +5 -0
@@ -65,6 +65,11 @@ static struct map_desc mxc_io_desc[] __initdata = { .pfn = __phys_to_pfn(AIPS2_BASE_ADDR), .length = AIPS2_SIZE, .type = MT_DEVICE_NONSHARED + }, { + .virtual = SPBA0_BASE_ADDR_VIRT, + .pfn = __phys_to_pfn(SPBA0_BASE_ADDR), + .length = SPBA0_SIZE, + .type = MT_DEVICE_NONSHARED }, };
arch/arm/mach-mx3/mx31ads.c +0 -5
@@ -494,11 +494,6 @@ static void mxc_init_i2c(void)*/ static struct map_desc mx31ads_io_desc[]__initdata = { { - .virtual =SPBA0_BASE_ADDR_VIRT , - .pfn =__phys_to_pfn (SPBA0_BASE_ADDR ), - .length =SPBA0_SIZE , - .type =MT_DEVICE_NONSHARED - }, { .virtual =CS4_BASE_ADDR_VIRT , .pfn =__phys_to_pfn (CS4_BASE_ADDR ), .length =CS4_SIZE /2 ,
arch/arm/mach-mx3/mx31lite.c +0 -5
@@ -212,11 +212,6 @@ static struct platform_device physmap_flash_device = {*/ static struct map_desc mx31lite_io_desc[]__initdata = { { - .virtual =SPBA0_BASE_ADDR_VIRT , - .pfn =__phys_to_pfn (SPBA0_BASE_ADDR ), - .length =SPBA0_SIZE , - .type =MT_DEVICE_NONSHARED - }, { .virtual =CS4_BASE_ADDR_VIRT , .pfn =__phys_to_pfn (CS4_BASE_ADDR ), .length =CS4_SIZE ,
arch/arm/mach-mx3/mx31pdk.c +0 -5
@@ -211,11 +211,6 @@ static int __init mx31pdk_init_expio(void)*/ static struct map_desc mx31pdk_io_desc[]__initdata = { { - .virtual =SPBA0_BASE_ADDR_VIRT , - .pfn =__phys_to_pfn (SPBA0_BASE_ADDR ), - .length =SPBA0_SIZE , - .type =MT_DEVICE_NONSHARED , - }, { .virtual =CS5_BASE_ADDR_VIRT , .pfn =__phys_to_pfn (CS5_BASE_ADDR ), .length =CS5_SIZE ,
Signature · 1 line
1.6.5.2
PATCH 2/20 imx/mx2: fold crm_regs.h into its only consumer
Signed-off-by Uwe Kleine-K?nig <[email protected]>
Cc Sascha Hauer <[email protected]>
Cc Russell King <[email protected]>
Cc Holger Schurig <[email protected]>
Cc Rabin Vincent <[email protected]>
Cc Agust?n Ferr?n Pozuelo <[email protected]>
--- arch/arm/mach-mx2/clock_imx21.c | 231 ++++++++++++++++++++++++++++++++++- arch/arm/mach-mx2/crm_regs.h | 258 --------------------------------------- 2 files changed, 230 insertions(+), 259 deletions(-) delete mode 100644 arch/arm/mach-mx2/crm_regs.h
arch/arm/mach-mx2/clock_imx21.c +230 -1
@@ -23,11 +23,240 @@#include <linux/module.h> #include <mach/clock.h> +#include <mach/hardware.h> #include <mach/common.h> #include <asm/clkdev.h> #include <asm/div64.h> -#include "crm_regs.h" +/* Register offsets */ +#define CCM_CSCR (IO_ADDRESS(CCM_BASE_ADDR) + 0x0) +#define CCM_MPCTL0 (IO_ADDRESS(CCM_BASE_ADDR) + 0x4) +#define CCM_MPCTL1 (IO_ADDRESS(CCM_BASE_ADDR) + 0x8) +#define CCM_SPCTL0 (IO_ADDRESS(CCM_BASE_ADDR) + 0xC) +#define CCM_SPCTL1 (IO_ADDRESS(CCM_BASE_ADDR) + 0x10) +#define CCM_OSC26MCTL (IO_ADDRESS(CCM_BASE_ADDR) + 0x14) +#define CCM_PCDR0 (IO_ADDRESS(CCM_BASE_ADDR) + 0x18) +#define CCM_PCDR1 (IO_ADDRESS(CCM_BASE_ADDR) + 0x1c) +#define CCM_PCCR0 (IO_ADDRESS(CCM_BASE_ADDR) + 0x20) +#define CCM_PCCR1 (IO_ADDRESS(CCM_BASE_ADDR) + 0x24) +#define CCM_CCSR (IO_ADDRESS(CCM_BASE_ADDR) + 0x28) +#define CCM_PMCTL (IO_ADDRESS(CCM_BASE_ADDR) + 0x2c) +#define CCM_PMCOUNT (IO_ADDRESS(CCM_BASE_ADDR) + 0x30) +#define CCM_WKGDCTL (IO_ADDRESS(CCM_BASE_ADDR) + 0x34) + +#define CCM_CSCR_PRESC_OFFSET 29 +#define CCM_CSCR_PRESC_MASK (0x7 << CCM_CSCR_PRESC_OFFSET) + +#define CCM_CSCR_USB_OFFSET 26 +#define CCM_CSCR_USB_MASK (0x7 << CCM_CSCR_USB_OFFSET) +#define CCM_CSCR_SD_OFFSET 24 +#define CCM_CSCR_SD_MASK (0x3 << CCM_CSCR_SD_OFFSET) +#define CCM_CSCR_SPLLRES (1 << 22) +#define CCM_CSCR_MPLLRES (1 << 21) +#define CCM_CSCR_SSI2_OFFSET 20 +#define CCM_CSCR_SSI2 (1 << CCM_CSCR_SSI2_OFFSET) +#define CCM_CSCR_SSI1_OFFSET 19 +#define CCM_CSCR_SSI1 (1 << CCM_CSCR_SSI1_OFFSET) +#define CCM_CSCR_FIR_OFFSET 18 +#define CCM_CSCR_FIR (1 << CCM_CSCR_FIR_OFFSET) +#define CCM_CSCR_SP (1 << 17) +#define CCM_CSCR_MCU (1 << 16) +#define CCM_CSCR_BCLK_OFFSET 10 +#define CCM_CSCR_BCLK_MASK (0xf << CCM_CSCR_BCLK_OFFSET) +#define CCM_CSCR_IPDIV_OFFSET 9 +#define CCM_CSCR_IPDIV (1 << CCM_CSCR_IPDIV_OFFSET) + +#define CCM_CSCR_OSC26MDIV (1 << 4) +#define CCM_CSCR_OSC26M (1 << 3) +#define CCM_CSCR_FPM (1 << 2) +#define CCM_CSCR_SPEN (1 << 1) +#define CCM_CSCR_MPEN 1 + +#define CCM_MPCTL0_CPLM (1 << 31) +#define CCM_MPCTL0_PD_OFFSET 26 +#define CCM_MPCTL0_PD_MASK (0xf << 26) +#define CCM_MPCTL0_MFD_OFFSET 16 +#define CCM_MPCTL0_MFD_MASK (0x3ff << 16) +#define CCM_MPCTL0_MFI_OFFSET 10 +#define CCM_MPCTL0_MFI_MASK (0xf << 10) +#define CCM_MPCTL0_MFN_OFFSET 0 +#define CCM_MPCTL0_MFN_MASK 0x3ff + +#define CCM_MPCTL1_LF (1 << 15) +#define CCM_MPCTL1_BRMO (1 << 6) + +#define CCM_SPCTL0_CPLM (1 << 31) +#define CCM_SPCTL0_PD_OFFSET 26 +#define CCM_SPCTL0_PD_MASK (0xf << 26) +#define CCM_SPCTL0_MFD_OFFSET 16 +#define CCM_SPCTL0_MFD_MASK (0x3ff << 16) +#define CCM_SPCTL0_MFI_OFFSET 10 +#define CCM_SPCTL0_MFI_MASK (0xf << 10) +#define CCM_SPCTL0_MFN_OFFSET 0 +#define CCM_SPCTL0_MFN_MASK 0x3ff + +#define CCM_SPCTL1_LF (1 << 15) +#define CCM_SPCTL1_BRMO (1 << 6) + +#define CCM_OSC26MCTL_PEAK_OFFSET 16 +#define CCM_OSC26MCTL_PEAK_MASK (0x3 << 16) +#define CCM_OSC26MCTL_AGC_OFFSET 8 +#define CCM_OSC26MCTL_AGC_MASK (0x3f << 8) +#define CCM_OSC26MCTL_ANATEST_OFFSET 0 +#define CCM_OSC26MCTL_ANATEST_MASK 0x3f + +#define CCM_PCDR0_SSI2BAUDDIV_OFFSET 26 +#define CCM_PCDR0_SSI2BAUDDIV_MASK (0x3f << 26) +#define CCM_PCDR0_SSI1BAUDDIV_OFFSET 16 +#define CCM_PCDR0_SSI1BAUDDIV_MASK (0x3f << 16) +#define CCM_PCDR0_NFCDIV_OFFSET 12 +#define CCM_PCDR0_NFCDIV_MASK (0xf << 12) +#define CCM_PCDR0_48MDIV_OFFSET 5 +#define CCM_PCDR0_48MDIV_MASK (0x7 << CCM_PCDR0_48MDIV_OFFSET) +#define CCM_PCDR0_FIRIDIV_OFFSET 0 +#define CCM_PCDR0_FIRIDIV_MASK 0x1f +#define CCM_PCDR1_PERDIV4_OFFSET 24 +#define CCM_PCDR1_PERDIV4_MASK (0x3f << 24) +#define CCM_PCDR1_PERDIV3_OFFSET 16 +#define CCM_PCDR1_PERDIV3_MASK (0x3f << 16) +#define CCM_PCDR1_PERDIV2_OFFSET 8 +#define CCM_PCDR1_PERDIV2_MASK (0x3f << 8) +#define CCM_PCDR1_PERDIV1_OFFSET 0 +#define CCM_PCDR1_PERDIV1_MASK 0x3f + +#define CCM_PCCR_HCLK_CSI_OFFSET 31 +#define CCM_PCCR_HCLK_CSI_REG CCM_PCCR0 +#define CCM_PCCR_HCLK_DMA_OFFSET 30 +#define CCM_PCCR_HCLK_DMA_REG CCM_PCCR0 +#define CCM_PCCR_HCLK_BROM_OFFSET 28 +#define CCM_PCCR_HCLK_BROM_REG CCM_PCCR0 +#define CCM_PCCR_HCLK_EMMA_OFFSET 27 +#define CCM_PCCR_HCLK_EMMA_REG CCM_PCCR0 +#define CCM_PCCR_HCLK_LCDC_OFFSET 26 +#define CCM_PCCR_HCLK_LCDC_REG CCM_PCCR0 +#define CCM_PCCR_HCLK_SLCDC_OFFSET 25 +#define CCM_PCCR_HCLK_SLCDC_REG CCM_PCCR0 +#define CCM_PCCR_HCLK_USBOTG_OFFSET 24 +#define CCM_PCCR_HCLK_USBOTG_REG CCM_PCCR0 +#define CCM_PCCR_HCLK_BMI_OFFSET 23 +#define CCM_PCCR_BMI_MASK (1 << CCM_PCCR_BMI_MASK) +#define CCM_PCCR_HCLK_BMI_REG CCM_PCCR0 +#define CCM_PCCR_PERCLK4_OFFSET 22 +#define CCM_PCCR_PERCLK4_REG CCM_PCCR0 +#define CCM_PCCR_SLCDC_OFFSET 21 +#define CCM_PCCR_SLCDC_REG CCM_PCCR0 +#define CCM_PCCR_FIRI_BAUD_OFFSET 20 +#define CCM_PCCR_FIRI_BAUD_MASK (1 << CCM_PCCR_FIRI_BAUD_MASK) +#define CCM_PCCR_FIRI_BAUD_REG CCM_PCCR0 +#define CCM_PCCR_NFC_OFFSET 19 +#define CCM_PCCR_NFC_REG CCM_PCCR0 +#define CCM_PCCR_LCDC_OFFSET 18 +#define CCM_PCCR_LCDC_REG CCM_PCCR0 +#define CCM_PCCR_SSI1_BAUD_OFFSET 17 +#define CCM_PCCR_SSI1_BAUD_REG CCM_PCCR0 +#define CCM_PCCR_SSI2_BAUD_OFFSET 16 +#define CCM_PCCR_SSI2_BAUD_REG CCM_PCCR0 +#define CCM_PCCR_EMMA_OFFSET 15 +#define CCM_PCCR_EMMA_REG CCM_PCCR0 +#define CCM_PCCR_USBOTG_OFFSET 14 +#define CCM_PCCR_USBOTG_REG CCM_PCCR0 +#define CCM_PCCR_DMA_OFFSET 13 +#define CCM_PCCR_DMA_REG CCM_PCCR0 +#define CCM_PCCR_I2C1_OFFSET 12 +#define CCM_PCCR_I2C1_REG CCM_PCCR0 +#define CCM_PCCR_GPIO_OFFSET 11 +#define CCM_PCCR_GPIO_REG CCM_PCCR0 +#define CCM_PCCR_SDHC2_OFFSET 10 +#define CCM_PCCR_SDHC2_REG CCM_PCCR0 +#define CCM_PCCR_SDHC1_OFFSET 9 +#define CCM_PCCR_SDHC1_REG CCM_PCCR0 +#define CCM_PCCR_FIRI_OFFSET 8 +#define CCM_PCCR_FIRI_MASK (1 << CCM_PCCR_BAUD_MASK) +#define CCM_PCCR_FIRI_REG CCM_PCCR0 +#define CCM_PCCR_SSI2_IPG_OFFSET 7 +#define CCM_PCCR_SSI2_REG CCM_PCCR0 +#define CCM_PCCR_SSI1_IPG_OFFSET 6 +#define CCM_PCCR_SSI1_REG CCM_PCCR0 +#define CCM_PCCR_CSPI2_OFFSET 5 +#define CCM_PCCR_CSPI2_REG CCM_PCCR0 +#define CCM_PCCR_CSPI1_OFFSET 4 +#define CCM_PCCR_CSPI1_REG CCM_PCCR0 +#define CCM_PCCR_UART4_OFFSET 3 +#define CCM_PCCR_UART4_REG CCM_PCCR0 +#define CCM_PCCR_UART3_OFFSET 2 +#define CCM_PCCR_UART3_REG CCM_PCCR0 +#define CCM_PCCR_UART2_OFFSET 1 +#define CCM_PCCR_UART2_REG CCM_PCCR0 +#define CCM_PCCR_UART1_OFFSET 0 +#define CCM_PCCR_UART1_REG CCM_PCCR0 + +#define CCM_PCCR_OWIRE_OFFSET 31 +#define CCM_PCCR_OWIRE_REG CCM_PCCR1 +#define CCM_PCCR_KPP_OFFSET 30 +#define CCM_PCCR_KPP_REG CCM_PCCR1 +#define CCM_PCCR_RTC_OFFSET 29 +#define CCM_PCCR_RTC_REG CCM_PCCR1 +#define CCM_PCCR_PWM_OFFSET 28 +#define CCM_PCCR_PWM_REG CCM_PCCR1 +#define CCM_PCCR_GPT3_OFFSET 27 +#define CCM_PCCR_GPT3_REG CCM_PCCR1 +#define CCM_PCCR_GPT2_OFFSET 26 +#define CCM_PCCR_GPT2_REG CCM_PCCR1 +#define CCM_PCCR_GPT1_OFFSET 25 +#define CCM_PCCR_GPT1_REG CCM_PCCR1 +#define CCM_PCCR_WDT_OFFSET 24 +#define CCM_PCCR_WDT_REG CCM_PCCR1 +#define CCM_PCCR_CSPI3_OFFSET 23 +#define CCM_PCCR_CSPI3_REG CCM_PCCR1 + +#define CCM_PCCR_CSPI1_MASK (1 << CCM_PCCR_CSPI1_OFFSET) +#define CCM_PCCR_CSPI2_MASK (1 << CCM_PCCR_CSPI2_OFFSET) +#define CCM_PCCR_CSPI3_MASK (1 << CCM_PCCR_CSPI3_OFFSET) +#define CCM_PCCR_DMA_MASK (1 << CCM_PCCR_DMA_OFFSET) +#define CCM_PCCR_EMMA_MASK (1 << CCM_PCCR_EMMA_OFFSET) +#define CCM_PCCR_GPIO_MASK (1 << CCM_PCCR_GPIO_OFFSET) +#define CCM_PCCR_GPT1_MASK (1 << CCM_PCCR_GPT1_OFFSET) +#define CCM_PCCR_GPT2_MASK (1 << CCM_PCCR_GPT2_OFFSET) +#define CCM_PCCR_GPT3_MASK (1 << CCM_PCCR_GPT3_OFFSET) +#define CCM_PCCR_HCLK_BROM_MASK (1 << CCM_PCCR_HCLK_BROM_OFFSET) +#define CCM_PCCR_HCLK_CSI_MASK (1 << CCM_PCCR_HCLK_CSI_OFFSET) +#define CCM_PCCR_HCLK_DMA_MASK (1 << CCM_PCCR_HCLK_DMA_OFFSET) +#define CCM_PCCR_HCLK_EMMA_MASK (1 << CCM_PCCR_HCLK_EMMA_OFFSET) +#define CCM_PCCR_HCLK_LCDC_MASK (1 << CCM_PCCR_HCLK_LCDC_OFFSET) +#define CCM_PCCR_HCLK_SLCDC_MASK (1 << CCM_PCCR_HCLK_SLCDC_OFFSET) +#define CCM_PCCR_HCLK_USBOTG_MASK (1 << CCM_PCCR_HCLK_USBOTG_OFFSET) +#define CCM_PCCR_I2C1_MASK (1 << CCM_PCCR_I2C1_OFFSET) +#define CCM_PCCR_KPP_MASK (1 << CCM_PCCR_KPP_OFFSET) +#define CCM_PCCR_LCDC_MASK (1 << CCM_PCCR_LCDC_OFFSET) +#define CCM_PCCR_NFC_MASK (1 << CCM_PCCR_NFC_OFFSET) +#define CCM_PCCR_OWIRE_MASK (1 << CCM_PCCR_OWIRE_OFFSET) +#define CCM_PCCR_PERCLK4_MASK (1 << CCM_PCCR_PERCLK4_OFFSET) +#define CCM_PCCR_PWM_MASK (1 << CCM_PCCR_PWM_OFFSET) +#define CCM_PCCR_RTC_MASK (1 << CCM_PCCR_RTC_OFFSET) +#define CCM_PCCR_SDHC1_MASK (1 << CCM_PCCR_SDHC1_OFFSET) +#define CCM_PCCR_SDHC2_MASK (1 << CCM_PCCR_SDHC2_OFFSET) +#define CCM_PCCR_SLCDC_MASK (1 << CCM_PCCR_SLCDC_OFFSET) +#define CCM_PCCR_SSI1_BAUD_MASK (1 << CCM_PCCR_SSI1_BAUD_OFFSET) +#define CCM_PCCR_SSI1_IPG_MASK (1 << CCM_PCCR_SSI1_IPG_OFFSET) +#define CCM_PCCR_SSI2_BAUD_MASK (1 << CCM_PCCR_SSI2_BAUD_OFFSET) +#define CCM_PCCR_SSI2_IPG_MASK (1 << CCM_PCCR_SSI2_IPG_OFFSET) +#define CCM_PCCR_UART1_MASK (1 << CCM_PCCR_UART1_OFFSET) +#define CCM_PCCR_UART2_MASK (1 << CCM_PCCR_UART2_OFFSET) +#define CCM_PCCR_UART3_MASK (1 << CCM_PCCR_UART3_OFFSET) +#define CCM_PCCR_UART4_MASK (1 << CCM_PCCR_UART4_OFFSET) +#define CCM_PCCR_USBOTG_MASK (1 << CCM_PCCR_USBOTG_OFFSET) +#define CCM_PCCR_WDT_MASK (1 << CCM_PCCR_WDT_OFFSET) + +#define CCM_CCSR_32KSR (1 << 15) + +#define CCM_CCSR_CLKMODE1 (1 << 9) +#define CCM_CCSR_CLKMODE0 (1 << 8) + +#define CCM_CCSR_CLKOSEL_OFFSET 0 +#define CCM_CCSR_CLKOSEL_MASK 0x1f + +#define SYS_FMCR 0x14/* Functional Muxing Control Reg */ +#define SYS_CHIP_ID 0x00/* The offset of CHIP ID register */ static int _clk_enable (struct clk *clk) {
arch/arm/mach-mx2/crm_regs.h deleted +0 -258
258 lines not on this page · raw message
Signature · 1 line
1.6.5.2
PATCH 3/20 imx/clock-imx21: use a macro to define registers
This way the base address isn't hard coded in each register definition
Signed-off-by Uwe Kleine-K?nig <[email protected]>
Cc Sascha Hauer <[email protected]>
Cc Russell King <[email protected]>
Cc Holger Schurig <[email protected]>
Cc Rabin Vincent <[email protected]>
--- arch/arm/mach-mx2/clock_imx21.c | 30 ++++++++++++++++-------------- 1 files changed, 16 insertions(+), 14 deletions(-)
arch/arm/mach-mx2/clock_imx21.c +16 -14
@@ -28,21 +28,23 @@#include <asm/clkdev.h> #include <asm/div64.h> +#define IO_ADDR_CCM (off) (IO_ADDRESS(CCM_BASE_ADDR) + (off)) +/* Register offsets */ -#define CCM_CSCR (IO_ADDRESS(CCM_BASE_ADDR) + 0x0) -#define CCM_MPCTL0 (IO_ADDRESS(CCM_BASE_ADDR) + 0x4) -#define CCM_MPCTL1 (IO_ADDRESS(CCM_BASE_ADDR) + 0x8) -#define CCM_SPCTL0 (IO_ADDRESS(CCM_BASE_ADDR) + 0xC) -#define CCM_SPCTL1 (IO_ADDRESS(CCM_BASE_ADDR) + 0x10) -#define CCM_OSC26MCTL (IO_ADDRESS(CCM_BASE_ADDR) + 0x14) -#define CCM_PCDR0 (IO_ADDRESS(CCM_BASE_ADDR) + 0x18) -#define CCM_PCDR1 (IO_ADDRESS(CCM_BASE_ADDR) + 0x1c) -#define CCM_PCCR0 (IO_ADDRESS(CCM_BASE_ADDR) + 0x20) -#define CCM_PCCR1 (IO_ADDRESS(CCM_BASE_ADDR) + 0x24) -#define CCM_CCSR (IO_ADDRESS(CCM_BASE_ADDR) + 0x28) -#define CCM_PMCTL (IO_ADDRESS(CCM_BASE_ADDR) + 0x2c) -#define CCM_PMCOUNT (IO_ADDRESS(CCM_BASE_ADDR) + 0x30) -#define CCM_WKGDCTL (IO_ADDRESS(CCM_BASE_ADDR) + 0x34) +#define CCM_CSCR IO_ADDR_CCM(0x0) +#define CCM_MPCTL0 IO_ADDR_CCM(0x4) +#define CCM_MPCTL1 IO_ADDR_CCM(0x8) +#define CCM_SPCTL0 IO_ADDR_CCM(0xc) +#define CCM_SPCTL1 IO_ADDR_CCM(0x10) +#define CCM_OSC26MCTL IO_ADDR_CCM(0x14) +#define CCM_PCDR0 IO_ADDR_CCM(0x18) +#define CCM_PCDR1 IO_ADDR_CCM(0x1c) +#define CCM_PCCR0 IO_ADDR_CCM(0x20) +#define CCM_PCCR1 IO_ADDR_CCM(0x24) +#define CCM_CCSR IO_ADDR_CCM(0x28) +#define CCM_PMCTL IO_ADDR_CCM(0x2c) +#define CCM_PMCOUNT IO_ADDR_CCM(0x30) +#define CCM_WKGDCTL IO_ADDR_CCM(0x34)#define CCM_CSCR_PRESC_OFFSET 29#define CCM_CSCR_PRESC_MASK (0x7 << CCM_CSCR_PRESC_OFFSET)
Signature · 1 line
1.6.5.2
PATCH 4/20 imx/clock-imx27: use a macro to define registers
This way the base address isn't hard coded in each register definition
Signed-off-by Uwe Kleine-K?nig <[email protected]>
Cc Sascha Hauer <[email protected]>
Cc Russell King <[email protected]>
Cc Rabin Vincent <[email protected]>
Cc Javier Martin <[email protected]>
Cc Valentin Longchamp <[email protected]>
--- arch/arm/mach-mx2/clock_imx27.c | 30 ++++++++++++++++-------------- 1 files changed, 16 insertions(+), 14 deletions(-)
arch/arm/mach-mx2/clock_imx27.c +16 -14
@@ -29,21 +29,23 @@#include <mach/common.h> #include <mach/hardware.h> +#define IO_ADDR_CCM (off) (IO_ADDRESS(CCM_BASE_ADDR) + (off)) +/* Register offsets */ -#define CCM_CSCR (IO_ADDRESS(CCM_BASE_ADDR) + 0x0) -#define CCM_MPCTL0 (IO_ADDRESS(CCM_BASE_ADDR) + 0x4) -#define CCM_MPCTL1 (IO_ADDRESS(CCM_BASE_ADDR) + 0x8) -#define CCM_SPCTL0 (IO_ADDRESS(CCM_BASE_ADDR) + 0xC) -#define CCM_SPCTL1 (IO_ADDRESS(CCM_BASE_ADDR) + 0x10) -#define CCM_OSC26MCTL (IO_ADDRESS(CCM_BASE_ADDR) + 0x14) -#define CCM_PCDR0 (IO_ADDRESS(CCM_BASE_ADDR) + 0x18) -#define CCM_PCDR1 (IO_ADDRESS(CCM_BASE_ADDR) + 0x1c) -#define CCM_PCCR0 (IO_ADDRESS(CCM_BASE_ADDR) + 0x20) -#define CCM_PCCR1 (IO_ADDRESS(CCM_BASE_ADDR) + 0x24) -#define CCM_CCSR (IO_ADDRESS(CCM_BASE_ADDR) + 0x28) -#define CCM_PMCTL (IO_ADDRESS(CCM_BASE_ADDR) + 0x2c) -#define CCM_PMCOUNT (IO_ADDRESS(CCM_BASE_ADDR) + 0x30) -#define CCM_WKGDCTL (IO_ADDRESS(CCM_BASE_ADDR) + 0x34) +#define CCM_CSCR IO_ADDR_CCM(0x0) +#define CCM_MPCTL0 IO_ADDR_CCM(0x4) +#define CCM_MPCTL1 IO_ADDR_CCM(0x8) +#define CCM_SPCTL0 IO_ADDR_CCM(0xc) +#define CCM_SPCTL1 IO_ADDR_CCM(0x10) +#define CCM_OSC26MCTL IO_ADDR_CCM(0x14) +#define CCM_PCDR0 IO_ADDR_CCM(0x18) +#define CCM_PCDR1 IO_ADDR_CCM(0x1c) +#define CCM_PCCR0 IO_ADDR_CCM(0x20) +#define CCM_PCCR1 IO_ADDR_CCM(0x24) +#define CCM_CCSR IO_ADDR_CCM(0x28) +#define CCM_PMCTL IO_ADDR_CCM(0x2c) +#define CCM_PMCOUNT IO_ADDR_CCM(0x30) +#define CCM_WKGDCTL IO_ADDR_CCM(0x34)#define CCM_CSCR_UPDATE_DIS (1 << 31)#define CCM_CSCR_SSI2 (1 << 23)
Signature · 1 line
1.6.5.2
PATCH 5/20 imx/mach-mx2: use constants namespaced by the corresponding SOC (easy part)
This just leaves devices.c, generic.c and serial.c to clean up. As these files are used on more than one SOC they need some more work.
Signed-off-by Uwe Kleine-K?nig <[email protected]>
Cc Holger Schurig <[email protected]>
Cc Rabin Vincent <[email protected]>
Cc Javier Martin <[email protected]>
Cc Valentin Longchamp <[email protected]>
Cc Jean Delvare <[email protected]>
Cc Eric Benard <[email protected]>
Cc Ivo Clarysse <[email protected]>
Cc Vladimir Barinov <[email protected]>
Cc Daniel Schaeffer <[email protected]>
Cc Simon POLETTE <spolette@adnlysd018.(none)>
Cc Fabio Estevam <[email protected]>
Cc Alan Carvalho de Assis <[email protected]>
Cc Luotao Fu <[email protected]>
--- arch/arm/mach-mx2/clock_imx21.c | 5 +++-- arch/arm/mach-mx2/clock_imx27.c | 5 +++-- arch/arm/mach-mx2/cpu_imx27.c | 2 +- arch/arm/mach-mx2/eukrea_cpuimx27.c | 12 ++++++------ arch/arm/mach-mx2/mx21ads.c | 10 +++++----- arch/arm/mach-mx2/mx27ads.c | 6 +++--- arch/arm/mach-mx2/mx27lite.c | 4 ++-- arch/arm/mach-mx2/mx27pdk.c | 4 ++-- arch/arm/mach-mx2/mxt_td60.c | 4 ++-- arch/arm/mach-mx2/pca100.c | 4 ++-- arch/arm/mach-mx2/pcm038.c | 8 ++++---- arch/arm/mach-mx2/pcm970-baseboard.c | 4 ++-- 12 files changed, 35 insertions(+), 33 deletions(-)
arch/arm/mach-mx2/clock_imx21.c +3 -2
@@ -28,7 +28,7 @@#include <asm/clkdev.h> #include <asm/div64.h> -#define IO_ADDR_CCM (off) (IO_ADDRESS(CCM_BASE_ADDR) + (off)) +#define IO_ADDR_CCM (off) (IO_ADDRESS(IMX21_CCM_BASE_ADDR) + (off))/* Register offsets */ #define CCM_CSCR IO_ADDR_CCM(0x0)
@@ -1235,6 +1235,7 @@ int __init mx21_clocks_init(unsigned long lref, unsigned long href)clk_enable (&uart_clk[0 ]);#endif -mxc_timer_init (&gpt_clk[0 ],IO_ADDRESS (GPT1_BASE_ADDR ),MXC_INT_GPT1 ); +mxc_timer_init (&gpt_clk[0 ],IO_ADDRESS (MX21_GPT1_BASE_ADDR ), +MX21_INT_GPT1 );return 0 ; }
arch/arm/mach-mx2/clock_imx27.c +3 -2
@@ -29,7 +29,7 @@#include <mach/common.h> #include <mach/hardware.h> -#define IO_ADDR_CCM (off) (IO_ADDRESS(CCM_BASE_ADDR) + (off)) +#define IO_ADDR_CCM (off) (IO_ADDRESS(MX27_CCM_BASE_ADDR) + (off))/* Register offsets */ #define CCM_CSCR IO_ADDR_CCM(0x0)
@@ -757,7 +757,8 @@ int __init mx27_clocks_init(unsigned long fref)clk_enable (&uart1_clk);#endif -mxc_timer_init (&gpt1_clk,IO_ADDRESS (GPT1_BASE_ADDR ),MXC_INT_GPT1 ); +mxc_timer_init (&gpt1_clk,IO_ADDRESS (MX27_GPT1_BASE_ADDR ), +MX27_INT_GPT1 );return 0 ; }
arch/arm/mach-mx2/cpu_imx27.c +1 -1
@@ -39,7 +39,7 @@ static void query_silicon_parameter(void)* the silicon revision very early we read it here to * avoid any further hooks */ - val =__raw_readl (IO_ADDRESS (SYSCTRL_BASE_ADDR ) +SYS_CHIP_ID ); + val =__raw_readl (IO_ADDRESS (MX27_SYSCTRL_BASE_ADDR ) +SYS_CHIP_ID ); cpu_silicon_rev = (int )(val >>28 ); cpu_partnumber = (int )((val >>12 ) &0xFFFF );
arch/arm/mach-mx2/eukrea_cpuimx27.c +6 -6
@@ -142,28 +142,28 @@ static struct i2c_board_info eukrea_cpuimx27_i2c_devices[] = { #if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE) static struct plat_serial8250_port serial_platform_data[] = { { - .mapbase = (unsigned long)(CS3_BASE_ADDR + 0x200000), + .mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x200000), .irq = IRQ_GPIOB(23), .uartclk = 14745600, .regshift = 1, .iotype = UPIO_MEM, .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP, }, { - .mapbase = (unsigned long)(CS3_BASE_ADDR + 0x400000), + .mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x400000), .irq = IRQ_GPIOB(22), .uartclk = 14745600, .regshift = 1, .iotype = UPIO_MEM, .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP, }, { - .mapbase = (unsigned long)(CS3_BASE_ADDR + 0x800000), + .mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x800000), .irq = IRQ_GPIOB(27), .uartclk = 14745600, .regshift = 1, .iotype = UPIO_MEM, .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP, }, { - .mapbase = (unsigned long)(CS3_BASE_ADDR + 0x1000000), + .mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x1000000), .irq = IRQ_GPIOB(30), .uartclk = 14745600, .regshift = 1,
@@ -224,8 +224,8 @@ static struct sys_timer eukrea_cpuimx27_timer = { };MACHINE_START (CPUIMX27 ,"EUKREA CPUIMX27" ) - .phys_io = AIPI_BASE_ADDR, - .io_pg_offst = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc, + .phys_io = MX27_AIPI_BASE_ADDR, + .io_pg_offst = ((MX27_AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc, .boot_params = PHYS_OFFSET + 0x100, .map_io = mx27_map_io, .init_irq = mx27_init_irq,
arch/arm/mach-mx2/mx21ads.c +5 -5
@@ -118,8 +118,8 @@ static struct physmap_flash_data mx21ads_flash_data = { };static struct resource mx21ads_flash_resource = { - .start =CS0_BASE_ADDR , - .end =CS0_BASE_ADDR +0x02000000 -1 , + .start =MX21_CS0_BASE_ADDR , + .end =MX21_CS0_BASE_ADDR +0x02000000 -1 , .flags =IORESOURCE_MEM , };
@@ -242,7 +242,7 @@ static struct map_desc mx21ads_io_desc[] __initdata = {*/ { .virtual = MX21ADS_MMIO_BASE_ADDR, - .pfn = __phys_to_pfn(CS1_BASE_ADDR), + .pfn = __phys_to_pfn(MX21_CS1_BASE_ADDR), .length = MX21ADS_MMIO_SIZE, .type = MT_DEVICE, },
@@ -284,8 +284,8 @@ static struct sys_timer mx21ads_timer = {MACHINE_START (MX21ADS ,"Freescale i.MX21ADS" )/* maintainer: Freescale Semiconductor, Inc. */ - .phys_io = AIPI_BASE_ADDR, - .io_pg_offst = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc, + .phys_io = MX21_AIPI_BASE_ADDR, + .io_pg_offst = ((MX21_AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc, .boot_params = PHYS_OFFSET + 0x100, .map_io = mx21ads_map_io, .init_irq = mx21_init_irq,
arch/arm/mach-mx2/mx27ads.c +3 -3
@@ -320,7 +320,7 @@ static struct sys_timer mx27ads_timer = {static struct map_desc mx27ads_io_desc[]__initdata = { { .virtual =PBC_BASE_ADDRESS , - .pfn =__phys_to_pfn (CS4_BASE_ADDR ), + .pfn =__phys_to_pfn (MX27_CS4_BASE_ADDR ), .length =SZ_1M , .type =MT_DEVICE , },
@@ -334,8 +334,8 @@ static void __init mx27ads_map_io(void)MACHINE_START (MX27ADS ,"Freescale i.MX27ADS" )/* maintainer: Freescale Semiconductor, Inc. */ - .phys_io = AIPI_BASE_ADDR, - .io_pg_offst = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc, + .phys_io = MX27_AIPI_BASE_ADDR, + .io_pg_offst = ((MX27_AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc, .boot_params = PHYS_OFFSET + 0x100, .map_io = mx27ads_map_io, .init_irq = mx27_init_irq,
arch/arm/mach-mx2/mx27lite.c +2 -2
@@ -85,8 +85,8 @@ static struct sys_timer mx27lite_timer = { };MACHINE_START (IMX27LITE ,"LogicPD i.MX27LITE" ) - .phys_io = AIPI_BASE_ADDR, - .io_pg_offst = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc, + .phys_io = MX27_AIPI_BASE_ADDR, + .io_pg_offst = ((MX27_AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc, .boot_params = PHYS_OFFSET + 0x100, .map_io = mx27_map_io, .init_irq = mx27_init_irq,
arch/arm/mach-mx2/mx27pdk.c +2 -2
@@ -85,8 +85,8 @@ static struct sys_timer mx27pdk_timer = {MACHINE_START (MX27_3DS ,"Freescale MX27PDK" )/* maintainer: Freescale Semiconductor, Inc. */ - .phys_io = AIPI_BASE_ADDR, - .io_pg_offst = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc, + .phys_io = MX27_AIPI_BASE_ADDR, + .io_pg_offst = ((MX27_AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc, .boot_params = PHYS_OFFSET + 0x100, .map_io = mx27_map_io, .init_irq = mx27_init_irq,
arch/arm/mach-mx2/mxt_td60.c +2 -2
@@ -308,8 +308,8 @@ static struct sys_timer mxt_td60_timer = {MACHINE_START (MXT_TD60 ,"Maxtrack i-MXT TD60" )/* maintainer: Maxtrack Industrial */ - .phys_io = AIPI_BASE_ADDR, - .io_pg_offst = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc, + .phys_io = MX27_AIPI_BASE_ADDR, + .io_pg_offst = ((MX27_AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc, .boot_params = PHYS_OFFSET + 0x100, .map_io = mx27_map_io, .init_irq = mx27_init_irq,
arch/arm/mach-mx2/pca100.c +2 -2
@@ -233,8 +233,8 @@ static struct sys_timer pca100_timer = { };MACHINE_START (PCA100 ,"phyCARD-i.MX27" ) - .phys_io = AIPI_BASE_ADDR, - .io_pg_offst = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc, + .phys_io = MX27_AIPI_BASE_ADDR, + .io_pg_offst = ((MX27_AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc, .boot_params = PHYS_OFFSET + 0x100, .map_io = mx27_map_io, .init_irq = mx27_init_irq,
arch/arm/mach-mx2/pcm038.c +4 -4
@@ -108,8 +108,8 @@ static struct platdata_mtd_ram pcm038_sram_data = { };static struct resource pcm038_sram_resource = { - .start =CS1_BASE_ADDR , - .end =CS1_BASE_ADDR +512 *1024 -1 , + .start =MX27_CS1_BASE_ADDR , + .end =MX27_CS1_BASE_ADDR +512 *1024 -1 , .flags =IORESOURCE_MEM , };
@@ -328,8 +328,8 @@ static struct sys_timer pcm038_timer = { };MACHINE_START (PCM038 ,"phyCORE-i.MX27" ) - .phys_io = AIPI_BASE_ADDR, - .io_pg_offst = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc, + .phys_io = MX27_AIPI_BASE_ADDR, + .io_pg_offst = ((MX27_AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc, .boot_params = PHYS_OFFSET + 0x100, .map_io = mx27_map_io, .init_irq = mx27_init_irq,
arch/arm/mach-mx2/pcm970-baseboard.c +2 -2
@@ -190,8 +190,8 @@ static struct imx_fb_platform_data pcm038_fb_data = {static struct resource pcm970_sja1000_resources[] = { { - .start =CS4_BASE_ADDR , - .end =CS4_BASE_ADDR +0x100 -1 , + .start =MX27_CS4_BASE_ADDR , + .end =MX27_CS4_BASE_ADDR +0x100 -1 , .flags =IORESOURCE_MEM , }, { .start =IRQ_GPIOE (19 ),
Signature · 1 line
1.6.5.2
PATCH 6/20 imx/mach-mx3: use constants namespaced by the corresponding SOC (easy part)
This just leaves cpu.c, devices.c and mm.c to clean up. As these files are used on more than one SOC they need some more work.
Signed-off-by Uwe Kleine-K?nig <[email protected]>
Cc Russell King <[email protected]>
Cc Alberto Panizzo <[email protected]>
Cc Valentin Longchamp <[email protected]>
Cc Daniel Mack <[email protected]>
Cc Guennadi Liakhovetski <[email protected]>
Cc Yoichi Yuasa <[email protected]>
Cc Mark Brown <[email protected]>
Cc Magnus Lilja <[email protected]>
Cc Fabio Estevam <[email protected]>
Cc Sascha Hauer <[email protected]>
Cc Harro Haan <[email protected]>
Cc Jean Delvare <[email protected]>
Cc Luotao Fu <[email protected]>
Cc Ilya Yanok <[email protected]>
--- arch/arm/mach-mx3/armadillo5x0.c | 12 ++++++------ arch/arm/mach-mx3/clock-imx35.c | 4 ++-- arch/arm/mach-mx3/clock.c | 4 ++-- arch/arm/mach-mx3/crm_regs.h | 2 +- arch/arm/mach-mx3/iomux.c | 2 +- arch/arm/mach-mx3/kzmarm11.c | 20 ++++++++++---------- arch/arm/mach-mx3/mx31ads.c | 14 +++++++------- arch/arm/mach-mx3/mx31lilly.c | 8 ++++---- arch/arm/mach-mx3/mx31lite.c | 14 +++++++------- arch/arm/mach-mx3/mx31moboard.c | 4 ++-- arch/arm/mach-mx3/mx31pdk.c | 10 +++++----- arch/arm/mach-mx3/mx35pdk.c | 4 ++-- arch/arm/mach-mx3/pcm037.c | 16 ++++++++-------- arch/arm/mach-mx3/pcm043.c | 4 ++-- arch/arm/mach-mx3/qong.c | 14 +++++++------- 15 files changed, 66 insertions(+), 66 deletions(-)
arch/arm/mach-mx3/armadillo5x0.c +6 -6
@@ -182,8 +182,8 @@ static struct physmap_flash_data armadillo5x0_nor_flash_pdata = {static struct resource armadillo5x0_nor_flash_resource = { .flags =IORESOURCE_MEM , - .start =CS0_BASE_ADDR , - .end =CS0_BASE_ADDR +SZ_64M -1 , + .start =MX31_CS0_BASE_ADDR , + .end =MX31_CS0_BASE_ADDR +SZ_64M -1 , };static struct platform_device armadillo5x0_nor_flash = {
@@ -311,8 +311,8 @@ static struct imxmmc_platform_data sdhc_pdata = {*/ static struct resource armadillo5x0_smc911x_resources[] = { { - .start =CS3_BASE_ADDR , - .end =CS3_BASE_ADDR +SZ_32M -1 , + .start =MX31_CS3_BASE_ADDR , + .end =MX31_CS3_BASE_ADDR +SZ_32M -1 , .flags =IORESOURCE_MEM , }, { .start =IOMUX_TO_IRQ (MX31_PIN_GPIO1_0 ),
@@ -406,8 +406,8 @@ static struct sys_timer armadillo5x0_timer = {MACHINE_START (ARMADILLO5X0 ,"Armadillo-500" )/* Maintainer: Alberto Panizzo */ - .phys_io = AIPS1_BASE_ADDR, - .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, + .phys_io = MX31_AIPS1_BASE_ADDR, + .io_pg_offst = ((MX31_AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, .boot_params = PHYS_OFFSET + 0x00000100, .map_io = mx31_map_io, .init_irq = mx31_init_irq,
arch/arm/mach-mx3/clock-imx35.c +2 -2
@@ -28,7 +28,7 @@#include <mach/hardware.h> #include <mach/common.h> -#define CCM_BASE IO_ADDRESS(CCM_BASE_ADDR) +#define CCM_BASE IO_ADDRESS(MX35_CCM_BASE_ADDR)#define CCM_CCMR 0x00#define CCM_PDR0 0x04
@@ -504,7 +504,7 @@ int __init mx35_clocks_init()__raw_writel ((3 <<26 ) | ll,CCM_BASE +CCM_CGR2 );__raw_writel (0 ,CCM_BASE +CCM_CGR3 ); -mxc_timer_init (&gpt_clk,IO_ADDRESS (GPT1_BASE_ADDR ),MXC_INT_GPT ); +mxc_timer_init (&gpt_clk,IO_ADDRESS (MX35_GPT1_BASE_ADDR ),MX35_INT_GPT );return 0 ; }
arch/arm/mach-mx3/clock.c +2 -2
@@ -618,14 +618,14 @@ int __init mx31_clocks_init(unsigned long fref)mx31_read_cpu_rev (); -if (mx31_revision () >=CHIP_REV_2_0 ) { +if (mx31_revision () >=MX31_CHIP_REV_2_0 ) { reg =__raw_readl (MXC_CCM_PMCR1 );/* No PLL restart on DVFS switch; enable auto EMI handshake */ reg |=MXC_CCM_PMCR1_PLLRDIS |MXC_CCM_PMCR1_EMIRQ_EN ;__raw_writel (reg,MXC_CCM_PMCR1 ); } -mxc_timer_init (&ipg_clk,IO_ADDRESS (GPT1_BASE_ADDR ),MXC_INT_GPT ); +mxc_timer_init (&ipg_clk,IO_ADDRESS (MX31_GPT1_BASE_ADDR ),MX31_INT_GPT );return 0 ; }
arch/arm/mach-mx3/crm_regs.h +1 -1
@@ -24,7 +24,7 @@#define CKIH_CLK_FREQ_27MHZ 27000000#define CKIL_CLK_FREQ 32768 -#define MXC_CCM_BASE IO_ADDRESS(CCM_BASE_ADDR) +#define MXC_CCM_BASE IO_ADDRESS(MX31_CCM_BASE_ADDR)/* Register addresses */ #define MXC_CCM_CCMR (MXC_CCM_BASE + 0x00)
arch/arm/mach-mx3/iomux.c +1 -1
@@ -29,7 +29,7 @@/* * IOMUX register (base) addresses */ -#define IOMUX_BASE IO_ADDRESS(IOMUXC_BASE_ADDR) +#define IOMUX_BASE IO_ADDRESS(MX31_IOMUXC_BASE_ADDR)#define IOMUXINT_OBS1 (IOMUX_BASE + 0x000)#define IOMUXINT_OBS2 (IOMUX_BASE + 0x004)#define IOMUXGPR (IOMUX_BASE + 0x008)
arch/arm/mach-mx3/kzmarm11.c +10 -10
@@ -128,8 +128,8 @@ static struct smsc911x_platform_config kzm_smsc9118_config = {static struct resource kzm_smsc9118_resources[] = { { - .start =CS5_BASE_ADDR , - .end =CS5_BASE_ADDR +SZ_128K -1 , + .start =MX31_CS5_BASE_ADDR , + .end =MX31_CS5_BASE_ADDR +SZ_128K -1 , .flags =IORESOURCE_MEM , }, {
@@ -222,15 +222,15 @@ static void __init kzm_board_init(void)*/ static struct map_desc kzm_io_desc[]__initdata = { { - .virtual =CS4_BASE_ADDR_VIRT , - .pfn =__phys_to_pfn (CS4_BASE_ADDR ), - .length =CS4_SIZE , + .virtual =MX31_CS4_BASE_ADDR_VIRT , + .pfn =__phys_to_pfn (MX31_CS4_BASE_ADDR ), + .length =MX31_CS4_SIZE , .type =MT_DEVICE }, { - .virtual =CS5_BASE_ADDR_VIRT , - .pfn =__phys_to_pfn (CS5_BASE_ADDR ), - .length =CS5_SIZE , + .virtual =MX31_CS5_BASE_ADDR_VIRT , + .pfn =__phys_to_pfn (MX31_CS5_BASE_ADDR ), + .length =MX31_CS5_SIZE , .type =MT_DEVICE }, };
@@ -258,8 +258,8 @@ static struct sys_timer kzm_timer = {* initialize __mach_desc_KZM_ARM11_01 data structure. */ MACHINE_START (KZM_ARM11_01 ,"Kyoto Microcomputer Co., Ltd. KZM-ARM11-01" ) - .phys_io = AIPS1_BASE_ADDR, - .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, + .phys_io = MX31_AIPS1_BASE_ADDR, + .io_pg_offst = ((MX31_AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, .boot_params = PHYS_OFFSET + 0x100, .map_io = kzm_map_io, .init_irq = mx31_init_irq,
arch/arm/mach-mx3/mx31ads.c +7 -7
@@ -60,7 +60,7 @@static struct plat_serial8250_port serial_platform_data[] = { { .membase = (void *)(PBC_BASE_ADDRESS +PBC_SC16C652_UARTA ), - .mapbase = (unsigned long )(CS4_BASE_ADDR +PBC_SC16C652_UARTA ), + .mapbase = (unsigned long )(MX31_CS4_BASE_ADDR +PBC_SC16C652_UARTA ), .irq =EXPIO_INT_XUART_INTA , .uartclk =14745600 , .regshift =0 ,
@@ -68,7 +68,7 @@ static struct plat_serial8250_port serial_platform_data[] = { .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_AUTO_IRQ, }, { .membase = (void *)(PBC_BASE_ADDRESS + PBC_SC16C652_UARTB), - .mapbase = (unsigned long)(CS4_BASE_ADDR + PBC_SC16C652_UARTB), + .mapbase = (unsigned long)(MX31_CS4_BASE_ADDR + PBC_SC16C652_UARTB), .irq = EXPIO_INT_XUART_INTB, .uartclk = 14745600, .regshift = 0,
@@ -494,9 +494,9 @@ static void mxc_init_i2c(void)*/ static struct map_desc mx31ads_io_desc[]__initdata = { { - .virtual =CS4_BASE_ADDR_VIRT , - .pfn =__phys_to_pfn (CS4_BASE_ADDR ), - .length =CS4_SIZE /2 , + .virtual =MX31_CS4_BASE_ADDR_VIRT , + .pfn =__phys_to_pfn (MX31_CS4_BASE_ADDR ), + .length =MX31_CS4_SIZE /2 , .type =MT_DEVICE }, };
@@ -541,8 +541,8 @@ static struct sys_timer mx31ads_timer = {*/ MACHINE_START (MX31ADS ,"Freescale MX31ADS" )/* Maintainer: Freescale Semiconductor, Inc. */ - .phys_io = AIPS1_BASE_ADDR, - .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, + .phys_io = MX31_AIPS1_BASE_ADDR, + .io_pg_offst = ((MX31_AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, .boot_params = PHYS_OFFSET + 0x100, .map_io = mx31ads_map_io, .init_irq = mx31ads_init_irq,
arch/arm/mach-mx3/mx31lilly.c +4 -4
@@ -57,8 +57,8 @@static struct resource smsc91x_resources[] = { { - .start =CS4_BASE_ADDR , - .end =CS4_BASE_ADDR +0xffff , + .start =MX31_CS4_BASE_ADDR , + .end =MX31_CS4_BASE_ADDR +0xffff , .flags =IORESOURCE_MEM , }, {
@@ -195,8 +195,8 @@ static struct sys_timer mx31lilly_timer = { };MACHINE_START (LILLY1131 ,"INCO startec LILLY-1131" ) - .phys_io = AIPS1_BASE_ADDR, - .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, + .phys_io = MX31_AIPS1_BASE_ADDR, + .io_pg_offst = ((MX31_AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, .boot_params = PHYS_OFFSET + 0x100, .map_io = mx31_map_io, .init_irq = mx31_init_irq,
arch/arm/mach-mx3/mx31lite.c +7 -7
@@ -82,8 +82,8 @@ static struct smsc911x_platform_config smsc911x_config = {static struct resource smsc911x_resources[] = { { - .start =CS4_BASE_ADDR , - .end =CS4_BASE_ADDR +0x100 , + .start =MX31_CS4_BASE_ADDR , + .end =MX31_CS4_BASE_ADDR +0x100 , .flags =IORESOURCE_MEM , }, { .start =IOMUX_TO_IRQ (MX31_PIN_SFS6 ),
@@ -212,9 +212,9 @@ static struct platform_device physmap_flash_device = {*/ static struct map_desc mx31lite_io_desc[]__initdata = { { - .virtual =CS4_BASE_ADDR_VIRT , - .pfn =__phys_to_pfn (CS4_BASE_ADDR ), - .length =CS4_SIZE , + .virtual =MX31_CS4_BASE_ADDR_VIRT , + .pfn =__phys_to_pfn (MX31_CS4_BASE_ADDR ), + .length =MX31_CS4_SIZE , .type =MT_DEVICE } };
@@ -283,8 +283,8 @@ struct sys_timer mx31lite_timer = {MACHINE_START (MX31LITE ,"LogicPD i.MX31 SOM" )/* Maintainer: Freescale Semiconductor, Inc. */ - .phys_io = AIPS1_BASE_ADDR, - .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, + .phys_io = MX31_AIPS1_BASE_ADDR, + .io_pg_offst = ((MX31_AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, .boot_params = PHYS_OFFSET + 0x100, .map_io = mx31lite_map_io, .init_irq = mx31_init_irq,
arch/arm/mach-mx3/mx31moboard.c +2 -2
@@ -564,8 +564,8 @@ struct sys_timer mx31moboard_timer = {MACHINE_START (MX31MOBOARD ,"EPFL Mobots mx31moboard" )/* Maintainer: Valentin Longchamp, EPFL Mobots group */ - .phys_io = AIPS1_BASE_ADDR, - .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, + .phys_io = MX31_AIPS1_BASE_ADDR, + .io_pg_offst = ((MX31_AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, .boot_params = PHYS_OFFSET + 0x100, .map_io = mx31_map_io, .init_irq = mx31_init_irq,
arch/arm/mach-mx3/mx31pdk.c +5 -5
@@ -211,9 +211,9 @@ static int __init mx31pdk_init_expio(void)*/ static struct map_desc mx31pdk_io_desc[]__initdata = { { - .virtual =CS5_BASE_ADDR_VIRT , - .pfn =__phys_to_pfn (CS5_BASE_ADDR ), - .length =CS5_SIZE , + .virtual =MX31_CS5_BASE_ADDR_VIRT , + .pfn =__phys_to_pfn (MX31_CS5_BASE_ADDR ), + .length =MX31_CS5_SIZE , .type =MT_DEVICE , }, };
@@ -256,8 +256,8 @@ static struct sys_timer mx31pdk_timer = {*/ MACHINE_START (MX31_3DS ,"Freescale MX31PDK (3DS)" )/* Maintainer: Freescale Semiconductor, Inc. */ - .phys_io = AIPS1_BASE_ADDR, - .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, + .phys_io = MX31_AIPS1_BASE_ADDR, + .io_pg_offst = ((MX31_AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, .boot_params = PHYS_OFFSET + 0x100, .map_io = mx31pdk_map_io, .init_irq = mx31_init_irq,
arch/arm/mach-mx3/mx35pdk.c +2 -2
@@ -106,8 +106,8 @@ struct sys_timer mx35pdk_timer = {MACHINE_START (MX35_3DS ,"Freescale MX35PDK" )/* Maintainer: Freescale Semiconductor, Inc */ - .phys_io = AIPS1_BASE_ADDR, - .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, + .phys_io = MX35_AIPS1_BASE_ADDR, + .io_pg_offst = ((MX35_AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, .boot_params = PHYS_OFFSET + 0x100, .map_io = mx35_map_io, .init_irq = mx35_init_irq,
arch/arm/mach-mx3/pcm037.c +8 -8
@@ -248,8 +248,8 @@ static struct imxuart_platform_data uart_pdata = {static struct resource smsc911x_resources[] = { { - .start =CS1_BASE_ADDR +0x300 , - .end =CS1_BASE_ADDR +0x300 +SZ_64K -1 , + .start =MX31_CS1_BASE_ADDR +0x300 , + .end =MX31_CS1_BASE_ADDR +0x300 +SZ_64K -1 , .flags =IORESOURCE_MEM , }, { .start =IOMUX_TO_IRQ (MX31_PIN_GPIO3_1 ),
@@ -281,8 +281,8 @@ static struct platdata_mtd_ram pcm038_sram_data = { };static struct resource pcm038_sram_resource = { - .start =CS4_BASE_ADDR , - .end =CS4_BASE_ADDR +512 *1024 -1 , + .start =MX31_CS4_BASE_ADDR , + .end =MX31_CS4_BASE_ADDR +512 *1024 -1 , .flags =IORESOURCE_MEM , };
@@ -518,8 +518,8 @@ static struct mx3fb_platform_data mx3fb_pdata = {static struct resource pcm970_sja1000_resources[] = { { - .start =CS5_BASE_ADDR , - .end =CS5_BASE_ADDR +0x100 -1 , + .start =MX31_CS5_BASE_ADDR , + .end =MX31_CS5_BASE_ADDR +0x100 -1 , .flags =IORESOURCE_MEM , }, { .start =IOMUX_TO_IRQ (IOMUX_PIN (48 ,105 )),
@@ -618,8 +618,8 @@ struct sys_timer pcm037_timer = {MACHINE_START (PCM037 ,"Phytec Phycore pcm037" )/* Maintainer: Pengutronix */ - .phys_io = AIPS1_BASE_ADDR, - .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, + .phys_io = MX31_AIPS1_BASE_ADDR, + .io_pg_offst = ((MX31_AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, .boot_params = PHYS_OFFSET + 0x100, .map_io = mx31_map_io, .init_irq = mx31_init_irq,
arch/arm/mach-mx3/pcm043.c +2 -2
@@ -248,8 +248,8 @@ struct sys_timer pcm043_timer = {MACHINE_START (PCM043 ,"Phytec Phycore pcm043" )/* Maintainer: Pengutronix */ - .phys_io = AIPS1_BASE_ADDR, - .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, + .phys_io = MX35_AIPS1_BASE_ADDR, + .io_pg_offst = ((MX35_AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, .boot_params = PHYS_OFFSET + 0x100, .map_io = mx35_map_io, .init_irq = mx35_init_irq,
arch/arm/mach-mx3/qong.c +7 -7
@@ -43,7 +43,7 @@#define QONG_FPGA_VERSION (major, minor, rev) \ (((major & 0xF) << 12) | ((minor & 0xF) << 8) | (rev & 0xFF)) -#define QONG_FPGA_BASEADDR CS1_BASE_ADDR +#define QONG_FPGA_BASEADDR MX31_CS1_BASE_ADDR#define QONG_FPGA_PERIPH_SIZE (1 << 24)#define QONG_FPGA_CTRL_BASEADDR QONG_FPGA_BASEADDR
@@ -115,8 +115,8 @@ static struct physmap_flash_data qong_flash_data = { };static struct resource qong_flash_resource = { - .start =CS0_BASE_ADDR , - .end =CS0_BASE_ADDR +QONG_NOR_SIZE -1 , + .start =MX31_CS0_BASE_ADDR , + .end =MX31_CS0_BASE_ADDR +QONG_NOR_SIZE -1 , .flags =IORESOURCE_MEM , };
@@ -180,8 +180,8 @@ static struct platform_nand_data qong_nand_data = { };static struct resource qong_nand_resource = { - .start =CS3_BASE_ADDR , - .end =CS3_BASE_ADDR +SZ_32M -1 , + .start =MX31_CS3_BASE_ADDR , + .end =MX31_CS3_BASE_ADDR +SZ_32M -1 , .flags =IORESOURCE_MEM , };
@@ -275,8 +275,8 @@ static struct sys_timer qong_timer = {MACHINE_START (QONG ,"Dave/DENX QongEVB-LITE" )/* Maintainer: DENX Software Engineering GmbH */ - .phys_io = AIPS1_BASE_ADDR, - .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, + .phys_io = MX31_AIPS1_BASE_ADDR, + .io_pg_offst = ((MX31_AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, .boot_params = PHYS_OFFSET + 0x100, .map_io = mx31_map_io, .init_irq = mx31_init_irq,
Signature · 1 line
1.6.5.2
PATCH 7/20 imx/mx3: rename clock.c and iomux.c to {clock, iomux}-imx31.c
These files are only used on imx31. This makes the name consistent with the imx35 files.
Signed-off-by Uwe Kleine-K?nig <[email protected]>
Cc Sascha Hauer <[email protected]>
Cc Russell King <[email protected]>
Cc Daniel Mack <[email protected]>
Cc Fabio Estevam <[email protected]>
Cc Valentin Longchamp <[email protected]>
--- arch/arm/mach-mx3/Makefile | 2 +- arch/arm/mach-mx3/clock-imx31.c | 632 +++++++++++++++++++++++++++++++++++++++ arch/arm/mach-mx3/clock.c | 632 --------------------------------------- arch/arm/mach-mx3/iomux-imx31.c | 181 +++++++++++ arch/arm/mach-mx3/iomux.c | 181 ----------- 5 files changed, 814 insertions(+), 814 deletions(-) create mode 100644 arch/arm/mach-mx3/clock-imx31.c delete mode 100644 arch/arm/mach-mx3/clock.c create mode 100644 arch/arm/mach-mx3/iomux-imx31.c delete mode 100644 arch/arm/mach-mx3/iomux.c
arch/arm/mach-mx3/Makefile +1 -1
@@ -5,7 +5,7 @@ # Object file lists. obj-y := mm.o devices.o cpu.o -obj-$(CONFIG_ARCH_MX31) += clock.o iomux.o +obj-$(CONFIG_ARCH_MX31) += clock-imx31.o iomux-imx31.o obj-$(CONFIG_ARCH_MX35) += clock-imx35.o obj-$(CONFIG_MACH_MX31ADS) += mx31ads.o obj-$(CONFIG_MACH_MX31LILLY) += mx31lilly.o mx31lilly-db.o
arch/arm/mach-mx3/clock-imx31.c new file +632 -0
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arch/arm/mach-mx3/clock.c deleted +0 -632
632 lines not on this page · raw message
arch/arm/mach-mx3/iomux-imx31.c new file +181 -0
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arch/arm/mach-mx3/iomux.c deleted +0 -181
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Signature · 1 line
1.6.5.2
PATCH 8/20 imx/mx1: add newline at end of Makefile
Signed-off-by Uwe Kleine-K?nig <[email protected]>
Cc Sascha Hauer <[email protected]>
Cc Russell King <[email protected]>
Cc Paulius Zaleckas <[email protected]>
Cc Darius Augulis <[email protected]>
Cc Mauro Carvalho Chehab <[email protected]>
--- arch/arm/mach-mx1/Makefile | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-)
arch/arm/mach-mx1/Makefile +1 -1
@@ -11,4 +11,4 @@ obj-$(CONFIG_MX1_VIDEO) += ksym_mx1.o mx1_camera_fiq.o # Specific board support obj-$(CONFIG_ARCH_MX1ADS) += mx1ads.o -obj-$(CONFIG_MACH_SCB9328) += scb9328.o +obj-$(CONFIG_MACH_SCB9328) += scb9328.o
Signature · 1 line
1.6.5.2
PATCH 9/20 imx/mx1: rename files defining a machine to mach-$mach.c
Signed-off-by Uwe Kleine-K?nig <[email protected]>
Cc Sascha Hauer <[email protected]>
Cc Russell King <[email protected]>
Cc Paulius Zaleckas <[email protected]>
Cc Darius Augulis <[email protected]>
Cc Mauro Carvalho Chehab <[email protected]>
--- arch/arm/mach-mx1/Makefile | 4 +- arch/arm/mach-mx1/mach-mx1ads.c | 165 ++++++++++++++++++++++++++++++++++++++ arch/arm/mach-mx1/mach-scb9328.c | 158 ++++++++++++++++++++++++++++++++++++ arch/arm/mach-mx1/mx1ads.c | 165 -------------------------------------- arch/arm/mach-mx1/scb9328.c | 158 ------------------------------------ 5 files changed, 325 insertions(+), 325 deletions(-) create mode 100644 arch/arm/mach-mx1/mach-mx1ads.c create mode 100644 arch/arm/mach-mx1/mach-scb9328.c delete mode 100644 arch/arm/mach-mx1/mx1ads.c delete mode 100644 arch/arm/mach-mx1/scb9328.c
arch/arm/mach-mx1/Makefile +2 -2
@@ -10,5 +10,5 @@ obj-y += generic.o clock.o devices.o obj-$(CONFIG_MX1_VIDEO) += ksym_mx1.o mx1_camera_fiq.o # Specific board support -obj-$(CONFIG_ARCH_MX1ADS) += mx1ads.o -obj-$(CONFIG_MACH_SCB9328) += scb9328.o +obj-$(CONFIG_ARCH_MX1ADS) += mach-mx1ads.o +obj-$(CONFIG_MACH_SCB9328) += mach-scb9328.o
arch/arm/mach-mx1/mach-mx1ads.c new file +165 -0
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arch/arm/mach-mx1/mach-scb9328.c new file +158 -0
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arch/arm/mach-mx1/mx1ads.c deleted +0 -165
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arch/arm/mach-mx1/scb9328.c deleted +0 -158
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Signature · 1 line
1.6.5.2
PATCH 10/20 imx: rename Kconfig symbol for "Eukrea CPUIMX27 module"
Not using MACH_CPUIMX27 makes machine_is_cpuimx27 always return 0 independent of building support for this machine.
Signed-off-by Uwe Kleine-K?nig <[email protected]>
Cc Sascha Hauer <[email protected]>
Cc Russell King <[email protected]>
Cc Jean Delvare <[email protected]>
Cc Eric Benard <[email protected]>
--- arch/arm/mach-mx2/Kconfig | 6 +++--- arch/arm/mach-mx2/Makefile | 2 +- 2 files changed, 4 insertions(+), 4 deletions(-)
arch/arm/mach-mx2/Kconfig +3 -3
@@ -55,7 +55,7 @@ config MACH_PCM970_BASEBOARD endchoice -config MACH_EUKREA_CPUIMX27 +config MACH_CPUIMX27 bool "Eukrea CPUIMX27 module" depends on MACH_MX27 help
@@ -64,14 +64,14 @@ config MACH_EUKREA_CPUIMX27 config MACH_EUKREA_CPUIMX27_USESDHC2 bool "CPUIMX27 integrates SDHC2 module" - depends on MACH_EUKREA_CPUIMX27 + depends on MACH_CPUIMX27 help This adds support for the internal SDHC2 used on CPUIMX27 used for wifi or eMMC. choice prompt "Baseboard" - depends on MACH_EUKREA_CPUIMX27 + depends on MACH_CPUIMX27 default MACH_EUKREA_MBIMX27_BASEBOARD config MACH_EUKREA_MBIMX27_BASEBOARD
arch/arm/mach-mx2/Makefile +1 -1
@@ -17,7 +17,7 @@ obj-$(CONFIG_MACH_PCM038) += pcm038.o obj-$(CONFIG_MACH_PCM970_BASEBOARD) += pcm970-baseboard.o obj-$(CONFIG_MACH_MX27_3DS) += mx27pdk.o obj-$(CONFIG_MACH_MX27LITE) += mx27lite.o -obj-$(CONFIG_MACH_EUKREA_CPUIMX27) += eukrea_cpuimx27.o +obj-$(CONFIG_MACH_CPUIMX27) += eukrea_cpuimx27.o obj-$(CONFIG_MACH_EUKREA_MBIMX27_BASEBOARD) += eukrea_mbimx27-baseboard.o obj-$(CONFIG_MACH_PCA100) += pca100.o obj-$(CONFIG_MACH_MXT_TD60) += mxt_td60.o
Signature · 1 line
1.6.5.2
PATCH 11/20 imx: rename Kconfig symbol for "LogicPD MX27 LITEKIT platform"
Not using MACH_IMX27LITE makes machine_is_imx27lite always return 0 independent of building support for this machine.
Signed-off-by Uwe Kleine-K?nig <[email protected]>
Cc Sascha Hauer <[email protected]>
Cc Russell King <[email protected]>
Cc Daniel Schaeffer <[email protected]>
--- arch/arm/configs/mx27_defconfig | 2 +- arch/arm/mach-mx2/Kconfig | 2 +- arch/arm/mach-mx2/Makefile | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-)
arch/arm/configs/mx27_defconfig +1 -1
@@ -200,7 +200,7 @@ CONFIG_MACH_MX27ADS=y CONFIG_MACH_PCM038=y CONFIG_MACH_PCM970_BASEBOARD=y CONFIG_MACH_MX27_3DS=y -CONFIG_MACH_MX27LITE=y +CONFIG_MACH_IMX27LITE=y CONFIG_MXC_IRQ_PRIOR=y CONFIG_MXC_PWM=y
arch/arm/mach-mx2/Kconfig +1 -1
@@ -90,7 +90,7 @@ config MACH_MX27_3DS Include support for MX27PDK platform. This includes specific configurations for the board and its peripherals. -config MACH_MX27LITE +config MACH_IMX27LITE bool "LogicPD MX27 LITEKIT platform" depends on MACH_MX27 help
arch/arm/mach-mx2/Makefile +1 -1
@@ -16,7 +16,7 @@ obj-$(CONFIG_MACH_MX27ADS) += mx27ads.o obj-$(CONFIG_MACH_PCM038) += pcm038.o obj-$(CONFIG_MACH_PCM970_BASEBOARD) += pcm970-baseboard.o obj-$(CONFIG_MACH_MX27_3DS) += mx27pdk.o -obj-$(CONFIG_MACH_MX27LITE) += mx27lite.o +obj-$(CONFIG_MACH_IMX27LITE) += mx27lite.o obj-$(CONFIG_MACH_CPUIMX27) += eukrea_cpuimx27.o obj-$(CONFIG_MACH_EUKREA_MBIMX27_BASEBOARD) += eukrea_mbimx27-baseboard.o obj-$(CONFIG_MACH_PCA100) += pca100.o
Signature · 1 line
1.6.5.2
PATCH 12/20 imx/mx2: rename files defining a machine to mach-$mach.c
Signed-off-by Uwe Kleine-K?nig <[email protected]>
Cc Sascha Hauer <[email protected]>
Cc Russell King <[email protected]>
Cc Eric Benard <[email protected]>
--- arch/arm/mach-mx2/Makefile | 17 +- arch/arm/mach-mx2/eukrea_cpuimx27.c | 234 ------------------------ arch/arm/mach-mx2/mach-cpuimx27.c | 234 ++++++++++++++++++++++++ arch/arm/mach-mx2/mach-imx27lite.c | 95 ++++++++++ arch/arm/mach-mx2/mach-mx21ads.c | 294 +++++++++++++++++++++++++++++ arch/arm/mach-mx2/mach-mx27_3ds.c | 95 ++++++++++ arch/arm/mach-mx2/mach-mx27ads.c | 345 +++++++++++++++++++++++++++++++++++ arch/arm/mach-mx2/mach-mxt_td60.c | 319 ++++++++++++++++++++++++++++++++ arch/arm/mach-mx2/mach-pca100.c | 244 +++++++++++++++++++++++++ arch/arm/mach-mx2/mach-pcm038.c | 338 ++++++++++++++++++++++++++++++++++ arch/arm/mach-mx2/mx21ads.c | 294 ----------------------------- arch/arm/mach-mx2/mx27ads.c | 345 ----------------------------------- arch/arm/mach-mx2/mx27lite.c | 95 ---------- arch/arm/mach-mx2/mx27pdk.c | 95 ---------- arch/arm/mach-mx2/mxt_td60.c | 319 -------------------------------- arch/arm/mach-mx2/pca100.c | 244 ------------------------- arch/arm/mach-mx2/pcm038.c | 338 ---------------------------------- 17 files changed, 1972 insertions(+), 1973 deletions(-) delete mode 100644 arch/arm/mach-mx2/eukrea_cpuimx27.c create mode 100644 arch/arm/mach-mx2/mach-cpuimx27.c create mode 100644 arch/arm/mach-mx2/mach-imx27lite.c create mode 100644 arch/arm/mach-mx2/mach-mx21ads.c create mode 100644 arch/arm/mach-mx2/mach-mx27_3ds.c create mode 100644 arch/arm/mach-mx2/mach-mx27ads.c create mode 100644 arch/arm/mach-mx2/mach-mxt_td60.c create mode 100644 arch/arm/mach-mx2/mach-pca100.c create mode 100644 arch/arm/mach-mx2/mach-pcm038.c delete mode 100644 arch/arm/mach-mx2/mx21ads.c delete mode 100644 arch/arm/mach-mx2/mx27ads.c delete mode 100644 arch/arm/mach-mx2/mx27lite.c delete mode 100644 arch/arm/mach-mx2/mx27pdk.c delete mode 100644 arch/arm/mach-mx2/mxt_td60.c delete mode 100644 arch/arm/mach-mx2/pca100.c delete mode 100644 arch/arm/mach-mx2/pcm038.c
arch/arm/mach-mx2/Makefile +8 -9
@@ -11,14 +11,13 @@ obj-$(CONFIG_MACH_MX21) += clock_imx21.o obj-$(CONFIG_MACH_MX27) += cpu_imx27.o obj-$(CONFIG_MACH_MX27) += clock_imx27.o -obj-$(CONFIG_MACH_MX21ADS) += mx21ads.o -obj-$(CONFIG_MACH_MX27ADS) += mx27ads.o -obj-$(CONFIG_MACH_PCM038) += pcm038.o +obj-$(CONFIG_MACH_MX21ADS) += mach-mx21ads.o +obj-$(CONFIG_MACH_MX27ADS) += mach-mx27ads.o +obj-$(CONFIG_MACH_PCM038) += mach-pcm038.o obj-$(CONFIG_MACH_PCM970_BASEBOARD) += pcm970-baseboard.o -obj-$(CONFIG_MACH_MX27_3DS) += mx27pdk.o -obj-$(CONFIG_MACH_IMX27LITE) += mx27lite.o -obj-$(CONFIG_MACH_CPUIMX27) += eukrea_cpuimx27.o +obj-$(CONFIG_MACH_MX27_3DS) += mach-mx27_3ds.o +obj-$(CONFIG_MACH_IMX27LITE) += mach-imx27lite.o +obj-$(CONFIG_MACH_CPUIMX27) += mach-cpuimx27.o obj-$(CONFIG_MACH_EUKREA_MBIMX27_BASEBOARD) += eukrea_mbimx27-baseboard.o -obj-$(CONFIG_MACH_PCA100) += pca100.o -obj-$(CONFIG_MACH_MXT_TD60) += mxt_td60.o - +obj-$(CONFIG_MACH_PCA100) += mach-pca100.o +obj-$(CONFIG_MACH_MXT_TD60) += mach-mxt_td60.o
arch/arm/mach-mx2/eukrea_cpuimx27.c deleted +0 -234
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arch/arm/mach-mx2/mach-cpuimx27.c new file +234 -0
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arch/arm/mach-mx2/mach-imx27lite.c new file +95 -0
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arch/arm/mach-mx2/mach-mx21ads.c new file +294 -0
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arch/arm/mach-mx2/mach-mx27_3ds.c new file +95 -0
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arch/arm/mach-mx2/mach-mx27ads.c new file +345 -0
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arch/arm/mach-mx2/mach-mxt_td60.c new file +319 -0
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arch/arm/mach-mx2/mach-pca100.c new file +244 -0
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arch/arm/mach-mx2/mach-pcm038.c new file +338 -0
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arch/arm/mach-mx2/mx21ads.c deleted +0 -294
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arch/arm/mach-mx2/mx27ads.c deleted +0 -345
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arch/arm/mach-mx2/mx27lite.c deleted +0 -95
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arch/arm/mach-mx2/mx27pdk.c deleted +0 -95
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arch/arm/mach-mx2/mxt_td60.c deleted +0 -319
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1.6.5.2
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PATCH 13/20 imx/mx3: rename files defining a machine to mach-$mach.c
Signed-off-by Uwe Kleine-K?nig <[email protected]>
Cc Sascha Hauer <[email protected]>
Cc Russell King <[email protected]>
Cc Daniel Mack <[email protected]>
Cc Fabio Estevam <[email protected]>
Cc Valentin Longchamp <[email protected]>
--- arch/arm/mach-mx3/Makefile | 22 +- arch/arm/mach-mx3/armadillo5x0.c | 416 ---------------------- arch/arm/mach-mx3/kzmarm11.c | 268 -------------- arch/arm/mach-mx3/mach-armadillo5x0.c | 416 ++++++++++++++++++++++ arch/arm/mach-mx3/mach-kzm_arm11_01.c | 268 ++++++++++++++ arch/arm/mach-mx3/mach-mx31_3ds.c | 266 ++++++++++++++ arch/arm/mach-mx3/mach-mx31ads.c | 551 +++++++++++++++++++++++++++++ arch/arm/mach-mx3/mach-mx31lilly.c | 206 +++++++++++ arch/arm/mach-mx3/mach-mx31lite.c | 293 +++++++++++++++ arch/arm/mach-mx3/mach-mx31moboard.c | 575 ++++++++++++++++++++++++++++++ arch/arm/mach-mx3/mach-mx35pdk.c | 116 ++++++ arch/arm/mach-mx3/mach-pcm037.c | 628 +++++++++++++++++++++++++++++++++ arch/arm/mach-mx3/mach-pcm043.c | 259 ++++++++++++++ arch/arm/mach-mx3/mach-qong.c | 285 +++++++++++++++ arch/arm/mach-mx3/mx31ads.c | 551 ----------------------------- arch/arm/mach-mx3/mx31lilly.c | 206 ----------- arch/arm/mach-mx3/mx31lite.c | 293 --------------- arch/arm/mach-mx3/mx31moboard.c | 575 ------------------------------ arch/arm/mach-mx3/mx31pdk.c | 266 -------------- arch/arm/mach-mx3/mx35pdk.c | 116 ------ arch/arm/mach-mx3/pcm037.c | 628 --------------------------------- arch/arm/mach-mx3/pcm043.c | 259 -------------- arch/arm/mach-mx3/qong.c | 285 --------------- 23 files changed, 3874 insertions(+), 3874 deletions(-) delete mode 100644 arch/arm/mach-mx3/armadillo5x0.c delete mode 100644 arch/arm/mach-mx3/kzmarm11.c create mode 100644 arch/arm/mach-mx3/mach-armadillo5x0.c create mode 100644 arch/arm/mach-mx3/mach-kzm_arm11_01.c create mode 100644 arch/arm/mach-mx3/mach-mx31_3ds.c create mode 100644 arch/arm/mach-mx3/mach-mx31ads.c create mode 100644 arch/arm/mach-mx3/mach-mx31lilly.c create mode 100644 arch/arm/mach-mx3/mach-mx31lite.c create mode 100644 arch/arm/mach-mx3/mach-mx31moboard.c create mode 100644 arch/arm/mach-mx3/mach-mx35pdk.c create mode 100644 arch/arm/mach-mx3/mach-pcm037.c create mode 100644 arch/arm/mach-mx3/mach-pcm043.c create mode 100644 arch/arm/mach-mx3/mach-qong.c delete mode 100644 arch/arm/mach-mx3/mx31ads.c delete mode 100644 arch/arm/mach-mx3/mx31lilly.c delete mode 100644 arch/arm/mach-mx3/mx31lite.c delete mode 100644 arch/arm/mach-mx3/mx31moboard.c delete mode 100644 arch/arm/mach-mx3/mx31pdk.c delete mode 100644 arch/arm/mach-mx3/mx35pdk.c delete mode 100644 arch/arm/mach-mx3/pcm037.c delete mode 100644 arch/arm/mach-mx3/pcm043.c delete mode 100644 arch/arm/mach-mx3/qong.c
arch/arm/mach-mx3/Makefile +11 -11
@@ -7,16 +7,16 @@ obj-y := mm.o devices.o cpu.o obj-$(CONFIG_ARCH_MX31) += clock-imx31.o iomux-imx31.o obj-$(CONFIG_ARCH_MX35) += clock-imx35.o -obj-$(CONFIG_MACH_MX31ADS) += mx31ads.o +obj-$(CONFIG_MACH_MX31ADS) += mach-mx31ads.o obj-$(CONFIG_MACH_MX31LILLY) += mx31lilly.o mx31lilly-db.o -obj-$(CONFIG_MACH_MX31LITE) += mx31lite.o mx31lite-db.o -obj-$(CONFIG_MACH_PCM037) += pcm037.o -obj-$(CONFIG_MACH_PCM037_EET) += pcm037_eet.o -obj-$(CONFIG_MACH_MX31_3DS) += mx31pdk.o -obj-$(CONFIG_MACH_MX31MOBOARD) += mx31moboard.o mx31moboard-devboard.o \ +obj-$(CONFIG_MACH_MX31LITE) += mach-mx31lite.o mx31lite-db.o +obj-$(CONFIG_MACH_PCM037) += mach-pcm037.o +obj-$(CONFIG_MACH_PCM037_EET) += mach-pcm037_eet.o +obj-$(CONFIG_MACH_MX31_3DS) += mach-mx31pdk.o +obj-$(CONFIG_MACH_MX31MOBOARD) += mach-mx31moboard.o mx31moboard-devboard.o \ mx31moboard-marxbot.o -obj-$(CONFIG_MACH_QONG) += qong.o -obj-$(CONFIG_MACH_PCM043) += pcm043.o -obj-$(CONFIG_MACH_ARMADILLO5X0) += armadillo5x0.o -obj-$(CONFIG_MACH_MX35_3DS) += mx35pdk.o -obj-$(CONFIG_MACH_KZM_ARM11_01) += kzmarm11.o +obj-$(CONFIG_MACH_QONG) += mach-qong.o +obj-$(CONFIG_MACH_PCM043) += mach-pcm043.o +obj-$(CONFIG_MACH_ARMADILLO5X0) += mach-armadillo5x0.o +obj-$(CONFIG_MACH_MX35_3DS) += mach-mx35pdk.o +obj-$(CONFIG_MACH_KZM_ARM11_01) += mach-kzmarm11.o
arch/arm/mach-mx3/armadillo5x0.c deleted +0 -416
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arch/arm/mach-mx3/kzmarm11.c deleted +0 -268
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arch/arm/mach-mx3/mach-armadillo5x0.c new file +416 -0
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arch/arm/mach-mx3/mach-kzm_arm11_01.c new file +268 -0
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arch/arm/mach-mx3/mach-mx31_3ds.c new file +266 -0
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arch/arm/mach-mx3/mach-mx31ads.c new file +551 -0
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arch/arm/mach-mx3/mach-mx31lilly.c new file +206 -0
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arch/arm/mach-mx3/mach-mx31lite.c new file +293 -0
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arch/arm/mach-mx3/mach-mx31moboard.c new file +575 -0
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arch/arm/mach-mx3/mach-mx35pdk.c new file +116 -0
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arch/arm/mach-mx3/mach-pcm037.c new file +628 -0
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arch/arm/mach-mx3/mach-pcm043.c new file +259 -0
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arch/arm/mach-mx3/mach-qong.c new file +285 -0
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arch/arm/mach-mx3/mx31lilly.c deleted +0 -206
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1.6.5.2
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PATCH 14/20 imx: provide helper macro to define IO_ADDRESS
Signed-off-by Uwe Kleine-K?nig <[email protected]>
--- arch/arm/plat-mxc/include/mach/hardware.h | 4 ++++ 1 files changed, 4 insertions(+), 0 deletions(-)
arch/arm/plat-mxc/include/mach/hardware.h +4 -0
@@ -22,6 +22,10 @@#include <asm/sizes.h> +#define IMX_IO_ADDRESS (addr, module)\ + (((unsigned long)((addr) - (module ## _BASE_ADDR)) < module ## _SIZE) ?\ + (addr) - (module ## _BASE_ADDR) + (module ## _BASE_ADDR_VIRT) : 0) +#ifdef CONFIG_ARCH_MX3 #include <mach/mx3x.h> #include <mach/mx31.h>
Signature · 1 line
1.6.5.2
PATCH 15/20 imx21: define and use MX21_IO_ADDRESS
Signed-off-by Uwe Kleine-K?nig <[email protected]>
--- arch/arm/mach-mx2/clock_imx21.c | 4 ++-- arch/arm/plat-mxc/include/mach/mx21.h | 7 +++++++ 2 files changed, 9 insertions(+), 2 deletions(-)
arch/arm/mach-mx2/clock_imx21.c +2 -2
@@ -28,7 +28,7 @@#include <asm/clkdev.h> #include <asm/div64.h> -#define IO_ADDR_CCM (off) (IO_ADDRESS(IMX21_CCM_BASE_ADDR) + (off)) +#define IO_ADDR_CCM (off) (MX21_IO_ADDRESS(IMX21_CCM_BASE_ADDR) + (off))/* Register offsets */ #define CCM_CSCR IO_ADDR_CCM(0x0)
@@ -1235,7 +1235,7 @@ int __init mx21_clocks_init(unsigned long lref, unsigned long href)clk_enable (&uart_clk[0 ]);#endif -mxc_timer_init (&gpt_clk[0 ],IO_ADDRESS (MX21_GPT1_BASE_ADDR ), +mxc_timer_init (&gpt_clk[0 ],MX21_IO_ADDRESS (MX21_GPT1_BASE_ADDR ),MX21_INT_GPT1 );return 0 ; }
arch/arm/plat-mxc/include/mach/mx21.h +7 -0
@@ -92,6 +92,13 @@#define MX21_IRAM_BASE_ADDR 0xffffe800/* internal ram */ +#define MX21_IO_ADDRESS (x) \ + (void __force __iomem *) ( \ + IMX_IO_ADDRESS(x, MX21_AIPI) ?: \ + IMX_IO_ADDRESS(x, MX21_SAHB1) ?: \ + IMX_IO_ADDRESS(x, MX21_X_MEMC) ?: \ + 0xdeadbeef) +/* fixed interrupt numbers */ #define MX21_INT_CSPI3 6#define MX21_INT_GPIO 8
Signature · 1 line
1.6.5.2
PATCH 16/20 imx27: define and use MX27_IO_ADDRESS
Signed-off-by Uwe Kleine-K?nig <[email protected]>
--- arch/arm/mach-mx2/clock_imx27.c | 4 ++-- arch/arm/mach-mx2/cpu_imx27.c | 3 ++- arch/arm/plat-mxc/include/mach/mx27.h | 7 +++++++ 3 files changed, 11 insertions(+), 3 deletions(-)
arch/arm/mach-mx2/clock_imx27.c +2 -2
@@ -29,7 +29,7 @@#include <mach/common.h> #include <mach/hardware.h> -#define IO_ADDR_CCM (off) (IO_ADDRESS(MX27_CCM_BASE_ADDR) + (off)) +#define IO_ADDR_CCM (off) (MX27_IO_ADDRESS(MX27_CCM_BASE_ADDR) + (off))/* Register offsets */ #define CCM_CSCR IO_ADDR_CCM(0x0)
@@ -757,7 +757,7 @@ int __init mx27_clocks_init(unsigned long fref)clk_enable (&uart1_clk);#endif -mxc_timer_init (&gpt1_clk,IO_ADDRESS (MX27_GPT1_BASE_ADDR ), +mxc_timer_init (&gpt1_clk,MX27_IO_ADDRESS (MX27_GPT1_BASE_ADDR ),MX27_INT_GPT1 );return 0 ;
arch/arm/mach-mx2/cpu_imx27.c +2 -1
@@ -39,7 +39,8 @@ static void query_silicon_parameter(void)* the silicon revision very early we read it here to * avoid any further hooks */ - val =__raw_readl (IO_ADDRESS (MX27_SYSCTRL_BASE_ADDR ) +SYS_CHIP_ID ); + val =__raw_readl (MX27_IO_ADDRESS (MX27_SYSCTRL_BASE_ADDR + +SYS_CHIP_ID )); cpu_silicon_rev = (int )(val >>28 ); cpu_partnumber = (int )((val >>12 ) &0xFFFF );
arch/arm/plat-mxc/include/mach/mx27.h +7 -0
@@ -114,6 +114,13 @@/* IRAM */ #define MX27_IRAM_BASE_ADDR 0xffff4c00/* internal ram */ +#define MX27_IO_ADDRESS (x) \ + (void __force __iomem *) ( \ + IMX_IO_ADDRESS(x, MX27_AIPI) ?: \ + IMX_IO_ADDRESS(x, MX27_SAHB1) ?: \ + IMX_IO_ADDRESS(x, MX27_X_MEMC) ?: \ + 0xdeadbeef) +/* fixed interrupt numbers */ #define MX27_INT_I2C2 1#define MX27_INT_GPT6 2
Signature · 1 line
1.6.5.2
PATCH 17/20 imx31: define and use MX31_IO_ADDRESS
Signed-off-by Uwe Kleine-K?nig <[email protected]>
--- arch/arm/mach-mx3/clock-imx31.c | 3 ++- arch/arm/mach-mx3/crm_regs.h | 2 +- arch/arm/mach-mx3/iomux-imx31.c | 2 +- arch/arm/plat-mxc/include/mach/board-mx31ads.h | 2 +- arch/arm/plat-mxc/include/mach/mx31.h | 9 +++++++++ 5 files changed, 14 insertions(+), 4 deletions(-)
arch/arm/mach-mx3/clock-imx31.c +2 -1
@@ -625,7 +625,8 @@ int __init mx31_clocks_init(unsigned long fref)__raw_writel (reg,MXC_CCM_PMCR1 ); } -mxc_timer_init (&ipg_clk,IO_ADDRESS (MX31_GPT1_BASE_ADDR ),MX31_INT_GPT ); +mxc_timer_init (&ipg_clk,MX31_IO_ADDRESS (MX31_GPT1_BASE_ADDR ), +MX31_INT_GPT );return 0 ; }
arch/arm/mach-mx3/crm_regs.h +1 -1
@@ -24,7 +24,7 @@#define CKIH_CLK_FREQ_27MHZ 27000000#define CKIL_CLK_FREQ 32768 -#define MXC_CCM_BASE IO_ADDRESS(MX31_CCM_BASE_ADDR) +#define MXC_CCM_BASE MX31_IO_ADDRESS(MX31_CCM_BASE_ADDR)/* Register addresses */ #define MXC_CCM_CCMR (MXC_CCM_BASE + 0x00)
arch/arm/mach-mx3/iomux-imx31.c +1 -1
@@ -29,7 +29,7 @@/* * IOMUX register (base) addresses */ -#define IOMUX_BASE IO_ADDRESS(MX31_IOMUXC_BASE_ADDR) +#define IOMUX_BASE MX31_IO_ADDRESS(MX31_IOMUXC_BASE_ADDR)#define IOMUXINT_OBS1 (IOMUX_BASE + 0x000)#define IOMUXINT_OBS2 (IOMUX_BASE + 0x004)#define IOMUXGPR (IOMUX_BASE + 0x008)
arch/arm/plat-mxc/include/mach/board-mx31ads.h +1 -1
@@ -14,7 +14,7 @@#include <mach/hardware.h> /* Base address of PBC controller */ -#define PBC_BASE_ADDRESS IO_ADDRESS(CS4_BASE_ADDR) +#define PBC_BASE_ADDRESS MX31_CS4_BASE_ADDR_VIRT/* Offsets for the PBC Controller register */ /* PBC Board status register offset */
arch/arm/plat-mxc/include/mach/mx31.h +9 -0
@@ -109,6 +109,15 @@#define MX31_PCMCIA_MEM_BASE_ADDR 0xbc000000 +#define MX31_IO_ADDRESS (x) \ + (void __force __iomem *) ( \ + IMX_IO_ADDRESS(x, MX31_AIPS1) ?: \ + IMX_IO_ADDRESS(x, MX31_AIPS2) ?: \ + IMX_IO_ADDRESS(x, MX31_AVIC) ?: \ + IMX_IO_ADDRESS(x, MX31_X_MEMC) ?: \ + IMX_IO_ADDRESS(x, MX31_SPBA0) ?: \ + 0xdeadbeef) +#define MX31_INT_I2C3 3#define MX31_INT_I2C2 4#define MX31_INT_MPEG4_ENCODER 5
Signature · 1 line
1.6.5.2
PATCH 18/20 imx25: redefine MX25_IO_ADDRESS using IMX_IO_ADDRESS
Signed-off-by Uwe Kleine-K?nig <[email protected]>
--- arch/arm/plat-mxc/include/mach/mx25.h | 19 +++++-------------- 1 files changed, 5 insertions(+), 14 deletions(-)
arch/arm/plat-mxc/include/mach/mx25.h +5 -14
@@ -22,21 +22,12 @@#define MX25_GPIO3_BASE_ADDR_VIRT (MX25_AIPS2_BASE_ADDR_VIRT + 0xa4000)#define MX25_GPIO4_BASE_ADDR_VIRT (MX25_AIPS2_BASE_ADDR_VIRT + 0x9c000) -#define MX25_AIPS1_IO_ADDRESS (x) \ - (((x) - MX25_AIPS1_BASE_ADDR) + MX25_AIPS1_BASE_ADDR_VIRT) -#define MX25_AIPS2_IO_ADDRESS (x) \ - (((x) - MX25_AIPS2_BASE_ADDR) + MX25_AIPS2_BASE_ADDR_VIRT) -#define MX25_AVIC_IO_ADDRESS (x) \ - (((x) - MX25_AVIC_BASE_ADDR) + MX25_AVIC_BASE_ADDR_VIRT) - -#define __in_range (addr, name) ((addr) >= name##_BASE_ADDR && (addr) < name##_BASE_ADDR + name##_SIZE) -#define MX25_IO_ADDRESS (x) \ - (void __force __iomem *) \ - (__in_range(x, MX25_AIPS1) ? MX25_AIPS1_IO_ADDRESS(x) : \ - __in_range(x, MX25_AIPS2) ? MX25_AIPS2_IO_ADDRESS(x) : \ - __in_range(x, MX25_AVIC) ? MX25_AVIC_IO_ADDRESS(x) : \ - 0xDEADBEEF) + (void __force __iomem *) ( \ + IMX_IO_ADDRESS(x, MX25_AIPS1) ?: \ + IMX_IO_ADDRESS(x, MX25_AIPS2) ?: \ + IMX_IO_ADDRESS(x, MX25_AVIC) ?: \ + 0xdeadbeef)#define UART1_BASE_ADDR 0x43f90000#define UART2_BASE_ADDR 0x43f94000
Signature · 1 line
1.6.5.2
PATCH 19/20 imx35: define and use MX35_IO_ADDRESS
Signed-off-by Uwe Kleine-K?nig <[email protected]>
--- arch/arm/mach-mx3/clock-imx35.c | 2 +- arch/arm/plat-mxc/include/mach/mx35.h | 8 ++++++++ 2 files changed, 9 insertions(+), 1 deletions(-)
arch/arm/mach-mx3/clock-imx35.c +1 -1
@@ -28,7 +28,7 @@#include <mach/hardware.h> #include <mach/common.h> -#define CCM_BASE IO_ADDRESS(MX35_CCM_BASE_ADDR) +#define CCM_BASE MX35_IO_ADDRESS(MX35_CCM_BASE_ADDR)#define CCM_CCMR 0x00#define CCM_PDR0 0x04
arch/arm/plat-mxc/include/mach/mx35.h +8 -0
@@ -104,6 +104,14 @@#define MX35_NFC_BASE_ADDR 0xbb000000#define MX35_PCMCIA_MEM_BASE_ADDR 0xbc000000 +#define MX35_IO_ADDRESS (x) \ + (void __force __iomem *) ( \ + IMX_IO_ADDRESS(x, MX35_AIPS1) ?: \ + IMX_IO_ADDRESS(x, MX35_AIPS2) ?: \ + IMX_IO_ADDRESS(x, MX35_AVIC) ?: \ + IMX_IO_ADDRESS(x, MX35_X_MEMC) ?: \ + IMX_IO_ADDRESS(x, MX35_SPBA0) ?: \ + 0xdeadbeef)/* * Interrupt numbers */
Signature · 1 line
1.6.5.2
PATCH 20/20 mx3/kzm_arm11_01: define and use board specific IO_ADDRESS macro
Signed-off-by Uwe Kleine-K?nig <[email protected]>
--- arch/arm/mach-mx3/mach-kzm_arm11_01.c | 12 +++++++++--- 1 files changed, 9 insertions(+), 3 deletions(-)
arch/arm/mach-mx3/mach-kzm_arm11_01.c +9 -3
@@ -46,13 +46,19 @@#include "devices.h" +#define KZM_ARM11_IO_ADDRESS (x) \ + (void __force __iomem *) ( \ + IMX_IO_ADDRESS(x, MX31_CS4) ?: \ + IMX_IO_ADDRESS(x, MX31_CS5) ?: \ + 0xdeadbeef) + #if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE) /* * KZM-ARM11-01 has an external UART on FPGA */ static struct plat_serial8250_port serial_platform_data[] = { { - .membase = IO_ADDRESS(KZM_ARM11_16550), + .membase = KZM_ARM11_IO_ADDRESS(KZM_ARM11_16550), .mapbase = KZM_ARM11_16550, .irq = IOMUX_TO_IRQ(MX31_PIN_GPIO1_1), .irqflags = IRQ_TYPE_EDGE_RISING,
@@ -102,9 +108,9 @@ static int __init kzm_init_ext_uart(void)/* * Unmask UART interrupt */ - tmp =__raw_readb (IO_ADDRESS (KZM_ARM11_CTL1 )); + tmp =__raw_readb (KZM_ARM11_IO_ADDRESS (KZM_ARM11_CTL1 )); tmp |=0x2 ; -__raw_writeb (tmp,IO_ADDRESS (KZM_ARM11_CTL1 )); +__raw_writeb (tmp,KZM_ARM11_IO_ADDRESS (KZM_ARM11_CTL1 ));return platform_device_register (&serial_device); }
Signature · 1 line
1.6.5.2
PATCH 16/20 imx27: define and use MX27_IO_ADDRESS
In reply to Uwe Kleine-KönigHi,
Quoted 48 lines · Uwe Kleine-K?nig
Signed-off-by Uwe Kleine-K?nig <[email protected]>--- arch/arm/mach-mx2/clock_imx27.c | 4 ++-- arch/arm/mach-mx2/cpu_imx27.c | 3 ++- arch/arm/plat-mxc/include/mach/mx27.h | 7 +++++++ 3 files changed, 11 insertions(+), 3 deletions(-)arch/arm/mach-mx2/clock_imx27.c +2
-2@@ -29,7 +29,7 @@#include <mach/common.h> #include <mach/hardware.h> -#define IO_ADDR_CCM (off) (IO_ADDRESS(MX27_CCM_BASE_ADDR) + (off)) +#define IO_ADDR_CCM (off) (MX27_IO_ADDRESS(MX27_CCM_BASE_ADDR) + (off))/* Register offsets */ #define CCM_CSCR IO_ADDR_CCM(0x0)@@ -757,7 +757,7 @@ int __init mx27_clocks_init(unsigned long fref)clk_enable (&uart1_clk);#endif -mxc_timer_init (&gpt1_clk,IO_ADDRESS (MX27_GPT1_BASE_ADDR ), +mxc_timer_init (&gpt1_clk,MX27_IO_ADDRESS (MX27_GPT1_BASE_ADDR ),MX27_INT_GPT1 );return 0 ;arch/arm/mach-mx2/cpu_imx27.c +2
-1@@ -39,7 +39,8 @@ static void query_silicon_parameter(void)* the silicon revision very early we read it here to * avoid any further hooks */ - val =__raw_readl (IO_ADDRESS (MX27_SYSCTRL_BASE_ADDR ) +SYS_CHIP_ID ); + val =__raw_readl (MX27_IO_ADDRESS (MX27_SYSCTRL_BASE_ADDR + +SYS_CHIP_ID )); cpu_silicon_rev = (int )(val >>28 ); cpu_partnumber = (int )((val >>12 ) &0xFFFF );arch/arm/plat-mxc/include/mach/mx27.h +0
-0
arch/arm/plat-mxc/include/mach/mx27.h line 122
Quoted 9 lines
arch/arm/plat-mxc/include/mach/mx27.h +6
-0@@ -114,6 +114,13 @@/* IRAM */ #define MX27_IRAM_BASE_ADDR 0xffff4c00/* internal ram */ +#define MX27_IO_ADDRESS (x) \ + (void __force __iomem *) ( \ + IMX_IO_ADDRESS(x, MX27_AIPI) ?: \ + IMX_IO_ADDRESS(x, MX27_SAHB1) ?: \ + IMX_IO_ADDRESS(x, MX27_X_MEMC) ?: \ + 0xdeadbeef)
^^^^^^^^^^
I prefer to have a plain '0' here. Otherwise an invocation of this macro with an illegal address could lead to silent corruption of memory that happens to be mapped at that virtual address instead of a kernel oops due to a null pointer dereference!
Same for the other processors.
Lothar Wa?mann
Signature · 9 lines
___________________________________________________________ Ka-Ro electronics GmbH | Pascalstra?e 22 | D - 52076 Aachen Phone: +49 2408 1402-0 | Fax: +49 2408 1402-10 Gesch?ftsf?hrer: Matthias Kaussen Handelsregistereintrag: Amtsgericht Aachen, HRB 4996 www.karo-electronics.de | info at karo-electronics.de ___________________________________________________________
Sascha Hauer
maintainerPATCH 16/20 imx27: define and use MX27_IO_ADDRESS
Quoted 61 lines · Lothar Wa?mann
Hi,
Quoted 48 lines · Uwe Kleine-K?nig
Signed-off-by Uwe Kleine-K?nig <[email protected]>--- arch/arm/mach-mx2/clock_imx27.c | 4 ++-- arch/arm/mach-mx2/cpu_imx27.c | 3 ++- arch/arm/plat-mxc/include/mach/mx27.h | 7 +++++++ 3 files changed, 11 insertions(+), 3 deletions(-)arch/arm/mach-mx2/clock_imx27.c +2
-2@@ -29,7 +29,7 @@#include <mach/common.h> #include <mach/hardware.h> -#define IO_ADDR_CCM (off) (IO_ADDRESS(MX27_CCM_BASE_ADDR) + (off)) +#define IO_ADDR_CCM (off) (MX27_IO_ADDRESS(MX27_CCM_BASE_ADDR) + (off))/* Register offsets */ #define CCM_CSCR IO_ADDR_CCM(0x0)@@ -757,7 +757,7 @@ int __init mx27_clocks_init(unsigned long fref)clk_enable (&uart1_clk);#endif -mxc_timer_init (&gpt1_clk,IO_ADDRESS (MX27_GPT1_BASE_ADDR ), +mxc_timer_init (&gpt1_clk,MX27_IO_ADDRESS (MX27_GPT1_BASE_ADDR ),MX27_INT_GPT1 );return 0 ;arch/arm/mach-mx2/cpu_imx27.c +2
-1@@ -39,7 +39,8 @@ static void query_silicon_parameter(void)* the silicon revision very early we read it here to * avoid any further hooks */ - val =__raw_readl (IO_ADDRESS (MX27_SYSCTRL_BASE_ADDR ) +SYS_CHIP_ID ); + val =__raw_readl (MX27_IO_ADDRESS (MX27_SYSCTRL_BASE_ADDR + +SYS_CHIP_ID )); cpu_silicon_rev = (int )(val >>28 ); cpu_partnumber = (int )((val >>12 ) &0xFFFF );arch/arm/plat-mxc/include/mach/mx27.h +0
-0arch/arm/plat-mxc/include/mach/mx27.h line 122
Quoted 9 lines
arch/arm/plat-mxc/include/mach/mx27.h +6
-0@@ -114,6 +114,13 @@/* IRAM */ #define MX27_IRAM_BASE_ADDR 0xffff4c00/* internal ram */ +#define MX27_IO_ADDRESS (x) \ + (void __force __iomem *) ( \ + IMX_IO_ADDRESS(x, MX27_AIPI) ?: \ + IMX_IO_ADDRESS(x, MX27_SAHB1) ?: \ + IMX_IO_ADDRESS(x, MX27_X_MEMC) ?: \ + 0xdeadbeef)^^^^^^^^^^
Quoted 4 lines
I prefer to have a plain '0' here. Otherwise an invocation of this macro with an illegal address could lead to silent corruption of memory that happens to be mapped at that virtual address instead of a kernel oops due to a null pointer dereference!
I always thought 0xdeadbeef is just as good as any other value, but that's a good reason to have 0 here. Full ack.
Sascha
Signature · 4 lines
Pengutronix e.K. | | Industrial Linux Solutions | http://www.pengutronix.de/ | Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 | Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
PATCH 16/20 imx27: define and use MX27_IO_ADDRESS
In reply to Lothar WaßmannHello Lother,
Quoted 7 lines · Lothar Wa?mann
arch/arm/plat-mxc/include/mach/mx27.h line 122
Quoted 6 lines
arch/arm/plat-mxc/include/mach/mx27.h +6
-0+#define MX27_IO_ADDRESS (x) \ + (void __force __iomem *) ( \ + IMX_IO_ADDRESS(x, MX27_AIPI) ?: \ + IMX_IO_ADDRESS(x, MX27_SAHB1) ?: \ + IMX_IO_ADDRESS(x, MX27_X_MEMC) ?: \ + 0xdeadbeef)^^^^^^^^^^
Quoted 6 lines
I prefer to have a plain '0' here. Otherwise an invocation of this macro with an illegal address could lead to silent corruption of memory that happens to be mapped at that virtual address instead of a kernel oops due to a null pointer dereference!
Same for the other processors.
I'm a bit undecided here. I choosed 0xdeadbeef because it is used in IO_ADDRESS, too. It's not aligned, so probably nothing happens. As Sasche votes for 0, too, I can change it. It simplifies the code a bit and then can read:
#define MX27_IO_ADDRESS(x) \ (void __force __iomem *) ( \ IMX_IO_ADDRESS(x, MX27_AIPI) ?: \ IMX_IO_ADDRESS(x, MX27_SAHB1) ?: \ IMX_IO_ADDRESS(x, MX27_X_MEMC))
as IMX_IO_ADDRESS returns 0 for out-of-range values, too.
Best regards
Uwe
Signature · 2 lines
Pengutronix e.K. | Uwe Kleine-K?nig | Industrial Linux Solutions | http://www.pengutronix.de/ |
PATCH 16/20 imx27: define and use MX27_IO_ADDRESS
Hi,
Quoted 2 lines · Uwe Kleine-K?nig
Hello Lother,
Lothar
^
Quoted 13 lines · Lothar Wa?mann
Quoted 12 lines
arch/arm/plat-mxc/include/mach/mx27.h line 122
Quoted 6 lines
arch/arm/plat-mxc/include/mach/mx27.h +6
-0+#define MX27_IO_ADDRESS (x) \ + (void __force __iomem *) ( \ + IMX_IO_ADDRESS(x, MX27_AIPI) ?: \ + IMX_IO_ADDRESS(x, MX27_SAHB1) ?: \ + IMX_IO_ADDRESS(x, MX27_X_MEMC) ?: \ + 0xdeadbeef)^^^^^^^^^^I prefer to have a plain '0' here. Otherwise an invocation of this macro with an illegal address could lead to silent corruption of memory that happens to be mapped at that virtual address instead of a kernel oops due to a null pointer dereference!
Quoted 3 lines
Quoted 1 line
Same for the other processors.
I'm a bit undecided here. I choosed
0xdeadbeefbecause it is used in
0xdeadbeef by itself may look suspicious if you find it in some crash dump. But if some offset is added to it, you cannot distinguish it from any other legal virtual address.
Quoted 2 lines
IO_ADDRESS, too. It's not aligned, so probably nothing happens. As
Then, that macro should be changed also. And for the alignment argument, memory can also be accessed bytewise.
Lothar Wa?mann
Signature · 9 lines
___________________________________________________________ Ka-Ro electronics GmbH | Pascalstra?e 22 | D - 52076 Aachen Phone: +49 2408 1402-0 | Fax: +49 2408 1402-10 Gesch?ftsf?hrer: Matthias Kaussen Handelsregistereintrag: Amtsgericht Aachen, HRB 4996 www.karo-electronics.de | info at karo-electronics.de ___________________________________________________________
PATCH 16/20 imx27: define and use MX27_IO_ADDRESS
Hello Lothar,
Quoted 7 lines · Lothar Wa?mann
Hi,
Quoted 2 lines · Uwe Kleine-K?nig
Hello Lother,
Lothar
^
oops, sorry.
Quoted 13 lines
Quoted 13 lines · Lothar Wa?mann
Quoted 12 lines
arch/arm/plat-mxc/include/mach/mx27.h line 122
Quoted 6 lines
arch/arm/plat-mxc/include/mach/mx27.h +6
-0+#define MX27_IO_ADDRESS (x) \ + (void __force __iomem *) ( \ + IMX_IO_ADDRESS(x, MX27_AIPI) ?: \ + IMX_IO_ADDRESS(x, MX27_SAHB1) ?: \ + IMX_IO_ADDRESS(x, MX27_X_MEMC) ?: \ + 0xdeadbeef)^^^^^^^^^^I prefer to have a plain '0' here. Otherwise an invocation of this macro with an illegal address could lead to silent corruption of memory that happens to be mapped at that virtual address instead of a kernel oops due to a null pointer dereference!
Quoted 6 lines
Quoted 3 lines
Quoted 1 line
Same for the other processors.
I'm a bit undecided here. I choosed
0xdeadbeefbecause it is used in
0xdeadbeefby itself may look suspicious if you find it in some crash dump. But if some offset is added to it, you cannot distinguish it from any other legal virtual address.
Together with the discussion that it's better to do
MX27_IO_ADDRESS(BASE + offset)
instead of
MX27_IO_ADDRESS(BASE) + offset
there is no offset added to 0xdeadbeef. Anyhow, 0 looks cleaner and as all imx machines have a mmu there should be nothing at address 0.
Quoted 4 lines
Quoted 2 lines
IO_ADDRESS, too. It's not aligned, so probably nothing happens. AsThen, that macro should be changed also. And for the alignment argument, memory can also be accessed bytewise.
The longtime plan for IO_ADDRESS is to go away, so I don't care much. 0xdeadbeaf goes back to (at least) 52c543f90c4095dff71dc125017594b61a753069. That was 2 years ago.
Best regards
Uwe
Signature · 2 lines
Pengutronix e.K. | Uwe Kleine-K?nig | Industrial Linux Solutions | http://www.pengutronix.de/ |
PATCH 9/20 imx/mx1: rename files defining a machine to mach-$mach.c
In reply to Uwe Kleine-KönigQuoted 6 lines · Uwe Kleine-K?nig
Signed-off-by Uwe Kleine-K?nig <[email protected]>Cc Sascha Hauer <[email protected]>Cc Russell King <[email protected]>Cc Paulius Zaleckas <[email protected]>Cc Darius Augulis <[email protected]>Cc Mauro Carvalho Chehab <[email protected]>
Quoted 11 lines
--- arch/arm/mach-mx1/Makefile | 4 +- arch/arm/mach-mx1/mach-mx1ads.c | 165 ++++++++++++++++++++++++++++++++++++++ arch/arm/mach-mx1/mach-scb9328.c | 158 ++++++++++++++++++++++++++++++++++++ arch/arm/mach-mx1/mx1ads.c | 165 -------------------------------------- arch/arm/mach-mx1/scb9328.c | 158 ------------------------------------ 5 files changed, 325 insertions(+), 325 deletions(-) create mode 100644 arch/arm/mach-mx1/mach-mx1ads.c create mode 100644 arch/arm/mach-mx1/mach-scb9328.c delete mode 100644 arch/arm/mach-mx1/mx1ads.c delete mode 100644 arch/arm/mach-mx1/scb9328.c
TBH, I don't understand why I was cc'ed on this one, and in general your CC lists seem to be a bit over-populated, but if you do like such rename patches to be reviewed, it is better to use the "-M" option to "git format-patch" (maybe also "-C" and even "--find-copies-harder") to save reviewers the work of comparing the deleted and the new files.
Thanks
Guennadi
Quoted 686 lines
arch/arm/mach-mx1/Makefile +2
-2@@ -10,5 +10,5 @@ obj-y += generic.o clock.o devices.o obj-$(CONFIG_MX1_VIDEO) += ksym_mx1.o mx1_camera_fiq.o # Specific board support -obj-$(CONFIG_ARCH_MX1ADS) += mx1ads.o -obj-$(CONFIG_MACH_SCB9328) += scb9328.o +obj-$(CONFIG_ARCH_MX1ADS) += mach-mx1ads.o +obj-$(CONFIG_MACH_SCB9328) += mach-scb9328.oarch/arm/mach-mx1/mach-mx1ads.c new file +165
-0@@ -0,0 +1,165 @@ +/* +* arch/arm/mach-imx/mach-mx1ads.c +* +* Initially based on: +* linux-2.6.7-imx/arch/arm/mach-imx/scb9328.c +* Copyright (c) 2004 Sascha Hauer <[email protected]> +* +* 2004 (c) MontaVista Software, Inc. +* +* This file is licensed under the terms of the GNU General Public +* License version 2. This program is licensed "as is" without any +* warranty of any kind, whether express or implied. +*/ + +#include <linux/i2c.h> +#include <linux/i2c/pcf857x.h> +#include <linux/init.h> +#include <linux/kernel.h> +#include <linux/platform_device.h> +#include <linux/mtd/physmap.h> + +#include <asm/mach-types.h> +#include <asm/mach/arch.h> +#include <asm/mach/time.h> + +#include <mach/common.h> +#include <mach/hardware.h> +#include <mach/i2c.h> +#include <mach/imx-uart.h> +#include <mach/iomux.h> +#include <mach/irqs.h> + +#include "devices.h" + +static int mx1ads_pins[] = { +/* UART1 */ +PC9_PF_UART1_CTS , +PC10_PF_UART1_RTS , +PC11_PF_UART1_TXD , +PC12_PF_UART1_RXD , +/* UART2 */ +PB28_PF_UART2_CTS , +PB29_PF_UART2_RTS , +PB30_PF_UART2_TXD , +PB31_PF_UART2_RXD , +/* I2C */ +PA15_PF_I2C_SDA , +PA16_PF_I2C_SCL , +/* SPI */ +PC13_PF_SPI1_SPI_RDY , +PC14_PF_SPI1_SCLK , +PC15_PF_SPI1_SS , +PC16_PF_SPI1_MISO , +PC17_PF_SPI1_MOSI , +}; + +/* +* UARTs platform data +*/ + +static struct imxuart_platform_data uart_pdata[] = { + { + .flags =IMXUART_HAVE_RTSCTS , + }, { + .flags =IMXUART_HAVE_RTSCTS , + }, +}; + +/* +* Physmap flash +*/ + +static struct physmap_flash_data mx1ads_flash_data = { + .width =4 ,/* bankwidth in bytes */ +}; + +static struct resource flash_resource = { + .start =IMX_CS0_PHYS , + .end =IMX_CS0_PHYS +SZ_32M -1 , + .flags =IORESOURCE_MEM , +}; + +static struct platform_device flash_device = { + .name ="physmap-flash" , + .id =0 , + .resource = &flash_resource, + .num_resources =1 , +}; + +/* +* I2C +*/ +static struct pcf857x_platform_data pcf857x_data[] = { + { + .gpio_base =4 *32 , + }, { + .gpio_base =4 *32 +16 , + } +}; + +static struct imxi2c_platform_data mx1ads_i2c_data = { + .bitrate =100000 , +}; + +static struct i2c_board_info mx1ads_i2c_devices[] = { + { +I2C_BOARD_INFO ("pcf8575" ,0x22 ), + .platform_data = &pcf857x_data[0 ], + }, { +I2C_BOARD_INFO ("pcf8575" ,0x24 ), + .platform_data = &pcf857x_data[1 ], + }, +}; + +/* +* Board init +*/ +static void __init mx1ads_init (void ) +{ +mxc_gpio_setup_multiple_pins (mx1ads_pins, +ARRAY_SIZE (mx1ads_pins),"mx1ads" ); + +/* UART */ +mxc_register_device (&imx_uart1_device, &uart_pdata[0 ]); +mxc_register_device (&imx_uart2_device, &uart_pdata[1 ]); + +/* Physmap flash */ +mxc_register_device (&flash_device, &mx1ads_flash_data); + +/* I2C */ +i2c_register_board_info (0 , mx1ads_i2c_devices, +ARRAY_SIZE (mx1ads_i2c_devices)); + +mxc_register_device (&imx_i2c_device, &mx1ads_i2c_data); +} + +static void __init mx1ads_timer_init (void ) +{ +mx1_clocks_init (32000 ); +} + +struct sys_timer mx1ads_timer = { + .init = mx1ads_timer_init, +}; + +MACHINE_START (MX1ADS ,"Freescale MX1ADS" ) +/* Maintainer: Sascha Hauer, Pengutronix */ + .phys_io = IMX_IO_PHYS, + .io_pg_offst = (IMX_IO_BASE >> 18) & 0xfffc, + .boot_params =PHYS_OFFSET +0x100 , + .map_io = mx1_map_io, + .init_irq = mx1_init_irq, + .timer = &mx1ads_timer, + .init_machine = mx1ads_init, +MACHINE_END + +MACHINE_START (MXLADS ,"Freescale MXLADS" ) + .phys_io =IMX_IO_PHYS , + .io_pg_offst = (IMX_IO_BASE >> 18) & 0xfffc, + .boot_params = PHYS_OFFSET + 0x100, + .map_io = mx1_map_io, + .init_irq = mx1_init_irq, + .timer = &mx1ads_timer, + .init_machine = mx1ads_init, +MACHINE_END arch/arm/mach-mx1/mach-scb9328.c new file +158
-0@@ -0,0 +1,158 @@ +/* +* linux/arch/arm/mach-mx1/mach-scb9328.c +* +* Copyright (c) 2004 Sascha Hauer <[email protected]> +* Copyright (c) 2006-2008 Juergen Beisert <[email protected]> +* +* This program is free software; you can redistribute it and/or modify +* it under the terms of the GNU General Public License version 2 as +* published by the Free Software Foundation. +* +*/ + +#include <linux/platform_device.h> +#include <linux/mtd/physmap.h> +#include <linux/interrupt.h> +#include <linux/dm9000.h> + +#include <asm/mach-types.h> +#include <asm/mach/arch.h> +#include <asm/mach/time.h> + +#include <mach/common.h> +#include <mach/hardware.h> +#include <mach/irqs.h> +#include <mach/imx-uart.h> +#include <mach/iomux.h> + +#include "devices.h" + +/* +* This scb9328 has a 32MiB flash +*/ +static struct resource flash_resource = { + .start =IMX_CS0_PHYS , + .end =IMX_CS0_PHYS + (32 *1024 *1024 ) -1 , + .flags =IORESOURCE_MEM , +}; + +static struct physmap_flash_data scb_flash_data = { + .width =2 , +}; + +static struct platform_device scb_flash_device = { + .name ="physmap-flash" , + .id =0 , + .dev = { + .platform_data = &scb_flash_data, + }, + .resource = &flash_resource, + .num_resources =1 , +}; + +/* +* scb9328 has a DM9000 network controller +* connected to CS5, with 16 bit data path +* and interrupt connected to GPIO 3 +*/ + +/* +* internal datapath is fixed 16 bit +*/ +static struct dm9000_plat_data dm9000_platdata = { + .flags =DM9000_PLATF_16BITONLY , +}; + +/* +* the DM9000 drivers wants two defined address spaces +* to gain access to address latch registers and the data path. +*/ +static struct resource dm9000x_resources[] = { + { + .name ="address area" , + .start =IMX_CS5_PHYS , + .end =IMX_CS5_PHYS +1 , + .flags =IORESOURCE_MEM ,/* address access */ + }, { + .name ="data area" , + .start =IMX_CS5_PHYS +4 , + .end =IMX_CS5_PHYS +5 , + .flags =IORESOURCE_MEM ,/* data access */ + }, { + .start =IRQ_GPIOC (3 ), + .end =IRQ_GPIOC (3 ), + .flags =IORESOURCE_IRQ |IORESOURCE_IRQ_LOWLEVEL , + }, +}; + +static struct platform_device dm9000x_device = { + .name ="dm9000" , + .id =0 , + .num_resources =ARRAY_SIZE (dm9000x_resources), + .resource = dm9000x_resources, + .dev = { + .platform_data = &dm9000_platdata, + } +}; + +static int mxc_uart1_pins[] = { +PC9_PF_UART1_CTS , +PC10_PF_UART1_RTS , +PC11_PF_UART1_TXD , +PC12_PF_UART1_RXD , +}; + +static int uart1_mxc_init (struct platform_device *pdev) +{ +return mxc_gpio_setup_multiple_pins (mxc_uart1_pins, +ARRAY_SIZE (mxc_uart1_pins),"UART1" ); +} + +static int uart1_mxc_exit (struct platform_device *pdev) +{ +mxc_gpio_release_multiple_pins (mxc_uart1_pins, +ARRAY_SIZE (mxc_uart1_pins)); +return 0 ; +} + +static struct imxuart_platform_data uart_pdata = { + .init = uart1_mxc_init, + .exit = uart1_mxc_exit, + .flags =IMXUART_HAVE_RTSCTS , +}; + +static struct platform_device *devices[]__initdata = { + &scb_flash_device, + &dm9000x_device, +}; + +/* +* scb9328_init - Init the CPU card itself +*/ +static void __init scb9328_init (void ) +{ +mxc_register_device (&imx_uart1_device, &uart_pdata); + +printk (KERN_INFO "Scb9328: Adding devices\n" ); +platform_add_devices (devices,ARRAY_SIZE (devices)); +} + +static void __init scb9328_timer_init (void ) +{ +mx1_clocks_init (32000 ); +} + +static struct sys_timer scb9328_timer = { + .init = scb9328_timer_init, +}; + +MACHINE_START (SCB9328 ,"Synertronixx scb9328" ) +/* Sascha Hauer */ + .phys_io = 0x00200000, + .io_pg_offst = ((0xe0200000) >> 18) & 0xfffc, + .boot_params = 0x08000100, + .map_io = mx1_map_io, + .init_irq = mx1_init_irq, + .timer = &scb9328_timer, + .init_machine = scb9328_init, +MACHINE_END arch/arm/mach-mx1/mx1ads.c deleted +0
-165@@ -1,165 +0,0 @@ -/* -* arch/arm/mach-imx/mx1ads.c -* -* Initially based on: -* linux-2.6.7-imx/arch/arm/mach-imx/scb9328.c -* Copyright (c) 2004 Sascha Hauer <[email protected]> -* -* 2004 (c) MontaVista Software, Inc. -* -* This file is licensed under the terms of the GNU General Public -* License version 2. This program is licensed "as is" without any -* warranty of any kind, whether express or implied. -*/ - -#include <linux/i2c.h> -#include <linux/i2c/pcf857x.h> -#include <linux/init.h> -#include <linux/kernel.h> -#include <linux/platform_device.h> -#include <linux/mtd/physmap.h> - -#include <asm/mach-types.h> -#include <asm/mach/arch.h> -#include <asm/mach/time.h> - -#include <mach/common.h> -#include <mach/hardware.h> -#include <mach/i2c.h> -#include <mach/imx-uart.h> -#include <mach/iomux.h> -#include <mach/irqs.h> - -#include "devices.h" - -static int mx1ads_pins[] = { -/* UART1 */ -PC9_PF_UART1_CTS , -PC10_PF_UART1_RTS , -PC11_PF_UART1_TXD , -PC12_PF_UART1_RXD , -/* UART2 */ -PB28_PF_UART2_CTS , -PB29_PF_UART2_RTS , -PB30_PF_UART2_TXD , -PB31_PF_UART2_RXD , -/* I2C */ -PA15_PF_I2C_SDA , -PA16_PF_I2C_SCL , -/* SPI */ -PC13_PF_SPI1_SPI_RDY , -PC14_PF_SPI1_SCLK , -PC15_PF_SPI1_SS , -PC16_PF_SPI1_MISO , -PC17_PF_SPI1_MOSI , -}; - -/* -* UARTs platform data -*/ - -static struct imxuart_platform_data uart_pdata[] = { - { - .flags =IMXUART_HAVE_RTSCTS , - }, { - .flags =IMXUART_HAVE_RTSCTS , - }, -}; - -/* -* Physmap flash -*/ - -static struct physmap_flash_data mx1ads_flash_data = { - .width =4 ,/* bankwidth in bytes */ -}; - -static struct resource flash_resource = { - .start =IMX_CS0_PHYS , - .end =IMX_CS0_PHYS +SZ_32M -1 , - .flags =IORESOURCE_MEM , -}; - -static struct platform_device flash_device = { - .name ="physmap-flash" , - .id =0 , - .resource = &flash_resource, - .num_resources =1 , -}; - -/* -* I2C -*/ -static struct pcf857x_platform_data pcf857x_data[] = { - { - .gpio_base =4 *32 , - }, { - .gpio_base =4 *32 +16 , - } -}; - -static struct imxi2c_platform_data mx1ads_i2c_data = { - .bitrate =100000 , -}; - -static struct i2c_board_info mx1ads_i2c_devices[] = { - { -I2C_BOARD_INFO ("pcf8575" ,0x22 ), - .platform_data = &pcf857x_data[0 ], - }, { -I2C_BOARD_INFO ("pcf8575" ,0x24 ), - .platform_data = &pcf857x_data[1 ], - }, -}; - -/* -* Board init -*/ -static void __init mx1ads_init (void ) -{ -mxc_gpio_setup_multiple_pins (mx1ads_pins, -ARRAY_SIZE (mx1ads_pins),"mx1ads" ); - -/* UART */ -mxc_register_device (&imx_uart1_device, &uart_pdata[0 ]); -mxc_register_device (&imx_uart2_device, &uart_pdata[1 ]); - -/* Physmap flash */ -mxc_register_device (&flash_device, &mx1ads_flash_data); - -/* I2C */ -i2c_register_board_info (0 , mx1ads_i2c_devices, -ARRAY_SIZE (mx1ads_i2c_devices)); - -mxc_register_device (&imx_i2c_device, &mx1ads_i2c_data); -} - -static void __init mx1ads_timer_init (void ) -{ -mx1_clocks_init (32000 ); -} - -struct sys_timer mx1ads_timer = { - .init = mx1ads_timer_init, -}; - -MACHINE_START (MX1ADS ,"Freescale MX1ADS" ) -/* Maintainer: Sascha Hauer, Pengutronix */ - .phys_io = IMX_IO_PHYS, - .io_pg_offst = (IMX_IO_BASE >> 18) & 0xfffc, - .boot_params =PHYS_OFFSET +0x100 , - .map_io = mx1_map_io, - .init_irq = mx1_init_irq, - .timer = &mx1ads_timer, - .init_machine = mx1ads_init, -MACHINE_END - -MACHINE_START (MXLADS ,"Freescale MXLADS" ) - .phys_io =IMX_IO_PHYS , - .io_pg_offst = (IMX_IO_BASE >> 18) & 0xfffc, - .boot_params = PHYS_OFFSET + 0x100, - .map_io = mx1_map_io, - .init_irq = mx1_init_irq, - .timer = &mx1ads_timer, - .init_machine = mx1ads_init, -MACHINE_END arch/arm/mach-mx1/scb9328.c deleted +0
-158@@ -1,158 +0,0 @@ -/* -* linux/arch/arm/mach-mx1/scb9328.c -* -* Copyright (c) 2004 Sascha Hauer <[email protected]> -* Copyright (c) 2006-2008 Juergen Beisert <[email protected]> -* -* This program is free software; you can redistribute it and/or modify -* it under the terms of the GNU General Public License version 2 as -* published by the Free Software Foundation. -* -*/ - -#include <linux/platform_device.h> -#include <linux/mtd/physmap.h> -#include <linux/interrupt.h> -#include <linux/dm9000.h> - -#include <asm/mach-types.h> -#include <asm/mach/arch.h> -#include <asm/mach/time.h> - -#include <mach/common.h> -#include <mach/hardware.h> -#include <mach/irqs.h> -#include <mach/imx-uart.h> -#include <mach/iomux.h> - -#include "devices.h" - -/* -* This scb9328 has a 32MiB flash -*/ -static struct resource flash_resource = { - .start =IMX_CS0_PHYS , - .end =IMX_CS0_PHYS + (32 *1024 *1024 ) -1 , - .flags =IORESOURCE_MEM , -}; - -static struct physmap_flash_data scb_flash_data = { - .width =2 , -}; - -static struct platform_device scb_flash_device = { - .name ="physmap-flash" , - .id =0 , - .dev = { - .platform_data = &scb_flash_data, - }, - .resource = &flash_resource, - .num_resources =1 , -}; - -/* -* scb9328 has a DM9000 network controller -* connected to CS5, with 16 bit data path -* and interrupt connected to GPIO 3 -*/ - -/* -* internal datapath is fixed 16 bit -*/ -static struct dm9000_plat_data dm9000_platdata = { - .flags =DM9000_PLATF_16BITONLY , -}; - -/* -* the DM9000 drivers wants two defined address spaces -* to gain access to address latch registers and the data path. -*/ -static struct resource dm9000x_resources[] = { - { - .name ="address area" , - .start =IMX_CS5_PHYS , - .end =IMX_CS5_PHYS +1 , - .flags =IORESOURCE_MEM ,/* address access */ - }, { - .name ="data area" , - .start =IMX_CS5_PHYS +4 , - .end =IMX_CS5_PHYS +5 , - .flags =IORESOURCE_MEM ,/* data access */ - }, { - .start =IRQ_GPIOC (3 ), - .end =IRQ_GPIOC (3 ), - .flags =IORESOURCE_IRQ |IORESOURCE_IRQ_LOWLEVEL , - }, -}; - -static struct platform_device dm9000x_device = { - .name ="dm9000" , - .id =0 , - .num_resources =ARRAY_SIZE (dm9000x_resources), - .resource = dm9000x_resources, - .dev = { - .platform_data = &dm9000_platdata, - } -}; - -static int mxc_uart1_pins[] = { -PC9_PF_UART1_CTS , -PC10_PF_UART1_RTS , -PC11_PF_UART1_TXD , -PC12_PF_UART1_RXD , -}; - -static int uart1_mxc_init (struct platform_device *pdev) -{ -return mxc_gpio_setup_multiple_pins (mxc_uart1_pins, -ARRAY_SIZE (mxc_uart1_pins),"UART1" ); -} - -static int uart1_mxc_exit (struct platform_device *pdev) -{ -mxc_gpio_release_multiple_pins (mxc_uart1_pins, -ARRAY_SIZE (mxc_uart1_pins)); -return 0 ; -} - -static struct imxuart_platform_data uart_pdata = { - .init = uart1_mxc_init, - .exit = uart1_mxc_exit, - .flags =IMXUART_HAVE_RTSCTS , -}; - -static struct platform_device *devices[]__initdata = { - &scb_flash_device, - &dm9000x_device, -}; - -/* -* scb9328_init - Init the CPU card itself -*/ -static void __init scb9328_init (void ) -{ -mxc_register_device (&imx_uart1_device, &uart_pdata); - -printk (KERN_INFO "Scb9328: Adding devices\n" ); -platform_add_devices (devices,ARRAY_SIZE (devices)); -} - -static void __init scb9328_timer_init (void ) -{ -mx1_clocks_init (32000 ); -} - -static struct sys_timer scb9328_timer = { - .init = scb9328_timer_init, -}; - -MACHINE_START (SCB9328 ,"Synertronixx scb9328" ) -/* Sascha Hauer */ - .phys_io = 0x00200000, - .io_pg_offst = ((0xe0200000) >> 18) & 0xfffc, - .boot_params = 0x08000100, - .map_io = mx1_map_io, - .init_irq = mx1_init_irq, - .timer = &scb9328_timer, - .init_machine = scb9328_init, -MACHINE_END Signature · 1 line
1.6.5.2
---
Guennadi Liakhovetski, Ph.D.
Freelance Open-Source Software Developer
http://www.open-technology.de/
PATCH 9/20 imx/mx1: rename files defining a machine to mach-$mach.c
Hello Guennadi,
Quoted 20 lines · Guennadi Liakhovetski
Quoted 6 lines · Uwe Kleine-K?nig
Signed-off-by Uwe Kleine-K?nig <[email protected]>Cc Sascha Hauer <[email protected]>Cc Russell King <[email protected]>Cc Paulius Zaleckas <[email protected]>Cc Darius Augulis <[email protected]>Cc Mauro Carvalho Chehab <[email protected]>Quoted 11 lines
--- arch/arm/mach-mx1/Makefile | 4 +- arch/arm/mach-mx1/mach-mx1ads.c | 165 ++++++++++++++++++++++++++++++++++++++ arch/arm/mach-mx1/mach-scb9328.c | 158 ++++++++++++++++++++++++++++++++++++ arch/arm/mach-mx1/mx1ads.c | 165 -------------------------------------- arch/arm/mach-mx1/scb9328.c | 158 ------------------------------------ 5 files changed, 325 insertions(+), 325 deletions(-) create mode 100644 arch/arm/mach-mx1/mach-mx1ads.c create mode 100644 arch/arm/mach-mx1/mach-scb9328.c delete mode 100644 arch/arm/mach-mx1/mx1ads.c delete mode 100644 arch/arm/mach-mx1/scb9328.c
Quoted 1 line
TBH, I don't understand why I was cc'ed on this one, and in general your
I just used scripts/get_maintainer.pl
Quoted 4 lines
CC lists seem to be a bit over-populated, but if you do like such rename patches to be reviewed, it is better to use the "-M" option to "git format-patch" (maybe also "-C" and even "--find-copies-harder") to save reviewers the work of comparing the deleted and the new files.
I thought that, too after I got the first mail from mailman that the patches are too big. Sorry. You might want to check
http://git.pengutronix.de/?p=ukl/linux-2.6.git;a=commitdiff;h=00ca84183405791397a2c7bf6da09cd11892ed1e;hp=872865ea03f0a60ba1014f3f4d14bd047ff9696b
Best regards
Uwe
Signature · 2 lines
Pengutronix e.K. | Uwe Kleine-K?nig | Industrial Linux Solutions | http://www.pengutronix.de/ |
PATCH 6/20 imx/mach-mx3: use constants namespaced by the corresponding SOC (easy part)
In reply to Uwe Kleine-KönigQuoted 63 lines · Uwe Kleine-K?nig
This just leaves
cpu.c,devices.candmm.cto clean up. As these files are used on more than one SOC they need some more work.Signed-off-by Uwe Kleine-K?nig <[email protected]>Cc Russell King <[email protected]>Cc Alberto Panizzo <[email protected]>Cc Valentin Longchamp <[email protected]>Cc Daniel Mack <[email protected]>Cc Guennadi Liakhovetski <[email protected]>Cc Yoichi Yuasa <[email protected]>Cc Mark Brown <[email protected]>Cc Magnus Lilja <[email protected]>Cc Fabio Estevam <[email protected]>Cc Sascha Hauer <[email protected]>Cc Harro Haan <[email protected]>Cc Jean Delvare <[email protected]>Cc Luotao Fu <[email protected]>Cc Ilya Yanok <[email protected]>--- arch/arm/mach-mx3/armadillo5x0.c | 12 ++++++------ arch/arm/mach-mx3/clock-imx35.c | 4 ++-- arch/arm/mach-mx3/clock.c | 4 ++-- arch/arm/mach-mx3/crm_regs.h | 2 +- arch/arm/mach-mx3/iomux.c | 2 +- arch/arm/mach-mx3/kzmarm11.c | 20 ++++++++++---------- arch/arm/mach-mx3/mx31ads.c | 14 +++++++------- arch/arm/mach-mx3/mx31lilly.c | 8 ++++---- arch/arm/mach-mx3/mx31lite.c | 14 +++++++------- arch/arm/mach-mx3/mx31moboard.c | 4 ++-- arch/arm/mach-mx3/mx31pdk.c | 10 +++++----- arch/arm/mach-mx3/mx35pdk.c | 4 ++-- arch/arm/mach-mx3/pcm037.c | 16 ++++++++-------- arch/arm/mach-mx3/pcm043.c | 4 ++-- arch/arm/mach-mx3/qong.c | 14 +++++++------- 15 files changed, 66 insertions(+), 66 deletions(-)arch/arm/mach-mx3/armadillo5x0.c +4
-4@@ -182,8 +182,8 @@ static struct physmap_flash_data armadillo5x0_nor_flash_pdata = {static struct resource armadillo5x0_nor_flash_resource = { .flags =IORESOURCE_MEM , - .start =CS0_BASE_ADDR , - .end =CS0_BASE_ADDR +SZ_64M -1 , + .start =MX31_CS0_BASE_ADDR , + .end =MX31_CS0_BASE_ADDR +SZ_64M -1 , };static struct platform_device armadillo5x0_nor_flash = {@@ -311,8 +311,8 @@ static struct imxmmc_platform_data sdhc_pdata = {*/ static struct resource armadillo5x0_smc911x_resources[] = { { - .start =CS3_BASE_ADDR , - .end =CS3_BASE_ADDR +SZ_32M -1 , + .start =MX31_CS3_BASE_ADDR , + .end =MX31_CS3_BASE_ADDR +SZ_32M -1 , .flags =IORESOURCE_MEM , }, { .start =IOMUX_TO_IRQ (MX31_PIN_GPIO1_0 ),
arch/arm/mach-mx3/armadillo5x0.c static struct sys_timer armadillo5x0_timer = { · line 410
Quoted 7 lines
arch/arm/mach-mx3/armadillo5x0.c +2
-2@@ -406,8 +406,8 @@ static struct sys_timer armadillo5x0_timer = {MACHINE_START (ARMADILLO5X0 ,"Armadillo-500" )/* Maintainer: Alberto Panizzo */ - .phys_io = AIPS1_BASE_ADDR, - .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, + .phys_io = MX31_AIPS1_BASE_ADDR, + .io_pg_offst = ((MX31_AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
While modifying this line, you could also drop superfluous parenthesis in this and all other files, that you touch.
Thanks
Guennadi
Quoted 403 lines
arch/arm/mach-mx3/armadillo5x0.c +0
-0.boot_params = PHYS_OFFSET + 0x00000100, .map_io = mx31_map_io, .init_irq = mx31_init_irq,arch/arm/mach-mx3/clock-imx35.c +2
-2@@ -28,7 +28,7 @@#include <mach/hardware.h> #include <mach/common.h> -#define CCM_BASE IO_ADDRESS(CCM_BASE_ADDR) +#define CCM_BASE IO_ADDRESS(MX35_CCM_BASE_ADDR)#define CCM_CCMR 0x00#define CCM_PDR0 0x04@@ -504,7 +504,7 @@ int __init mx35_clocks_init()__raw_writel ((3 <<26 ) | ll,CCM_BASE +CCM_CGR2 );__raw_writel (0 ,CCM_BASE +CCM_CGR3 ); -mxc_timer_init (&gpt_clk,IO_ADDRESS (GPT1_BASE_ADDR ),MXC_INT_GPT ); +mxc_timer_init (&gpt_clk,IO_ADDRESS (MX35_GPT1_BASE_ADDR ),MX35_INT_GPT );return 0 ; }arch/arm/mach-mx3/clock.c +2
-2@@ -618,14 +618,14 @@ int __init mx31_clocks_init(unsigned long fref)mx31_read_cpu_rev (); -if (mx31_revision () >=CHIP_REV_2_0 ) { +if (mx31_revision () >=MX31_CHIP_REV_2_0 ) { reg =__raw_readl (MXC_CCM_PMCR1 );/* No PLL restart on DVFS switch; enable auto EMI handshake */ reg |=MXC_CCM_PMCR1_PLLRDIS |MXC_CCM_PMCR1_EMIRQ_EN ;__raw_writel (reg,MXC_CCM_PMCR1 ); } -mxc_timer_init (&ipg_clk,IO_ADDRESS (GPT1_BASE_ADDR ),MXC_INT_GPT ); +mxc_timer_init (&ipg_clk,IO_ADDRESS (MX31_GPT1_BASE_ADDR ),MX31_INT_GPT );return 0 ; }arch/arm/mach-mx3/crm_regs.h +1
-1@@ -24,7 +24,7 @@#define CKIH_CLK_FREQ_27MHZ 27000000#define CKIL_CLK_FREQ 32768 -#define MXC_CCM_BASE IO_ADDRESS(CCM_BASE_ADDR) +#define MXC_CCM_BASE IO_ADDRESS(MX31_CCM_BASE_ADDR)/* Register addresses */ #define MXC_CCM_CCMR (MXC_CCM_BASE + 0x00)arch/arm/mach-mx3/iomux.c +1
-1@@ -29,7 +29,7 @@/* * IOMUX register (base) addresses */ -#define IOMUX_BASE IO_ADDRESS(IOMUXC_BASE_ADDR) +#define IOMUX_BASE IO_ADDRESS(MX31_IOMUXC_BASE_ADDR)#define IOMUXINT_OBS1 (IOMUX_BASE + 0x000)#define IOMUXINT_OBS2 (IOMUX_BASE + 0x004)#define IOMUXGPR (IOMUX_BASE + 0x008)arch/arm/mach-mx3/kzmarm11.c +10
-10@@ -128,8 +128,8 @@ static struct smsc911x_platform_config kzm_smsc9118_config = {static struct resource kzm_smsc9118_resources[] = { { - .start =CS5_BASE_ADDR , - .end =CS5_BASE_ADDR +SZ_128K -1 , + .start =MX31_CS5_BASE_ADDR , + .end =MX31_CS5_BASE_ADDR +SZ_128K -1 , .flags =IORESOURCE_MEM , }, {@@ -222,15 +222,15 @@ static void __init kzm_board_init(void)*/ static struct map_desc kzm_io_desc[]__initdata = { { - .virtual =CS4_BASE_ADDR_VIRT , - .pfn =__phys_to_pfn (CS4_BASE_ADDR ), - .length =CS4_SIZE , + .virtual =MX31_CS4_BASE_ADDR_VIRT , + .pfn =__phys_to_pfn (MX31_CS4_BASE_ADDR ), + .length =MX31_CS4_SIZE , .type =MT_DEVICE }, { - .virtual =CS5_BASE_ADDR_VIRT , - .pfn =__phys_to_pfn (CS5_BASE_ADDR ), - .length =CS5_SIZE , + .virtual =MX31_CS5_BASE_ADDR_VIRT , + .pfn =__phys_to_pfn (MX31_CS5_BASE_ADDR ), + .length =MX31_CS5_SIZE , .type =MT_DEVICE }, };@@ -258,8 +258,8 @@ static struct sys_timer kzm_timer = {* initialize __mach_desc_KZM_ARM11_01 data structure. */ MACHINE_START (KZM_ARM11_01 ,"Kyoto Microcomputer Co., Ltd. KZM-ARM11-01" ) - .phys_io = AIPS1_BASE_ADDR, - .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, + .phys_io = MX31_AIPS1_BASE_ADDR, + .io_pg_offst = ((MX31_AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, .boot_params = PHYS_OFFSET + 0x100, .map_io = kzm_map_io, .init_irq = mx31_init_irq,arch/arm/mach-mx3/mx31ads.c +7
-7@@ -60,7 +60,7 @@static struct plat_serial8250_port serial_platform_data[] = { { .membase = (void *)(PBC_BASE_ADDRESS +PBC_SC16C652_UARTA ), - .mapbase = (unsigned long )(CS4_BASE_ADDR +PBC_SC16C652_UARTA ), + .mapbase = (unsigned long )(MX31_CS4_BASE_ADDR +PBC_SC16C652_UARTA ), .irq =EXPIO_INT_XUART_INTA , .uartclk =14745600 , .regshift =0 ,@@ -68,7 +68,7 @@ static struct plat_serial8250_port serial_platform_data[] = { .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_AUTO_IRQ, }, { .membase = (void *)(PBC_BASE_ADDRESS + PBC_SC16C652_UARTB), - .mapbase = (unsigned long)(CS4_BASE_ADDR + PBC_SC16C652_UARTB), + .mapbase = (unsigned long)(MX31_CS4_BASE_ADDR + PBC_SC16C652_UARTB), .irq = EXPIO_INT_XUART_INTB, .uartclk = 14745600, .regshift = 0,@@ -494,9 +494,9 @@ static void mxc_init_i2c(void)*/ static struct map_desc mx31ads_io_desc[]__initdata = { { - .virtual =CS4_BASE_ADDR_VIRT , - .pfn =__phys_to_pfn (CS4_BASE_ADDR ), - .length =CS4_SIZE /2 , + .virtual =MX31_CS4_BASE_ADDR_VIRT , + .pfn =__phys_to_pfn (MX31_CS4_BASE_ADDR ), + .length =MX31_CS4_SIZE /2 , .type =MT_DEVICE }, };@@ -541,8 +541,8 @@ static struct sys_timer mx31ads_timer = {*/ MACHINE_START (MX31ADS ,"Freescale MX31ADS" )/* Maintainer: Freescale Semiconductor, Inc. */ - .phys_io = AIPS1_BASE_ADDR, - .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, + .phys_io = MX31_AIPS1_BASE_ADDR, + .io_pg_offst = ((MX31_AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, .boot_params = PHYS_OFFSET + 0x100, .map_io = mx31ads_map_io, .init_irq = mx31ads_init_irq,arch/arm/mach-mx3/mx31lilly.c +4
-4@@ -57,8 +57,8 @@static struct resource smsc91x_resources[] = { { - .start =CS4_BASE_ADDR , - .end =CS4_BASE_ADDR +0xffff , + .start =MX31_CS4_BASE_ADDR , + .end =MX31_CS4_BASE_ADDR +0xffff , .flags =IORESOURCE_MEM , }, {@@ -195,8 +195,8 @@ static struct sys_timer mx31lilly_timer = { };MACHINE_START (LILLY1131 ,"INCO startec LILLY-1131" ) - .phys_io = AIPS1_BASE_ADDR, - .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, + .phys_io = MX31_AIPS1_BASE_ADDR, + .io_pg_offst = ((MX31_AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, .boot_params = PHYS_OFFSET + 0x100, .map_io = mx31_map_io, .init_irq = mx31_init_irq,arch/arm/mach-mx3/mx31lite.c +7
-7@@ -82,8 +82,8 @@ static struct smsc911x_platform_config smsc911x_config = {static struct resource smsc911x_resources[] = { { - .start =CS4_BASE_ADDR , - .end =CS4_BASE_ADDR +0x100 , + .start =MX31_CS4_BASE_ADDR , + .end =MX31_CS4_BASE_ADDR +0x100 , .flags =IORESOURCE_MEM , }, { .start =IOMUX_TO_IRQ (MX31_PIN_SFS6 ),@@ -212,9 +212,9 @@ static struct platform_device physmap_flash_device = {*/ static struct map_desc mx31lite_io_desc[]__initdata = { { - .virtual =CS4_BASE_ADDR_VIRT , - .pfn =__phys_to_pfn (CS4_BASE_ADDR ), - .length =CS4_SIZE , + .virtual =MX31_CS4_BASE_ADDR_VIRT , + .pfn =__phys_to_pfn (MX31_CS4_BASE_ADDR ), + .length =MX31_CS4_SIZE , .type =MT_DEVICE } };@@ -283,8 +283,8 @@ struct sys_timer mx31lite_timer = {MACHINE_START (MX31LITE ,"LogicPD i.MX31 SOM" )/* Maintainer: Freescale Semiconductor, Inc. */ - .phys_io = AIPS1_BASE_ADDR, - .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, + .phys_io = MX31_AIPS1_BASE_ADDR, + .io_pg_offst = ((MX31_AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, .boot_params = PHYS_OFFSET + 0x100, .map_io = mx31lite_map_io, .init_irq = mx31_init_irq,arch/arm/mach-mx3/mx31moboard.c +2
-2@@ -564,8 +564,8 @@ struct sys_timer mx31moboard_timer = {MACHINE_START (MX31MOBOARD ,"EPFL Mobots mx31moboard" )/* Maintainer: Valentin Longchamp, EPFL Mobots group */ - .phys_io = AIPS1_BASE_ADDR, - .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, + .phys_io = MX31_AIPS1_BASE_ADDR, + .io_pg_offst = ((MX31_AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, .boot_params = PHYS_OFFSET + 0x100, .map_io = mx31_map_io, .init_irq = mx31_init_irq,arch/arm/mach-mx3/mx31pdk.c +5
-5@@ -211,9 +211,9 @@ static int __init mx31pdk_init_expio(void)*/ static struct map_desc mx31pdk_io_desc[]__initdata = { { - .virtual =CS5_BASE_ADDR_VIRT , - .pfn =__phys_to_pfn (CS5_BASE_ADDR ), - .length =CS5_SIZE , + .virtual =MX31_CS5_BASE_ADDR_VIRT , + .pfn =__phys_to_pfn (MX31_CS5_BASE_ADDR ), + .length =MX31_CS5_SIZE , .type =MT_DEVICE , }, };@@ -256,8 +256,8 @@ static struct sys_timer mx31pdk_timer = {*/ MACHINE_START (MX31_3DS ,"Freescale MX31PDK (3DS)" )/* Maintainer: Freescale Semiconductor, Inc. */ - .phys_io = AIPS1_BASE_ADDR, - .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, + .phys_io = MX31_AIPS1_BASE_ADDR, + .io_pg_offst = ((MX31_AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, .boot_params = PHYS_OFFSET + 0x100, .map_io = mx31pdk_map_io, .init_irq = mx31_init_irq,arch/arm/mach-mx3/mx35pdk.c +2
-2@@ -106,8 +106,8 @@ struct sys_timer mx35pdk_timer = {MACHINE_START (MX35_3DS ,"Freescale MX35PDK" )/* Maintainer: Freescale Semiconductor, Inc */ - .phys_io = AIPS1_BASE_ADDR, - .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, + .phys_io = MX35_AIPS1_BASE_ADDR, + .io_pg_offst = ((MX35_AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, .boot_params = PHYS_OFFSET + 0x100, .map_io = mx35_map_io, .init_irq = mx35_init_irq,arch/arm/mach-mx3/pcm037.c +8
-8@@ -248,8 +248,8 @@ static struct imxuart_platform_data uart_pdata = {static struct resource smsc911x_resources[] = { { - .start =CS1_BASE_ADDR +0x300 , - .end =CS1_BASE_ADDR +0x300 +SZ_64K -1 , + .start =MX31_CS1_BASE_ADDR +0x300 , + .end =MX31_CS1_BASE_ADDR +0x300 +SZ_64K -1 , .flags =IORESOURCE_MEM , }, { .start =IOMUX_TO_IRQ (MX31_PIN_GPIO3_1 ),@@ -281,8 +281,8 @@ static struct platdata_mtd_ram pcm038_sram_data = { };static struct resource pcm038_sram_resource = { - .start =CS4_BASE_ADDR , - .end =CS4_BASE_ADDR +512 *1024 -1 , + .start =MX31_CS4_BASE_ADDR , + .end =MX31_CS4_BASE_ADDR +512 *1024 -1 , .flags =IORESOURCE_MEM , };@@ -518,8 +518,8 @@ static struct mx3fb_platform_data mx3fb_pdata = {static struct resource pcm970_sja1000_resources[] = { { - .start =CS5_BASE_ADDR , - .end =CS5_BASE_ADDR +0x100 -1 , + .start =MX31_CS5_BASE_ADDR , + .end =MX31_CS5_BASE_ADDR +0x100 -1 , .flags =IORESOURCE_MEM , }, { .start =IOMUX_TO_IRQ (IOMUX_PIN (48 ,105 )),@@ -618,8 +618,8 @@ struct sys_timer pcm037_timer = {MACHINE_START (PCM037 ,"Phytec Phycore pcm037" )/* Maintainer: Pengutronix */ - .phys_io = AIPS1_BASE_ADDR, - .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, + .phys_io = MX31_AIPS1_BASE_ADDR, + .io_pg_offst = ((MX31_AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, .boot_params = PHYS_OFFSET + 0x100, .map_io = mx31_map_io, .init_irq = mx31_init_irq,arch/arm/mach-mx3/pcm043.c +2
-2@@ -248,8 +248,8 @@ struct sys_timer pcm043_timer = {MACHINE_START (PCM043 ,"Phytec Phycore pcm043" )/* Maintainer: Pengutronix */ - .phys_io = AIPS1_BASE_ADDR, - .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, + .phys_io = MX35_AIPS1_BASE_ADDR, + .io_pg_offst = ((MX35_AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, .boot_params = PHYS_OFFSET + 0x100, .map_io = mx35_map_io, .init_irq = mx35_init_irq,arch/arm/mach-mx3/qong.c +7
-7@@ -43,7 +43,7 @@#define QONG_FPGA_VERSION (major, minor, rev) \ (((major & 0xF) << 12) | ((minor & 0xF) << 8) | (rev & 0xFF)) -#define QONG_FPGA_BASEADDR CS1_BASE_ADDR +#define QONG_FPGA_BASEADDR MX31_CS1_BASE_ADDR#define QONG_FPGA_PERIPH_SIZE (1 << 24)#define QONG_FPGA_CTRL_BASEADDR QONG_FPGA_BASEADDR@@ -115,8 +115,8 @@ static struct physmap_flash_data qong_flash_data = { };static struct resource qong_flash_resource = { - .start =CS0_BASE_ADDR , - .end =CS0_BASE_ADDR +QONG_NOR_SIZE -1 , + .start =MX31_CS0_BASE_ADDR , + .end =MX31_CS0_BASE_ADDR +QONG_NOR_SIZE -1 , .flags =IORESOURCE_MEM , };@@ -180,8 +180,8 @@ static struct platform_nand_data qong_nand_data = { };static struct resource qong_nand_resource = { - .start =CS3_BASE_ADDR , - .end =CS3_BASE_ADDR +SZ_32M -1 , + .start =MX31_CS3_BASE_ADDR , + .end =MX31_CS3_BASE_ADDR +SZ_32M -1 , .flags =IORESOURCE_MEM , };@@ -275,8 +275,8 @@ static struct sys_timer qong_timer = {MACHINE_START (QONG ,"Dave/DENX QongEVB-LITE" )/* Maintainer: DENX Software Engineering GmbH */ - .phys_io = AIPS1_BASE_ADDR, - .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, + .phys_io = MX31_AIPS1_BASE_ADDR, + .io_pg_offst = ((MX31_AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, .boot_params = PHYS_OFFSET + 0x100, .map_io = mx31_map_io, .init_irq = mx31_init_irq,Signature · 1 line
1.6.5.2
---
Guennadi Liakhovetski, Ph.D.
Freelance Open-Source Software Developer
http://www.open-technology.de/
PATCH 4/20 imx/clock-imx27: use a macro to define registers
In reply to Uwe Kleine-KönigHi,
Quoted 17 lines · Uwe Kleine-K?nig
This way the base address isn't hard coded in each register definition
Signed-off-by Uwe Kleine-K?nig <[email protected]>Cc Sascha Hauer <[email protected]>Cc Russell King <[email protected]>Cc Rabin Vincent <[email protected]>Cc Javier Martin <[email protected]>Cc Valentin Longchamp <[email protected]>--- arch/arm/mach-mx2/clock_imx27.c | 30 ++++++++++++++++-------------- 1 files changed, 16 insertions(+), 14 deletions(-)arch/arm/mach-mx2/clock_imx27.c +0
-0
arch/arm/mach-mx2/clock_imx27.c line 32
Quoted 4 lines
arch/arm/mach-mx2/clock_imx27.c +1
-0@@ -29,21 +29,23 @@#include <mach/common.h> #include <mach/hardware.h> +#define IO_ADDR_CCM (off) (IO_ADDRESS(CCM_BASE_ADDR) + (off))
I would include the offset in the parameter for the IO_ADDRESS macro, so that the macro would check the complete address (including the offset) for validity:
| +#define IO_ADDR_CCM(off) (IO_ADDRESS((CCM_BASE_ADDR) + (off)))
Otherwise e.g. a negative offset may lead to generation of bogus addresses.
It may be unnecessary in this case, because the macro is only used with constant offsets, but the code may be copied and used in a different context.
Lothar Wa?mann
Signature · 9 lines
___________________________________________________________ Ka-Ro electronics GmbH | Pascalstra?e 22 | D - 52076 Aachen Phone: +49 2408 1402-0 | Fax: +49 2408 1402-10 Gesch?ftsf?hrer: Matthias Kaussen Handelsregistereintrag: Amtsgericht Aachen, HRB 4996 www.karo-electronics.de | info at karo-electronics.de ___________________________________________________________
PATCH 4/20 imx/clock-imx27: use a macro to define registers
Hello,
Quoted 23 lines · Lothar Wa?mann
Hi,
Quoted 20 lines · Uwe Kleine-K?nig
This way the base address isn't hard coded in each register definition
Signed-off-by Uwe Kleine-K?nig <[email protected]>Cc Sascha Hauer <[email protected]>Cc Russell King <[email protected]>Cc Rabin Vincent <[email protected]>Cc Javier Martin <[email protected]>Cc Valentin Longchamp <[email protected]>--- arch/arm/mach-mx2/clock_imx27.c | 30 ++++++++++++++++-------------- 1 files changed, 16 insertions(+), 14 deletions(-)arch/arm/mach-mx2/clock_imx27.c +0
-0@@ -29,21 +29,23 @@#include <mach/common.h> #include <mach/hardware.h>
Quoted 7 lines
arch/arm/mach-mx2/clock_imx27.c line 32
Quoted 1 line
arch/arm/mach-mx2/clock_imx27.c +1
-0+#define IO_ADDR_CCM (off) (IO_ADDRESS(CCM_BASE_ADDR) + (off))I would include the offset in the parameter for the
IO_ADDRESSmacro, so that the macro would check the complete address (including the offset) for validity:
| +#defineIO_ADDR_CCM(off)(IO_ADDRESS((CCM_BASE_ADDR) + (off)))
Otherwise e.g. a negative offset may lead to generation of bogus addresses.
I'd use
#define IO_ADDR_CCM(off) (IO_ADDRESS(CCM_BASE_ADDR + (off)))
and change it in a seperate patch. And with negative addresses all bets are off anyhow.
Grepping for "IO_ADDRESS\(.*\) *\+" finds some more places that want to be fixed.
Best regards
Uwe
Signature · 2 lines
Pengutronix e.K. | Uwe Kleine-K?nig | Industrial Linux Solutions | http://www.pengutronix.de/ |
cover imx cleanup series
In reply to Uwe Kleine-KönigHi,
I updated most patches based on feed-back here and further work. Some patches are completely new.
Quoted 2 lines
The patch by Wolfgang Denk is included because otherwise it would conflict with the series.
I rebased onto Sascha's last pull request which included Wolfgang's patch, so this isn't true any more.
As usual you can find diffstat and shortlog below.
Best regards
Uwe
The following changes since commit f9ffaa9ca9889f17ef30b82bc0bf954d141280f8:
Uwe Kleine-K?nig (1):
imx/mx3: depend on USB_ULPI for otg_ulpi_create
are available in the git repository at:
git://git.pengutronix.de/git/ukl/linux-2.6.git imx
Uwe Kleine-K?nig (25):
imx/mx2: fold crm_regs.h into its only consumer imx/clock-imx21: use a macro to define registers imx/clock-imx27: use a macro to define registers
imx/mach-mx2: use constants namespaced by the corresponding SOC (easy part) imx/mach-mx3: use constants namespaced by the corresponding SOC (easy part) imx/mx3: rename clock.c and iomux.c to {clock,iomux}-imx31.c imx/mx1: add newline at end of Makefile
imx/mx1: rename files defining a machine to mach-$mach.c
imx: rename Kconfig symbol for "Eukrea CPUIMX27 module"
imx: rename Kconfig symbol for "LogicPD MX27 LITEKIT platform" imx/mx2: rename files defining a machine to mach-$mach.c imx/mx3: rename files defining a machine to mach-$mach.c
imx: provide helper macro to define IO_ADDRESS
imx21: define and use MX21_IO_ADDRESS
imx27: define and use MX27_IO_ADDRESS
imx31: define and use MX31_IO_ADDRESS
imx25: redefine MX25_IO_ADDRESS using IMX_IO_ADDRESS
imx35: define and use MX35_IO_ADDRESS
mx3/kzm_arm11_01: define and use board specific IO_ADDRESS macro
imx: mangle addresses after adding the offset
imx: only define deprecated symbols conditionally
imx: remove mx1ads defconfig
imx: remove unneeded include of mach/hardware.h
imx: properly protect mach/mx{1,[25][157x]}.h from multiple inclusion
imx: define functions to configure chip selects in the WEIM
arch/arm/configs/mx1ads_defconfig | 742 --------------------
arch/arm/configs/mx27_defconfig | 2 +-
arch/arm/mach-mx1/Makefile | 4 +-
arch/arm/mach-mx1/{mx1ads.c => mach-mx1ads.c} | 2 +-
arch/arm/mach-mx1/{scb9328.c => mach-scb9328.c} | 2 +-
arch/arm/mach-mx2/Kconfig | 8 +-
arch/arm/mach-mx2/Makefile | 20 +-
arch/arm/mach-mx2/clock_imx21.c | 236 ++++++-
arch/arm/mach-mx2/clock_imx27.c | 33 +-
arch/arm/mach-mx2/cpu_imx27.c | 3 +-
arch/arm/mach-mx2/crm_regs.h | 258 -------
.../{eukrea_cpuimx27.c => mach-cpuimx27.c} | 12 +-
arch/arm/mach-mx2/{mx27lite.c => mach-imx27lite.c} | 4 +-
arch/arm/mach-mx2/{mx21ads.c => mach-mx21ads.c} | 10 +-
arch/arm/mach-mx2/{mx27pdk.c => mach-mx27_3ds.c} | 4 +-
arch/arm/mach-mx2/{mx27ads.c => mach-mx27ads.c} | 6 +-
arch/arm/mach-mx2/{mxt_td60.c => mach-mxt_td60.c} | 4 +-
arch/arm/mach-mx2/{pca100.c => mach-pca100.c} | 4 +-
arch/arm/mach-mx2/{pcm038.c => mach-pcm038.c} | 12 +-
arch/arm/mach-mx2/pcm970-baseboard.c | 4 +-
arch/arm/mach-mx3/Makefile | 30 +-
arch/arm/mach-mx3/{clock.c => clock-imx31.c} | 5 +-
arch/arm/mach-mx3/clock-imx35.c | 5 +-
arch/arm/mach-mx3/cpu.c | 2 +-
arch/arm/mach-mx3/crm_regs.h | 2 +-
arch/arm/mach-mx3/{iomux.c => iomux-imx31.c} | 2 +-
.../{armadillo5x0.c => mach-armadillo5x0.c} | 12 +-
.../mach-mx3/{kzmarm11.c => mach-kzm_arm11_01.c} | 31 +-
arch/arm/mach-mx3/{mx31pdk.c => mach-mx31_3ds.c} | 10 +-
arch/arm/mach-mx3/{mx31ads.c => mach-mx31ads.c} | 14 +-
.../arm/mach-mx3/{mx31lilly.c => mach-mx31lilly.c} | 8 +-
arch/arm/mach-mx3/{mx31lite.c => mach-mx31lite.c} | 14 +-
.../mach-mx3/{mx31moboard.c => mach-mx31moboard.c} | 4 +-
arch/arm/mach-mx3/{mx35pdk.c => mach-mx35pdk.c} | 4 +-
arch/arm/mach-mx3/{pcm037.c => mach-pcm037.c} | 16 +-
.../mach-mx3/{pcm037_eet.c => mach-pcm037_eet.c} | 0
arch/arm/mach-mx3/{pcm043.c => mach-pcm043.c} | 4 +-
arch/arm/mach-mx3/{qong.c => mach-qong.c} | 18 +-
arch/arm/plat-mxc/Makefile | 4 +
arch/arm/plat-mxc/ehci.c | 4 +-
arch/arm/plat-mxc/include/mach/board-kzmarm11.h | 18 +-
arch/arm/plat-mxc/include/mach/board-mx31ads.h | 2 +-
arch/arm/plat-mxc/include/mach/hardware.h | 5 +
arch/arm/plat-mxc/include/mach/mx1.h | 6 +-
arch/arm/plat-mxc/include/mach/mx21.h | 13 +-
arch/arm/plat-mxc/include/mach/mx25.h | 21 +-
arch/arm/plat-mxc/include/mach/mx27.h | 32 +-
arch/arm/plat-mxc/include/mach/mx2x.h | 8 +-
arch/arm/plat-mxc/include/mach/mx31.h | 33 +
arch/arm/plat-mxc/include/mach/mx35.h | 13 +
arch/arm/plat-mxc/include/mach/mx3x.h | 8 +-
arch/arm/plat-mxc/include/mach/mxc.h | 7 +-
arch/arm/plat-mxc/include/mach/uncompress.h | 3 -
53 files changed, 526 insertions(+), 1202 deletions(-)
delete mode 100644 arch/arm/configs/mx1ads_defconfig
rename arch/arm/mach-mx1/{mx1ads.c => mach-mx1ads.c} (98%)
rename arch/arm/mach-mx1/{scb9328.c => mach-scb9328.c} (98%)
delete mode 100644 arch/arm/mach-mx2/crm_regs.h
rename arch/arm/mach-mx2/{eukrea_cpuimx27.c => mach-cpuimx27.c} (94%)
rename arch/arm/mach-mx2/{mx27lite.c => mach-imx27lite.c} (96%)
rename arch/arm/mach-mx2/{mx21ads.c => mach-mx21ads.c} (96%)
rename arch/arm/mach-mx2/{mx27pdk.c => mach-mx27_3ds.c} (96%)
rename arch/arm/mach-mx2/{mx27ads.c => mach-mx27ads.c} (98%)
rename arch/arm/mach-mx2/{mxt_td60.c => mach-mxt_td60.c} (98%)
rename arch/arm/mach-mx2/{pca100.c => mach-pca100.c} (98%)
rename arch/arm/mach-mx2/{pcm038.c => mach-pcm038.c} (96%)
rename arch/arm/mach-mx3/{clock.c => clock-imx31.c} (99%)
rename arch/arm/mach-mx3/{iomux.c => iomux-imx31.c} (98%)
rename arch/arm/mach-mx3/{armadillo5x0.c => mach-armadillo5x0.c} (97%)
rename arch/arm/mach-mx3/{kzmarm11.c => mach-kzm_arm11_01.c} (89%)
rename arch/arm/mach-mx3/{mx31pdk.c => mach-mx31_3ds.c} (97%)
rename arch/arm/mach-mx3/{mx31ads.c => mach-mx31ads.c} (97%)
rename arch/arm/mach-mx3/{mx31lilly.c => mach-mx31lilly.c} (97%)
rename arch/arm/mach-mx3/{mx31lite.c => mach-mx31lite.c} (96%)
rename arch/arm/mach-mx3/{mx31moboard.c => mach-mx31moboard.c} (99%)
rename arch/arm/mach-mx3/{mx35pdk.c => mach-mx35pdk.c} (97%)
rename arch/arm/mach-mx3/{pcm037.c => mach-pcm037.c} (97%)
rename arch/arm/mach-mx3/{pcm037_eet.c => mach-pcm037_eet.c} (100%)
rename arch/arm/mach-mx3/{pcm043.c => mach-pcm043.c} (98%)
rename arch/arm/mach-mx3/{qong.c => mach-qong.c} (94%)Signature · 2 lines
Pengutronix e.K. | Uwe Kleine-K?nig | Industrial Linux Solutions | http://www.pengutronix.de/ |
PATCH 1/25 imx/mx2: fold crm_regs.h into its only consumer
Signed-off-by Uwe Kleine-K?nig <[email protected]>
Cc Sascha Hauer <[email protected]>
Cc Russell King <[email protected]>
Cc Holger Schurig <[email protected]>
Cc Rabin Vincent <[email protected]>
--- arch/arm/mach-mx2/clock_imx21.c | 231 ++++++++++++++++++++++++++++++++++- arch/arm/mach-mx2/crm_regs.h | 258 --------------------------------------- 2 files changed, 230 insertions(+), 259 deletions(-) delete mode 100644 arch/arm/mach-mx2/crm_regs.h
arch/arm/mach-mx2/clock_imx21.c +230 -1
@@ -23,11 +23,240 @@#include <linux/module.h> #include <mach/clock.h> +#include <mach/hardware.h> #include <mach/common.h> #include <asm/clkdev.h> #include <asm/div64.h> -#include "crm_regs.h" +/* Register offsets */ +#define CCM_CSCR (IO_ADDRESS(CCM_BASE_ADDR) + 0x0) +#define CCM_MPCTL0 (IO_ADDRESS(CCM_BASE_ADDR) + 0x4) +#define CCM_MPCTL1 (IO_ADDRESS(CCM_BASE_ADDR) + 0x8) +#define CCM_SPCTL0 (IO_ADDRESS(CCM_BASE_ADDR) + 0xC) +#define CCM_SPCTL1 (IO_ADDRESS(CCM_BASE_ADDR) + 0x10) +#define CCM_OSC26MCTL (IO_ADDRESS(CCM_BASE_ADDR) + 0x14) +#define CCM_PCDR0 (IO_ADDRESS(CCM_BASE_ADDR) + 0x18) +#define CCM_PCDR1 (IO_ADDRESS(CCM_BASE_ADDR) + 0x1c) +#define CCM_PCCR0 (IO_ADDRESS(CCM_BASE_ADDR) + 0x20) +#define CCM_PCCR1 (IO_ADDRESS(CCM_BASE_ADDR) + 0x24) +#define CCM_CCSR (IO_ADDRESS(CCM_BASE_ADDR) + 0x28) +#define CCM_PMCTL (IO_ADDRESS(CCM_BASE_ADDR) + 0x2c) +#define CCM_PMCOUNT (IO_ADDRESS(CCM_BASE_ADDR) + 0x30) +#define CCM_WKGDCTL (IO_ADDRESS(CCM_BASE_ADDR) + 0x34) + +#define CCM_CSCR_PRESC_OFFSET 29 +#define CCM_CSCR_PRESC_MASK (0x7 << CCM_CSCR_PRESC_OFFSET) + +#define CCM_CSCR_USB_OFFSET 26 +#define CCM_CSCR_USB_MASK (0x7 << CCM_CSCR_USB_OFFSET) +#define CCM_CSCR_SD_OFFSET 24 +#define CCM_CSCR_SD_MASK (0x3 << CCM_CSCR_SD_OFFSET) +#define CCM_CSCR_SPLLRES (1 << 22) +#define CCM_CSCR_MPLLRES (1 << 21) +#define CCM_CSCR_SSI2_OFFSET 20 +#define CCM_CSCR_SSI2 (1 << CCM_CSCR_SSI2_OFFSET) +#define CCM_CSCR_SSI1_OFFSET 19 +#define CCM_CSCR_SSI1 (1 << CCM_CSCR_SSI1_OFFSET) +#define CCM_CSCR_FIR_OFFSET 18 +#define CCM_CSCR_FIR (1 << CCM_CSCR_FIR_OFFSET) +#define CCM_CSCR_SP (1 << 17) +#define CCM_CSCR_MCU (1 << 16) +#define CCM_CSCR_BCLK_OFFSET 10 +#define CCM_CSCR_BCLK_MASK (0xf << CCM_CSCR_BCLK_OFFSET) +#define CCM_CSCR_IPDIV_OFFSET 9 +#define CCM_CSCR_IPDIV (1 << CCM_CSCR_IPDIV_OFFSET) + +#define CCM_CSCR_OSC26MDIV (1 << 4) +#define CCM_CSCR_OSC26M (1 << 3) +#define CCM_CSCR_FPM (1 << 2) +#define CCM_CSCR_SPEN (1 << 1) +#define CCM_CSCR_MPEN 1 + +#define CCM_MPCTL0_CPLM (1 << 31) +#define CCM_MPCTL0_PD_OFFSET 26 +#define CCM_MPCTL0_PD_MASK (0xf << 26) +#define CCM_MPCTL0_MFD_OFFSET 16 +#define CCM_MPCTL0_MFD_MASK (0x3ff << 16) +#define CCM_MPCTL0_MFI_OFFSET 10 +#define CCM_MPCTL0_MFI_MASK (0xf << 10) +#define CCM_MPCTL0_MFN_OFFSET 0 +#define CCM_MPCTL0_MFN_MASK 0x3ff + +#define CCM_MPCTL1_LF (1 << 15) +#define CCM_MPCTL1_BRMO (1 << 6) + +#define CCM_SPCTL0_CPLM (1 << 31) +#define CCM_SPCTL0_PD_OFFSET 26 +#define CCM_SPCTL0_PD_MASK (0xf << 26) +#define CCM_SPCTL0_MFD_OFFSET 16 +#define CCM_SPCTL0_MFD_MASK (0x3ff << 16) +#define CCM_SPCTL0_MFI_OFFSET 10 +#define CCM_SPCTL0_MFI_MASK (0xf << 10) +#define CCM_SPCTL0_MFN_OFFSET 0 +#define CCM_SPCTL0_MFN_MASK 0x3ff + +#define CCM_SPCTL1_LF (1 << 15) +#define CCM_SPCTL1_BRMO (1 << 6) + +#define CCM_OSC26MCTL_PEAK_OFFSET 16 +#define CCM_OSC26MCTL_PEAK_MASK (0x3 << 16) +#define CCM_OSC26MCTL_AGC_OFFSET 8 +#define CCM_OSC26MCTL_AGC_MASK (0x3f << 8) +#define CCM_OSC26MCTL_ANATEST_OFFSET 0 +#define CCM_OSC26MCTL_ANATEST_MASK 0x3f + +#define CCM_PCDR0_SSI2BAUDDIV_OFFSET 26 +#define CCM_PCDR0_SSI2BAUDDIV_MASK (0x3f << 26) +#define CCM_PCDR0_SSI1BAUDDIV_OFFSET 16 +#define CCM_PCDR0_SSI1BAUDDIV_MASK (0x3f << 16) +#define CCM_PCDR0_NFCDIV_OFFSET 12 +#define CCM_PCDR0_NFCDIV_MASK (0xf << 12) +#define CCM_PCDR0_48MDIV_OFFSET 5 +#define CCM_PCDR0_48MDIV_MASK (0x7 << CCM_PCDR0_48MDIV_OFFSET) +#define CCM_PCDR0_FIRIDIV_OFFSET 0 +#define CCM_PCDR0_FIRIDIV_MASK 0x1f +#define CCM_PCDR1_PERDIV4_OFFSET 24 +#define CCM_PCDR1_PERDIV4_MASK (0x3f << 24) +#define CCM_PCDR1_PERDIV3_OFFSET 16 +#define CCM_PCDR1_PERDIV3_MASK (0x3f << 16) +#define CCM_PCDR1_PERDIV2_OFFSET 8 +#define CCM_PCDR1_PERDIV2_MASK (0x3f << 8) +#define CCM_PCDR1_PERDIV1_OFFSET 0 +#define CCM_PCDR1_PERDIV1_MASK 0x3f + +#define CCM_PCCR_HCLK_CSI_OFFSET 31 +#define CCM_PCCR_HCLK_CSI_REG CCM_PCCR0 +#define CCM_PCCR_HCLK_DMA_OFFSET 30 +#define CCM_PCCR_HCLK_DMA_REG CCM_PCCR0 +#define CCM_PCCR_HCLK_BROM_OFFSET 28 +#define CCM_PCCR_HCLK_BROM_REG CCM_PCCR0 +#define CCM_PCCR_HCLK_EMMA_OFFSET 27 +#define CCM_PCCR_HCLK_EMMA_REG CCM_PCCR0 +#define CCM_PCCR_HCLK_LCDC_OFFSET 26 +#define CCM_PCCR_HCLK_LCDC_REG CCM_PCCR0 +#define CCM_PCCR_HCLK_SLCDC_OFFSET 25 +#define CCM_PCCR_HCLK_SLCDC_REG CCM_PCCR0 +#define CCM_PCCR_HCLK_USBOTG_OFFSET 24 +#define CCM_PCCR_HCLK_USBOTG_REG CCM_PCCR0 +#define CCM_PCCR_HCLK_BMI_OFFSET 23 +#define CCM_PCCR_BMI_MASK (1 << CCM_PCCR_BMI_MASK) +#define CCM_PCCR_HCLK_BMI_REG CCM_PCCR0 +#define CCM_PCCR_PERCLK4_OFFSET 22 +#define CCM_PCCR_PERCLK4_REG CCM_PCCR0 +#define CCM_PCCR_SLCDC_OFFSET 21 +#define CCM_PCCR_SLCDC_REG CCM_PCCR0 +#define CCM_PCCR_FIRI_BAUD_OFFSET 20 +#define CCM_PCCR_FIRI_BAUD_MASK (1 << CCM_PCCR_FIRI_BAUD_MASK) +#define CCM_PCCR_FIRI_BAUD_REG CCM_PCCR0 +#define CCM_PCCR_NFC_OFFSET 19 +#define CCM_PCCR_NFC_REG CCM_PCCR0 +#define CCM_PCCR_LCDC_OFFSET 18 +#define CCM_PCCR_LCDC_REG CCM_PCCR0 +#define CCM_PCCR_SSI1_BAUD_OFFSET 17 +#define CCM_PCCR_SSI1_BAUD_REG CCM_PCCR0 +#define CCM_PCCR_SSI2_BAUD_OFFSET 16 +#define CCM_PCCR_SSI2_BAUD_REG CCM_PCCR0 +#define CCM_PCCR_EMMA_OFFSET 15 +#define CCM_PCCR_EMMA_REG CCM_PCCR0 +#define CCM_PCCR_USBOTG_OFFSET 14 +#define CCM_PCCR_USBOTG_REG CCM_PCCR0 +#define CCM_PCCR_DMA_OFFSET 13 +#define CCM_PCCR_DMA_REG CCM_PCCR0 +#define CCM_PCCR_I2C1_OFFSET 12 +#define CCM_PCCR_I2C1_REG CCM_PCCR0 +#define CCM_PCCR_GPIO_OFFSET 11 +#define CCM_PCCR_GPIO_REG CCM_PCCR0 +#define CCM_PCCR_SDHC2_OFFSET 10 +#define CCM_PCCR_SDHC2_REG CCM_PCCR0 +#define CCM_PCCR_SDHC1_OFFSET 9 +#define CCM_PCCR_SDHC1_REG CCM_PCCR0 +#define CCM_PCCR_FIRI_OFFSET 8 +#define CCM_PCCR_FIRI_MASK (1 << CCM_PCCR_BAUD_MASK) +#define CCM_PCCR_FIRI_REG CCM_PCCR0 +#define CCM_PCCR_SSI2_IPG_OFFSET 7 +#define CCM_PCCR_SSI2_REG CCM_PCCR0 +#define CCM_PCCR_SSI1_IPG_OFFSET 6 +#define CCM_PCCR_SSI1_REG CCM_PCCR0 +#define CCM_PCCR_CSPI2_OFFSET 5 +#define CCM_PCCR_CSPI2_REG CCM_PCCR0 +#define CCM_PCCR_CSPI1_OFFSET 4 +#define CCM_PCCR_CSPI1_REG CCM_PCCR0 +#define CCM_PCCR_UART4_OFFSET 3 +#define CCM_PCCR_UART4_REG CCM_PCCR0 +#define CCM_PCCR_UART3_OFFSET 2 +#define CCM_PCCR_UART3_REG CCM_PCCR0 +#define CCM_PCCR_UART2_OFFSET 1 +#define CCM_PCCR_UART2_REG CCM_PCCR0 +#define CCM_PCCR_UART1_OFFSET 0 +#define CCM_PCCR_UART1_REG CCM_PCCR0 + +#define CCM_PCCR_OWIRE_OFFSET 31 +#define CCM_PCCR_OWIRE_REG CCM_PCCR1 +#define CCM_PCCR_KPP_OFFSET 30 +#define CCM_PCCR_KPP_REG CCM_PCCR1 +#define CCM_PCCR_RTC_OFFSET 29 +#define CCM_PCCR_RTC_REG CCM_PCCR1 +#define CCM_PCCR_PWM_OFFSET 28 +#define CCM_PCCR_PWM_REG CCM_PCCR1 +#define CCM_PCCR_GPT3_OFFSET 27 +#define CCM_PCCR_GPT3_REG CCM_PCCR1 +#define CCM_PCCR_GPT2_OFFSET 26 +#define CCM_PCCR_GPT2_REG CCM_PCCR1 +#define CCM_PCCR_GPT1_OFFSET 25 +#define CCM_PCCR_GPT1_REG CCM_PCCR1 +#define CCM_PCCR_WDT_OFFSET 24 +#define CCM_PCCR_WDT_REG CCM_PCCR1 +#define CCM_PCCR_CSPI3_OFFSET 23 +#define CCM_PCCR_CSPI3_REG CCM_PCCR1 + +#define CCM_PCCR_CSPI1_MASK (1 << CCM_PCCR_CSPI1_OFFSET) +#define CCM_PCCR_CSPI2_MASK (1 << CCM_PCCR_CSPI2_OFFSET) +#define CCM_PCCR_CSPI3_MASK (1 << CCM_PCCR_CSPI3_OFFSET) +#define CCM_PCCR_DMA_MASK (1 << CCM_PCCR_DMA_OFFSET) +#define CCM_PCCR_EMMA_MASK (1 << CCM_PCCR_EMMA_OFFSET) +#define CCM_PCCR_GPIO_MASK (1 << CCM_PCCR_GPIO_OFFSET) +#define CCM_PCCR_GPT1_MASK (1 << CCM_PCCR_GPT1_OFFSET) +#define CCM_PCCR_GPT2_MASK (1 << CCM_PCCR_GPT2_OFFSET) +#define CCM_PCCR_GPT3_MASK (1 << CCM_PCCR_GPT3_OFFSET) +#define CCM_PCCR_HCLK_BROM_MASK (1 << CCM_PCCR_HCLK_BROM_OFFSET) +#define CCM_PCCR_HCLK_CSI_MASK (1 << CCM_PCCR_HCLK_CSI_OFFSET) +#define CCM_PCCR_HCLK_DMA_MASK (1 << CCM_PCCR_HCLK_DMA_OFFSET) +#define CCM_PCCR_HCLK_EMMA_MASK (1 << CCM_PCCR_HCLK_EMMA_OFFSET) +#define CCM_PCCR_HCLK_LCDC_MASK (1 << CCM_PCCR_HCLK_LCDC_OFFSET) +#define CCM_PCCR_HCLK_SLCDC_MASK (1 << CCM_PCCR_HCLK_SLCDC_OFFSET) +#define CCM_PCCR_HCLK_USBOTG_MASK (1 << CCM_PCCR_HCLK_USBOTG_OFFSET) +#define CCM_PCCR_I2C1_MASK (1 << CCM_PCCR_I2C1_OFFSET) +#define CCM_PCCR_KPP_MASK (1 << CCM_PCCR_KPP_OFFSET) +#define CCM_PCCR_LCDC_MASK (1 << CCM_PCCR_LCDC_OFFSET) +#define CCM_PCCR_NFC_MASK (1 << CCM_PCCR_NFC_OFFSET) +#define CCM_PCCR_OWIRE_MASK (1 << CCM_PCCR_OWIRE_OFFSET) +#define CCM_PCCR_PERCLK4_MASK (1 << CCM_PCCR_PERCLK4_OFFSET) +#define CCM_PCCR_PWM_MASK (1 << CCM_PCCR_PWM_OFFSET) +#define CCM_PCCR_RTC_MASK (1 << CCM_PCCR_RTC_OFFSET) +#define CCM_PCCR_SDHC1_MASK (1 << CCM_PCCR_SDHC1_OFFSET) +#define CCM_PCCR_SDHC2_MASK (1 << CCM_PCCR_SDHC2_OFFSET) +#define CCM_PCCR_SLCDC_MASK (1 << CCM_PCCR_SLCDC_OFFSET) +#define CCM_PCCR_SSI1_BAUD_MASK (1 << CCM_PCCR_SSI1_BAUD_OFFSET) +#define CCM_PCCR_SSI1_IPG_MASK (1 << CCM_PCCR_SSI1_IPG_OFFSET) +#define CCM_PCCR_SSI2_BAUD_MASK (1 << CCM_PCCR_SSI2_BAUD_OFFSET) +#define CCM_PCCR_SSI2_IPG_MASK (1 << CCM_PCCR_SSI2_IPG_OFFSET) +#define CCM_PCCR_UART1_MASK (1 << CCM_PCCR_UART1_OFFSET) +#define CCM_PCCR_UART2_MASK (1 << CCM_PCCR_UART2_OFFSET) +#define CCM_PCCR_UART3_MASK (1 << CCM_PCCR_UART3_OFFSET) +#define CCM_PCCR_UART4_MASK (1 << CCM_PCCR_UART4_OFFSET) +#define CCM_PCCR_USBOTG_MASK (1 << CCM_PCCR_USBOTG_OFFSET) +#define CCM_PCCR_WDT_MASK (1 << CCM_PCCR_WDT_OFFSET) + +#define CCM_CCSR_32KSR (1 << 15) + +#define CCM_CCSR_CLKMODE1 (1 << 9) +#define CCM_CCSR_CLKMODE0 (1 << 8) + +#define CCM_CCSR_CLKOSEL_OFFSET 0 +#define CCM_CCSR_CLKOSEL_MASK 0x1f + +#define SYS_FMCR 0x14/* Functional Muxing Control Reg */ +#define SYS_CHIP_ID 0x00/* The offset of CHIP ID register */ static int _clk_enable (struct clk *clk) {
arch/arm/mach-mx2/crm_regs.h deleted +0 -258
258 lines not on this page · raw message
Signature · 1 line
1.6.5.2
PATCH 2/25 imx/clock-imx21: use a macro to define registers
This way the base address isn't hard coded in each register definition
Signed-off-by Uwe Kleine-K?nig <[email protected]>
Cc Sascha Hauer <[email protected]>
Cc Russell King <[email protected]>
Cc Holger Schurig <[email protected]>
Cc Rabin Vincent <[email protected]>
--- arch/arm/mach-mx2/clock_imx21.c | 30 ++++++++++++++++-------------- 1 files changed, 16 insertions(+), 14 deletions(-)
arch/arm/mach-mx2/clock_imx21.c +16 -14
@@ -28,21 +28,23 @@#include <asm/clkdev.h> #include <asm/div64.h> +#define IO_ADDR_CCM (off) (IO_ADDRESS(CCM_BASE_ADDR) + (off)) +/* Register offsets */ -#define CCM_CSCR (IO_ADDRESS(CCM_BASE_ADDR) + 0x0) -#define CCM_MPCTL0 (IO_ADDRESS(CCM_BASE_ADDR) + 0x4) -#define CCM_MPCTL1 (IO_ADDRESS(CCM_BASE_ADDR) + 0x8) -#define CCM_SPCTL0 (IO_ADDRESS(CCM_BASE_ADDR) + 0xC) -#define CCM_SPCTL1 (IO_ADDRESS(CCM_BASE_ADDR) + 0x10) -#define CCM_OSC26MCTL (IO_ADDRESS(CCM_BASE_ADDR) + 0x14) -#define CCM_PCDR0 (IO_ADDRESS(CCM_BASE_ADDR) + 0x18) -#define CCM_PCDR1 (IO_ADDRESS(CCM_BASE_ADDR) + 0x1c) -#define CCM_PCCR0 (IO_ADDRESS(CCM_BASE_ADDR) + 0x20) -#define CCM_PCCR1 (IO_ADDRESS(CCM_BASE_ADDR) + 0x24) -#define CCM_CCSR (IO_ADDRESS(CCM_BASE_ADDR) + 0x28) -#define CCM_PMCTL (IO_ADDRESS(CCM_BASE_ADDR) + 0x2c) -#define CCM_PMCOUNT (IO_ADDRESS(CCM_BASE_ADDR) + 0x30) -#define CCM_WKGDCTL (IO_ADDRESS(CCM_BASE_ADDR) + 0x34) +#define CCM_CSCR IO_ADDR_CCM(0x0) +#define CCM_MPCTL0 IO_ADDR_CCM(0x4) +#define CCM_MPCTL1 IO_ADDR_CCM(0x8) +#define CCM_SPCTL0 IO_ADDR_CCM(0xc) +#define CCM_SPCTL1 IO_ADDR_CCM(0x10) +#define CCM_OSC26MCTL IO_ADDR_CCM(0x14) +#define CCM_PCDR0 IO_ADDR_CCM(0x18) +#define CCM_PCDR1 IO_ADDR_CCM(0x1c) +#define CCM_PCCR0 IO_ADDR_CCM(0x20) +#define CCM_PCCR1 IO_ADDR_CCM(0x24) +#define CCM_CCSR IO_ADDR_CCM(0x28) +#define CCM_PMCTL IO_ADDR_CCM(0x2c) +#define CCM_PMCOUNT IO_ADDR_CCM(0x30) +#define CCM_WKGDCTL IO_ADDR_CCM(0x34)#define CCM_CSCR_PRESC_OFFSET 29#define CCM_CSCR_PRESC_MASK (0x7 << CCM_CSCR_PRESC_OFFSET)
Signature · 1 line
1.6.5.2
PATCH 3/25 imx/clock-imx27: use a macro to define registers
This way the base address isn't hard coded in each register definition
Signed-off-by Uwe Kleine-K?nig <[email protected]>
Cc Sascha Hauer <[email protected]>
Cc Russell King <[email protected]>
Cc Rabin Vincent <[email protected]>
Cc Javier Martin <[email protected]>
Cc Valentin Longchamp <[email protected]>
--- arch/arm/mach-mx2/clock_imx27.c | 30 ++++++++++++++++-------------- 1 files changed, 16 insertions(+), 14 deletions(-)
arch/arm/mach-mx2/clock_imx27.c +16 -14
@@ -29,21 +29,23 @@#include <mach/common.h> #include <mach/hardware.h> +#define IO_ADDR_CCM (off) (IO_ADDRESS(CCM_BASE_ADDR) + (off)) +/* Register offsets */ -#define CCM_CSCR (IO_ADDRESS(CCM_BASE_ADDR) + 0x0) -#define CCM_MPCTL0 (IO_ADDRESS(CCM_BASE_ADDR) + 0x4) -#define CCM_MPCTL1 (IO_ADDRESS(CCM_BASE_ADDR) + 0x8) -#define CCM_SPCTL0 (IO_ADDRESS(CCM_BASE_ADDR) + 0xC) -#define CCM_SPCTL1 (IO_ADDRESS(CCM_BASE_ADDR) + 0x10) -#define CCM_OSC26MCTL (IO_ADDRESS(CCM_BASE_ADDR) + 0x14) -#define CCM_PCDR0 (IO_ADDRESS(CCM_BASE_ADDR) + 0x18) -#define CCM_PCDR1 (IO_ADDRESS(CCM_BASE_ADDR) + 0x1c) -#define CCM_PCCR0 (IO_ADDRESS(CCM_BASE_ADDR) + 0x20) -#define CCM_PCCR1 (IO_ADDRESS(CCM_BASE_ADDR) + 0x24) -#define CCM_CCSR (IO_ADDRESS(CCM_BASE_ADDR) + 0x28) -#define CCM_PMCTL (IO_ADDRESS(CCM_BASE_ADDR) + 0x2c) -#define CCM_PMCOUNT (IO_ADDRESS(CCM_BASE_ADDR) + 0x30) -#define CCM_WKGDCTL (IO_ADDRESS(CCM_BASE_ADDR) + 0x34) +#define CCM_CSCR IO_ADDR_CCM(0x0) +#define CCM_MPCTL0 IO_ADDR_CCM(0x4) +#define CCM_MPCTL1 IO_ADDR_CCM(0x8) +#define CCM_SPCTL0 IO_ADDR_CCM(0xc) +#define CCM_SPCTL1 IO_ADDR_CCM(0x10) +#define CCM_OSC26MCTL IO_ADDR_CCM(0x14) +#define CCM_PCDR0 IO_ADDR_CCM(0x18) +#define CCM_PCDR1 IO_ADDR_CCM(0x1c) +#define CCM_PCCR0 IO_ADDR_CCM(0x20) +#define CCM_PCCR1 IO_ADDR_CCM(0x24) +#define CCM_CCSR IO_ADDR_CCM(0x28) +#define CCM_PMCTL IO_ADDR_CCM(0x2c) +#define CCM_PMCOUNT IO_ADDR_CCM(0x30) +#define CCM_WKGDCTL IO_ADDR_CCM(0x34)#define CCM_CSCR_UPDATE_DIS (1 << 31)#define CCM_CSCR_SSI2 (1 << 23)
Signature · 1 line
1.6.5.2
PATCH 4/25 imx/mach-mx2: use constants namespaced by the corresponding SOC (easy part)
This just leaves devices.c, generic.c and serial.c to clean up. As these files are used on more than one SOC they need some more work.
Signed-off-by Uwe Kleine-K?nig <[email protected]>
Cc Holger Schurig <[email protected]>
Cc Rabin Vincent <[email protected]>
Cc Javier Martin <[email protected]>
Cc Valentin Longchamp <[email protected]>
Cc Jean Delvare <[email protected]>
Cc Eric Benard <[email protected]>
Cc Ivo Clarysse <[email protected]>
Cc Vladimir Barinov <[email protected]>
Cc Daniel Schaeffer <[email protected]>
Cc Simon POLETTE <spolette@adnlysd018.(none)>
Cc Fabio Estevam <[email protected]>
Cc Alan Carvalho de Assis <[email protected]>
Cc Luotao Fu <[email protected]>
--- arch/arm/mach-mx2/clock_imx21.c | 5 +++-- arch/arm/mach-mx2/clock_imx27.c | 5 +++-- arch/arm/mach-mx2/cpu_imx27.c | 2 +- arch/arm/mach-mx2/eukrea_cpuimx27.c | 12 ++++++------ arch/arm/mach-mx2/mx21ads.c | 10 +++++----- arch/arm/mach-mx2/mx27ads.c | 6 +++--- arch/arm/mach-mx2/mx27lite.c | 4 ++-- arch/arm/mach-mx2/mx27pdk.c | 4 ++-- arch/arm/mach-mx2/mxt_td60.c | 4 ++-- arch/arm/mach-mx2/pca100.c | 4 ++-- arch/arm/mach-mx2/pcm038.c | 8 ++++---- arch/arm/mach-mx2/pcm970-baseboard.c | 4 ++-- 12 files changed, 35 insertions(+), 33 deletions(-)
arch/arm/mach-mx2/clock_imx21.c +3 -2
@@ -28,7 +28,7 @@#include <asm/clkdev.h> #include <asm/div64.h> -#define IO_ADDR_CCM (off) (IO_ADDRESS(CCM_BASE_ADDR) + (off)) +#define IO_ADDR_CCM (off) (IO_ADDRESS(MX21_CCM_BASE_ADDR) + (off))/* Register offsets */ #define CCM_CSCR IO_ADDR_CCM(0x0)
@@ -1235,6 +1235,7 @@ int __init mx21_clocks_init(unsigned long lref, unsigned long href)clk_enable (&uart_clk[0 ]);#endif -mxc_timer_init (&gpt_clk[0 ],IO_ADDRESS (GPT1_BASE_ADDR ),MXC_INT_GPT1 ); +mxc_timer_init (&gpt_clk[0 ],IO_ADDRESS (MX21_GPT1_BASE_ADDR ), +MX21_INT_GPT1 );return 0 ; }
arch/arm/mach-mx2/clock_imx27.c +3 -2
@@ -29,7 +29,7 @@#include <mach/common.h> #include <mach/hardware.h> -#define IO_ADDR_CCM (off) (IO_ADDRESS(CCM_BASE_ADDR) + (off)) +#define IO_ADDR_CCM (off) (IO_ADDRESS(MX27_CCM_BASE_ADDR) + (off))/* Register offsets */ #define CCM_CSCR IO_ADDR_CCM(0x0)
@@ -757,7 +757,8 @@ int __init mx27_clocks_init(unsigned long fref)clk_enable (&uart1_clk);#endif -mxc_timer_init (&gpt1_clk,IO_ADDRESS (GPT1_BASE_ADDR ),MXC_INT_GPT1 ); +mxc_timer_init (&gpt1_clk,IO_ADDRESS (MX27_GPT1_BASE_ADDR ), +MX27_INT_GPT1 );return 0 ; }
arch/arm/mach-mx2/cpu_imx27.c +1 -1
@@ -39,7 +39,7 @@ static void query_silicon_parameter(void)* the silicon revision very early we read it here to * avoid any further hooks */ - val =__raw_readl (IO_ADDRESS (SYSCTRL_BASE_ADDR ) +SYS_CHIP_ID ); + val =__raw_readl (IO_ADDRESS (MX27_SYSCTRL_BASE_ADDR ) +SYS_CHIP_ID ); cpu_silicon_rev = (int )(val >>28 ); cpu_partnumber = (int )((val >>12 ) &0xFFFF );
arch/arm/mach-mx2/eukrea_cpuimx27.c +6 -6
@@ -142,28 +142,28 @@ static struct i2c_board_info eukrea_cpuimx27_i2c_devices[] = { #if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE) static struct plat_serial8250_port serial_platform_data[] = { { - .mapbase = (unsigned long)(CS3_BASE_ADDR + 0x200000), + .mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x200000), .irq = IRQ_GPIOB(23), .uartclk = 14745600, .regshift = 1, .iotype = UPIO_MEM, .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP, }, { - .mapbase = (unsigned long)(CS3_BASE_ADDR + 0x400000), + .mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x400000), .irq = IRQ_GPIOB(22), .uartclk = 14745600, .regshift = 1, .iotype = UPIO_MEM, .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP, }, { - .mapbase = (unsigned long)(CS3_BASE_ADDR + 0x800000), + .mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x800000), .irq = IRQ_GPIOB(27), .uartclk = 14745600, .regshift = 1, .iotype = UPIO_MEM, .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP, }, { - .mapbase = (unsigned long)(CS3_BASE_ADDR + 0x1000000), + .mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x1000000), .irq = IRQ_GPIOB(30), .uartclk = 14745600, .regshift = 1,
@@ -224,8 +224,8 @@ static struct sys_timer eukrea_cpuimx27_timer = { };MACHINE_START (CPUIMX27 ,"EUKREA CPUIMX27" ) - .phys_io = AIPI_BASE_ADDR, - .io_pg_offst = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc, + .phys_io = MX27_AIPI_BASE_ADDR, + .io_pg_offst = ((MX27_AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc, .boot_params = PHYS_OFFSET + 0x100, .map_io = mx27_map_io, .init_irq = mx27_init_irq,
arch/arm/mach-mx2/mx21ads.c +5 -5
@@ -118,8 +118,8 @@ static struct physmap_flash_data mx21ads_flash_data = { };static struct resource mx21ads_flash_resource = { - .start =CS0_BASE_ADDR , - .end =CS0_BASE_ADDR +0x02000000 -1 , + .start =MX21_CS0_BASE_ADDR , + .end =MX21_CS0_BASE_ADDR +0x02000000 -1 , .flags =IORESOURCE_MEM , };
@@ -242,7 +242,7 @@ static struct map_desc mx21ads_io_desc[] __initdata = {*/ { .virtual = MX21ADS_MMIO_BASE_ADDR, - .pfn = __phys_to_pfn(CS1_BASE_ADDR), + .pfn = __phys_to_pfn(MX21_CS1_BASE_ADDR), .length = MX21ADS_MMIO_SIZE, .type = MT_DEVICE, },
@@ -284,8 +284,8 @@ static struct sys_timer mx21ads_timer = {MACHINE_START (MX21ADS ,"Freescale i.MX21ADS" )/* maintainer: Freescale Semiconductor, Inc. */ - .phys_io = AIPI_BASE_ADDR, - .io_pg_offst = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc, + .phys_io = MX21_AIPI_BASE_ADDR, + .io_pg_offst = ((MX21_AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc, .boot_params = PHYS_OFFSET + 0x100, .map_io = mx21ads_map_io, .init_irq = mx21_init_irq,
arch/arm/mach-mx2/mx27ads.c +3 -3
@@ -320,7 +320,7 @@ static struct sys_timer mx27ads_timer = {static struct map_desc mx27ads_io_desc[]__initdata = { { .virtual =PBC_BASE_ADDRESS , - .pfn =__phys_to_pfn (CS4_BASE_ADDR ), + .pfn =__phys_to_pfn (MX27_CS4_BASE_ADDR ), .length =SZ_1M , .type =MT_DEVICE , },
@@ -334,8 +334,8 @@ static void __init mx27ads_map_io(void)MACHINE_START (MX27ADS ,"Freescale i.MX27ADS" )/* maintainer: Freescale Semiconductor, Inc. */ - .phys_io = AIPI_BASE_ADDR, - .io_pg_offst = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc, + .phys_io = MX27_AIPI_BASE_ADDR, + .io_pg_offst = ((MX27_AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc, .boot_params = PHYS_OFFSET + 0x100, .map_io = mx27ads_map_io, .init_irq = mx27_init_irq,
arch/arm/mach-mx2/mx27lite.c +2 -2
@@ -85,8 +85,8 @@ static struct sys_timer mx27lite_timer = { };MACHINE_START (IMX27LITE ,"LogicPD i.MX27LITE" ) - .phys_io = AIPI_BASE_ADDR, - .io_pg_offst = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc, + .phys_io = MX27_AIPI_BASE_ADDR, + .io_pg_offst = ((MX27_AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc, .boot_params = PHYS_OFFSET + 0x100, .map_io = mx27_map_io, .init_irq = mx27_init_irq,
arch/arm/mach-mx2/mx27pdk.c +2 -2
@@ -85,8 +85,8 @@ static struct sys_timer mx27pdk_timer = {MACHINE_START (MX27_3DS ,"Freescale MX27PDK" )/* maintainer: Freescale Semiconductor, Inc. */ - .phys_io = AIPI_BASE_ADDR, - .io_pg_offst = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc, + .phys_io = MX27_AIPI_BASE_ADDR, + .io_pg_offst = ((MX27_AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc, .boot_params = PHYS_OFFSET + 0x100, .map_io = mx27_map_io, .init_irq = mx27_init_irq,
arch/arm/mach-mx2/mxt_td60.c +2 -2
@@ -284,8 +284,8 @@ static struct sys_timer mxt_td60_timer = {MACHINE_START (MXT_TD60 ,"Maxtrack i-MXT TD60" )/* maintainer: Maxtrack Industrial */ - .phys_io = AIPI_BASE_ADDR, - .io_pg_offst = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc, + .phys_io = MX27_AIPI_BASE_ADDR, + .io_pg_offst = ((MX27_AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc, .boot_params = PHYS_OFFSET + 0x100, .map_io = mx27_map_io, .init_irq = mx27_init_irq,
arch/arm/mach-mx2/pca100.c +2 -2
@@ -233,8 +233,8 @@ static struct sys_timer pca100_timer = { };MACHINE_START (PCA100 ,"phyCARD-i.MX27" ) - .phys_io = AIPI_BASE_ADDR, - .io_pg_offst = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc, + .phys_io = MX27_AIPI_BASE_ADDR, + .io_pg_offst = ((MX27_AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc, .boot_params = PHYS_OFFSET + 0x100, .map_io = mx27_map_io, .init_irq = mx27_init_irq,
arch/arm/mach-mx2/pcm038.c +4 -4
@@ -108,8 +108,8 @@ static struct platdata_mtd_ram pcm038_sram_data = { };static struct resource pcm038_sram_resource = { - .start =CS1_BASE_ADDR , - .end =CS1_BASE_ADDR +512 *1024 -1 , + .start =MX27_CS1_BASE_ADDR , + .end =MX27_CS1_BASE_ADDR +512 *1024 -1 , .flags =IORESOURCE_MEM , };
@@ -328,8 +328,8 @@ static struct sys_timer pcm038_timer = { };MACHINE_START (PCM038 ,"phyCORE-i.MX27" ) - .phys_io = AIPI_BASE_ADDR, - .io_pg_offst = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc, + .phys_io = MX27_AIPI_BASE_ADDR, + .io_pg_offst = ((MX27_AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc, .boot_params = PHYS_OFFSET + 0x100, .map_io = mx27_map_io, .init_irq = mx27_init_irq,
arch/arm/mach-mx2/pcm970-baseboard.c +2 -2
@@ -190,8 +190,8 @@ static struct imx_fb_platform_data pcm038_fb_data = {static struct resource pcm970_sja1000_resources[] = { { - .start =CS4_BASE_ADDR , - .end =CS4_BASE_ADDR +0x100 -1 , + .start =MX27_CS4_BASE_ADDR , + .end =MX27_CS4_BASE_ADDR +0x100 -1 , .flags =IORESOURCE_MEM , }, { .start =IRQ_GPIOE (19 ),
Signature · 1 line
1.6.5.2
PATCH 5/25 imx/mach-mx3: use constants namespaced by the corresponding SOC (easy part)
This just leaves cpu.c, devices.c and mm.c to clean up. As these files are used on more than one SOC they need some more work.
Signed-off-by Uwe Kleine-K?nig <[email protected]>
Cc Russell King <[email protected]>
Cc Alberto Panizzo <[email protected]>
Cc Valentin Longchamp <[email protected]>
Cc Daniel Mack <[email protected]>
Cc Guennadi Liakhovetski <[email protected]>
Cc Yoichi Yuasa <[email protected]>
Cc Mark Brown <[email protected]>
Cc Magnus Lilja <[email protected]>
Cc Fabio Estevam <[email protected]>
Cc Sascha Hauer <[email protected]>
Cc Harro Haan <[email protected]>
Cc Jean Delvare <[email protected]>
Cc Luotao Fu <[email protected]>
Cc Ilya Yanok <[email protected]>
--- arch/arm/mach-mx3/armadillo5x0.c | 12 ++++++------ arch/arm/mach-mx3/clock-imx35.c | 4 ++-- arch/arm/mach-mx3/clock.c | 4 ++-- arch/arm/mach-mx3/crm_regs.h | 2 +- arch/arm/mach-mx3/iomux.c | 2 +- arch/arm/mach-mx3/kzmarm11.c | 20 ++++++++++---------- arch/arm/mach-mx3/mx31ads.c | 14 +++++++------- arch/arm/mach-mx3/mx31lilly.c | 8 ++++---- arch/arm/mach-mx3/mx31lite.c | 14 +++++++------- arch/arm/mach-mx3/mx31moboard.c | 4 ++-- arch/arm/mach-mx3/mx31pdk.c | 10 +++++----- arch/arm/mach-mx3/mx35pdk.c | 4 ++-- arch/arm/mach-mx3/pcm037.c | 16 ++++++++-------- arch/arm/mach-mx3/pcm043.c | 4 ++-- arch/arm/mach-mx3/qong.c | 14 +++++++------- arch/arm/plat-mxc/include/mach/board-kzmarm11.h | 18 +++++++++--------- 16 files changed, 75 insertions(+), 75 deletions(-)
arch/arm/mach-mx3/armadillo5x0.c +6 -6
@@ -182,8 +182,8 @@ static struct physmap_flash_data armadillo5x0_nor_flash_pdata = {static struct resource armadillo5x0_nor_flash_resource = { .flags =IORESOURCE_MEM , - .start =CS0_BASE_ADDR , - .end =CS0_BASE_ADDR +SZ_64M -1 , + .start =MX31_CS0_BASE_ADDR , + .end =MX31_CS0_BASE_ADDR +SZ_64M -1 , };static struct platform_device armadillo5x0_nor_flash = {
@@ -311,8 +311,8 @@ static struct imxmmc_platform_data sdhc_pdata = {*/ static struct resource armadillo5x0_smc911x_resources[] = { { - .start =CS3_BASE_ADDR , - .end =CS3_BASE_ADDR +SZ_32M -1 , + .start =MX31_CS3_BASE_ADDR , + .end =MX31_CS3_BASE_ADDR +SZ_32M -1 , .flags =IORESOURCE_MEM , }, { .start =IOMUX_TO_IRQ (MX31_PIN_GPIO1_0 ),
@@ -406,8 +406,8 @@ static struct sys_timer armadillo5x0_timer = {MACHINE_START (ARMADILLO5X0 ,"Armadillo-500" )/* Maintainer: Alberto Panizzo */ - .phys_io = AIPS1_BASE_ADDR, - .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, + .phys_io = MX31_AIPS1_BASE_ADDR, + .io_pg_offst = ((MX31_AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, .boot_params = PHYS_OFFSET + 0x00000100, .map_io = mx31_map_io, .init_irq = mx31_init_irq,
arch/arm/mach-mx3/clock-imx35.c +2 -2
@@ -28,7 +28,7 @@#include <mach/hardware.h> #include <mach/common.h> -#define CCM_BASE IO_ADDRESS(CCM_BASE_ADDR) +#define CCM_BASE IO_ADDRESS(MX35_CCM_BASE_ADDR)#define CCM_CCMR 0x00#define CCM_PDR0 0x04
@@ -504,7 +504,7 @@ int __init mx35_clocks_init()__raw_writel ((3 <<26 ) | ll,CCM_BASE +CCM_CGR2 );__raw_writel (0 ,CCM_BASE +CCM_CGR3 ); -mxc_timer_init (&gpt_clk,IO_ADDRESS (GPT1_BASE_ADDR ),MXC_INT_GPT ); +mxc_timer_init (&gpt_clk,IO_ADDRESS (MX35_GPT1_BASE_ADDR ),MX35_INT_GPT );return 0 ; }
arch/arm/mach-mx3/clock.c +2 -2
@@ -618,14 +618,14 @@ int __init mx31_clocks_init(unsigned long fref)mx31_read_cpu_rev (); -if (mx31_revision () >=CHIP_REV_2_0 ) { +if (mx31_revision () >=MX31_CHIP_REV_2_0 ) { reg =__raw_readl (MXC_CCM_PMCR1 );/* No PLL restart on DVFS switch; enable auto EMI handshake */ reg |=MXC_CCM_PMCR1_PLLRDIS |MXC_CCM_PMCR1_EMIRQ_EN ;__raw_writel (reg,MXC_CCM_PMCR1 ); } -mxc_timer_init (&ipg_clk,IO_ADDRESS (GPT1_BASE_ADDR ),MXC_INT_GPT ); +mxc_timer_init (&ipg_clk,IO_ADDRESS (MX31_GPT1_BASE_ADDR ),MX31_INT_GPT );return 0 ; }
arch/arm/mach-mx3/crm_regs.h +1 -1
@@ -24,7 +24,7 @@#define CKIH_CLK_FREQ_27MHZ 27000000#define CKIL_CLK_FREQ 32768 -#define MXC_CCM_BASE IO_ADDRESS(CCM_BASE_ADDR) +#define MXC_CCM_BASE IO_ADDRESS(MX31_CCM_BASE_ADDR)/* Register addresses */ #define MXC_CCM_CCMR (MXC_CCM_BASE + 0x00)
arch/arm/mach-mx3/iomux.c +1 -1
@@ -29,7 +29,7 @@/* * IOMUX register (base) addresses */ -#define IOMUX_BASE IO_ADDRESS(IOMUXC_BASE_ADDR) +#define IOMUX_BASE IO_ADDRESS(MX31_IOMUXC_BASE_ADDR)#define IOMUXINT_OBS1 (IOMUX_BASE + 0x000)#define IOMUXINT_OBS2 (IOMUX_BASE + 0x004)#define IOMUXGPR (IOMUX_BASE + 0x008)
arch/arm/mach-mx3/kzmarm11.c +10 -10
@@ -128,8 +128,8 @@ static struct smsc911x_platform_config kzm_smsc9118_config = {static struct resource kzm_smsc9118_resources[] = { { - .start =CS5_BASE_ADDR , - .end =CS5_BASE_ADDR +SZ_128K -1 , + .start =MX31_CS5_BASE_ADDR , + .end =MX31_CS5_BASE_ADDR +SZ_128K -1 , .flags =IORESOURCE_MEM , }, {
@@ -222,15 +222,15 @@ static void __init kzm_board_init(void)*/ static struct map_desc kzm_io_desc[]__initdata = { { - .virtual =CS4_BASE_ADDR_VIRT , - .pfn =__phys_to_pfn (CS4_BASE_ADDR ), - .length =CS4_SIZE , + .virtual =MX31_CS4_BASE_ADDR_VIRT , + .pfn =__phys_to_pfn (MX31_CS4_BASE_ADDR ), + .length =MX31_CS4_SIZE , .type =MT_DEVICE }, { - .virtual =CS5_BASE_ADDR_VIRT , - .pfn =__phys_to_pfn (CS5_BASE_ADDR ), - .length =CS5_SIZE , + .virtual =MX31_CS5_BASE_ADDR_VIRT , + .pfn =__phys_to_pfn (MX31_CS5_BASE_ADDR ), + .length =MX31_CS5_SIZE , .type =MT_DEVICE }, };
@@ -258,8 +258,8 @@ static struct sys_timer kzm_timer = {* initialize __mach_desc_KZM_ARM11_01 data structure. */ MACHINE_START (KZM_ARM11_01 ,"Kyoto Microcomputer Co., Ltd. KZM-ARM11-01" ) - .phys_io = AIPS1_BASE_ADDR, - .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, + .phys_io = MX31_AIPS1_BASE_ADDR, + .io_pg_offst = ((MX31_AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, .boot_params = PHYS_OFFSET + 0x100, .map_io = kzm_map_io, .init_irq = mx31_init_irq,
arch/arm/mach-mx3/mx31ads.c +7 -7
@@ -60,7 +60,7 @@static struct plat_serial8250_port serial_platform_data[] = { { .membase = (void *)(PBC_BASE_ADDRESS +PBC_SC16C652_UARTA ), - .mapbase = (unsigned long )(CS4_BASE_ADDR +PBC_SC16C652_UARTA ), + .mapbase = (unsigned long )(MX31_CS4_BASE_ADDR +PBC_SC16C652_UARTA ), .irq =EXPIO_INT_XUART_INTA , .uartclk =14745600 , .regshift =0 ,
@@ -68,7 +68,7 @@ static struct plat_serial8250_port serial_platform_data[] = { .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_AUTO_IRQ, }, { .membase = (void *)(PBC_BASE_ADDRESS + PBC_SC16C652_UARTB), - .mapbase = (unsigned long)(CS4_BASE_ADDR + PBC_SC16C652_UARTB), + .mapbase = (unsigned long)(MX31_CS4_BASE_ADDR + PBC_SC16C652_UARTB), .irq = EXPIO_INT_XUART_INTB, .uartclk = 14745600, .regshift = 0,
@@ -494,9 +494,9 @@ static void mxc_init_i2c(void)*/ static struct map_desc mx31ads_io_desc[]__initdata = { { - .virtual =CS4_BASE_ADDR_VIRT , - .pfn =__phys_to_pfn (CS4_BASE_ADDR ), - .length =CS4_SIZE /2 , + .virtual =MX31_CS4_BASE_ADDR_VIRT , + .pfn =__phys_to_pfn (MX31_CS4_BASE_ADDR ), + .length =MX31_CS4_SIZE /2 , .type =MT_DEVICE }, };
@@ -541,8 +541,8 @@ static struct sys_timer mx31ads_timer = {*/ MACHINE_START (MX31ADS ,"Freescale MX31ADS" )/* Maintainer: Freescale Semiconductor, Inc. */ - .phys_io = AIPS1_BASE_ADDR, - .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, + .phys_io = MX31_AIPS1_BASE_ADDR, + .io_pg_offst = ((MX31_AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, .boot_params = PHYS_OFFSET + 0x100, .map_io = mx31ads_map_io, .init_irq = mx31ads_init_irq,
arch/arm/mach-mx3/mx31lilly.c +4 -4
@@ -57,8 +57,8 @@static struct resource smsc91x_resources[] = { { - .start =CS4_BASE_ADDR , - .end =CS4_BASE_ADDR +0xffff , + .start =MX31_CS4_BASE_ADDR , + .end =MX31_CS4_BASE_ADDR +0xffff , .flags =IORESOURCE_MEM , }, {
@@ -195,8 +195,8 @@ static struct sys_timer mx31lilly_timer = { };MACHINE_START (LILLY1131 ,"INCO startec LILLY-1131" ) - .phys_io = AIPS1_BASE_ADDR, - .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, + .phys_io = MX31_AIPS1_BASE_ADDR, + .io_pg_offst = ((MX31_AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, .boot_params = PHYS_OFFSET + 0x100, .map_io = mx31_map_io, .init_irq = mx31_init_irq,
arch/arm/mach-mx3/mx31lite.c +7 -7
@@ -82,8 +82,8 @@ static struct smsc911x_platform_config smsc911x_config = {static struct resource smsc911x_resources[] = { { - .start =CS4_BASE_ADDR , - .end =CS4_BASE_ADDR +0x100 , + .start =MX31_CS4_BASE_ADDR , + .end =MX31_CS4_BASE_ADDR +0x100 , .flags =IORESOURCE_MEM , }, { .start =IOMUX_TO_IRQ (MX31_PIN_SFS6 ),
@@ -214,9 +214,9 @@ static struct platform_device physmap_flash_device = {*/ static struct map_desc mx31lite_io_desc[]__initdata = { { - .virtual =CS4_BASE_ADDR_VIRT , - .pfn =__phys_to_pfn (CS4_BASE_ADDR ), - .length =CS4_SIZE , + .virtual =MX31_CS4_BASE_ADDR_VIRT , + .pfn =__phys_to_pfn (MX31_CS4_BASE_ADDR ), + .length =MX31_CS4_SIZE , .type =MT_DEVICE } };
@@ -287,8 +287,8 @@ struct sys_timer mx31lite_timer = {MACHINE_START (MX31LITE ,"LogicPD i.MX31 SOM" )/* Maintainer: Freescale Semiconductor, Inc. */ - .phys_io = AIPS1_BASE_ADDR, - .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, + .phys_io = MX31_AIPS1_BASE_ADDR, + .io_pg_offst = ((MX31_AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, .boot_params = PHYS_OFFSET + 0x100, .map_io = mx31lite_map_io, .init_irq = mx31_init_irq,
arch/arm/mach-mx3/mx31moboard.c +2 -2
@@ -569,8 +569,8 @@ struct sys_timer mx31moboard_timer = {MACHINE_START (MX31MOBOARD ,"EPFL Mobots mx31moboard" )/* Maintainer: Valentin Longchamp, EPFL Mobots group */ - .phys_io = AIPS1_BASE_ADDR, - .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, + .phys_io = MX31_AIPS1_BASE_ADDR, + .io_pg_offst = ((MX31_AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, .boot_params = PHYS_OFFSET + 0x100, .map_io = mx31_map_io, .init_irq = mx31_init_irq,
arch/arm/mach-mx3/mx31pdk.c +5 -5
@@ -211,9 +211,9 @@ static int __init mx31pdk_init_expio(void)*/ static struct map_desc mx31pdk_io_desc[]__initdata = { { - .virtual =CS5_BASE_ADDR_VIRT , - .pfn =__phys_to_pfn (CS5_BASE_ADDR ), - .length =CS5_SIZE , + .virtual =MX31_CS5_BASE_ADDR_VIRT , + .pfn =__phys_to_pfn (MX31_CS5_BASE_ADDR ), + .length =MX31_CS5_SIZE , .type =MT_DEVICE , }, };
@@ -256,8 +256,8 @@ static struct sys_timer mx31pdk_timer = {*/ MACHINE_START (MX31_3DS ,"Freescale MX31PDK (3DS)" )/* Maintainer: Freescale Semiconductor, Inc. */ - .phys_io = AIPS1_BASE_ADDR, - .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, + .phys_io = MX31_AIPS1_BASE_ADDR, + .io_pg_offst = ((MX31_AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, .boot_params = PHYS_OFFSET + 0x100, .map_io = mx31pdk_map_io, .init_irq = mx31_init_irq,
arch/arm/mach-mx3/mx35pdk.c +2 -2
@@ -106,8 +106,8 @@ struct sys_timer mx35pdk_timer = {MACHINE_START (MX35_3DS ,"Freescale MX35PDK" )/* Maintainer: Freescale Semiconductor, Inc */ - .phys_io = AIPS1_BASE_ADDR, - .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, + .phys_io = MX35_AIPS1_BASE_ADDR, + .io_pg_offst = ((MX35_AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, .boot_params = PHYS_OFFSET + 0x100, .map_io = mx35_map_io, .init_irq = mx35_init_irq,
arch/arm/mach-mx3/pcm037.c +8 -8
@@ -248,8 +248,8 @@ static struct imxuart_platform_data uart_pdata = {static struct resource smsc911x_resources[] = { { - .start =CS1_BASE_ADDR +0x300 , - .end =CS1_BASE_ADDR +0x300 +SZ_64K -1 , + .start =MX31_CS1_BASE_ADDR +0x300 , + .end =MX31_CS1_BASE_ADDR +0x300 +SZ_64K -1 , .flags =IORESOURCE_MEM , }, { .start =IOMUX_TO_IRQ (MX31_PIN_GPIO3_1 ),
@@ -281,8 +281,8 @@ static struct platdata_mtd_ram pcm038_sram_data = { };static struct resource pcm038_sram_resource = { - .start =CS4_BASE_ADDR , - .end =CS4_BASE_ADDR +512 *1024 -1 , + .start =MX31_CS4_BASE_ADDR , + .end =MX31_CS4_BASE_ADDR +512 *1024 -1 , .flags =IORESOURCE_MEM , };
@@ -536,8 +536,8 @@ static struct mx3fb_platform_data mx3fb_pdata = {static struct resource pcm970_sja1000_resources[] = { { - .start =CS5_BASE_ADDR , - .end =CS5_BASE_ADDR +0x100 -1 , + .start =MX31_CS5_BASE_ADDR , + .end =MX31_CS5_BASE_ADDR +0x100 -1 , .flags =IORESOURCE_MEM , }, { .start =IOMUX_TO_IRQ (IOMUX_PIN (48 ,105 )),
@@ -636,8 +636,8 @@ struct sys_timer pcm037_timer = {MACHINE_START (PCM037 ,"Phytec Phycore pcm037" )/* Maintainer: Pengutronix */ - .phys_io = AIPS1_BASE_ADDR, - .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, + .phys_io = MX31_AIPS1_BASE_ADDR, + .io_pg_offst = ((MX31_AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, .boot_params = PHYS_OFFSET + 0x100, .map_io = mx31_map_io, .init_irq = mx31_init_irq,
arch/arm/mach-mx3/pcm043.c +2 -2
@@ -248,8 +248,8 @@ struct sys_timer pcm043_timer = {MACHINE_START (PCM043 ,"Phytec Phycore pcm043" )/* Maintainer: Pengutronix */ - .phys_io = AIPS1_BASE_ADDR, - .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, + .phys_io = MX35_AIPS1_BASE_ADDR, + .io_pg_offst = ((MX35_AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, .boot_params = PHYS_OFFSET + 0x100, .map_io = mx35_map_io, .init_irq = mx35_init_irq,
arch/arm/mach-mx3/qong.c +7 -7
@@ -43,7 +43,7 @@#define QONG_FPGA_VERSION (major, minor, rev) \ (((major & 0xF) << 12) | ((minor & 0xF) << 8) | (rev & 0xFF)) -#define QONG_FPGA_BASEADDR CS1_BASE_ADDR +#define QONG_FPGA_BASEADDR MX31_CS1_BASE_ADDR#define QONG_FPGA_PERIPH_SIZE (1 << 24)#define QONG_FPGA_CTRL_BASEADDR QONG_FPGA_BASEADDR
@@ -115,8 +115,8 @@ static struct physmap_flash_data qong_flash_data = { };static struct resource qong_flash_resource = { - .start =CS0_BASE_ADDR , - .end =CS0_BASE_ADDR +QONG_NOR_SIZE -1 , + .start =MX31_CS0_BASE_ADDR , + .end =MX31_CS0_BASE_ADDR +QONG_NOR_SIZE -1 , .flags =IORESOURCE_MEM , };
@@ -180,8 +180,8 @@ static struct platform_nand_data qong_nand_data = { };static struct resource qong_nand_resource = { - .start =CS3_BASE_ADDR , - .end =CS3_BASE_ADDR +SZ_32M -1 , + .start =MX31_CS3_BASE_ADDR , + .end =MX31_CS3_BASE_ADDR +SZ_32M -1 , .flags =IORESOURCE_MEM , };
@@ -275,8 +275,8 @@ static struct sys_timer qong_timer = {MACHINE_START (QONG ,"Dave/DENX QongEVB-LITE" )/* Maintainer: DENX Software Engineering GmbH */ - .phys_io = AIPS1_BASE_ADDR, - .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, + .phys_io = MX31_AIPS1_BASE_ADDR, + .io_pg_offst = ((MX31_AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, .boot_params = PHYS_OFFSET + 0x100, .map_io = mx31_map_io, .init_irq = mx31_init_irq,
arch/arm/plat-mxc/include/mach/board-kzmarm11.h +9 -9
@@ -21,19 +21,19 @@/* * KZM-ARM11-01 Board Control Registers on FPGA */ -#define KZM_ARM11_CTL1 (CS4_BASE_ADDR + 0x1000) -#define KZM_ARM11_CTL2 (CS4_BASE_ADDR + 0x1001) -#define KZM_ARM11_RSW1 (CS4_BASE_ADDR + 0x1002) -#define KZM_ARM11_BACK_LIGHT (CS4_BASE_ADDR + 0x1004) -#define KZM_ARM11_FPGA_REV (CS4_BASE_ADDR + 0x1008) -#define KZM_ARM11_7SEG_LED (CS4_BASE_ADDR + 0x1010) -#define KZM_ARM11_LEDS (CS4_BASE_ADDR + 0x1020) -#define KZM_ARM11_DIPSW2 (CS4_BASE_ADDR + 0x1003) +#define KZM_ARM11_CTL1 (MX31_CS4_BASE_ADDR + 0x1000) +#define KZM_ARM11_CTL2 (MX31_CS4_BASE_ADDR + 0x1001) +#define KZM_ARM11_RSW1 (MX31_CS4_BASE_ADDR + 0x1002) +#define KZM_ARM11_BACK_LIGHT (MX31_CS4_BASE_ADDR + 0x1004) +#define KZM_ARM11_FPGA_REV (MX31_CS4_BASE_ADDR + 0x1008) +#define KZM_ARM11_7SEG_LED (MX31_CS4_BASE_ADDR + 0x1010) +#define KZM_ARM11_LEDS (MX31_CS4_BASE_ADDR + 0x1020) +#define KZM_ARM11_DIPSW2 (MX31_CS4_BASE_ADDR + 0x1003)/* * External UART for touch panel on FPGA */ -#define KZM_ARM11_16550 (CS4_BASE_ADDR + 0x1050) +#define KZM_ARM11_16550 (MX31_CS4_BASE_ADDR + 0x1050)#endif /* __ARM_ARCH_BOARD_KZM_ARM11_H */
Signature · 1 line
1.6.5.2
PATCH 6/25 imx/mx3: rename clock.c and iomux.c to {clock, iomux}-imx31.c
These files are only used on imx31. This makes the name consistent with the imx35 files.
Signed-off-by Uwe Kleine-K?nig <[email protected]>
Cc Sascha Hauer <[email protected]>
Cc Russell King <[email protected]>
Cc Daniel Mack <[email protected]>
Cc Fabio Estevam <[email protected]>
Cc Valentin Longchamp <[email protected]>
---
arch/arm/mach-mx3/Makefile | 2 +-
arch/arm/mach-mx3/{clock.c => clock-imx31.c} | 0
arch/arm/mach-mx3/{iomux.c => iomux-imx31.c} | 0
3 files changed, 1 insertions(+), 1 deletions(-)
rename arch/arm/mach-mx3/{clock.c => clock-imx31.c} (100%)
rename arch/arm/mach-mx3/{iomux.c => iomux-imx31.c} (100%)arch/arm/mach-mx3/Makefile +1 -1
@@ -5,7 +5,7 @@ # Object file lists. obj-y := mm.o devices.o cpu.o -obj-$(CONFIG_ARCH_MX31) += clock.o iomux.o +obj-$(CONFIG_ARCH_MX31) += clock-imx31.o iomux-imx31.o obj-$(CONFIG_ARCH_MX35) += clock-imx35.o obj-$(CONFIG_MACH_MX31ADS) += mx31ads.o obj-$(CONFIG_MACH_MX31LILLY) += mx31lilly.o mx31lilly-db.o
arch/arm/mach-mx3/clock-imx31.c renamed from arch/arm/mach-mx3/clock.c +0 -0
arch/arm/mach-mx3/iomux-imx31.c renamed from arch/arm/mach-mx3/iomux.c +0 -0
Signature · 1 line
1.6.5.2
PATCH 7/25 imx/mx1: add newline at end of Makefile
Signed-off-by Uwe Kleine-K?nig <[email protected]>
Cc Sascha Hauer <[email protected]>
Cc Russell King <[email protected]>
Cc Paulius Zaleckas <[email protected]>
Cc Darius Augulis <[email protected]>
Cc Mauro Carvalho Chehab <[email protected]>
--- arch/arm/mach-mx1/Makefile | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-)
arch/arm/mach-mx1/Makefile +1 -1
@@ -11,4 +11,4 @@ obj-$(CONFIG_MX1_VIDEO) += ksym_mx1.o mx1_camera_fiq.o # Specific board support obj-$(CONFIG_ARCH_MX1ADS) += mx1ads.o -obj-$(CONFIG_MACH_SCB9328) += scb9328.o +obj-$(CONFIG_MACH_SCB9328) += scb9328.o
Signature · 1 line
1.6.5.2
PATCH 8/25 imx/mx1: rename files defining a machine to mach-$mach.c
Signed-off-by Uwe Kleine-K?nig <[email protected]>
Cc Sascha Hauer <[email protected]>
Cc Russell King <[email protected]>
Cc Paulius Zaleckas <[email protected]>
Cc Darius Augulis <[email protected]>
Cc Mauro Carvalho Chehab <[email protected]>
---
arch/arm/mach-mx1/Makefile | 4 ++--
arch/arm/mach-mx1/{mx1ads.c => mach-mx1ads.c} | 2 +-
arch/arm/mach-mx1/{scb9328.c => mach-scb9328.c} | 2 +-
3 files changed, 4 insertions(+), 4 deletions(-)
rename arch/arm/mach-mx1/{mx1ads.c => mach-mx1ads.c} (98%)
rename arch/arm/mach-mx1/{scb9328.c => mach-scb9328.c} (98%)arch/arm/mach-mx1/Makefile +2 -2
@@ -10,5 +10,5 @@ obj-y += generic.o clock.o devices.o obj-$(CONFIG_MX1_VIDEO) += ksym_mx1.o mx1_camera_fiq.o # Specific board support -obj-$(CONFIG_ARCH_MX1ADS) += mx1ads.o -obj-$(CONFIG_MACH_SCB9328) += scb9328.o +obj-$(CONFIG_ARCH_MX1ADS) += mach-mx1ads.o +obj-$(CONFIG_MACH_SCB9328) += mach-scb9328.o
arch/arm/mach-mx1/mach-mx1ads.c renamed from arch/arm/mach-mx1/mx1ads.c +1 -1
@@ -1,5 +1,5 @@/* -* arch/arm/mach-imx/mx1ads.c +* arch/arm/mach-imx/mach-mx1ads.c * * Initially based on: * linux-2.6.7-imx/arch/arm/mach-imx/scb9328.c
arch/arm/mach-mx1/mach-scb9328.c renamed from arch/arm/mach-mx1/scb9328.c +1 -1
@@ -1,5 +1,5 @@/* -* linux/arch/arm/mach-mx1/scb9328.c +* linux/arch/arm/mach-mx1/mach-scb9328.c * * Copyright (c) 2004 Sascha Hauer <[email protected]> * Copyright (c) 2006-2008 Juergen Beisert <[email protected]>
Signature · 1 line
1.6.5.2
PATCH 9/25 imx: rename Kconfig symbol for "Eukrea CPUIMX27 module"
Not using MACH_CPUIMX27 makes machine_is_cpuimx27 always return 0 independent of building support for this machine.
Signed-off-by Uwe Kleine-K?nig <[email protected]>
Cc Sascha Hauer <[email protected]>
Cc Russell King <[email protected]>
Cc Jean Delvare <[email protected]>
Cc Eric Benard <[email protected]>
--- arch/arm/mach-mx2/Kconfig | 6 +++--- arch/arm/mach-mx2/Makefile | 2 +- 2 files changed, 4 insertions(+), 4 deletions(-)
arch/arm/mach-mx2/Kconfig +3 -3
@@ -55,7 +55,7 @@ config MACH_PCM970_BASEBOARD endchoice -config MACH_EUKREA_CPUIMX27 +config MACH_CPUIMX27 bool "Eukrea CPUIMX27 module" depends on MACH_MX27 help
@@ -64,14 +64,14 @@ config MACH_EUKREA_CPUIMX27 config MACH_EUKREA_CPUIMX27_USESDHC2 bool "CPUIMX27 integrates SDHC2 module" - depends on MACH_EUKREA_CPUIMX27 + depends on MACH_CPUIMX27 help This adds support for the internal SDHC2 used on CPUIMX27 used for wifi or eMMC. choice prompt "Baseboard" - depends on MACH_EUKREA_CPUIMX27 + depends on MACH_CPUIMX27 default MACH_EUKREA_MBIMX27_BASEBOARD config MACH_EUKREA_MBIMX27_BASEBOARD
arch/arm/mach-mx2/Makefile +1 -1
@@ -17,7 +17,7 @@ obj-$(CONFIG_MACH_PCM038) += pcm038.o obj-$(CONFIG_MACH_PCM970_BASEBOARD) += pcm970-baseboard.o obj-$(CONFIG_MACH_MX27_3DS) += mx27pdk.o obj-$(CONFIG_MACH_MX27LITE) += mx27lite.o -obj-$(CONFIG_MACH_EUKREA_CPUIMX27) += eukrea_cpuimx27.o +obj-$(CONFIG_MACH_CPUIMX27) += eukrea_cpuimx27.o obj-$(CONFIG_MACH_EUKREA_MBIMX27_BASEBOARD) += eukrea_mbimx27-baseboard.o obj-$(CONFIG_MACH_PCA100) += pca100.o obj-$(CONFIG_MACH_MXT_TD60) += mxt_td60.o
Signature · 1 line
1.6.5.2
PATCH 10/25 imx: rename Kconfig symbol for "LogicPD MX27 LITEKIT platform"
Not using MACH_IMX27LITE makes machine_is_imx27lite always return 0 independent of building support for this machine.
Signed-off-by Uwe Kleine-K?nig <[email protected]>
Cc Sascha Hauer <[email protected]>
Cc Russell King <[email protected]>
Cc Daniel Schaeffer <[email protected]>
--- arch/arm/configs/mx27_defconfig | 2 +- arch/arm/mach-mx2/Kconfig | 2 +- arch/arm/mach-mx2/Makefile | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-)
arch/arm/configs/mx27_defconfig +1 -1
@@ -200,7 +200,7 @@ CONFIG_MACH_MX27ADS=y CONFIG_MACH_PCM038=y CONFIG_MACH_PCM970_BASEBOARD=y CONFIG_MACH_MX27_3DS=y -CONFIG_MACH_MX27LITE=y +CONFIG_MACH_IMX27LITE=y CONFIG_MXC_IRQ_PRIOR=y CONFIG_MXC_PWM=y
arch/arm/mach-mx2/Kconfig +1 -1
@@ -90,7 +90,7 @@ config MACH_MX27_3DS Include support for MX27PDK platform. This includes specific configurations for the board and its peripherals. -config MACH_MX27LITE +config MACH_IMX27LITE bool "LogicPD MX27 LITEKIT platform" depends on MACH_MX27 help
arch/arm/mach-mx2/Makefile +1 -1
@@ -16,7 +16,7 @@ obj-$(CONFIG_MACH_MX27ADS) += mx27ads.o obj-$(CONFIG_MACH_PCM038) += pcm038.o obj-$(CONFIG_MACH_PCM970_BASEBOARD) += pcm970-baseboard.o obj-$(CONFIG_MACH_MX27_3DS) += mx27pdk.o -obj-$(CONFIG_MACH_MX27LITE) += mx27lite.o +obj-$(CONFIG_MACH_IMX27LITE) += mx27lite.o obj-$(CONFIG_MACH_CPUIMX27) += eukrea_cpuimx27.o obj-$(CONFIG_MACH_EUKREA_MBIMX27_BASEBOARD) += eukrea_mbimx27-baseboard.o obj-$(CONFIG_MACH_PCA100) += pca100.o
Signature · 1 line
1.6.5.2
PATCH 11/25 imx/mx2: rename files defining a machine to mach-$mach.c
Signed-off-by Uwe Kleine-K?nig <[email protected]>
Cc Sascha Hauer <[email protected]>
Cc Russell King <[email protected]>
Cc Eric Benard <[email protected]>
---
arch/arm/mach-mx2/Makefile | 17 ++++++++---------
.../{eukrea_cpuimx27.c => mach-cpuimx27.c} | 0
arch/arm/mach-mx2/{mx27lite.c => mach-imx27lite.c} | 0
arch/arm/mach-mx2/{mx21ads.c => mach-mx21ads.c} | 0
arch/arm/mach-mx2/{mx27pdk.c => mach-mx27_3ds.c} | 0
arch/arm/mach-mx2/{mx27ads.c => mach-mx27ads.c} | 0
arch/arm/mach-mx2/{mxt_td60.c => mach-mxt_td60.c} | 0
arch/arm/mach-mx2/{pca100.c => mach-pca100.c} | 0
arch/arm/mach-mx2/{pcm038.c => mach-pcm038.c} | 0
9 files changed, 8 insertions(+), 9 deletions(-)
rename arch/arm/mach-mx2/{eukrea_cpuimx27.c => mach-cpuimx27.c} (100%)
rename arch/arm/mach-mx2/{mx27lite.c => mach-imx27lite.c} (100%)
rename arch/arm/mach-mx2/{mx21ads.c => mach-mx21ads.c} (100%)
rename arch/arm/mach-mx2/{mx27pdk.c => mach-mx27_3ds.c} (100%)
rename arch/arm/mach-mx2/{mx27ads.c => mach-mx27ads.c} (100%)
rename arch/arm/mach-mx2/{mxt_td60.c => mach-mxt_td60.c} (100%)
rename arch/arm/mach-mx2/{pca100.c => mach-pca100.c} (100%)
rename arch/arm/mach-mx2/{pcm038.c => mach-pcm038.c} (100%)arch/arm/mach-mx2/Makefile +8 -9
@@ -11,14 +11,13 @@ obj-$(CONFIG_MACH_MX21) += clock_imx21.o obj-$(CONFIG_MACH_MX27) += cpu_imx27.o obj-$(CONFIG_MACH_MX27) += clock_imx27.o -obj-$(CONFIG_MACH_MX21ADS) += mx21ads.o -obj-$(CONFIG_MACH_MX27ADS) += mx27ads.o -obj-$(CONFIG_MACH_PCM038) += pcm038.o +obj-$(CONFIG_MACH_MX21ADS) += mach-mx21ads.o +obj-$(CONFIG_MACH_MX27ADS) += mach-mx27ads.o +obj-$(CONFIG_MACH_PCM038) += mach-pcm038.o obj-$(CONFIG_MACH_PCM970_BASEBOARD) += pcm970-baseboard.o -obj-$(CONFIG_MACH_MX27_3DS) += mx27pdk.o -obj-$(CONFIG_MACH_IMX27LITE) += mx27lite.o -obj-$(CONFIG_MACH_CPUIMX27) += eukrea_cpuimx27.o +obj-$(CONFIG_MACH_MX27_3DS) += mach-mx27_3ds.o +obj-$(CONFIG_MACH_IMX27LITE) += mach-imx27lite.o +obj-$(CONFIG_MACH_CPUIMX27) += mach-cpuimx27.o obj-$(CONFIG_MACH_EUKREA_MBIMX27_BASEBOARD) += eukrea_mbimx27-baseboard.o -obj-$(CONFIG_MACH_PCA100) += pca100.o -obj-$(CONFIG_MACH_MXT_TD60) += mxt_td60.o - +obj-$(CONFIG_MACH_PCA100) += mach-pca100.o +obj-$(CONFIG_MACH_MXT_TD60) += mach-mxt_td60.o
arch/arm/mach-mx2/mach-cpuimx27.c renamed from arch/arm/mach-mx2/eukrea_cpuimx27.c +0 -0
arch/arm/mach-mx2/mach-imx27lite.c renamed from arch/arm/mach-mx2/mx27lite.c +0 -0
arch/arm/mach-mx2/mach-mx21ads.c renamed from arch/arm/mach-mx2/mx21ads.c +0 -0
arch/arm/mach-mx2/mach-mx27_3ds.c renamed from arch/arm/mach-mx2/mx27pdk.c +0 -0
arch/arm/mach-mx2/mach-mx27ads.c renamed from arch/arm/mach-mx2/mx27ads.c +0 -0
arch/arm/mach-mx2/mach-mxt_td60.c renamed from arch/arm/mach-mx2/mxt_td60.c +0 -0
arch/arm/mach-mx2/mach-pca100.c renamed from arch/arm/mach-mx2/pca100.c +0 -0
arch/arm/mach-mx2/mach-pcm038.c renamed from arch/arm/mach-mx2/pcm038.c +0 -0
Signature · 1 line
1.6.5.2
PATCH 12/25 imx/mx3: rename files defining a machine to mach-$mach.c
While at it remove some superfluous parenthesis.
Signed-off-by Uwe Kleine-K?nig <[email protected]>
Cc Sascha Hauer <[email protected]>
Cc Russell King <[email protected]>
Cc Daniel Mack <[email protected]>
Cc Fabio Estevam <[email protected]>
Cc Valentin Longchamp <[email protected]>
---
arch/arm/mach-mx3/Makefile | 24 ++++++++++----------
.../{armadillo5x0.c => mach-armadillo5x0.c} | 2 +-
.../mach-mx3/{kzmarm11.c => mach-kzm_arm11_01.c} | 2 +-
arch/arm/mach-mx3/{mx31pdk.c => mach-mx31_3ds.c} | 2 +-
arch/arm/mach-mx3/{mx31ads.c => mach-mx31ads.c} | 2 +-
.../arm/mach-mx3/{mx31lilly.c => mach-mx31lilly.c} | 2 +-
arch/arm/mach-mx3/{mx31lite.c => mach-mx31lite.c} | 2 +-
.../mach-mx3/{mx31moboard.c => mach-mx31moboard.c} | 2 +-
arch/arm/mach-mx3/{mx35pdk.c => mach-mx35pdk.c} | 0
arch/arm/mach-mx3/{pcm037.c => mach-pcm037.c} | 2 +-
.../mach-mx3/{pcm037_eet.c => mach-pcm037_eet.c} | 0
arch/arm/mach-mx3/{pcm043.c => mach-pcm043.c} | 0
arch/arm/mach-mx3/{qong.c => mach-qong.c} | 2 +-
13 files changed, 21 insertions(+), 21 deletions(-)
rename arch/arm/mach-mx3/{armadillo5x0.c => mach-armadillo5x0.c} (99%)
rename arch/arm/mach-mx3/{kzmarm11.c => mach-kzm_arm11_01.c} (99%)
rename arch/arm/mach-mx3/{mx31pdk.c => mach-mx31_3ds.c} (99%)
rename arch/arm/mach-mx3/{mx31ads.c => mach-mx31ads.c} (99%)
rename arch/arm/mach-mx3/{mx31lilly.c => mach-mx31lilly.c} (98%)
rename arch/arm/mach-mx3/{mx31lite.c => mach-mx31lite.c} (99%)
rename arch/arm/mach-mx3/{mx31moboard.c => mach-mx31moboard.c} (99%)
rename arch/arm/mach-mx3/{mx35pdk.c => mach-mx35pdk.c} (100%)
rename arch/arm/mach-mx3/{pcm037.c => mach-pcm037.c} (99%)
rename arch/arm/mach-mx3/{pcm037_eet.c => mach-pcm037_eet.c} (100%)
rename arch/arm/mach-mx3/{pcm043.c => mach-pcm043.c} (100%)
rename arch/arm/mach-mx3/{qong.c => mach-qong.c} (99%)arch/arm/mach-mx3/Makefile +12 -12
@@ -7,16 +7,16 @@ obj-y := mm.o devices.o cpu.o obj-$(CONFIG_ARCH_MX31) += clock-imx31.o iomux-imx31.o obj-$(CONFIG_ARCH_MX35) += clock-imx35.o -obj-$(CONFIG_MACH_MX31ADS) += mx31ads.o -obj-$(CONFIG_MACH_MX31LILLY) += mx31lilly.o mx31lilly-db.o -obj-$(CONFIG_MACH_MX31LITE) += mx31lite.o mx31lite-db.o -obj-$(CONFIG_MACH_PCM037) += pcm037.o -obj-$(CONFIG_MACH_PCM037_EET) += pcm037_eet.o -obj-$(CONFIG_MACH_MX31_3DS) += mx31pdk.o -obj-$(CONFIG_MACH_MX31MOBOARD) += mx31moboard.o mx31moboard-devboard.o \ +obj-$(CONFIG_MACH_MX31ADS) += mach-mx31ads.o +obj-$(CONFIG_MACH_MX31LILLY) += mach-mx31lilly.o mx31lilly-db.o +obj-$(CONFIG_MACH_MX31LITE) += mach-mx31lite.o mx31lite-db.o +obj-$(CONFIG_MACH_PCM037) += mach-pcm037.o +obj-$(CONFIG_MACH_PCM037_EET) += mach-pcm037_eet.o +obj-$(CONFIG_MACH_MX31_3DS) += mach-mx31_3ds.o +obj-$(CONFIG_MACH_MX31MOBOARD) += mach-mx31moboard.o mx31moboard-devboard.o \ mx31moboard-marxbot.o -obj-$(CONFIG_MACH_QONG) += qong.o -obj-$(CONFIG_MACH_PCM043) += pcm043.o -obj-$(CONFIG_MACH_ARMADILLO5X0) += armadillo5x0.o -obj-$(CONFIG_MACH_MX35_3DS) += mx35pdk.o -obj-$(CONFIG_MACH_KZM_ARM11_01) += kzmarm11.o +obj-$(CONFIG_MACH_QONG) += mach-qong.o +obj-$(CONFIG_MACH_PCM043) += mach-pcm043.o +obj-$(CONFIG_MACH_ARMADILLO5X0) += mach-armadillo5x0.o +obj-$(CONFIG_MACH_MX35_3DS) += mach-mx35pdk.o +obj-$(CONFIG_MACH_KZM_ARM11_01) += mach-kzm_arm11_01.o
arch/arm/mach-mx3/mach-armadillo5x0.c renamed from arch/arm/mach-mx3/armadillo5x0.c +1 -1
@@ -407,7 +407,7 @@ static struct sys_timer armadillo5x0_timer = {MACHINE_START (ARMADILLO5X0 ,"Armadillo-500" )/* Maintainer: Alberto Panizzo */ .phys_io = MX31_AIPS1_BASE_ADDR, - .io_pg_offst = ((MX31_AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, + .io_pg_offst = (MX31_AIPS1_BASE_ADDR_VIRT >> 18) & 0xfffc, .boot_params = PHYS_OFFSET + 0x00000100, .map_io = mx31_map_io, .init_irq = mx31_init_irq,
arch/arm/mach-mx3/mach-kzm_arm11_01.c renamed from arch/arm/mach-mx3/kzmarm11.c +1 -1
@@ -259,7 +259,7 @@ static struct sys_timer kzm_timer = {*/ MACHINE_START (KZM_ARM11_01 ,"Kyoto Microcomputer Co., Ltd. KZM-ARM11-01" ) .phys_io = MX31_AIPS1_BASE_ADDR, - .io_pg_offst = ((MX31_AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, + .io_pg_offst = (MX31_AIPS1_BASE_ADDR_VIRT >> 18) & 0xfffc, .boot_params = PHYS_OFFSET + 0x100, .map_io = kzm_map_io, .init_irq = mx31_init_irq,
arch/arm/mach-mx3/mach-mx31_3ds.c renamed from arch/arm/mach-mx3/mx31pdk.c +1 -1
@@ -257,7 +257,7 @@ static struct sys_timer mx31pdk_timer = {MACHINE_START (MX31_3DS ,"Freescale MX31PDK (3DS)" )/* Maintainer: Freescale Semiconductor, Inc. */ .phys_io = MX31_AIPS1_BASE_ADDR, - .io_pg_offst = ((MX31_AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, + .io_pg_offst = (MX31_AIPS1_BASE_ADDR_VIRT >> 18) & 0xfffc, .boot_params = PHYS_OFFSET + 0x100, .map_io = mx31pdk_map_io, .init_irq = mx31_init_irq,
arch/arm/mach-mx3/mach-mx31ads.c renamed from arch/arm/mach-mx3/mx31ads.c +1 -1
@@ -542,7 +542,7 @@ static struct sys_timer mx31ads_timer = {MACHINE_START (MX31ADS ,"Freescale MX31ADS" )/* Maintainer: Freescale Semiconductor, Inc. */ .phys_io = MX31_AIPS1_BASE_ADDR, - .io_pg_offst = ((MX31_AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, + .io_pg_offst = (MX31_AIPS1_BASE_ADDR_VIRT >> 18) & 0xfffc, .boot_params = PHYS_OFFSET + 0x100, .map_io = mx31ads_map_io, .init_irq = mx31ads_init_irq,
arch/arm/mach-mx3/mach-mx31lilly.c renamed from arch/arm/mach-mx3/mx31lilly.c +1 -1
@@ -196,7 +196,7 @@ static struct sys_timer mx31lilly_timer = {MACHINE_START (LILLY1131 ,"INCO startec LILLY-1131" ) .phys_io = MX31_AIPS1_BASE_ADDR, - .io_pg_offst = ((MX31_AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, + .io_pg_offst = (MX31_AIPS1_BASE_ADDR_VIRT >> 18) & 0xfffc, .boot_params = PHYS_OFFSET + 0x100, .map_io = mx31_map_io, .init_irq = mx31_init_irq,
arch/arm/mach-mx3/mach-mx31lite.c renamed from arch/arm/mach-mx3/mx31lite.c +1 -1
@@ -288,7 +288,7 @@ struct sys_timer mx31lite_timer = {MACHINE_START (MX31LITE ,"LogicPD i.MX31 SOM" )/* Maintainer: Freescale Semiconductor, Inc. */ .phys_io = MX31_AIPS1_BASE_ADDR, - .io_pg_offst = ((MX31_AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, + .io_pg_offst = (MX31_AIPS1_BASE_ADDR_VIRT >> 18) & 0xfffc, .boot_params = PHYS_OFFSET + 0x100, .map_io = mx31lite_map_io, .init_irq = mx31_init_irq,
arch/arm/mach-mx3/mach-mx31moboard.c renamed from arch/arm/mach-mx3/mx31moboard.c +1 -1
@@ -570,7 +570,7 @@ struct sys_timer mx31moboard_timer = {MACHINE_START (MX31MOBOARD ,"EPFL Mobots mx31moboard" )/* Maintainer: Valentin Longchamp, EPFL Mobots group */ .phys_io = MX31_AIPS1_BASE_ADDR, - .io_pg_offst = ((MX31_AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, + .io_pg_offst = (MX31_AIPS1_BASE_ADDR_VIRT >> 18) & 0xfffc, .boot_params = PHYS_OFFSET + 0x100, .map_io = mx31_map_io, .init_irq = mx31_init_irq,
arch/arm/mach-mx3/mach-mx35pdk.c renamed from arch/arm/mach-mx3/mx35pdk.c +0 -0
arch/arm/mach-mx3/mach-pcm037.c renamed from arch/arm/mach-mx3/pcm037.c +1 -1
@@ -637,7 +637,7 @@ struct sys_timer pcm037_timer = {MACHINE_START (PCM037 ,"Phytec Phycore pcm037" )/* Maintainer: Pengutronix */ .phys_io = MX31_AIPS1_BASE_ADDR, - .io_pg_offst = ((MX31_AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, + .io_pg_offst = (MX31_AIPS1_BASE_ADDR_VIRT >> 18) & 0xfffc, .boot_params = PHYS_OFFSET + 0x100, .map_io = mx31_map_io, .init_irq = mx31_init_irq,
arch/arm/mach-mx3/mach-pcm037_eet.c renamed from arch/arm/mach-mx3/pcm037_eet.c +0 -0
arch/arm/mach-mx3/mach-pcm043.c renamed from arch/arm/mach-mx3/pcm043.c +0 -0
arch/arm/mach-mx3/mach-qong.c renamed from arch/arm/mach-mx3/qong.c +1 -1
@@ -276,7 +276,7 @@ static struct sys_timer qong_timer = {MACHINE_START (QONG ,"Dave/DENX QongEVB-LITE" )/* Maintainer: DENX Software Engineering GmbH */ .phys_io = MX31_AIPS1_BASE_ADDR, - .io_pg_offst = ((MX31_AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, + .io_pg_offst = (MX31_AIPS1_BASE_ADDR_VIRT >> 18) & 0xfffc, .boot_params = PHYS_OFFSET + 0x100, .map_io = mx31_map_io, .init_irq = mx31_init_irq,
Signature · 1 line
1.6.5.2
PATCH 13/25 imx: provide helper macro to define IO_ADDRESS
Signed-off-by Uwe Kleine-K?nig <[email protected]>
Cc Sascha Hauer <[email protected]>
Cc Russell King <[email protected]>
Cc Holger Schurig <[email protected]>
Cc Dmitriy Taychenachev <[email protected]>
--- arch/arm/plat-mxc/include/mach/hardware.h | 5 +++++ 1 files changed, 5 insertions(+), 0 deletions(-)
arch/arm/plat-mxc/include/mach/hardware.h +5 -0
@@ -22,6 +22,11 @@#include <asm/sizes.h> +#define IMX_IO_ADDRESS (addr, module) \ + ((void __force __iomem *) \ + (((unsigned long)((addr) - (module ## _BASE_ADDR)) < module ## _SIZE) ?\ + (addr) - (module ## _BASE_ADDR) + (module ## _BASE_ADDR_VIRT) : 0)) +#ifdef CONFIG_ARCH_MX3 #include <mach/mx3x.h> #include <mach/mx31.h>
Signature · 1 line
1.6.5.2
PATCH 14/25 imx21: define and use MX21_IO_ADDRESS
Signed-off-by Uwe Kleine-K?nig <[email protected]>
Cc Sascha Hauer <[email protected]>
Cc Russell King <[email protected]>
Cc Holger Schurig <[email protected]>
Cc Rabin Vincent <[email protected]>
Cc Agust?n Ferr?n Pozuelo <[email protected]>
--- arch/arm/mach-mx2/clock_imx21.c | 4 ++-- arch/arm/plat-mxc/include/mach/mx21.h | 5 +++++ 2 files changed, 7 insertions(+), 2 deletions(-)
arch/arm/mach-mx2/clock_imx21.c +2 -2
@@ -28,7 +28,7 @@#include <asm/clkdev.h> #include <asm/div64.h> -#define IO_ADDR_CCM (off) (IO_ADDRESS(MX21_CCM_BASE_ADDR) + (off)) +#define IO_ADDR_CCM (off) (MX21_IO_ADDRESS(MX21_CCM_BASE_ADDR) + (off))/* Register offsets */ #define CCM_CSCR IO_ADDR_CCM(0x0)
@@ -1235,7 +1235,7 @@ int __init mx21_clocks_init(unsigned long lref, unsigned long href)clk_enable (&uart_clk[0 ]);#endif -mxc_timer_init (&gpt_clk[0 ],IO_ADDRESS (MX21_GPT1_BASE_ADDR ), +mxc_timer_init (&gpt_clk[0 ],MX21_IO_ADDRESS (MX21_GPT1_BASE_ADDR ),MX21_INT_GPT1 );return 0 ; }
arch/arm/plat-mxc/include/mach/mx21.h +5 -0
@@ -92,6 +92,11 @@#define MX21_IRAM_BASE_ADDR 0xffffe800/* internal ram */ +#define MX21_IO_ADDRESS (x) ( \ + IMX_IO_ADDRESS(x, MX21_AIPI) ?: \ + IMX_IO_ADDRESS(x, MX21_SAHB1) ?: \ + IMX_IO_ADDRESS(x, MX21_X_MEMC)) +/* fixed interrupt numbers */ #define MX21_INT_CSPI3 6#define MX21_INT_GPIO 8
Signature · 1 line
1.6.5.2
PATCH 15/25 imx27: define and use MX27_IO_ADDRESS
Signed-off-by Uwe Kleine-K?nig <[email protected]>
Cc Sascha Hauer <[email protected]>
Cc Russell King <[email protected]>
Cc Rabin Vincent <[email protected]>
Cc Javier Martin <[email protected]>
Cc Valentin Longchamp <[email protected]>
Cc Holger Schurig <[email protected]>
--- arch/arm/mach-mx2/clock_imx27.c | 4 ++-- arch/arm/mach-mx2/cpu_imx27.c | 3 ++- arch/arm/plat-mxc/include/mach/mx27.h | 5 +++++ 3 files changed, 9 insertions(+), 3 deletions(-)
arch/arm/mach-mx2/clock_imx27.c +2 -2
@@ -29,7 +29,7 @@#include <mach/common.h> #include <mach/hardware.h> -#define IO_ADDR_CCM (off) (IO_ADDRESS(MX27_CCM_BASE_ADDR) + (off)) +#define IO_ADDR_CCM (off) (MX27_IO_ADDRESS(MX27_CCM_BASE_ADDR) + (off))/* Register offsets */ #define CCM_CSCR IO_ADDR_CCM(0x0)
@@ -757,7 +757,7 @@ int __init mx27_clocks_init(unsigned long fref)clk_enable (&uart1_clk);#endif -mxc_timer_init (&gpt1_clk,IO_ADDRESS (MX27_GPT1_BASE_ADDR ), +mxc_timer_init (&gpt1_clk,MX27_IO_ADDRESS (MX27_GPT1_BASE_ADDR ),MX27_INT_GPT1 );return 0 ;
arch/arm/mach-mx2/cpu_imx27.c +2 -1
@@ -39,7 +39,8 @@ static void query_silicon_parameter(void)* the silicon revision very early we read it here to * avoid any further hooks */ - val =__raw_readl (IO_ADDRESS (MX27_SYSCTRL_BASE_ADDR ) +SYS_CHIP_ID ); + val =__raw_readl (MX27_IO_ADDRESS (MX27_SYSCTRL_BASE_ADDR + +SYS_CHIP_ID )); cpu_silicon_rev = (int )(val >>28 ); cpu_partnumber = (int )((val >>12 ) &0xFFFF );
arch/arm/plat-mxc/include/mach/mx27.h +5 -0
@@ -114,6 +114,11 @@/* IRAM */ #define MX27_IRAM_BASE_ADDR 0xffff4c00/* internal ram */ +#define MX27_IO_ADDRESS (x) ( \ + IMX_IO_ADDRESS(x, MX27_AIPI) ?: \ + IMX_IO_ADDRESS(x, MX27_SAHB1) ?: \ + IMX_IO_ADDRESS(x, MX27_X_MEMC)) +/* fixed interrupt numbers */ #define MX27_INT_I2C2 1#define MX27_INT_GPT6 2
Signature · 1 line
1.6.5.2
PATCH 16/25 imx31: define and use MX31_IO_ADDRESS
Signed-off-by Uwe Kleine-K?nig <[email protected]>
Cc Sascha Hauer <[email protected]>
Cc Russell King <[email protected]>
Cc Daniel Mack <[email protected]>
Cc Greg Kroah-Hartman <[email protected]>
Cc Mark Brown <[email protected]>
Cc Magnus Lilja <[email protected]>
--- arch/arm/mach-mx3/clock-imx31.c | 3 ++- arch/arm/mach-mx3/crm_regs.h | 2 +- arch/arm/mach-mx3/iomux-imx31.c | 2 +- arch/arm/plat-mxc/ehci.c | 4 ++-- arch/arm/plat-mxc/include/mach/board-mx31ads.h | 2 +- arch/arm/plat-mxc/include/mach/mx31.h | 7 +++++++ 6 files changed, 14 insertions(+), 6 deletions(-)
arch/arm/mach-mx3/clock-imx31.c +2 -1
@@ -625,7 +625,8 @@ int __init mx31_clocks_init(unsigned long fref)__raw_writel (reg,MXC_CCM_PMCR1 ); } -mxc_timer_init (&ipg_clk,IO_ADDRESS (MX31_GPT1_BASE_ADDR ),MX31_INT_GPT ); +mxc_timer_init (&ipg_clk,MX31_IO_ADDRESS (MX31_GPT1_BASE_ADDR ), +MX31_INT_GPT );return 0 ; }
arch/arm/mach-mx3/crm_regs.h +1 -1
@@ -24,7 +24,7 @@#define CKIH_CLK_FREQ_27MHZ 27000000#define CKIL_CLK_FREQ 32768 -#define MXC_CCM_BASE IO_ADDRESS(MX31_CCM_BASE_ADDR) +#define MXC_CCM_BASE MX31_IO_ADDRESS(MX31_CCM_BASE_ADDR)/* Register addresses */ #define MXC_CCM_CCMR (MXC_CCM_BASE + 0x00)
arch/arm/mach-mx3/iomux-imx31.c +1 -1
@@ -29,7 +29,7 @@/* * IOMUX register (base) addresses */ -#define IOMUX_BASE IO_ADDRESS(MX31_IOMUXC_BASE_ADDR) +#define IOMUX_BASE MX31_IO_ADDRESS(MX31_IOMUXC_BASE_ADDR)#define IOMUXINT_OBS1 (IOMUX_BASE + 0x000)#define IOMUXINT_OBS2 (IOMUX_BASE + 0x004)#define IOMUXGPR (IOMUX_BASE + 0x008)
arch/arm/plat-mxc/ehci.c +2 -2
@@ -43,7 +43,7 @@ int mxc_set_usbcontrol(int port, unsigned int flags)unsigned int v;if (cpu_is_mx31 ()) { - v =readl (IO_ADDRESS (MX31_OTG_BASE_ADDR + + v =readl (MX31_IO_ADDRESS (MX31_OTG_BASE_ADDR +USBCTRL_OTGBASE_OFFSET ));switch (port) {
@@ -79,7 +79,7 @@ int mxc_set_usbcontrol(int port, unsigned int flags)break ; } -writel (v,IO_ADDRESS (MX31_OTG_BASE_ADDR + +writel (v,MX31_IO_ADDRESS (MX31_OTG_BASE_ADDR +USBCTRL_OTGBASE_OFFSET ));return 0 ; }
arch/arm/plat-mxc/include/mach/board-mx31ads.h +1 -1
@@ -14,7 +14,7 @@#include <mach/hardware.h> /* Base address of PBC controller */ -#define PBC_BASE_ADDRESS IO_ADDRESS(CS4_BASE_ADDR) +#define PBC_BASE_ADDRESS MX31_CS4_BASE_ADDR_VIRT/* Offsets for the PBC Controller register */ /* PBC Board status register offset */
arch/arm/plat-mxc/include/mach/mx31.h +7 -0
@@ -109,6 +109,13 @@#define MX31_PCMCIA_MEM_BASE_ADDR 0xbc000000 +#define MX31_IO_ADDRESS (x) ( \ + IMX_IO_ADDRESS(x, MX31_AIPS1) ?: \ + IMX_IO_ADDRESS(x, MX31_AIPS2) ?: \ + IMX_IO_ADDRESS(x, MX31_AVIC) ?: \ + IMX_IO_ADDRESS(x, MX31_X_MEMC) ?: \ + IMX_IO_ADDRESS(x, MX31_SPBA0)) +#define MX31_INT_I2C3 3#define MX31_INT_I2C2 4#define MX31_INT_MPEG4_ENCODER 5
Signature · 1 line
1.6.5.2
PATCH 17/25 imx25: redefine MX25_IO_ADDRESS using IMX_IO_ADDRESS
Signed-off-by Uwe Kleine-K?nig <[email protected]>
Cc Sascha Hauer <[email protected]>
Cc Russell King <[email protected]>
--- arch/arm/plat-mxc/include/mach/mx25.h | 19 ++++--------------- 1 files changed, 4 insertions(+), 15 deletions(-)
arch/arm/plat-mxc/include/mach/mx25.h +4 -15
@@ -22,21 +22,10 @@#define MX25_GPIO3_BASE_ADDR_VIRT (MX25_AIPS2_BASE_ADDR_VIRT + 0xa4000)#define MX25_GPIO4_BASE_ADDR_VIRT (MX25_AIPS2_BASE_ADDR_VIRT + 0x9c000) -#define MX25_AIPS1_IO_ADDRESS (x) \ - (((x) - MX25_AIPS1_BASE_ADDR) + MX25_AIPS1_BASE_ADDR_VIRT) -#define MX25_AIPS2_IO_ADDRESS (x) \ - (((x) - MX25_AIPS2_BASE_ADDR) + MX25_AIPS2_BASE_ADDR_VIRT) -#define MX25_AVIC_IO_ADDRESS (x) \ - (((x) - MX25_AVIC_BASE_ADDR) + MX25_AVIC_BASE_ADDR_VIRT) - -#define __in_range (addr, name) ((addr) >= name##_BASE_ADDR && (addr) < name##_BASE_ADDR + name##_SIZE) - -#define MX25_IO_ADDRESS (x) \ - (void __force __iomem *) \ - (__in_range(x, MX25_AIPS1) ? MX25_AIPS1_IO_ADDRESS(x) : \ - __in_range(x, MX25_AIPS2) ? MX25_AIPS2_IO_ADDRESS(x) : \ - __in_range(x, MX25_AVIC) ? MX25_AVIC_IO_ADDRESS(x) : \ - 0xDEADBEEF) +#define MX25_IO_ADDRESS (x) ( \ + IMX_IO_ADDRESS(x, MX25_AIPS1) ?: \ + IMX_IO_ADDRESS(x, MX25_AIPS2) ?: \ + IMX_IO_ADDRESS(x, MX25_AVIC))#define UART1_BASE_ADDR 0x43f90000#define UART2_BASE_ADDR 0x43f94000
Signature · 1 line
1.6.5.2
PATCH 18/25 imx35: define and use MX35_IO_ADDRESS
Signed-off-by Uwe Kleine-K?nig <[email protected]>
Cc Sascha Hauer <[email protected]>
Cc Russell King <[email protected]>
Cc J?rgen Beisert <[email protected]>
Cc Rabin Vincent <[email protected]>
Cc Valentin Longchamp <[email protected]>
--- arch/arm/mach-mx3/clock-imx35.c | 5 +++-- arch/arm/plat-mxc/include/mach/mx35.h | 7 +++++++ 2 files changed, 10 insertions(+), 2 deletions(-)
arch/arm/mach-mx3/clock-imx35.c +3 -2
@@ -28,7 +28,7 @@#include <mach/hardware.h> #include <mach/common.h> -#define CCM_BASE IO_ADDRESS(MX35_CCM_BASE_ADDR) +#define CCM_BASE MX35_IO_ADDRESS(MX35_CCM_BASE_ADDR)#define CCM_CCMR 0x00#define CCM_PDR0 0x04
@@ -504,7 +504,8 @@ int __init mx35_clocks_init()__raw_writel ((3 <<26 ) | ll,CCM_BASE +CCM_CGR2 );__raw_writel (0 ,CCM_BASE +CCM_CGR3 ); -mxc_timer_init (&gpt_clk,IO_ADDRESS (MX35_GPT1_BASE_ADDR ),MX35_INT_GPT ); +mxc_timer_init (&gpt_clk, +MX35_IO_ADDRESS (MX35_GPT1_BASE_ADDR ),MX35_INT_GPT );return 0 ; }
arch/arm/plat-mxc/include/mach/mx35.h +7 -0
@@ -104,6 +104,13 @@#define MX35_NFC_BASE_ADDR 0xbb000000#define MX35_PCMCIA_MEM_BASE_ADDR 0xbc000000 +#define MX35_IO_ADDRESS (x) ( \ + IMX_IO_ADDRESS(x, MX35_AIPS1) ?: \ + IMX_IO_ADDRESS(x, MX35_AIPS2) ?: \ + IMX_IO_ADDRESS(x, MX35_AVIC) ?: \ + IMX_IO_ADDRESS(x, MX35_X_MEMC) ?: \ + IMX_IO_ADDRESS(x, MX35_SPBA0)) +/* * Interrupt numbers */
Signature · 1 line
1.6.5.2
PATCH 19/25 mx3/kzm_arm11_01: define and use board specific IO_ADDRESS macro
Signed-off-by Uwe Kleine-K?nig <[email protected]>
Cc Sascha Hauer <[email protected]>
Cc Russell King <[email protected]>
--- arch/arm/mach-mx3/mach-kzm_arm11_01.c | 11 ++++++++--- 1 files changed, 8 insertions(+), 3 deletions(-)
arch/arm/mach-mx3/mach-kzm_arm11_01.c +8 -3
@@ -46,13 +46,18 @@#include "devices.h" +#define KZM_ARM11_IO_ADDRESS (x) ( \ + IMX_IO_ADDRESS(x, MX31_CS4) ?: \ + IMX_IO_ADDRESS(x, MX31_CS5) ?: \ + MX31_IO_ADDRESS(x)) + #if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE) /* * KZM-ARM11-01 has an external UART on FPGA */ static struct plat_serial8250_port serial_platform_data[] = { { - .membase = IO_ADDRESS(KZM_ARM11_16550), + .membase = KZM_ARM11_IO_ADDRESS(KZM_ARM11_16550), .mapbase = KZM_ARM11_16550, .irq = IOMUX_TO_IRQ(MX31_PIN_GPIO1_1), .irqflags = IRQ_TYPE_EDGE_RISING,
@@ -102,9 +107,9 @@ static int __init kzm_init_ext_uart(void)/* * Unmask UART interrupt */ - tmp =__raw_readb (IO_ADDRESS (KZM_ARM11_CTL1 )); + tmp =__raw_readb (KZM_ARM11_IO_ADDRESS (KZM_ARM11_CTL1 )); tmp |=0x2 ; -__raw_writeb (tmp,IO_ADDRESS (KZM_ARM11_CTL1 )); +__raw_writeb (tmp,KZM_ARM11_IO_ADDRESS (KZM_ARM11_CTL1 ));return platform_device_register (&serial_device); }
Signature · 1 line
1.6.5.2
PATCH 20/25 imx: mangle addresses after adding the offset
don't use
IO_ADDRESS($base) + $offset
but
IO_ADDRESS($base + $offset)
Signed-off-by Uwe Kleine-K?nig <[email protected]>
Cc Sascha Hauer <[email protected]>
Cc Russell King <[email protected]>
Cc Holger Schurig <[email protected]>
Cc Rabin Vincent <[email protected]>
Cc "Agust?n Ferr?n Pozuelo" <[email protected]>
Cc Javier Martin <[email protected]>
Cc Valentin Longchamp <[email protected]>
Cc Daniel Mack <[email protected]>
Cc Dmitriy Taychenachev <[email protected]>
--- arch/arm/mach-mx2/clock_imx21.c | 2 +- arch/arm/mach-mx2/clock_imx27.c | 2 +- arch/arm/mach-mx3/cpu.c | 2 +- arch/arm/plat-mxc/include/mach/mxc.h | 6 +++--- 4 files changed, 6 insertions(+), 6 deletions(-)
arch/arm/mach-mx2/clock_imx21.c +1 -1
@@ -28,7 +28,7 @@#include <asm/clkdev.h> #include <asm/div64.h> -#define IO_ADDR_CCM (off) (MX21_IO_ADDRESS(MX21_CCM_BASE_ADDR) + (off)) +#define IO_ADDR_CCM (off) (MX21_IO_ADDRESS(MX21_CCM_BASE_ADDR + (off)))/* Register offsets */ #define CCM_CSCR IO_ADDR_CCM(0x0)
arch/arm/mach-mx2/clock_imx27.c +1 -1
@@ -29,7 +29,7 @@#include <mach/common.h> #include <mach/hardware.h> -#define IO_ADDR_CCM (off) (MX27_IO_ADDRESS(MX27_CCM_BASE_ADDR) + (off)) +#define IO_ADDR_CCM (off) (MX27_IO_ADDRESS(MX27_CCM_BASE_ADDR + (off)))/* Register offsets */ #define CCM_CSCR IO_ADDR_CCM(0x0)
arch/arm/mach-mx3/cpu.c +1 -1
@@ -41,7 +41,7 @@ void __init mx31_read_cpu_rev(void)u32 i, srev;/* read SREV register from IIM module */ - srev =__raw_readl (IO_ADDRESS (IIM_BASE_ADDR ) +MXC_IIMSREV ); + srev =__raw_readl (IO_ADDRESS (IIM_BASE_ADDR +MXC_IIMSREV ));for (i =0 ; i <ARRAY_SIZE (mx31_cpu_type); i++)if (srev == mx31_cpu_type[i].srev) {
arch/arm/plat-mxc/include/mach/mxc.h +3 -3
@@ -121,9 +121,9 @@ extern unsigned int __mxc_cpu_type;#endif #if defined(CONFIG_ARCH_MX3 ) || defined(CONFIG_ARCH_MX2 ) -#define CSCR_U (n) (IO_ADDRESS(WEIM_BASE_ADDR) + n * 0x10) -#define CSCR_L (n) (IO_ADDRESS(WEIM_BASE_ADDR) + n * 0x10 + 0x4) -#define CSCR_A (n) (IO_ADDRESS(WEIM_BASE_ADDR) + n * 0x10 + 0x8) +#define CSCR_U (n) (IO_ADDRESS(WEIM_BASE_ADDR + n * 0x10)) +#define CSCR_L (n) (IO_ADDRESS(WEIM_BASE_ADDR + n * 0x10 + 0x4)) +#define CSCR_A (n) (IO_ADDRESS(WEIM_BASE_ADDR + n * 0x10 + 0x8))#endif #define cpu_is_mx3 () (cpu_is_mx31() || cpu_is_mx35() || cpu_is_mxc91231())
Signature · 1 line
1.6.5.2
PATCH 21/25 imx: only define deprecated symbols conditionally
Define deprecated symbols in an #ifdef IMX_NEEDS_DEPRECATED_SYMBOLS ...
All files that still depend on the old definitions get -DIMX_NEEDS_DEPRECATED_SYMBOLS passed to the compiler.
When all remaining users are fixed this allows including the soc specific headers unconditionally.
Signed-off-by Uwe Kleine-K?nig <[email protected]>
Cc Sascha Hauer <[email protected]>
Cc Russell King <[email protected]>
Cc Eric Benard <[email protected]>
Cc Fabio Estevam <[email protected]>
Cc Alan Carvalho de Assis <[email protected]>
Cc Daniel Mack <[email protected]>
Cc Alberto Panizzo <[email protected]>
Cc Ilya Yanok <[email protected]>
Cc Holger Schurig <[email protected]>
Cc Jiri Kosina <[email protected]>
Cc Magnus Lilja <[email protected]>
--- arch/arm/mach-mx2/Makefile | 3 +++ arch/arm/mach-mx3/Makefile | 4 ++++ arch/arm/plat-mxc/Makefile | 4 ++++ arch/arm/plat-mxc/include/mach/mx21.h | 2 ++ arch/arm/plat-mxc/include/mach/mx27.h | 2 ++ arch/arm/plat-mxc/include/mach/mx2x.h | 2 ++ arch/arm/plat-mxc/include/mach/mx31.h | 2 ++ arch/arm/plat-mxc/include/mach/mx35.h | 2 ++ arch/arm/plat-mxc/include/mach/mx3x.h | 2 ++ 9 files changed, 23 insertions(+), 0 deletions(-)
arch/arm/mach-mx2/Makefile +3 -0
@@ -5,6 +5,9 @@ # Object file lists. obj-y := generic.o devices.o serial.o +CFLAGS_generic.o = -DIMX_NEEDS_DEPRECATED_SYMBOLS +CFLAGS_devices.o = -DIMX_NEEDS_DEPRECATED_SYMBOLS +CFLAGS_serial.o = -DIMX_NEEDS_DEPRECATED_SYMBOLS obj-$(CONFIG_MACH_MX21) += clock_imx21.o
arch/arm/mach-mx3/Makefile +4 -0
@@ -5,6 +5,9 @@ # Object file lists. obj-y := mm.o devices.o cpu.o +CFLAGS_mm.o = -DIMX_NEEDS_DEPRECATED_SYMBOLS +CFLAGS_devices.o = -DIMX_NEEDS_DEPRECATED_SYMBOLS +CFLAGS_cpu.o = -DIMX_NEEDS_DEPRECATED_SYMBOLS obj-$(CONFIG_ARCH_MX31) += clock-imx31.o iomux-imx31.o obj-$(CONFIG_ARCH_MX35) += clock-imx35.o obj-$(CONFIG_MACH_MX31ADS) += mach-mx31ads.o
@@ -13,6 +16,7 @@ obj-$(CONFIG_MACH_MX31LITE) += mach-mx31lite.o mx31lite-db.o obj-$(CONFIG_MACH_PCM037) += mach-pcm037.o obj-$(CONFIG_MACH_PCM037_EET) += mach-pcm037_eet.o obj-$(CONFIG_MACH_MX31_3DS) += mach-mx31_3ds.o +CFLAGS_mach-mx31_3ds.o = -DIMX_NEEDS_DEPRECATED_SYMBOLS obj-$(CONFIG_MACH_MX31MOBOARD) += mach-mx31moboard.o mx31moboard-devboard.o \ mx31moboard-marxbot.o obj-$(CONFIG_MACH_QONG) += mach-qong.o
arch/arm/plat-mxc/Makefile +4 -0
@@ -7,9 +7,13 @@ obj-y := irq.o clock.o gpio.o time.o devices.o cpu.o system.o obj-$(CONFIG_ARCH_MX1) += iomux-mx1-mx2.o dma-mx1-mx2.o obj-$(CONFIG_ARCH_MX2) += iomux-mx1-mx2.o dma-mx1-mx2.o +CFLAGS_iomux-mx1-mx2.o = -DIMX_NEEDS_DEPRECATED_SYMBOLS +CFLAGS_dma-mx1-mx2.o = -DIMX_NEEDS_DEPRECATED_SYMBOLS obj-$(CONFIG_ARCH_MXC_IOMUX_V3) += iomux-v3.o obj-$(CONFIG_MXC_PWM) += pwm.o obj-$(CONFIG_USB_EHCI_MXC) += ehci.o obj-$(CONFIG_MXC_ULPI) += ulpi.o obj-$(CONFIG_ARCH_MXC_AUDMUX_V1) += audmux-v1.o +CFLAGS_audmux-v1.o = -DIMX_NEEDS_DEPRECATED_SYMBOLS obj-$(CONFIG_ARCH_MXC_AUDMUX_V2) += audmux-v2.o +CFLAGS_audmux-v2.o = -DIMX_NEEDS_DEPRECATED_SYMBOLS
arch/arm/plat-mxc/include/mach/mx21.h +2 -0
@@ -184,6 +184,7 @@#define MX21_DMA_REQ_CSI_STAT 30#define MX21_DMA_REQ_CSI_RX 31 +#ifdef IMX_NEEDS_DEPRECATED_SYMBOLS /* these should go away */ #define SDRAM_BASE_ADDR MX21_SDRAM_BASE_ADDR#define CSD1_BASE_ADDR MX21_CSD1_BASE_ADDR
@@ -216,5 +217,6 @@#define DMA_REQ_FIRI_RX MX21_DMA_REQ_FIRI_RX#define DMA_REQ_BMI_TX MX21_DMA_REQ_BMI_TX#define DMA_REQ_BMI_RX MX21_DMA_REQ_BMI_RX +#endif #endif /* __ASM_ARCH_MXC_MX21_H__ */
arch/arm/plat-mxc/include/mach/mx27.h +2 -0
@@ -230,6 +230,7 @@extern int mx27_revision (void );#endif +#ifdef IMX_NEEDS_DEPRECATED_SYMBOLS /* these should go away */ #define MSHC_BASE_ADDR MX27_MSHC_BASE_ADDR#define GPT5_BASE_ADDR MX27_GPT5_BASE_ADDR
@@ -297,5 +298,6 @@ extern int mx27_revision(void);#define DMA_REQ_UART6_RX MX27_DMA_REQ_UART6_RX#define DMA_REQ_SDHC3 MX27_DMA_REQ_SDHC3#define DMA_REQ_NFC MX27_DMA_REQ_NFC +#endif #endif /* __ASM_ARCH_MXC_MX27_H__ */
arch/arm/plat-mxc/include/mach/mx2x.h +2 -0
@@ -176,6 +176,7 @@#define MX2x_DMA_REQ_CSI_STAT 30#define MX2x_DMA_REQ_CSI_RX 31 +#ifdef IMX_NEEDS_DEPRECATED_SYMBOLS /* these should go away */ #define AIPI_BASE_ADDR MX2x_AIPI_BASE_ADDR#define AIPI_BASE_ADDR_VIRT MX2x_AIPI_BASE_ADDR_VIRT
@@ -287,5 +288,6 @@#define DMA_REQ_UART1_TX MX2x_DMA_REQ_UART1_TX#define DMA_REQ_CSI_STAT MX2x_DMA_REQ_CSI_STAT#define DMA_REQ_CSI_RX MX2x_DMA_REQ_CSI_RX +#endif #endif /* __ASM_ARCH_MXC_MX2x_H__ */
arch/arm/plat-mxc/include/mach/mx31.h +2 -0
@@ -193,6 +193,7 @@#define MX31_SYSTEM_REV_MIN MX31_CHIP_REV_1_0#define MX31_SYSTEM_REV_NUM 3 +#ifdef IMX_NEEDS_DEPRECATED_SYMBOLS /* these should go away */ #define ATA_BASE_ADDR MX31_ATA_BASE_ADDR#define UART4_BASE_ADDR MX31_UART4_BASE_ADDR
@@ -223,3 +224,4 @@#define MXC_INT_UART5 MX31_INT_UART5#define MXC_INT_CCM MX31_INT_CCM#define MXC_INT_PCMCIA MX31_INT_PCMCIA +#endif
arch/arm/plat-mxc/include/mach/mx35.h +2 -0
@@ -187,6 +187,7 @@#define MX35_SYSTEM_REV_MIN MX35_CHIP_REV_1_0#define MX35_SYSTEM_REV_NUM 3 +#ifdef IMX_NEEDS_DEPRECATED_SYMBOLS /* these should go away */ #define MXC_FEC_BASE_ADDR MX35_FEC_BASE_ADDR#define MXC_INT_OWIRE MX35_INT_OWIRE
@@ -202,3 +203,4 @@#define MXC_INT_MLB MX35_INT_MLB#define MXC_INT_SPDIF MX35_INT_SPDIF#define MXC_INT_FEC MX35_INT_FEC +#endif
arch/arm/plat-mxc/include/mach/mx3x.h +2 -0
@@ -269,6 +269,7 @@ static inline int mx31_revision(void) }#endif +#ifdef IMX_NEEDS_DEPRECATED_SYMBOLS /* these should go away */ #define L2CC_BASE_ADDR MX3x_L2CC_BASE_ADDR#define L2CC_SIZE MX3x_L2CC_SIZE
@@ -401,5 +402,6 @@ static inline int mx31_revision(void)#define CHIP_REV_3_2 MX3x_CHIP_REV_3_2#define SYSTEM_REV_MIN MX3x_SYSTEM_REV_MIN#define SYSTEM_REV_NUM MX3x_SYSTEM_REV_NUM +#endif #endif /* __ASM_ARCH_MXC_MX31_H__ */
Signature · 1 line
1.6.5.2
PATCH 22/25 imx: remove mx1ads defconfig
For some time now the defconfig for mx1ads produces a kernel for a versatile board. As CONFIG_ARCH_MX1ADS is included in the mx1 defconfig just get rid of mx1ads_defconfig.
Signed-off-by Uwe Kleine-K?nig <[email protected]>
Cc Sascha Hauer <[email protected]>
--- arch/arm/configs/mx1ads_defconfig | 742 ------------------------------------- 1 files changed, 0 insertions(+), 742 deletions(-) delete mode 100644 arch/arm/configs/mx1ads_defconfig
arch/arm/configs/mx1ads_defconfig deleted +0 -742
@@ -1,742 +0,0 @@ -# -# Automatically generated make config: don't edit -# Linux kernel version: 2.6.12-rc1-bk2 -# Sun Mar 27 02:15:46 2005 -# -CONFIG_ARM=y -CONFIG_MMU=y -CONFIG_UID16=y -CONFIG_RWSEM_GENERIC_SPINLOCK=y -CONFIG_GENERIC_CALIBRATE_DELAY=y -CONFIG_GENERIC_IOMAP=y - -# -# Code maturity level options -# -CONFIG_EXPERIMENTAL=y -CONFIG_CLEAN_COMPILE=y -CONFIG_BROKEN_ON_SMP=y -CONFIG_LOCK_KERNEL=y - -# -# General setup -# -CONFIG_LOCALVERSION="" -CONFIG_SWAP=y -CONFIG_SYSVIPC=y -# CONFIG_POSIX_MQUEUE is not set -# CONFIG_BSD_PROCESS_ACCT is not set -# CONFIG_SYSCTL is not set -# CONFIG_AUDIT is not set -# CONFIG_HOTPLUG is not set -CONFIG_KOBJECT_UEVENT=y -# CONFIG_IKCONFIG is not set -CONFIG_EMBEDDED=y -# CONFIG_KALLSYMS is not set -CONFIG_BASE_FULL=y -CONFIG_FUTEX=y -CONFIG_EPOLL=y -CONFIG_CC_OPTIMIZE_FOR_SIZE=y -CONFIG_SHMEM=y -CONFIG_CC_ALIGN_FUNCTIONS=0 -CONFIG_CC_ALIGN_LABELS=0 -CONFIG_CC_ALIGN_LOOPS=0 -CONFIG_CC_ALIGN_JUMPS=0 -# CONFIG_TINY_SHMEM is not set -CONFIG_BASE_SMALL=0 - -# -# Loadable module support -# -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -# CONFIG_MODULE_FORCE_UNLOAD is not set -CONFIG_OBSOLETE_MODPARM=y -# CONFIG_MODVERSIONS is not set -# CONFIG_MODULE_SRCVERSION_ALL is not set -CONFIG_KMOD=y - -# -# System Type -# -# CONFIG_ARCH_CLPS7500 is not set -# CONFIG_ARCH_CLPS711X is not set -# CONFIG_ARCH_CO285 is not set -# CONFIG_ARCH_EBSA110 is not set -# CONFIG_ARCH_FOOTBRIDGE is not set -# CONFIG_ARCH_INTEGRATOR is not set -# CONFIG_ARCH_IOP3XX is not set -# CONFIG_ARCH_IXP4XX is not set -# CONFIG_ARCH_IXP2000 is not set -# CONFIG_ARCH_L7200 is not set -# CONFIG_ARCH_PXA is not set -# CONFIG_ARCH_RPC is not set -# CONFIG_ARCH_SA1100 is not set -# CONFIG_ARCH_S3C2410 is not set -# CONFIG_ARCH_SHARK is not set -# CONFIG_ARCH_LH7A40X is not set -# CONFIG_ARCH_OMAP is not set -# CONFIG_ARCH_VERSATILE is not set -CONFIG_ARCH_IMX=y -# CONFIG_ARCH_H720X is not set - -# -# IMX Implementations -# -CONFIG_ARCH_MX1ADS=y - -# -# Processor Type -# -CONFIG_CPU_ARM920T=y -CONFIG_CPU_32v4=y -CONFIG_CPU_ABRT_EV4T=y -CONFIG_CPU_CACHE_V4WT=y -CONFIG_CPU_CACHE_VIVT=y -CONFIG_CPU_COPY_V4WB=y -CONFIG_CPU_TLB_V4WBI=y - -# -# Processor Features -# -# CONFIG_ARM_THUMB is not set -# CONFIG_CPU_ICACHE_DISABLE is not set -# CONFIG_CPU_DCACHE_DISABLE is not set -# CONFIG_CPU_DCACHE_WRITETHROUGH is not set - -# -# Bus support -# -CONFIG_ISA=y - -# -# PCCARD (PCMCIA/CardBus) support -# -# CONFIG_PCCARD is not set - -# -# Kernel Features -# -CONFIG_PREEMPT=y -# CONFIG_LEDS is not set -CONFIG_ALIGNMENT_TRAP=y - -# -# Boot options -# -CONFIG_ZBOOT_ROM_TEXT=0x0 -CONFIG_ZBOOT_ROM_BSS=0x0 -CONFIG_CMDLINE="console=ttySMX0,57600n8 ip=bootp root=/dev/nfs" -# CONFIG_XIP_KERNEL is not set - -# -# Floating point emulation -# - -# -# At least one emulation must be selected -# -CONFIG_FPE_NWFPE=y -CONFIG_FPE_NWFPE_XP=y -CONFIG_FPE_FASTFPE=y - -# -# Userspace binary formats -# -CONFIG_BINFMT_ELF=y -# CONFIG_BINFMT_AOUT is not set -# CONFIG_BINFMT_MISC is not set -# CONFIG_ARTHUR is not set - -# -# Power management options -# -# CONFIG_PM is not set - -# -# Device Drivers -# - -# -# Generic Driver Options -# -CONFIG_STANDALONE=y -CONFIG_PREVENT_FIRMWARE_BUILD=y -# CONFIG_FW_LOADER is not set -# CONFIG_DEBUG_DRIVER is not set - -# -# Memory Technology Devices (MTD) -# -CONFIG_MTD=y -# CONFIG_MTD_DEBUG is not set -# CONFIG_MTD_CONCAT is not set -CONFIG_MTD_PARTITIONS=y -# CONFIG_MTD_REDBOOT_PARTS is not set -# CONFIG_MTD_CMDLINE_PARTS is not set -# CONFIG_MTD_AFS_PARTS is not set - -# -# User Modules And Translation Layers -# -CONFIG_MTD_CHAR=y -CONFIG_MTD_BLOCK=y -# CONFIG_FTL is not set -# CONFIG_NFTL is not set -# CONFIG_INFTL is not set - -# -# RAM/ROM/Flash chip drivers -# -# CONFIG_MTD_CFI is not set -# CONFIG_MTD_JEDECPROBE is not set -CONFIG_MTD_MAP_BANK_WIDTH_1=y -CONFIG_MTD_MAP_BANK_WIDTH_2=y -CONFIG_MTD_MAP_BANK_WIDTH_4=y -# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set -# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set -# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set -CONFIG_MTD_CFI_I1=y -CONFIG_MTD_CFI_I2=y -# CONFIG_MTD_CFI_I4 is not set -# CONFIG_MTD_CFI_I8 is not set -# CONFIG_MTD_RAM is not set -CONFIG_MTD_ROM=y -# CONFIG_MTD_ABSENT is not set - -# -# Mapping drivers for chip access -# -# CONFIG_MTD_COMPLEX_MAPPINGS is not set - -# -# Self-contained MTD device drivers -# -# CONFIG_MTD_SLRAM is not set -# CONFIG_MTD_PHRAM is not set -# CONFIG_MTD_MTDRAM is not set -# CONFIG_MTD_BLKMTD is not set -# CONFIG_MTD_BLOCK2MTD is not set - -# -# Disk-On-Chip Device Drivers -# -# CONFIG_MTD_DOC2000 is not set -# CONFIG_MTD_DOC2001 is not set -# CONFIG_MTD_DOC2001PLUS is not set - -# -# NAND Flash Device Drivers -# -# CONFIG_MTD_NAND is not set - -# -# Parallel port support -# -# CONFIG_PARPORT is not set - -# -# Plug and Play support -# -# CONFIG_PNP is not set - -# -# Block devices -# -# CONFIG_BLK_DEV_FD is not set -# CONFIG_BLK_DEV_XD is not set -# CONFIG_BLK_DEV_COW_COMMON is not set -CONFIG_BLK_DEV_LOOP=y -# CONFIG_BLK_DEV_CRYPTOLOOP is not set -# CONFIG_BLK_DEV_NBD is not set -# CONFIG_BLK_DEV_RAM is not set -CONFIG_BLK_DEV_RAM_COUNT=16 -CONFIG_INITRAMFS_SOURCE="" -# CONFIG_CDROM_PKTCDVD is not set - -# -# IO Schedulers -# -CONFIG_IOSCHED_NOOP=y -# CONFIG_IOSCHED_AS is not set -CONFIG_IOSCHED_DEADLINE=y -CONFIG_IOSCHED_CFQ=y -# CONFIG_ATA_OVER_ETH is not set - -# -# SCSI device support -# -# CONFIG_SCSI is not set - -# -# Multi-device support (RAID and LVM) -# -# CONFIG_MD is not set - -# -# Fusion MPT device support -# - -# -# IEEE 1394 (FireWire) support -# - -# -# I2O device support -# - -# -# Networking support -# -CONFIG_NET=y - -# -# Networking options -# -CONFIG_PACKET=m -CONFIG_PACKET_MMAP=y -# CONFIG_NETLINK_DEV is not set -CONFIG_UNIX=y -# CONFIG_NET_KEY is not set -CONFIG_INET=y -# CONFIG_IP_MULTICAST is not set -# CONFIG_IP_ADVANCED_ROUTER is not set -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -CONFIG_IP_PNP_BOOTP=y -# CONFIG_IP_PNP_RARP is not set -# CONFIG_NET_IPIP is not set -# CONFIG_NET_IPGRE is not set -# CONFIG_ARPD is not set -# CONFIG_SYN_COOKIES is not set -# CONFIG_INET_AH is not set -# CONFIG_INET_ESP is not set -# CONFIG_INET_IPCOMP is not set -# CONFIG_INET_TUNNEL is not set -CONFIG_IP_TCPDIAG=y -# CONFIG_IP_TCPDIAG_IPV6 is not set -# CONFIG_IPV6 is not set -# CONFIG_NETFILTER is not set - -# -# SCTP Configuration (EXPERIMENTAL) -# -# CONFIG_IP_SCTP is not set -# CONFIG_ATM is not set -# CONFIG_BRIDGE is not set -# CONFIG_VLAN_8021Q is not set -# CONFIG_DECNET is not set -# CONFIG_LLC2 is not set -# CONFIG_IPX is not set -# CONFIG_ATALK is not set -# CONFIG_X25 is not set -# CONFIG_LAPB is not set -# CONFIG_NET_DIVERT is not set -# CONFIG_ECONET is not set -# CONFIG_WAN_ROUTER is not set - -# -# QoS and/or fair queueing -# -# CONFIG_NET_SCHED is not set -# CONFIG_NET_CLS_ROUTE is not set - -# -# Network testing -# -# CONFIG_NET_PKTGEN is not set -# CONFIG_NETPOLL is not set -# CONFIG_NET_POLL_CONTROLLER is not set -# CONFIG_HAMRADIO is not set -# CONFIG_IRDA is not set -# CONFIG_BT is not set -CONFIG_NETDEVICES=y -# CONFIG_DUMMY is not set -# CONFIG_BONDING is not set -# CONFIG_EQUALIZER is not set -# CONFIG_TUN is not set - -# -# ARCnet devices -# -# CONFIG_ARCNET is not set - -# -# Ethernet (10 or 100Mbit) -# -CONFIG_NET_ETHERNET=y -CONFIG_MII=y -# CONFIG_NET_VENDOR_3COM is not set -# CONFIG_LANCE is not set -# CONFIG_NET_VENDOR_SMC is not set -# CONFIG_SMC91X is not set -# CONFIG_NET_VENDOR_RACAL is not set -# CONFIG_AT1700 is not set -# CONFIG_DEPCA is not set -# CONFIG_HP100 is not set -# CONFIG_NET_ISA is not set -# CONFIG_NET_PCI is not set -# CONFIG_NET_POCKET is not set - -# -# Ethernet (1000 Mbit) -# - -# -# Ethernet (10000 Mbit) -# - -# -# Token Ring devices -# -# CONFIG_TR is not set - -# -# Wireless LAN (non-hamradio) -# -# CONFIG_NET_RADIO is not set - -# -# Wan interfaces -# -# CONFIG_WAN is not set -CONFIG_PPP=y -# CONFIG_PPP_MULTILINK is not set -CONFIG_PPP_FILTER=y -CONFIG_PPP_ASYNC=y -# CONFIG_PPP_SYNC_TTY is not set -CONFIG_PPP_DEFLATE=y -CONFIG_PPP_BSDCOMP=y -# CONFIG_PPPOE is not set -# CONFIG_SLIP is not set -# CONFIG_SHAPER is not set -# CONFIG_NETCONSOLE is not set - -# -# ISDN subsystem -# -# CONFIG_ISDN is not set - -# -# Input device support -# -# CONFIG_INPUT is not set - -# -# Hardware I/O ports -# -# CONFIG_SERIO is not set -# CONFIG_GAMEPORT is not set -CONFIG_SOUND_GAMEPORT=y - -# -# Character devices -# -# CONFIG_VT is not set -# CONFIG_SERIAL_NONSTANDARD is not set - -# -# Serial drivers -# -# CONFIG_SERIAL_8250 is not set - -# -# Non-8250 serial port support -# -CONFIG_SERIAL_IMX=y -CONFIG_SERIAL_IMX_CONSOLE=y -CONFIG_SERIAL_CORE=y -CONFIG_SERIAL_CORE_CONSOLE=y -CONFIG_UNIX98_PTYS=y -# CONFIG_LEGACY_PTYS is not set - -# -# IPMI -# -# CONFIG_IPMI_HANDLER is not set - -# -# Watchdog Cards -# -# CONFIG_WATCHDOG is not set -# CONFIG_NVRAM is not set -CONFIG_RTC=m -# CONFIG_DTLK is not set -# CONFIG_R3964 is not set - -# -# Ftape, the floppy tape device driver -# -# CONFIG_DRM is not set -# CONFIG_RAW_DRIVER is not set - -# -# TPM devices -# -# CONFIG_TCG_TPM is not set - -# -# I2C support -# -# CONFIG_I2C is not set - -# -# Misc devices -# - -# -# Multimedia devices -# -# CONFIG_VIDEO_DEV is not set - -# -# Digital Video Broadcasting Devices -# -# CONFIG_DVB is not set - -# -# Graphics support -# -# CONFIG_FB is not set - -# -# Sound -# -# CONFIG_SOUND is not set - -# -# USB support -# -CONFIG_USB_ARCH_HAS_HCD=y -# CONFIG_USB_ARCH_HAS_OHCI is not set -# CONFIG_USB is not set - -# -# USB Gadget Support -# -# CONFIG_USB_GADGET is not set - -# -# MMC/SD Card support -# -# CONFIG_MMC is not set - -# -# File systems -# -# CONFIG_EXT2_FS is not set -# CONFIG_EXT3_FS is not set -# CONFIG_JBD is not set -# CONFIG_REISERFS_FS is not set -# CONFIG_JFS_FS is not set - -# -# XFS support -# -# CONFIG_XFS_FS is not set -# CONFIG_MINIX_FS is not set -# CONFIG_ROMFS_FS is not set -# CONFIG_QUOTA is not set -CONFIG_DNOTIFY=y -# CONFIG_AUTOFS_FS is not set -# CONFIG_AUTOFS4_FS is not set - -# -# CD-ROM/DVD Filesystems -# -# CONFIG_ISO9660_FS is not set -# CONFIG_UDF_FS is not set - -# -# DOS/FAT/NT Filesystems -# -CONFIG_FAT_FS=y -CONFIG_MSDOS_FS=y -CONFIG_VFAT_FS=y -CONFIG_FAT_DEFAULT_CODEPAGE=437 -CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" -# CONFIG_NTFS_FS is not set - -# -# Pseudo filesystems -# -CONFIG_PROC_FS=y -CONFIG_SYSFS=y -CONFIG_DEVFS_FS=y -CONFIG_DEVFS_MOUNT=y -# CONFIG_DEVFS_DEBUG is not set -# CONFIG_DEVPTS_FS_XATTR is not set -CONFIG_TMPFS=y -# CONFIG_TMPFS_XATTR is not set -# CONFIG_HUGETLB_PAGE is not set -CONFIG_RAMFS=y - -# -# Miscellaneous filesystems -# -# CONFIG_ADFS_FS is not set -# CONFIG_AFFS_FS is not set -# CONFIG_HFS_FS is not set -# CONFIG_HFSPLUS_FS is not set -# CONFIG_BEFS_FS is not set -# CONFIG_BFS_FS is not set -# CONFIG_EFS_FS is not set -# CONFIG_JFFS_FS is not set -CONFIG_JFFS2_FS=y -CONFIG_JFFS2_FS_DEBUG=0 -# CONFIG_JFFS2_FS_NAND is not set -# CONFIG_JFFS2_FS_NOR_ECC is not set -# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set -CONFIG_JFFS2_ZLIB=y -CONFIG_JFFS2_RTIME=y -# CONFIG_JFFS2_RUBIN is not set -CONFIG_CRAMFS=y -# CONFIG_VXFS_FS is not set -# CONFIG_HPFS_FS is not set -# CONFIG_QNX4FS_FS is not set -# CONFIG_SYSV_FS is not set -# CONFIG_UFS_FS is not set - -# -# Network File Systems -# -CONFIG_NFS_FS=y -CONFIG_NFS_V3=y -# CONFIG_NFS_V4 is not set -# CONFIG_NFS_DIRECTIO is not set -# CONFIG_NFSD is not set -CONFIG_ROOT_NFS=y -CONFIG_LOCKD=y -CONFIG_LOCKD_V4=y -CONFIG_SUNRPC=y -# CONFIG_RPCSEC_GSS_KRB5 is not set -# CONFIG_RPCSEC_GSS_SPKM3 is not set -# CONFIG_SMB_FS is not set -# CONFIG_CIFS is not set -# CONFIG_NCP_FS is not set -# CONFIG_CODA_FS is not set -# CONFIG_AFS_FS is not set - -# -# Partition Types -# -# CONFIG_PARTITION_ADVANCED is not set -CONFIG_MSDOS_PARTITION=y - -# -# Native Language Support -# -CONFIG_NLS=y -CONFIG_NLS_DEFAULT="iso8859-1" -# CONFIG_NLS_CODEPAGE_437 is not set -# CONFIG_NLS_CODEPAGE_737 is not set -# CONFIG_NLS_CODEPAGE_775 is not set -# CONFIG_NLS_CODEPAGE_850 is not set -# CONFIG_NLS_CODEPAGE_852 is not set -# CONFIG_NLS_CODEPAGE_855 is not set -# CONFIG_NLS_CODEPAGE_857 is not set -# CONFIG_NLS_CODEPAGE_860 is not set -# CONFIG_NLS_CODEPAGE_861 is not set -# CONFIG_NLS_CODEPAGE_862 is not set -# CONFIG_NLS_CODEPAGE_863 is not set -# CONFIG_NLS_CODEPAGE_864 is not set -# CONFIG_NLS_CODEPAGE_865 is not set -# CONFIG_NLS_CODEPAGE_866 is not set -# CONFIG_NLS_CODEPAGE_869 is not set -# CONFIG_NLS_CODEPAGE_936 is not set -# CONFIG_NLS_CODEPAGE_950 is not set -# CONFIG_NLS_CODEPAGE_932 is not set -# CONFIG_NLS_CODEPAGE_949 is not set -# CONFIG_NLS_CODEPAGE_874 is not set -# CONFIG_NLS_ISO8859_8 is not set -# CONFIG_NLS_CODEPAGE_1250 is not set -# CONFIG_NLS_CODEPAGE_1251 is not set -# CONFIG_NLS_ASCII is not set -# CONFIG_NLS_ISO8859_1 is not set -# CONFIG_NLS_ISO8859_2 is not set -# CONFIG_NLS_ISO8859_3 is not set -# CONFIG_NLS_ISO8859_4 is not set -# CONFIG_NLS_ISO8859_5 is not set -# CONFIG_NLS_ISO8859_6 is not set -# CONFIG_NLS_ISO8859_7 is not set -# CONFIG_NLS_ISO8859_9 is not set -# CONFIG_NLS_ISO8859_13 is not set -# CONFIG_NLS_ISO8859_14 is not set -# CONFIG_NLS_ISO8859_15 is not set -# CONFIG_NLS_KOI8_R is not set -# CONFIG_NLS_KOI8_U is not set -# CONFIG_NLS_UTF8 is not set - -# -# Profiling support -# -# CONFIG_PROFILING is not set - -# -# Kernel hacking -# -# CONFIG_PRINTK_TIME is not set -CONFIG_DEBUG_KERNEL=y -CONFIG_MAGIC_SYSRQ=y -CONFIG_LOG_BUF_SHIFT=14 -# CONFIG_SCHEDSTATS is not set -# CONFIG_DEBUG_SLAB is not set -CONFIG_DEBUG_PREEMPT=y -# CONFIG_DEBUG_SPINLOCK is not set -# CONFIG_DEBUG_SPINLOCK_SLEEP is not set -# CONFIG_DEBUG_KOBJECT is not set -CONFIG_DEBUG_BUGVERBOSE=y -CONFIG_DEBUG_INFO=y -# CONFIG_DEBUG_FS is not set -CONFIG_FRAME_POINTER=y -CONFIG_DEBUG_USER=y -CONFIG_DEBUG_ERRORS=y -# CONFIG_DEBUG_LL is not set - -# -# Security options -# -# CONFIG_KEYS is not set -# CONFIG_SECURITY is not set - -# -# Cryptographic options -# -CONFIG_CRYPTO=y -# CONFIG_CRYPTO_HMAC is not set -# CONFIG_CRYPTO_NULL is not set -# CONFIG_CRYPTO_MD4 is not set -# CONFIG_CRYPTO_MD5 is not set -# CONFIG_CRYPTO_SHA1 is not set -# CONFIG_CRYPTO_SHA256 is not set -# CONFIG_CRYPTO_SHA512 is not set -# CONFIG_CRYPTO_WP512 is not set -# CONFIG_CRYPTO_TGR192 is not set -# CONFIG_CRYPTO_DES is not set -# CONFIG_CRYPTO_BLOWFISH is not set -# CONFIG_CRYPTO_TWOFISH is not set -# CONFIG_CRYPTO_SERPENT is not set -# CONFIG_CRYPTO_AES is not set -# CONFIG_CRYPTO_CAST5 is not set -# CONFIG_CRYPTO_CAST6 is not set -# CONFIG_CRYPTO_TEA is not set -# CONFIG_CRYPTO_ARC4 is not set -# CONFIG_CRYPTO_KHAZAD is not set -# CONFIG_CRYPTO_ANUBIS is not set -# CONFIG_CRYPTO_DEFLATE is not set -# CONFIG_CRYPTO_MICHAEL_MIC is not set -# CONFIG_CRYPTO_CRC32C is not set -# CONFIG_CRYPTO_TEST is not set - -# -# Hardware crypto devices -# - -# -# Library routines -# -CONFIG_CRC_CCITT=y -CONFIG_CRC32=y -# CONFIG_LIBCRC32C is not set -CONFIG_ZLIB_INFLATE=y -CONFIG_ZLIB_DEFLATE=y
Signature · 1 line
1.6.5.2
PATCH 23/25 imx: remove unneeded include of mach/hardware.h
This include isn't needed and hurts when defining static inline functions in mach/hardware.h (or files included by mach/hardware.h).
The reason is that the consumers of mach/uncompress.h are compiled using -Dstatic= so the code for all inline function is included in e.g. arch/arm/boot/compressed/misc.o.
Signed-off-by Uwe Kleine-K?nig <[email protected]>
Cc Sascha Hauer <[email protected]>
Cc Russell King <[email protected]>
Cc J?rg Knobloch <[email protected]>
Cc Alan Carvalho de Assis <[email protected]>
Cc Daniel Mack <[email protected]>
Cc Dmitriy Taychenachev <[email protected]>
--- arch/arm/plat-mxc/include/mach/uncompress.h | 3 --- 1 files changed, 0 insertions(+), 3 deletions(-)
arch/arm/plat-mxc/include/mach/uncompress.h +0 -3
@@ -1,8 +1,6 @@/* * arch/arm/plat-mxc/include/mach/uncompress.h * -* -* * Copyright (C) 1999 ARM Limited * Copyright (C) Shane Nay (shane at minirl.com) *
@@ -25,7 +23,6 @@#define __MXC_BOOT_UNCOMPRESS -#include <mach/hardware.h> #include <asm/mach-types.h> static unsigned long uart_base;
Signature · 1 line
1.6.5.2
PATCH 24/25 imx: properly protect mach/mx{1, [25][157x]}.h from multiple inclusion
Some headers have used (now) wrong names or havn't had protection at all. This is needed before adding static inline functions to the headers.
Signed-off-by Uwe Kleine-K?nig <[email protected]>
Cc Sascha Hauer <[email protected]>
Cc Russell King <[email protected]>
Cc Magnus Lilja <[email protected]>
Cc Holger Schurig <[email protected]>
Cc Jiri Kosina <[email protected]>
Cc Daniel Mack <[email protected]>
--- arch/arm/plat-mxc/include/mach/mx1.h | 6 +++--- arch/arm/plat-mxc/include/mach/mx21.h | 6 +++--- arch/arm/plat-mxc/include/mach/mx25.h | 2 +- arch/arm/plat-mxc/include/mach/mx27.h | 6 +++--- arch/arm/plat-mxc/include/mach/mx2x.h | 6 +++--- arch/arm/plat-mxc/include/mach/mx31.h | 5 +++++ arch/arm/plat-mxc/include/mach/mx35.h | 4 ++++ arch/arm/plat-mxc/include/mach/mx3x.h | 6 +++--- 8 files changed, 25 insertions(+), 16 deletions(-)
arch/arm/plat-mxc/include/mach/mx1.h +3 -3
@@ -9,8 +9,8 @@* published by the Free Software Foundation. */ -#ifndef __ASM_ARCH_MXC_MX1_H__ -#define __ASM_ARCH_MXC_MX1_H__ +#ifndef __MACH_MX1_H__ +#define __MACH_MX1_H__#include <mach/vmalloc.h>
@@ -161,4 +161,4 @@#define DMA_REQ_UART1_T 30#define DMA_REQ_UART1_R 31 -#endif /* __ASM_ARCH_MXC_MX1_H__ */ +#endif /* ifndef __MACH_MX1_H__ */
arch/arm/plat-mxc/include/mach/mx21.h +3 -3
@@ -22,8 +22,8 @@* MA 02110-1301, USA. */ -#ifndef __ASM_ARCH_MXC_MX21_H__ -#define __ASM_ARCH_MXC_MX21_H__ +#ifndef __MACH_MX21_H__ +#define __MACH_MX21_H__#define MX21_AIPI_BASE_ADDR 0x10000000#define MX21_AIPI_BASE_ADDR_VIRT 0xf4000000
@@ -219,4 +219,4 @@#define DMA_REQ_BMI_RX MX21_DMA_REQ_BMI_RX#endif -#endif /* __ASM_ARCH_MXC_MX21_H__ */ +#endif /* ifndef __MACH_MX21_H__ */
arch/arm/plat-mxc/include/mach/mx25.h +1 -1
@@ -34,4 +34,4 @@#define MX25_INT_FEC 57 -#endif /* __MACH_MX25_H__ */ +#endif /* ifndef __MACH_MX25_H__ */
arch/arm/plat-mxc/include/mach/mx27.h +3 -3
@@ -21,8 +21,8 @@* MA 02110-1301, USA. */ -#ifndef __ASM_ARCH_MXC_MX27_H__ -#define __ASM_ARCH_MXC_MX27_H__ +#ifndef __MACH_MX27_H__ +#define __MACH_MX27_H__#define MX27_AIPI_BASE_ADDR 0x10000000#define MX27_AIPI_BASE_ADDR_VIRT 0xf4000000
@@ -300,4 +300,4 @@ extern int mx27_revision(void);#define DMA_REQ_NFC MX27_DMA_REQ_NFC#endif -#endif /* __ASM_ARCH_MXC_MX27_H__ */ +#endif /* ifndef __MACH_MX27_H__ */
arch/arm/plat-mxc/include/mach/mx2x.h +3 -3
@@ -20,8 +20,8 @@* MA 02110-1301, USA. */ -#ifndef __ASM_ARCH_MXC_MX2x_H__ -#define __ASM_ARCH_MXC_MX2x_H__ +#ifndef __MACH_MX2x_H__ +#define __MACH_MX2x_H__/* The following addresses are common between i.MX21 and i.MX27 */
@@ -290,4 +290,4 @@#define DMA_REQ_CSI_RX MX2x_DMA_REQ_CSI_RX#endif -#endif /* __ASM_ARCH_MXC_MX2x_H__ */ +#endif /* ifndef __MACH_MX2x_H__ */
arch/arm/plat-mxc/include/mach/mx31.h +5 -0
@@ -1,3 +1,6 @@ +#ifndef __MACH_MX31_H__ +#define __MACH_MX31_H__ +/* * IRAM */
@@ -225,3 +228,5 @@#define MXC_INT_CCM MX31_INT_CCM#define MXC_INT_PCMCIA MX31_INT_PCMCIA#endif + +#endif /* ifndef __MACH_MX31_H__ */
arch/arm/plat-mxc/include/mach/mx35.h +4 -0
@@ -1,3 +1,5 @@ +#ifndef __MACH_MX35_H__ +#define __MACH_MX35_H__/* * IRAM */
@@ -204,3 +206,5 @@#define MXC_INT_SPDIF MX35_INT_SPDIF#define MXC_INT_FEC MX35_INT_FEC#endif + +#endif /* ifndef __MACH_MX35_H__ */
arch/arm/plat-mxc/include/mach/mx3x.h +3 -3
@@ -8,8 +8,8 @@* published by the Free Software Foundation. */ -#ifndef __ASM_ARCH_MXC_MX31_H__ -#define __ASM_ARCH_MXC_MX31_H__ +#ifndef __MACH_MX3x_H__ +#define __MACH_MX3x_H__/* * MX31 memory map:
@@ -404,4 +404,4 @@ static inline int mx31_revision(void)#define SYSTEM_REV_NUM MX3x_SYSTEM_REV_NUM#endif -#endif /* __ASM_ARCH_MXC_MX31_H__ */ +#endif /* ifndef __MACH_MX3x_H__ */
Signature · 1 line
1.6.5.2
PATCH 25/25 imx: define functions to configure chip selects in the WEIM
This has the addional effect that the macros CSCR_U, CSCR_L and CSCR_A are not used anymore in mach-pcm038.c and mach-qong.c. These still use the deprecated IO_ADDRESS macro and shouldn't be used in new code.
Signed-off-by Uwe Kleine-K?nig <[email protected]>
Cc Sascha Hauer <[email protected]>
Cc Russell King <[email protected]>
Cc Holger Schurig <[email protected]>
Cc Dmitriy Taychenachev <[email protected]>
--- arch/arm/mach-mx2/mach-pcm038.c | 4 +--- arch/arm/mach-mx3/mach-qong.c | 4 +--- arch/arm/plat-mxc/include/mach/mx27.h | 19 +++++++++++++++++++ arch/arm/plat-mxc/include/mach/mx31.h | 19 +++++++++++++++++++ arch/arm/plat-mxc/include/mach/mxc.h | 1 + 5 files changed, 41 insertions(+), 6 deletions(-)
arch/arm/mach-mx2/mach-pcm038.c +1 -3
@@ -173,9 +173,7 @@ static struct platform_device *platform_devices[] __initdata = {* setup other stuffs to access the sram. */ static void __init pcm038_init_sram (void ) { -__raw_writel (0x0000d843 ,CSCR_U (1 )); -__raw_writel (0x22252521 ,CSCR_L (1 )); -__raw_writel (0x22220a00 ,CSCR_A (1 )); +mx27_setup_weimcs (1 ,0x0000d843 ,0x22252521 ,0x22220a00 ); }static struct imxi2c_platform_data pcm038_i2c_1_data = {
arch/arm/mach-mx3/mach-qong.c +1 -3
@@ -198,9 +198,7 @@ static struct platform_device qong_nand_device = {static void __init qong_init_nand_mtd (void ) {/* init CS */ -__raw_writel (0x00004f00 ,CSCR_U (3 )); -__raw_writel (0x20013b31 ,CSCR_L (3 )); -__raw_writel (0x00020800 ,CSCR_A (3 )); +mx31_setup_weimcs (3 ,0x00004f00 ,0x20013b31 ,0x00020800 );mxc_iomux_set_gpr (MUX_SDCTL_CSD1_SEL , true);/* enable pin */
arch/arm/plat-mxc/include/mach/mx27.h +19 -0
@@ -24,6 +24,10 @@#ifndef __MACH_MX27_H__#define __MACH_MX27_H__ +#ifndef __ASSEMBLER__ +#include <linux/io.h> +#endif +#define MX27_AIPI_BASE_ADDR 0x10000000#define MX27_AIPI_BASE_ADDR_VIRT 0xf4000000#define MX27_AIPI_SIZE SZ_1M
@@ -109,6 +113,11 @@#define MX27_M3IF_BASE_ADDR (MX27_X_MEMC_BASE_ADDR + 0x3000)#define MX27_PCMCIA_CTL_BASE_ADDR (MX27_X_MEMC_BASE_ADDR + 0x4000) +#define MX27_WEIM_CSCRx_BASE_ADDR (cs) (MX27_WEIM_BASE_ADDR + (cs) * 0x10) +#define MX27_WEIM_CSCRxU (cs) (MX27_WEIM_CSCRx_BASE_ADDR(cs)) +#define MX27_WEIM_CSCRxL (cs) (MX27_WEIM_CSCRx_BASE_ADDR(cs) + 0x4) +#define MX27_WEIM_CSCRxA (cs) (MX27_WEIM_CSCRx_BASE_ADDR(cs) + 0x8) +#define MX27_PCMCIA_MEM_BASE_ADDR 0xdc000000/* IRAM */
@@ -119,6 +128,16 @@ IMX_IO_ADDRESS(x, MX27_SAHB1) ?: \ IMX_IO_ADDRESS(x, MX27_X_MEMC)) +#ifndef __ASSEMBLER__ +static inline void mx27_setup_weimcs (size_t cs, +unsigned upper,unsigned lower,unsigned addional) +{ +__raw_writel (upper,MX27_IO_ADDRESS (MX27_WEIM_CSCRxU (cs))); +__raw_writel (lower,MX27_IO_ADDRESS (MX27_WEIM_CSCRxL (cs))); +__raw_writel (addional,MX27_IO_ADDRESS (MX27_WEIM_CSCRxA (cs))); +} +#endif +/* fixed interrupt numbers */ #define MX27_INT_I2C2 1#define MX27_INT_GPT6 2
arch/arm/plat-mxc/include/mach/mx31.h +19 -0
@@ -1,6 +1,10 @@#ifndef __MACH_MX31_H__#define __MACH_MX31_H__ +#ifndef __ASSEMBLER__ +#include <linux/io.h> +#endif +/* * IRAM */
@@ -110,6 +114,11 @@#define MX31_EMI_CTL_BASE_ADDR (MX31_X_MEMC_BASE_ADDR + 0x4000)#define MX31_PCMCIA_CTL_BASE_ADDR MX31_EMI_CTL_BASE_ADDR +#define MX31_WEIM_CSCRx_BASE_ADDR (cs) (MX31_WEIM_BASE_ADDR + (cs) * 0x10) +#define MX31_WEIM_CSCRxU (cs) (MX31_WEIM_CSCRx_BASE_ADDR(cs)) +#define MX31_WEIM_CSCRxL (cs) (MX31_WEIM_CSCRx_BASE_ADDR(cs) + 0x4) +#define MX31_WEIM_CSCRxA (cs) (MX31_WEIM_CSCRx_BASE_ADDR(cs) + 0x8) +#define MX31_PCMCIA_MEM_BASE_ADDR 0xbc000000#define MX31_IO_ADDRESS (x) ( \
@@ -119,6 +128,16 @@ IMX_IO_ADDRESS(x, MX31_X_MEMC) ?: \ IMX_IO_ADDRESS(x, MX31_SPBA0)) +#ifndef __ASSEMBLER__ +static inline void mx31_setup_weimcs (size_t cs, +unsigned upper,unsigned lower,unsigned addional) +{ +__raw_writel (upper,MX31_IO_ADDRESS (MX31_WEIM_CSCRxU (cs))); +__raw_writel (lower,MX31_IO_ADDRESS (MX31_WEIM_CSCRxL (cs))); +__raw_writel (addional,MX31_IO_ADDRESS (MX31_WEIM_CSCRxA (cs))); +} +#endif +#define MX31_INT_I2C3 3#define MX31_INT_I2C2 4#define MX31_INT_MPEG4_ENCODER 5
arch/arm/plat-mxc/include/mach/mxc.h +1 -0
@@ -121,6 +121,7 @@ extern unsigned int __mxc_cpu_type;#endif #if defined(CONFIG_ARCH_MX3 ) || defined(CONFIG_ARCH_MX2 ) +/* These are deprecated, use mx[23][157]_setup_weimcs instead. */ #define CSCR_U (n) (IO_ADDRESS(WEIM_BASE_ADDR + n * 0x10))#define CSCR_L (n) (IO_ADDRESS(WEIM_BASE_ADDR + n * 0x10 + 0x4))#define CSCR_A (n) (IO_ADDRESS(WEIM_BASE_ADDR + n * 0x10 + 0x8))
Signature · 1 line
1.6.5.2
PATCH 21/25 imx: only define deprecated symbols conditionally
In reply to Uwe Kleine-KönigQuoted 20 lines · Uwe Kleine-K?nig
Define deprecated symbols in an #ifdef
IMX_NEEDS_DEPRECATED_SYMBOLS...All files that still depend on the old definitions get -DIMX_NEEDS_DEPRECATED_SYMBOLS passed to the compiler.
When all remaining users are fixed this allows including the soc specific headers unconditionally.
Signed-off-by Uwe Kleine-K?nig <[email protected]>Cc Sascha Hauer <[email protected]>Cc Russell King <[email protected]>Cc Eric Benard <[email protected]>Cc Fabio Estevam <[email protected]>Cc Alan Carvalho de Assis <[email protected]>Cc Daniel Mack <[email protected]>Cc Alberto Panizzo <[email protected]>Cc Ilya Yanok <[email protected]>Cc Holger Schurig <[email protected]>Cc Jiri Kosina <[email protected]>Cc Magnus Lilja <[email protected]>
Quoted 11 lines
--- arch/arm/mach-mx2/Makefile | 3 +++ arch/arm/mach-mx3/Makefile | 4 ++++ arch/arm/plat-mxc/Makefile | 4 ++++ arch/arm/plat-mxc/include/mach/mx21.h | 2 ++ arch/arm/plat-mxc/include/mach/mx27.h | 2 ++ arch/arm/plat-mxc/include/mach/mx2x.h | 2 ++ arch/arm/plat-mxc/include/mach/mx31.h | 2 ++ arch/arm/plat-mxc/include/mach/mx35.h | 2 ++ arch/arm/plat-mxc/include/mach/mx3x.h | 2 ++ 9 files changed, 23 insertions(+), 0 deletions(-)
What is the status of this patch please? Doesn't seem to be inluded in linux-next as of today.
Quoted 167 lines
arch/arm/mach-mx2/Makefile +3
-0@@ -5,6 +5,9 @@ # Object file lists. obj-y := generic.o devices.o serial.o +CFLAGS_generic.o = -DIMX_NEEDS_DEPRECATED_SYMBOLS +CFLAGS_devices.o = -DIMX_NEEDS_DEPRECATED_SYMBOLS +CFLAGS_serial.o = -DIMX_NEEDS_DEPRECATED_SYMBOLS obj-$(CONFIG_MACH_MX21) += clock_imx21.oarch/arm/mach-mx3/Makefile +4
-0@@ -5,6 +5,9 @@ # Object file lists. obj-y := mm.o devices.o cpu.o +CFLAGS_mm.o = -DIMX_NEEDS_DEPRECATED_SYMBOLS +CFLAGS_devices.o = -DIMX_NEEDS_DEPRECATED_SYMBOLS +CFLAGS_cpu.o = -DIMX_NEEDS_DEPRECATED_SYMBOLS obj-$(CONFIG_ARCH_MX31) += clock-imx31.o iomux-imx31.o obj-$(CONFIG_ARCH_MX35) += clock-imx35.o obj-$(CONFIG_MACH_MX31ADS) += mach-mx31ads.o@@ -13,6 +16,7 @@ obj-$(CONFIG_MACH_MX31LITE) += mach-mx31lite.o mx31lite-db.o obj-$(CONFIG_MACH_PCM037) += mach-pcm037.o obj-$(CONFIG_MACH_PCM037_EET) += mach-pcm037_eet.o obj-$(CONFIG_MACH_MX31_3DS) += mach-mx31_3ds.o +CFLAGS_mach-mx31_3ds.o = -DIMX_NEEDS_DEPRECATED_SYMBOLS obj-$(CONFIG_MACH_MX31MOBOARD) += mach-mx31moboard.o mx31moboard-devboard.o \ mx31moboard-marxbot.o obj-$(CONFIG_MACH_QONG) += mach-qong.oarch/arm/plat-mxc/Makefile +4
-0@@ -7,9 +7,13 @@ obj-y := irq.o clock.o gpio.o time.o devices.o cpu.o system.o obj-$(CONFIG_ARCH_MX1) += iomux-mx1-mx2.o dma-mx1-mx2.o obj-$(CONFIG_ARCH_MX2) += iomux-mx1-mx2.o dma-mx1-mx2.o +CFLAGS_iomux-mx1-mx2.o = -DIMX_NEEDS_DEPRECATED_SYMBOLS +CFLAGS_dma-mx1-mx2.o = -DIMX_NEEDS_DEPRECATED_SYMBOLS obj-$(CONFIG_ARCH_MXC_IOMUX_V3) += iomux-v3.o obj-$(CONFIG_MXC_PWM) += pwm.o obj-$(CONFIG_USB_EHCI_MXC) += ehci.o obj-$(CONFIG_MXC_ULPI) += ulpi.o obj-$(CONFIG_ARCH_MXC_AUDMUX_V1) += audmux-v1.o +CFLAGS_audmux-v1.o = -DIMX_NEEDS_DEPRECATED_SYMBOLS obj-$(CONFIG_ARCH_MXC_AUDMUX_V2) += audmux-v2.o +CFLAGS_audmux-v2.o = -DIMX_NEEDS_DEPRECATED_SYMBOLSarch/arm/plat-mxc/include/mach/mx21.h +2
-0@@ -184,6 +184,7 @@#define MX21_DMA_REQ_CSI_STAT 30#define MX21_DMA_REQ_CSI_RX 31 +#ifdef IMX_NEEDS_DEPRECATED_SYMBOLS /* these should go away */ #define SDRAM_BASE_ADDR MX21_SDRAM_BASE_ADDR#define CSD1_BASE_ADDR MX21_CSD1_BASE_ADDR@@ -216,5 +217,6 @@#define DMA_REQ_FIRI_RX MX21_DMA_REQ_FIRI_RX#define DMA_REQ_BMI_TX MX21_DMA_REQ_BMI_TX#define DMA_REQ_BMI_RX MX21_DMA_REQ_BMI_RX +#endif #endif /* __ASM_ARCH_MXC_MX21_H__ */ arch/arm/plat-mxc/include/mach/mx27.h +2
-0@@ -230,6 +230,7 @@extern int mx27_revision (void );#endif +#ifdef IMX_NEEDS_DEPRECATED_SYMBOLS /* these should go away */ #define MSHC_BASE_ADDR MX27_MSHC_BASE_ADDR#define GPT5_BASE_ADDR MX27_GPT5_BASE_ADDR@@ -297,5 +298,6 @@ extern int mx27_revision(void);#define DMA_REQ_UART6_RX MX27_DMA_REQ_UART6_RX#define DMA_REQ_SDHC3 MX27_DMA_REQ_SDHC3#define DMA_REQ_NFC MX27_DMA_REQ_NFC +#endif #endif /* __ASM_ARCH_MXC_MX27_H__ */ arch/arm/plat-mxc/include/mach/mx2x.h +2
-0@@ -176,6 +176,7 @@#define MX2x_DMA_REQ_CSI_STAT 30#define MX2x_DMA_REQ_CSI_RX 31 +#ifdef IMX_NEEDS_DEPRECATED_SYMBOLS /* these should go away */ #define AIPI_BASE_ADDR MX2x_AIPI_BASE_ADDR#define AIPI_BASE_ADDR_VIRT MX2x_AIPI_BASE_ADDR_VIRT@@ -287,5 +288,6 @@#define DMA_REQ_UART1_TX MX2x_DMA_REQ_UART1_TX#define DMA_REQ_CSI_STAT MX2x_DMA_REQ_CSI_STAT#define DMA_REQ_CSI_RX MX2x_DMA_REQ_CSI_RX +#endif #endif /* __ASM_ARCH_MXC_MX2x_H__ */ arch/arm/plat-mxc/include/mach/mx31.h +2
-0@@ -193,6 +193,7 @@#define MX31_SYSTEM_REV_MIN MX31_CHIP_REV_1_0#define MX31_SYSTEM_REV_NUM 3 +#ifdef IMX_NEEDS_DEPRECATED_SYMBOLS /* these should go away */ #define ATA_BASE_ADDR MX31_ATA_BASE_ADDR#define UART4_BASE_ADDR MX31_UART4_BASE_ADDR@@ -223,3 +224,4 @@#define MXC_INT_UART5 MX31_INT_UART5#define MXC_INT_CCM MX31_INT_CCM#define MXC_INT_PCMCIA MX31_INT_PCMCIA +#endif arch/arm/plat-mxc/include/mach/mx35.h +2
-0@@ -187,6 +187,7 @@#define MX35_SYSTEM_REV_MIN MX35_CHIP_REV_1_0#define MX35_SYSTEM_REV_NUM 3 +#ifdef IMX_NEEDS_DEPRECATED_SYMBOLS /* these should go away */ #define MXC_FEC_BASE_ADDR MX35_FEC_BASE_ADDR#define MXC_INT_OWIRE MX35_INT_OWIRE@@ -202,3 +203,4 @@#define MXC_INT_MLB MX35_INT_MLB#define MXC_INT_SPDIF MX35_INT_SPDIF#define MXC_INT_FEC MX35_INT_FEC +#endif arch/arm/plat-mxc/include/mach/mx3x.h +2
-0@@ -269,6 +269,7 @@ static inline int mx31_revision(void) }#endif +#ifdef IMX_NEEDS_DEPRECATED_SYMBOLS /* these should go away */ #define L2CC_BASE_ADDR MX3x_L2CC_BASE_ADDR#define L2CC_SIZE MX3x_L2CC_SIZE@@ -401,5 +402,6 @@ static inline int mx31_revision(void)#define CHIP_REV_3_2 MX3x_CHIP_REV_3_2#define SYSTEM_REV_MIN MX3x_SYSTEM_REV_MIN#define SYSTEM_REV_NUM MX3x_SYSTEM_REV_NUM +#endif #endif /* __ASM_ARCH_MXC_MX31_H__ */ Signature · 1 line
1.6.5.2
Signature · 2 lines
Jiri Kosina SUSE Labs, Novell Inc.
PATCH 21/25 imx: only define deprecated symbols conditionally
In reply to Uwe Kleine-KönigQuoted 8 lines · Uwe Kleine-K?nig
Define deprecated symbols in an #ifdef
IMX_NEEDS_DEPRECATED_SYMBOLS...All files that still depend on the old definitions get -DIMX_NEEDS_DEPRECATED_SYMBOLS passed to the compiler.
When all remaining users are fixed this allows including the soc specific headers unconditionally.
Quoted 12 lines
Signed-off-by Uwe Kleine-K?nig <[email protected]>Cc Sascha Hauer <[email protected]>Cc Russell King <[email protected]>Cc Eric Benard <[email protected]>Cc Fabio Estevam <[email protected]>Cc Alan Carvalho de Assis <[email protected]>Cc Daniel Mack <[email protected]>Cc Alberto Panizzo <[email protected]>Cc Ilya Yanok <[email protected]>Cc Holger Schurig <[email protected]>Cc Jiri Kosina <[email protected]>Cc Magnus Lilja <[email protected]>
What is the status of this patch please? Doesn't seem to be inluded in linux-next as of today.
Quoted 179 lines
--- arch/arm/mach-mx2/Makefile | 3 +++ arch/arm/mach-mx3/Makefile | 4 ++++ arch/arm/plat-mxc/Makefile | 4 ++++ arch/arm/plat-mxc/include/mach/mx21.h | 2 ++ arch/arm/plat-mxc/include/mach/mx27.h | 2 ++ arch/arm/plat-mxc/include/mach/mx2x.h | 2 ++ arch/arm/plat-mxc/include/mach/mx31.h | 2 ++ arch/arm/plat-mxc/include/mach/mx35.h | 2 ++ arch/arm/plat-mxc/include/mach/mx3x.h | 2 ++ 9 files changed, 23 insertions(+), 0 deletions(-)arch/arm/mach-mx2/Makefile +3
-0@@ -5,6 +5,9 @@ # Object file lists. obj-y := generic.o devices.o serial.o +CFLAGS_generic.o = -DIMX_NEEDS_DEPRECATED_SYMBOLS +CFLAGS_devices.o = -DIMX_NEEDS_DEPRECATED_SYMBOLS +CFLAGS_serial.o = -DIMX_NEEDS_DEPRECATED_SYMBOLS obj-$(CONFIG_MACH_MX21) += clock_imx21.oarch/arm/mach-mx3/Makefile +4
-0@@ -5,6 +5,9 @@ # Object file lists. obj-y := mm.o devices.o cpu.o +CFLAGS_mm.o = -DIMX_NEEDS_DEPRECATED_SYMBOLS +CFLAGS_devices.o = -DIMX_NEEDS_DEPRECATED_SYMBOLS +CFLAGS_cpu.o = -DIMX_NEEDS_DEPRECATED_SYMBOLS obj-$(CONFIG_ARCH_MX31) += clock-imx31.o iomux-imx31.o obj-$(CONFIG_ARCH_MX35) += clock-imx35.o obj-$(CONFIG_MACH_MX31ADS) += mach-mx31ads.o@@ -13,6 +16,7 @@ obj-$(CONFIG_MACH_MX31LITE) += mach-mx31lite.o mx31lite-db.o obj-$(CONFIG_MACH_PCM037) += mach-pcm037.o obj-$(CONFIG_MACH_PCM037_EET) += mach-pcm037_eet.o obj-$(CONFIG_MACH_MX31_3DS) += mach-mx31_3ds.o +CFLAGS_mach-mx31_3ds.o = -DIMX_NEEDS_DEPRECATED_SYMBOLS obj-$(CONFIG_MACH_MX31MOBOARD) += mach-mx31moboard.o mx31moboard-devboard.o \ mx31moboard-marxbot.o obj-$(CONFIG_MACH_QONG) += mach-qong.oarch/arm/plat-mxc/Makefile +4
-0@@ -7,9 +7,13 @@ obj-y := irq.o clock.o gpio.o time.o devices.o cpu.o system.o obj-$(CONFIG_ARCH_MX1) += iomux-mx1-mx2.o dma-mx1-mx2.o obj-$(CONFIG_ARCH_MX2) += iomux-mx1-mx2.o dma-mx1-mx2.o +CFLAGS_iomux-mx1-mx2.o = -DIMX_NEEDS_DEPRECATED_SYMBOLS +CFLAGS_dma-mx1-mx2.o = -DIMX_NEEDS_DEPRECATED_SYMBOLS obj-$(CONFIG_ARCH_MXC_IOMUX_V3) += iomux-v3.o obj-$(CONFIG_MXC_PWM) += pwm.o obj-$(CONFIG_USB_EHCI_MXC) += ehci.o obj-$(CONFIG_MXC_ULPI) += ulpi.o obj-$(CONFIG_ARCH_MXC_AUDMUX_V1) += audmux-v1.o +CFLAGS_audmux-v1.o = -DIMX_NEEDS_DEPRECATED_SYMBOLS obj-$(CONFIG_ARCH_MXC_AUDMUX_V2) += audmux-v2.o +CFLAGS_audmux-v2.o = -DIMX_NEEDS_DEPRECATED_SYMBOLSarch/arm/plat-mxc/include/mach/mx21.h +2
-0@@ -184,6 +184,7 @@#define MX21_DMA_REQ_CSI_STAT 30#define MX21_DMA_REQ_CSI_RX 31 +#ifdef IMX_NEEDS_DEPRECATED_SYMBOLS /* these should go away */ #define SDRAM_BASE_ADDR MX21_SDRAM_BASE_ADDR#define CSD1_BASE_ADDR MX21_CSD1_BASE_ADDR@@ -216,5 +217,6 @@#define DMA_REQ_FIRI_RX MX21_DMA_REQ_FIRI_RX#define DMA_REQ_BMI_TX MX21_DMA_REQ_BMI_TX#define DMA_REQ_BMI_RX MX21_DMA_REQ_BMI_RX +#endif #endif /* __ASM_ARCH_MXC_MX21_H__ */ arch/arm/plat-mxc/include/mach/mx27.h +2
-0@@ -230,6 +230,7 @@extern int mx27_revision (void );#endif +#ifdef IMX_NEEDS_DEPRECATED_SYMBOLS /* these should go away */ #define MSHC_BASE_ADDR MX27_MSHC_BASE_ADDR#define GPT5_BASE_ADDR MX27_GPT5_BASE_ADDR@@ -297,5 +298,6 @@ extern int mx27_revision(void);#define DMA_REQ_UART6_RX MX27_DMA_REQ_UART6_RX#define DMA_REQ_SDHC3 MX27_DMA_REQ_SDHC3#define DMA_REQ_NFC MX27_DMA_REQ_NFC +#endif #endif /* __ASM_ARCH_MXC_MX27_H__ */ arch/arm/plat-mxc/include/mach/mx2x.h +2
-0@@ -176,6 +176,7 @@#define MX2x_DMA_REQ_CSI_STAT 30#define MX2x_DMA_REQ_CSI_RX 31 +#ifdef IMX_NEEDS_DEPRECATED_SYMBOLS /* these should go away */ #define AIPI_BASE_ADDR MX2x_AIPI_BASE_ADDR#define AIPI_BASE_ADDR_VIRT MX2x_AIPI_BASE_ADDR_VIRT@@ -287,5 +288,6 @@#define DMA_REQ_UART1_TX MX2x_DMA_REQ_UART1_TX#define DMA_REQ_CSI_STAT MX2x_DMA_REQ_CSI_STAT#define DMA_REQ_CSI_RX MX2x_DMA_REQ_CSI_RX +#endif #endif /* __ASM_ARCH_MXC_MX2x_H__ */ arch/arm/plat-mxc/include/mach/mx31.h +2
-0@@ -193,6 +193,7 @@#define MX31_SYSTEM_REV_MIN MX31_CHIP_REV_1_0#define MX31_SYSTEM_REV_NUM 3 +#ifdef IMX_NEEDS_DEPRECATED_SYMBOLS /* these should go away */ #define ATA_BASE_ADDR MX31_ATA_BASE_ADDR#define UART4_BASE_ADDR MX31_UART4_BASE_ADDR@@ -223,3 +224,4 @@#define MXC_INT_UART5 MX31_INT_UART5#define MXC_INT_CCM MX31_INT_CCM#define MXC_INT_PCMCIA MX31_INT_PCMCIA +#endif arch/arm/plat-mxc/include/mach/mx35.h +2
-0@@ -187,6 +187,7 @@#define MX35_SYSTEM_REV_MIN MX35_CHIP_REV_1_0#define MX35_SYSTEM_REV_NUM 3 +#ifdef IMX_NEEDS_DEPRECATED_SYMBOLS /* these should go away */ #define MXC_FEC_BASE_ADDR MX35_FEC_BASE_ADDR#define MXC_INT_OWIRE MX35_INT_OWIRE@@ -202,3 +203,4 @@#define MXC_INT_MLB MX35_INT_MLB#define MXC_INT_SPDIF MX35_INT_SPDIF#define MXC_INT_FEC MX35_INT_FEC +#endif arch/arm/plat-mxc/include/mach/mx3x.h +2
-0@@ -269,6 +269,7 @@ static inline int mx31_revision(void) }#endif +#ifdef IMX_NEEDS_DEPRECATED_SYMBOLS /* these should go away */ #define L2CC_BASE_ADDR MX3x_L2CC_BASE_ADDR#define L2CC_SIZE MX3x_L2CC_SIZE@@ -401,5 +402,6 @@ static inline int mx31_revision(void)#define CHIP_REV_3_2 MX3x_CHIP_REV_3_2#define SYSTEM_REV_MIN MX3x_SYSTEM_REV_MIN#define SYSTEM_REV_NUM MX3x_SYSTEM_REV_NUM +#endif #endif /* __ASM_ARCH_MXC_MX31_H__ */ Signature · 1 line
1.6.5.2
Signature · 2 lines
Jiri Kosina SUSE Labs, Novell Inc.
PATCH 21/25 imx: only define deprecated symbols conditionally
Hi Jiri,
Quoted 21 lines
Quoted 8 lines
Define deprecated symbols in an #ifdef
IMX_NEEDS_DEPRECATED_SYMBOLS...All files that still depend on the old definitions get -DIMX_NEEDS_DEPRECATED_SYMBOLS passed to the compiler.
When all remaining users are fixed this allows including the soc specific headers unconditionally.
Quoted 12 lines
Signed-off-by Uwe Kleine-K?nig <[email protected]>Cc Sascha Hauer <[email protected]>Cc Russell King <[email protected]>Cc Eric Benard <[email protected]>Cc Fabio Estevam <[email protected]>Cc Alan Carvalho de Assis <[email protected]>Cc Daniel Mack <[email protected]>Cc Alberto Panizzo <[email protected]>Cc Ilya Yanok <[email protected]>Cc Holger Schurig <[email protected]>Cc Jiri Kosina <[email protected]>Cc Magnus Lilja <[email protected]>
Quoted 2 lines
What is the status of this patch please? Doesn't seem to be inluded in linux-next as of today.
Currently they sit in mxc-master[1] and wait for the merge window to open.
Sascha, what do you think about adding your tree to next?
Best regards
Uwe
[1] git://git.pengutronix.de/git/imx/linux-2.6.git mxc-master
Signature · 2 lines
Pengutronix e.K. | Uwe Kleine-K?nig | Industrial Linux Solutions | http://www.pengutronix.de/ |
PATCH 8/25 imx/mx1: rename files defining a machine to mach-$mach.c
In reply to Uwe Kleine-KönigQuoted 6 lines · Uwe Kleine-K?nig
Signed-off-by Uwe Kleine-K?nig <[email protected]>Cc Sascha Hauer <[email protected]>Cc Russell King <[email protected]>Cc Paulius Zaleckas <[email protected]>Cc Darius Augulis <[email protected]>Cc Mauro Carvalho Chehab <[email protected]>
Quoted 7 lines
---
arch/arm/mach-mx1/Makefile | 4 ++--
arch/arm/mach-mx1/{mx1ads.c => mach-mx1ads.c} | 2 +-
arch/arm/mach-mx1/{scb9328.c => mach-scb9328.c} | 2 +-
3 files changed, 4 insertions(+), 4 deletions(-)
rename arch/arm/mach-mx1/{mx1ads.c => mach-mx1ads.c} (98%)
rename arch/arm/mach-mx1/{scb9328.c => mach-scb9328.c} (98%)Rethinking about this (based on a similar request for my i.MX5 submission), I think renaming the boards to mach-* is a bad idea.
Other SoCs (davinci, omap, msm, nomadik, etc.) use the board-* convention. We already use mach-* for the SoC directory names under arch/arm/. Naming the boards with mach-* will just cause more confusion.
Regards,
Amit
Quoted 48 lines
arch/arm/mach-mx1/Makefile +2
-2@@ -10,5 +10,5 @@ obj-y += generic.o clock.o devices.o obj-$(CONFIG_MX1_VIDEO) += ksym_mx1.o mx1_camera_fiq.o # Specific board support -obj-$(CONFIG_ARCH_MX1ADS) += mx1ads.o -obj-$(CONFIG_MACH_SCB9328) += scb9328.o +obj-$(CONFIG_ARCH_MX1ADS) += mach-mx1ads.o +obj-$(CONFIG_MACH_SCB9328) += mach-scb9328.oarch/arm/mach-mx1/mach-mx1ads.c renamed from arch/arm/mach-mx1/mx1ads.c +1
-1@@ -1,5 +1,5 @@/* -* arch/arm/mach-imx/mx1ads.c +* arch/arm/mach-imx/mach-mx1ads.c * * Initially based on: * linux-2.6.7-imx/arch/arm/mach-imx/scb9328.c arch/arm/mach-mx1/mach-scb9328.c renamed from arch/arm/mach-mx1/scb9328.c +1
-1@@ -1,5 +1,5 @@/* -* linux/arch/arm/mach-mx1/scb9328.c +* linux/arch/arm/mach-mx1/mach-scb9328.c * * Copyright (c) 2004 Sascha Hauer <[email protected]> * Copyright (c) 2006-2008 Juergen Beisert <[email protected]> Signature · 7 lines
1.6.5.2 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel at lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
Signature · 3 lines
------------------------------------------------------------------------- Amit Kucheria, Kernel Developer, Verdurent -------------------------------------------------------------------------
PATCH 8/25 imx/mx1: rename files defining a machine to mach-$mach.c
Hello Amit,
Quoted 15 lines · Amit Kucheria
Quoted 6 lines · Uwe Kleine-K?nig
Signed-off-by Uwe Kleine-K?nig <[email protected]>Cc Sascha Hauer <[email protected]>Cc Russell King <[email protected]>Cc Paulius Zaleckas <[email protected]>Cc Darius Augulis <[email protected]>Cc Mauro Carvalho Chehab <[email protected]>Quoted 7 lines
--- arch/arm/mach-mx1/Makefile | 4 ++-- arch/arm/mach-mx1/{mx1ads.c => mach-mx1ads.c} | 2 +- arch/arm/mach-mx1/{scb9328.c => mach-scb9328.c} | 2 +- 3 files changed, 4 insertions(+), 4 deletions(-) rename arch/arm/mach-mx1/{mx1ads.c => mach-mx1ads.c} (98%) rename arch/arm/mach-mx1/{scb9328.c => mach-scb9328.c} (98%)
Quoted 6 lines
Rethinking about this (based on a similar request for my i.MX5 submission), I think renaming the boards to mach-* is a bad idea.
Other SoCs (davinci, omap, msm, nomadik, etc.) use the board-* convention. We already use mach-* for the SoC directory names under
arch/arm/. Naming the boards with mach-* will just cause more confusion.
Hmmm
I still prefer mach-* as the corresponding Kconfig variables are named MACH_* and there is no unified meaning of "board". For (I think) most people here board describes the whole machine. For some (e.g. me) a board might only be a PCB where you have to plug in a module that comes with the SoC.
(http://www.digi.com/products/model.jsp?lid=EN&pgid=37&pfid=19&mtid=2070&amtid=2070&pm=Y)
It think machine is precise for all of us.
And note the selecting Kconfig symbol for arch/arm/mach-omap is ARCH_OMAP. Ditto we have ARCH_DAVINCI, ARCH_MSM and ARCH_NOMADIK. So we could rename these to arch-omap etc. But then this conflicts with the toplevel arch directory!?
Best regards
Uwe
Signature · 2 lines
Pengutronix e.K. | Uwe Kleine-K?nig | Industrial Linux Solutions | http://www.pengutronix.de/ |
PATCH 8/25 imx/mx1: rename files defining a machine to mach-$mach.c
Quoted 26 lines · Uwe Kleine-K?nig
Hello Amit,
Quoted 15 lines · Amit Kucheria
Quoted 6 lines · Uwe Kleine-K?nig
Signed-off-by Uwe Kleine-K?nig <[email protected]>Cc Sascha Hauer <[email protected]>Cc Russell King <[email protected]>Cc Paulius Zaleckas <[email protected]>Cc Darius Augulis <[email protected]>Cc Mauro Carvalho Chehab <[email protected]>Quoted 7 lines
--- arch/arm/mach-mx1/Makefile | 4 ++-- arch/arm/mach-mx1/{mx1ads.c => mach-mx1ads.c} | 2 +- arch/arm/mach-mx1/{scb9328.c => mach-scb9328.c} | 2 +- 3 files changed, 4 insertions(+), 4 deletions(-) rename arch/arm/mach-mx1/{mx1ads.c => mach-mx1ads.c} (98%) rename arch/arm/mach-mx1/{scb9328.c => mach-scb9328.c} (98%)Quoted 6 lines
Rethinking about this (based on a similar request for my i.MX5 submission), I think renaming the boards to mach-* is a bad idea.
Other SoCs (davinci, omap, msm, nomadik, etc.) use the board-* convention. We already use mach-* for the SoC directory names under
arch/arm/. Naming the boards with mach-* will just cause more confusion.Hmmm
Quoted 8 lines
I still prefer mach-* as the corresponding
Kconfigvariables are named MACH_* and there is no unified meaning of "board". For (I think) most people here board describes the whole machine. For some (e.g. me) a board might only be a PCB where you have to plug in a module that comes with the SoC.
(http://www.digi.com/products/model.jsp?lid=EN&pgid=37&pfid=19&mtid=2070&amtid=2070&pm=Y)It think machine is precise for all of us.
Perhaps. But I still think of arch/arm/mach-* as the SoC platform and arch/arm/mach-*/board-* as the various boards.
arch/arm/mach-*/mach-* is confusing every way you look at it. I'd rather leave it alone than change the names to mach-*.
(Shrug) Just my thoughts.
Quoted 4 lines
And note the selecting
Kconfigsymbol forarch/arm/mach-omapisARCH_OMAP. Ditto we haveARCH_DAVINCI,ARCH_MSMandARCH_NOMADIK. So we could rename these to arch-omap etc. But then this conflicts with the toplevel arch directory!?
I wouldn't got that far.
Quoted 2 lines
Best regards
Uwe
Cheers,
Amit
Signature · 3 lines
---------------------------------------------------------------------- Amit Kucheria, Kernel Engineer || amit.kucheria at canonical.com ----------------------------------------------------------------------
PATCH 8/25 imx/mx1: rename files defining a machine to mach-$mach.c
In reply to Amit KucheriaQuoted 11 lines · Amit Kucheria
Quoted 2 lines · Uwe Kleine-K??nig
rename arch/arm/mach-mx1/{mx1ads.c => mach-mx1ads.c} (98%) rename arch/arm/mach-mx1/{scb9328.c => mach-scb9328.c} (98%)Rethinking about this (based on a similar request for my i.MX5 submission), I think renaming the boards to mach-* is a bad idea.
Other SoCs (davinci, omap, msm, nomadik, etc.) use the board-* convention. We already use mach-* for the SoC directory names under
arch/arm/. Naming the boards with mach-* will just cause more confusion.
Some other socs (at least the Samsung ones) are using mach- :/
PATCH 8/25 imx/mx1: rename files defining a machine to mach-$mach.c
Quoted 6 lines · Mark Brown
Quoted 4 lines · Amit Kucheria
Quoted 2 lines · Uwe Kleine-K??nig
?rename
arch/arm/mach-mx1/{mx1ads.c=>mach-mx1ads.c} (98%) ?renamearch/arm/mach-mx1/{scb9328.c=>mach-scb9328.c} (98%)
Quoted 8 lines
Quoted 6 lines
Rethinking about this (based on a similar request for my i.MX5 submission), I think renaming the boards to mach-* is a bad idea.
Other SoCs (davinci, omap, msm, nomadik, etc.) use the board-* convention. We already use mach-* for the SoC directory names under
arch/arm/. Naming the boards with mach-* will just cause more confusion.Some other socs (at least the Samsung ones) are using mach- :/
Well, is the naming scheme so important in such a sense? Yes, now git has made renaming quite a painless hassle, however, that's really some needless thing IMHO.
PXA on the other way, doesn't come up with any board-* or mach-* suffix, and no one seems complaining so far.
Orion and IXP, have <board-name>-setup.c, all looks fine to me as long as they are consistent.
OTOH, sometimes there are core modules and base board (i.e. motherboard), do we have to go to the extend to something like, coreboard-* and motherboard-*. I doubt that.
So in a word, as long as it's consistent all around.
Sascha Hauer
maintainercover imx cleanup series
In reply to Uwe Kleine-KönigQuoted 11 lines · Uwe Kleine-K?nig
Hi,
I updated most patches based on feed-back here and further work. Some patches are completely new.
Quoted 2 lines
The patch by Wolfgang Denk is included because otherwise it would conflict with the series.
I rebased onto Sascha's last pull request which included Wolfgang's patch, so this isn't true any more.
As usual you can find diffstat and shortlog below.
Ok, added to mxc-master
Sascha
Signature · 4 lines
Pengutronix e.K. | | Industrial Linux Solutions | http://www.pengutronix.de/ | Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 | Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |