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target-arm: Fix Neon vsra instructions.

PATCH Applied Christophe Lyon 3 participants 4 messages Jan 25, 2011 – Feb 4, 2011

v1 of 3 Applied Latest is v3 →

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Christophe Lyon

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#0 lore raw

PATCH 1/1 target-arm: Fix Neon vsra instructions.

This patch fixes the errors reported by my tests in VSRA.

Signed-off-by Christophe Lyon <[email protected]>
---
 target-arm/translate.c |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)
target-arm/translate.c +2 -2
index 7cb48c0..4cf2ecd 100644
@@ -4697,7 +4697,7 @@ static int disas_neon_data_insn(CPUState * env, DisasContext *s, uint32_t insn)
                         }
                         if (op == 1 || op == 3) {
                             /* Accumulate.  */
-                            neon_load_reg64(cpu_V0, rd + pass);
+                            neon_load_reg64(cpu_V1, rd + pass);
                             tcg_gen_add_i64(cpu_V0, cpu_V0, cpu_V1);
                         } else if (op == 4 || (op == 5 && u)) {
                             /* Insert */

@@ -4761,7 +4761,7 @@ static int disas_neon_data_insn(CPUState * env, DisasContext *s, uint32_t insn)
                         if (op == 1 || op == 3) {
                             /* Accumulate.  */
                             tmp2 = neon_load_reg(rd, pass);
-                            gen_neon_add(size, tmp2, tmp);
+                            gen_neon_add(size, tmp, tmp2);
                             dead_tmp(tmp2);
                         } else if (op == 4 || (op == 5 && u)) {
                             /* Insert */
Signature · 1 line
1.7.2.3
author
#1 lore raw
Quoted 2 lines · Christophe Lyon

This patch fixes the errors reported by my tests in VSRA.

ping?

Applied
#3 lore raw
In reply to Christophe Lyon
Quoted 6 lines · Christophe Lyon

This patch fixes the errors reported by my tests in VSRA.

Signed-off-by Christophe Lyon <[email protected]>
---
 target-arm/translate.c |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)

Thanks applied.

Quoted 27 lines
target-arm/translate.c +2 -2
index 7cb48c0..4cf2ecd 100644
@@ -4697,7 +4697,7 @@ static int disas_neon_data_insn(CPUState * env, DisasContext *s, uint32_t insn)
                         }
                         if (op == 1 || op == 3) {
                             /* Accumulate.  */
-                            neon_load_reg64(cpu_V0, rd + pass);
+                            neon_load_reg64(cpu_V1, rd + pass);
                             tcg_gen_add_i64(cpu_V0, cpu_V0, cpu_V1);
                         } else if (op == 4 || (op == 5 && u)) {
                             /* Insert */

@@ -4761,7 +4761,7 @@ static int disas_neon_data_insn(CPUState * env, DisasContext *s, uint32_t insn)
                         if (op == 1 || op == 3) {
                             /* Accumulate.  */
                             tmp2 = neon_load_reg(rd, pass);
-                            gen_neon_add(size, tmp2, tmp);
+                            gen_neon_add(size, tmp, tmp2);
                             dead_tmp(tmp2);
                         } else if (op == 4 || (op == 5 && u)) {
                             /* Insert */
Signature · 1 line
1.7.2.3
Signature · 2 lines
Aurelien Jarno                          GPG: 1024D/F1BCDB73
[email protected]                 http://www.aurel32.net