arm: socfpga: Add initial support for Altera's SOCFPGA HW

From: Dinh Nguyen <[email protected]>

Adding core definitions for Altera's SOCFPGA ARM platform.

Signed-off-by Dinh Nguyen <[email protected]>

Reviewed-by Pavel Machek <[email protected]>

arch/arm/mach-socfpga/include/mach/iomap.h new file +21 -0

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index 0000000..d5f8493
@@ -0,0 +1,33 @@
+/*
+ *  Copyright (C) 2012 Altera Corporation <www.altera.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+#ifndef __MACH_SOCFPGA_IOMAP_H
+#define __MACH_SOCFPGA_IOMAP_H
+
+#include <asm/sizes.h>
+

arch/arm/mach-socfpga/include/mach/iomap.h new file +2 -0

+
+#endif

arch/arm/mach-socfpga/include/mach/irqs.h new file +12 -0

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@@ -0,0 +1,24 @@
+/*
+ *  Copyright (C) 2012 Altera Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *

arch/arm/mach-socfpga/include/mach/irqs.h new file +2 -0

+
+#endif	/* __MACH_IRQS_H */

arch/arm/mach-socfpga/include/mach/timex.h new file +19 -0

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index 0000000..43df435
@@ -0,0 +1,19 @@
+/*
+ *  Copyright (C) 2003 ARM Limited
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+#define CLOCK_TICK_RATE		(50000000 / 16)

arch/arm/mach-socfpga/include/mach/uncompress.h new file +9 -0

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+#ifndef __MACH_UNCOMPRESS_H
+#define __MACH_UNCOMPRESS_H
+
+#define putc(c)
+#define flush()
+#define arch_decomp_setup()
+#define arch_decomp_wdog()
+
+#endif

arch/arm/Kconfig +7 -0

+config ARCH_SOCFPGA
+	bool "Altera SOCFPGA family"
+	select ARCH_WANT_OPTIONAL_GPIOLIB
+	select ARM_AMBA
+	select ARM_GIC
+	select CACHE_L2X0
+	select CLKDEV_LOOKUP

arch/arm/mach-socfpga/clock.c new file +4 -0

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+#include <linux/clkdev.h>
+
+#define SOCFPGA_MPU_PERIHCLK_FREQ_HZ			(800000000 / 4)
+#define SOCFPGA_L4_MAIN_CLK					(400000000)

arch/arm/mach-socfpga/include/mach/iomap.h new file +23 -0

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+/*
+ *  Copyright (C) 2012 Altera Corporation <www.altera.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+#ifndef __MACH_SOCFPGA_IOMAP_H
+#define __MACH_SOCFPGA_IOMAP_H
+
+#include <asm/sizes.h>
+
+/* macro to get at IO space when running virtually */
+/*

arch/arm/mach-socfpga/include/mach/irqs.h new file +14 -0

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@@ -0,0 +1,24 @@
+/*
+ *  Copyright (C) 2012 Altera Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.

Quoted 7 lines · dinguyen at altera.com

arch/arm/Kconfig +7 -0

+config ARCH_SOCFPGA
+	bool "Altera SOCFPGA family"
+	select ARCH_WANT_OPTIONAL_GPIOLIB
+	select ARM_AMBA
+	select ARM_GIC
+	select CACHE_L2X0
+	select CLKDEV_LOOKUP

arch/arm/Kconfig choice · line 269

Quoted 10 lines

arch/arm/Kconfig +10 -0

+	select CPU_V7
+	select DW_APB_TIMER
+	select DW_APB_TIMER_OF
+	select GENERIC_CLOCKEVENTS
+	select GPIO_PL061 if GPIOLIB
+	select HAVE_ARM_SCU
+	select SPARSE_IRQ
+	select USE_OF
+	help
+	  This enables support for Altera SOCFPGA Cyclone V platform

Please select COMMON_CLK as well to use the generic clock implementation.

Quoted 6 lines

arch/arm/mach-socfpga/clock.c new file +0 -0

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Quoted 4 lines

arch/arm/mach-socfpga/clock.c new file +4 -0

+#include <linux/clkdev.h>
+
+#define SOCFPGA_MPU_PERIHCLK_FREQ_HZ			(800000000 / 4)
+#define SOCFPGA_L4_MAIN_CLK					(400000000)

arch/arm/mach-socfpga/clock.c line 30

Quoted 10 lines

arch/arm/mach-socfpga/clock.c new file +10 -0

+
+struct clk {
+	unsigned long		rate;
+};
+
+static struct clk apb_pclk = { .rate = 200000000};
+static struct clk i2c_clk = { .rate = 100000000};
+static struct clk spim_clk = { .rate = 100000000};
+static struct clk mpu_pclk = { .rate = SOCFPGA_MPU_PERIHCLK_FREQ_HZ};
+static struct clk l4_main_clk = { .rate = SOCFPGA_L4_MAIN_CLK};

Then move this file into drivers/clk/ using that code.

Quoted 30 lines

arch/arm/mach-socfpga/include/mach/iomap.h new file +23 -0

new file mode 100644
index 0000000..d5f8493
@@ -0,0 +1,33 @@
+/*
+ *  Copyright (C) 2012 Altera Corporation <www.altera.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+#ifndef __MACH_SOCFPGA_IOMAP_H
+#define __MACH_SOCFPGA_IOMAP_H
+
+#include <asm/sizes.h>
+
+/* macro to get at IO space when running virtually */
+/*

arch/arm/mach-socfpga/include/mach/iomap.h line 33

Quoted 10 lines

arch/arm/mach-socfpga/include/mach/iomap.h new file +10 -0

+ * Statically mapped addresses:
+ *
+ * 10xx xxxx -> fbxx xxxx
+ * 1exx xxxx -> fdxx xxxx
+ * 1fxx xxxx -> fexx xxxx
+ */
+#define IO_ADDRESS(x)		(((x) & 0x03ffffff) + 0xfb000000)
+#define __io_address(n)		IOMEM(IO_ADDRESS(n))
+
+#endif

This is unused, right? Just remove it.

Quoted 20 lines

arch/arm/mach-socfpga/include/mach/irqs.h new file +14 -0

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index 0000000..5e344db
@@ -0,0 +1,24 @@
+/*
+ *  Copyright (C) 2012 Altera Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.

arch/arm/mach-socfpga/include/mach/irqs.h line 24

Quoted 10 lines

arch/arm/mach-socfpga/include/mach/irqs.h new file +10 -0

+*/
+
+#ifndef __MACH_IRQS_H
+#define __MACH_IRQS_H
+
+#define IRQ_SOCFPGA_GIC_START	32
+#define IRQ_LOCALWDOG		30
+#define MAX_GIC_NR		1
+
+#endif	/* __MACH_IRQS_H */

Same with this. Since you're using sparse IRQ, this file is not even included anywhere.

Arnd

Quoted 7 lines

arch/arm/mach-socfpga/clock.c line 30

Quoted 5 lines

arch/arm/mach-socfpga/clock.c new file +5 -0

+static struct clk apb_pclk = { .rate = 200000000};
+static struct clk i2c_clk = { .rate = 100000000};
+static struct clk spim_clk = { .rate = 100000000};
+static struct clk mpu_pclk = { .rate = SOCFPGA_MPU_PERIHCLK_FREQ_HZ};
+static struct clk l4_main_clk = { .rate = SOCFPGA_L4_MAIN_CLK};

Then move this file into drivers/clk/ using that code.

This doesn't quite make sense to me. You want me to move platform specific information to drivers folder? I only see mxs and spear under drivers/clk. Surely, you don't want me to create another socfpga folder under there, or do you?

From: Dinh Nguyen <[email protected]>

- Mininum support for Altera's SOCFPGA Cyclone 5 hardware.

Signed-off-by Dinh Nguyen <[email protected]>

Reviewed-by Pavel Machek <[email protected]>

---
 arch/arm/boot/dts/socfpga.dtsi           |   73 ++++++++++++++++++
 arch/arm/boot/dts/socfpga_cyclone5.dts   |  118 ++++++++++++++++++++++++++++++
 arch/arm/configs/socfpga_defconfig       |   83 +++++++++++++++++++++
 arch/arm/mach-socfpga/Kconfig            |    7 ++
 arch/arm/mach-socfpga/Makefile           |    6 ++
 arch/arm/mach-socfpga/Makefile.boot      |    1 +
 arch/arm/mach-socfpga/common.h           |    2 +-
 arch/arm/mach-socfpga/socfpga_cyclone5.c |   60 +++++++++++++++

Quoted 7 lines

arch/arm/mach-socfpga/Kconfig new file +1 -0

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index 0000000..133fc89
@@ -0,0 +1,7 @@
+config MACH_SOCFPGA_CYCLONE5

arch/arm/mach-socfpga/Kconfig line 7

Quoted 6 lines

arch/arm/mach-socfpga/Kconfig new file +6 -0

+       bool "SOCFPGA Cyclone5 platform"
+       select COMMON_CLK
+       select HAVE_SMP
+       select PLAT_SOCFPGA_ETH
+       help
+         Include support for the Altera(R) Cyclone5 development platform.

You don't need a config option for a machine with DT.

arch/arm/boot/dts/socfpga_cyclone5.dts new file +65 -0

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index 0000000..710c773
@@ -0,0 +1,118 @@
+/*
+ *  Copyright (C) 2012 Altera Corporation <www.altera.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+/dts-v1/;
+/include/ "socfpga.dtsi"
+
+/ {
+	model = "Altera SOCFPGA Cyclone V";
+	compatible = "altr,socfpga-cyclone5";
+
+	aliases {
+		ethernet0 = &gmac0;
+		serial0 = &uart0;
+		serial1 = &uart1;
+	};
+
+	chosen {
+		bootargs = "console=ttyS0,57600";
+	};
+
+	memory {
+		name = "memory";
+		device_type = "memory";
+		reg = <0x0 0x10000000>; /* 256MB */
+	};
+
+	soc {
+		amba {
+			compatible = "arm,amba-bus";
+			#address-cells = <1>;
+			#size-cells = <1>;
+			ranges;
+
+			pdma: pdma at ffe01000 {
+				compatible = "arm,pl330", "arm,primecell";
+				reg = <0xffe01000 0x1000>;
+				interrupts = <0 180 4>;
+			};
+		};
+
+		apb_periphs {
+			compatible = "simple-bus";
+			#address-cells = <1>;
+			#size-cells = <1>;
+			ranges;
+
+			uart0: uart at ffc02000 {
+				compatible = "snps,dw-apb-uart";
+				reg = <0xffc02000 0x1000>;
+				clock-frequency = <7372800>;
+				interrupts = <0 162 4>;

Hello,

Le Thu, 12 Jul 2012 12:26:16 -0500,
<[email protected]> a ?crit :

Quoted 76 lines

arch/arm/boot/dts/socfpga_cyclone5.dts new file +70 -0

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index 0000000..710c773
@@ -0,0 +1,118 @@
+/*
+ *  Copyright (C) 2012 Altera Corporation <www.altera.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+/dts-v1/;
+/include/ "socfpga.dtsi"
+
+/ {
+	model = "Altera SOCFPGA Cyclone V";
+	compatible = "altr,socfpga-cyclone5";
+
+	aliases {
+		ethernet0 = &gmac0;
+		serial0 = &uart0;
+		serial1 = &uart1;
+	};
+
+	chosen {
+		bootargs = "console=ttyS0,57600";
+	};
+
+	memory {
+		name = "memory";
+		device_type = "memory";
+		reg = <0x0 0x10000000>; /* 256MB */
+	};
+
+	soc {
+		amba {
+			compatible = "arm,amba-bus";
+			#address-cells = <1>;
+			#size-cells = <1>;
+			ranges;
+
+			pdma: pdma at ffe01000 {
+				compatible = "arm,pl330", "arm,primecell";
+				reg = <0xffe01000 0x1000>;
+				interrupts = <0 180 4>;
+			};
+		};
+
+		apb_periphs {
+			compatible = "simple-bus";
+			#address-cells = <1>;
+			#size-cells = <1>;
+			ranges;
+
+			uart0: uart at ffc02000 {
+				compatible = "snps,dw-apb-uart";
+				reg = <0xffc02000 0x1000>;
+				clock-frequency = <7372800>;
+				interrupts = <0 162 4>;
+				reg-shift = <2>;
+				reg-io-width = <4>;
+			};
+
+		timer0: timer at ffc08000 {

arch/arm/boot/dts/socfpga_cyclone5.dts line 75

Quoted 5 lines

arch/arm/boot/dts/socfpga_cyclone5.dts new file +5 -0

+				compatible = "snps,dw-apb-timer-sp";
+				interrupts = <0 167 4>;
+				clock-frequency = <200000000>;
+				reg = <0xffc08000 0x1000>;
+			};

There is an indentation problem here, the timer0 (and the following) should be at the same level as uart0.

Also, are all those peripherals (uarts, timers) really board-specific? I.e, are they synthesized on the FPGA part, or are they part of the ARM SoC, in which case they should be listed in the .dtsi and not in the .dts.

Best regards,

Thomas

From: Dinh Nguyen <[email protected]>

This patch series add minimal support for Altera's SOCFPGA hardward.

Changes since v1:
- Incorporate changes suggested by Pavel Machek, Thommas Petazzoni, Arnd Bergmann, and Rob Herring
- Reduce the patch to a make as much use of DTS as possible

Dinh Nguyen (2):
ARM: socfpga: initial support for Altera's SOCFPGA platform.
ARM: socfpga: Add board support for Altera's SOCFPGA Cyclone 5 HW

Arnd, do you think this is good enough to go to the next tree? It is new architecture, it should not break anything, I believe we addressed all the issues raised in the review, and noone is reporting new ones.

Plus, if we could make initial support into 3.6, that would be very nice :-).

Quoted 5 lines · Pavel Machek

Arnd, do you think this is good enough to go to the next tree? It is new architecture, it should not break anything, I believe we addressed all the issues raised in the review, and noone is reporting new ones.

Quoted 2 lines

Plus, if we could make initial support into 3.6, that would be very nice :-).

I think we can make it for v3.6, but it's very late for that and I haven't looked at it enough in the past. I have a few small comments, so if you can address them quickly we can take it.

Arnd

Quoted 5 lines

Quoted 5 lines

Arnd, do you think this is good enough to go to the next tree? It is new architecture, it should not break anything, I believe we addressed all the issues raised in the review, and noone is reporting new ones.

Quoted 6 lines

Quoted 2 lines

Plus, if we could make initial support into 3.6, that would be very nice :-).

I think we can make it for v3.6, but it's very late for that and I haven't looked at it enough in the past. I have a few small comments, so if you can address them quickly we can take it.

Hi Arnd. Thanks, please fire away your comments.

Hi!

Quoted 5 lines

Quoted 5 lines

Quoted 5 lines

Arnd, do you think this is good enough to go to the next tree? It is new architecture, it should not break anything, I believe we addressed all the issues raised in the review, and noone is reporting new ones.

Quoted 8 lines

Quoted 6 lines

Quoted 2 lines

Plus, if we could make initial support into 3.6, that would be very nice :-).

I think we can make it for v3.6, but it's very late for that and I haven't looked at it enough in the past. I have a few small comments, so if you can address them quickly we can take it.

Hi Arnd. Thanks, please fire away your comments.

Arnd wanted quick reactions, so I took liberty of creating PATCHv4. (You are marked in From: so you'll still get the credit :-). I hope that is not a big problem.

I'm now pushing for-altera-0718 with the PATCHv4 (+ .config file).

Now, I guess at this point it would be useful to make our repository public?

(Oh, and cross the fingers for us so that it finally gets merged :-).