ARM: mach-shmobile: sh7372 INTC DT consolidation

From: Magnus Damm <[email protected]>

Rework the sh7372 DT INTC setup code to only make use of "renesas,sh_intc" instead of using zillions of special cases.

In the future the INTC DT code really wants to be moved to a separate file that can be shared between multiple SoCs using INTC as primary interrupt controller like for instance sh7372 and r8a7740.

The major ugly portion left is the intevtsa stuff that really should be updated to make use of the parent interrupt controller information in DT. intc_of_init() can be extended to install the chained interrupt handler directly if the function call to of_sh_intc_get_intevtsa_vect() succeeds.

When all SoCs are reworked like sh7372 then we can share the SoC INTC DT code in one place and after that remove unused stuff from of_intc.c like the following functions:
- of_sh_intc_get_meminfo()
- of_sh_intc_get_pint()
- of_sh_intc_get_intc_pins()

---

Applies to the devel/of branch of
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git

 arch/arm/boot/dts/sh7372.dtsi        |    8 -
 arch/arm/mach-shmobile/intc-sh7372.c |  186 ++++++++--------------------------
 drivers/sh/intc/of_intc.c            |    8 -
 3 files changed, 55 insertions(+), 147 deletions(-)

@@ -26,7 +26,7 @@
 		ranges;
 
 		intca: interrupt-controller@0 {
-			compatible = "renesas,sh_intca";
+			compatible = "renesas,sh_intc";
 			interrupt-controller;
 			#address-cells = <1>;
 			#size-cells = <1>;

@@ -583,7 +583,7 @@
 		};
 
 		intcs: interrupt-controller@1 {
-			compatible = "renesas,sh_intcs";
+			compatible = "renesas,sh_intc";
 			interrupt-controller;
 			#address-cells = <1>;
 			#size-cells = <1>;

@@ -939,7 +939,7 @@
 		};
 
 		intca_irq_pins_lo: interrupt-controller@2 {
-			compatible = "renesas,sh_intca_irq_pins_lo";
+			compatible = "renesas,sh_intc";
 			interrupt-controller;
 			#address-cells = <1>;
 			#size-cells = <1>;

@@ -1048,7 +1048,7 @@
 		};
 
 		intca_irq_pins_hi: interrupt-controller@3 {
-			compatible = "renesas,sh_intca_irq_pins_hi";
+			compatible = "renesas,sh_intc";
 			interrupt-controller;
 			#address-cells = <1>;
 			#size-cells = <1>;

@@ -470,7 +470,6 @@ int __init of_sh_intc_get_intevtsa_vect(
 
 	node = of_find_node_by_name(np, "intc_intevtsa");
 	if (!node) {
-		pr_err("intc_intevtsa table not found\n");
 		return -ENOENT;
 	}
 

@@ -580,9 +579,10 @@ int __init of_sh_intc_get_intc(struct de
 	if (ret)
 		return ret;
 
-	ret = of_sh_intc_get_group(np,  &d->hw.groups,
+	ret = of_sh_intc_get_group(np, &d->hw.groups,
 				&d->hw.nr_groups);
-	if (ret)
+	/* INTC may not need groups. */
+	if (ret && ret != -ENOENT)
 		return ret;
 
 	ret = of_sh_intc_get_mask(np, &d->hw.mask_regs,

@@ -597,7 +597,7 @@ int __init of_sh_intc_get_intc(struct de
 
 	ret = of_sh_intc_get_sense(np, &d->hw.sense_regs,
 				&d->hw.nr_sense_regs);
-	/* INTC may not need Sence register. */
+	/* INTC may not need Sense register. */
 	if (ret && ret != -ENOENT)
 		return ret;