Improve CFAR handling
Subsystems (2)
cover Improve CFAR handling
The CFAR (Come From Address Register) is useful for debugging; it records the address of the most recent taken branch or rfid instructions. At present, KVM doesn't even try to context switch it, and the first-level interrupt handlers for some interrupts have a branch before it gets saved, which will corrupt it.
This series fixes the interrupt handlers to not corrupt the CFAR, and makes KVM context-switch it. The series is against Ben H.'s next branch. The last patch in the series corrects a compile error for 32-bit PR KVM configs which was introduced by an earlier commit in Ben's next branch.
I suggest this series should go via Ben's tree rather than the KVM tree, since most of the changes are to core powerpc interrupt handling code. Alex, if you could ack patch 3/4 that would be helpful.
Paul.
PATCH 1/4 powerpc: Remove Cell-specific relocation-on interrupt vector code
The Cell processor doesn't support relocation-on interrupts, so we don't need relocation-on versions of the interrupt vectors that are purely Cell-specific. This removes them.
--- arch/powerpc/kernel/exceptions-64s.S | 10 ---------- 1 file changed, 10 deletions(-)
arch/powerpc/kernel/exceptions-64s.S +0 -10
@@ -817,26 +817,16 @@ vsx_unavailable_relon_pSeries_1: . = 0x4f40 b vsx_unavailable_relon_pSeries -#ifdef CONFIG_CBE_RAS - STD_RELON_EXCEPTION_HV(0x5200, 0x1202, cbe_system_error) -#endif /* CONFIG_CBE_RAS */ STD_RELON_EXCEPTION_PSERIES(0x5300, 0x1300, instruction_breakpoint) #ifdef CONFIG_PPC_DENORMALISATION . = 0x5500 b denorm_exception_hv #endif -#ifdef CONFIG_CBE_RAS - STD_RELON_EXCEPTION_HV(0x5600, 0x1602, cbe_maintenance) -#else #ifdef CONFIG_HVC_SCOM STD_RELON_EXCEPTION_HV(0x5600, 0x1600, maintence_interrupt) KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0x1600) #endif /* CONFIG_HVC_SCOM */ -#endif /* CONFIG_CBE_RAS */ STD_RELON_EXCEPTION_PSERIES(0x5700, 0x1700, altivec_assist) -#ifdef CONFIG_CBE_RAS - STD_RELON_EXCEPTION_HV(0x5800, 0x1802, cbe_thermal) -#endif /* CONFIG_CBE_RAS */ /* Other future vectors */ .align 7
Signature · 1 line
1.7.10.4
PATCH 2/4 powerpc: Save CFAR before branching in interrupt entry paths
In reply to Paul MackerrasSome of the interrupt vectors on 64-bit POWER server processors are only 32 bytes long, which is not enough for the full first-level interrupt handler. For these we currently just have a branch to an out-of-line handler. However, this means that we corrupt the CFAR (come-from address register) on POWER7 and later processors.
To fix this, we split the EXCEPTION_PROLOG_1 macro into two pieces:EXCEPTION_PROLOG_0 contains the part up to the point where the CFAR is saved in the PACA, and EXCEPTION_PROLOG_1 contains the rest. We then put EXCEPTION_PROLOG_0 in the short interrupt vectors before we branch to the out-of-line handler, which contains the rest of the first-level interrupt handler. To facilitate this, we define new _OOL (out of line) variants of STD_EXCEPTION_PSERIES, etc.
In order to get EXCEPTION_PROLOG_0 to be short enough, i.e., no more than 6 instructions, it was necessary to move the stores that move the PPR and CFAR values into the PACA into __EXCEPTION_PROLOG_1 and to get rid of one of the two HMT_MEDIUM instructions. Previously there was a HMT_MEDIUM_PPR_DISCARD before the prolog, which was nop'd out on processors with the PPR (POWER7 and later), and then another HMT_MEDIUM inside the HMT_MEDIUM_PPR_SAVE macro call inside __EXCEPTION_PROLOG_1, which was nop'd out on processors without PPR. Now the HMT_MEDIUM inside EXCEPTION_PROLOG_0 is there unconditionally and the HMT_MEDIUM_PPR_DISCARD is not strictly necessary, although this leaves it in for the interrupt vectors where there is room for it.
Previously we had a handler for hypervisor maintenance interrupts at 0xe50, which doesn't leave enough room for the vector for hypervisor emulation assist interrupts at 0xe40, since we need 8 instructions. The 0xe50 vector was only used on POWER6, as the HMI vector was moved to 0xe60 on POWER7. Since we don't support running in hypervisor mode on POWER6, we just remove the handler at 0xe50.
This also changes denorm_exception_hv to use EXCEPTION_PROLOG_0 instead of open-coding it, and removes the HMT_MEDIUM_PPR_DISCARD from the relocation-on vectors (since any CPU that supports relocation-on interrupts also has the PPR).
--- arch/powerpc/include/asm/exception-64s.h | 84 +++++++++++++++++++++----- arch/powerpc/kernel/exceptions-64s.S | 95 ++++++++++++++++++++---------- 2 files changed, 133 insertions(+), 46 deletions(-)
arch/powerpc/include/asm/exception-64s.h +68 -16
@@ -50,7 +50,7 @@#define EX_PPR 88/* SMT thread status register (priority) */ #ifdef CONFIG_RELOCATABLE -#define EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \ +#define __EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \ ld r12,PACAKBASE(r13); /* get high part of &label */ \ mfspr r11,SPRN_##h##SRR0;/* save SRR0 */ \LOAD_HANDLER (r12,label); \
@@ -61,13 +61,15 @@blr ;#else /* If not relocatable, we can jump directly -- and save messing with LR */ -#define EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \ +#define __EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \ mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \ mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \ li r10,MSR_RI; \ mtmsrd r10,1;/* Set RI (EE=0) */ \b label;#endif +#define EXCEPTION_RELON_PROLOG_PSERIES_1 (label, h) \ + __EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \/* * As EXCEPTION_PROLOG_PSERIES(), except we've already got relocation on
@@ -75,6 +77,7 @@* case EXCEPTION_RELON_PROLOG_PSERIES_1 will be using lr. */ #define EXCEPTION_RELON_PROLOG_PSERIES (area, label, h, extra, vec) \ + EXCEPTION_PROLOG_0(area); \ EXCEPTION_PROLOG_1(area, extra, vec); \ EXCEPTION_RELON_PROLOG_PSERIES_1(label, h)
@@ -135,25 +138,32 @@ BEGIN_FTR_SECTION_NESTED(942) \END_FTR_SECTION_NESTED (CPU_FTR_HAS_PPR ,0 ,942 )/*non P7*/ /* -* Save PPR in paca whenever some register is available to use. -* Then increase the priority. +* Get an SPR into a register if the CPU has the given feature */ -#define HMT_MEDIUM_PPR_SAVE (area, ra) \ +#define OPT_GET_SPR (ra, spr, ftr) \ BEGIN_FTR_SECTION_NESTED(943) \ - mfspr ra,SPRN_PPR; \ - std ra,area+EX_PPR(r13); \ - HMT_MEDIUM; \ -END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,943) + mfspr ra,spr; \ +END_FTR_SECTION_NESTED(ftr,ftr,943) -#define __EXCEPTION_PROLOG_1 (area, extra, vec) \ +/* +* Save a register to the PACA if the CPU has the given feature +*/ +#define OPT_SAVE_REG_TO_PACA (offset, ra, ftr) \ +BEGIN_FTR_SECTION_NESTED(943) \ + std ra,offset(r13); \ +END_FTR_SECTION_NESTED(ftr,ftr,943) + +#define EXCEPTION_PROLOG_0 (area) \ GET_PACA(r13); \ std r9,area+EX_R9(r13);/* save r9 */ \ -HMT_MEDIUM_PPR_SAVE (area, r9); \ +OPT_GET_SPR (r9,SPRN_PPR ,CPU_FTR_HAS_PPR ); \ +HMT_MEDIUM ; \ std r10,area+EX_R10(r13); /* save r10 - r12 */ \ -BEGIN_FTR_SECTION_NESTED (66 ); \ -mfspr r10,SPRN_CFAR ; \ - std r10,area+EX_CFAR(r13); \ -END_FTR_SECTION_NESTED (CPU_FTR_CFAR ,CPU_FTR_CFAR ,66 ); \ + OPT_GET_SPR(r10, SPRN_CFAR, CPU_FTR_CFAR) + +#define __EXCEPTION_PROLOG_1 (area, extra, vec) \ + OPT_SAVE_REG_TO_PACA(area+EX_PPR, r9, CPU_FTR_HAS_PPR); \ + OPT_SAVE_REG_TO_PACA(area+EX_CFAR, r10, CPU_FTR_CFAR); \ SAVE_LR(r10, area); \ mfcr r9; \ extra(vec); \
@@ -178,6 +188,7 @@ END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,943) __EXCEPTION_PROLOG_PSERIES_1(label, h)#define EXCEPTION_PROLOG_PSERIES (area, label, h, extra, vec) \ + EXCEPTION_PROLOG_0(area); \ EXCEPTION_PROLOG_1(area, extra, vec); \ EXCEPTION_PROLOG_PSERIES_1(label, h);
@@ -312,6 +323,13 @@ label##_pSeries: \ EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common, \EXC_STD ,KVMTEST_PR , vec) +/* Version of above for when we have to branch out-of-line */ +#define STD_EXCEPTION_PSERIES_OOL (vec, label) \ + .globl label##_pSeries; \ +label##_pSeries: \ + EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST_PR, vec); \ + EXCEPTION_PROLOG_PSERIES_1(label##_common, EXC_STD) +#define STD_EXCEPTION_HV (loc, vec, label) \ . = loc; \ .globl label##_hv; \
@@ -321,6 +339,13 @@ label##_hv: \ EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common, \EXC_HV ,KVMTEST , vec) +/* Version of above for when we have to branch out-of-line */ +#define STD_EXCEPTION_HV_OOL (vec, label) \ + .globl label##_hv; \ +label##_hv: \ + EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST, vec); \ + EXCEPTION_PROLOG_PSERIES_1(label##_common, EXC_HV) +#define STD_RELON_EXCEPTION_PSERIES (loc, vec, label) \ . = loc; \ .globl label##_relon_pSeries; \
@@ -331,6 +356,12 @@ label##_relon_pSeries: \ EXCEPTION_RELON_PROLOG_PSERIES(PACA_EXGEN, label##_common, \ EXC_STD, KVMTEST_PR, vec) +#define STD_RELON_EXCEPTION_PSERIES_OOL (vec, label) \ + .globl label##_relon_pSeries; \ +label##_relon_pSeries: \ + EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST_PR, vec); \ + EXCEPTION_RELON_PROLOG_PSERIES_1(label##_common, EXC_STD) +#define STD_RELON_EXCEPTION_HV (loc, vec, label) \ . = loc; \ .globl label##_relon_hv; \
@@ -341,6 +372,12 @@ label##_relon_hv: \ EXCEPTION_RELON_PROLOG_PSERIES(PACA_EXGEN, label##_common, \ EXC_HV, KVMTEST, vec) +#define STD_RELON_EXCEPTION_HV_OOL (vec, label) \ + .globl label##_relon_hv; \ +label##_relon_hv: \ + EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST, vec); \ + EXCEPTION_RELON_PROLOG_PSERIES_1(label##_common, EXC_HV) +/* This associate vector numbers with bits in paca->irq_happened */ #define SOFTEN_VALUE_0x500 PACA_IRQ_EE#define SOFTEN_VALUE_0x502 PACA_IRQ_EE
@@ -375,8 +412,10 @@ label##_relon_hv: \#define __MASKABLE_EXCEPTION_PSERIES (vec, label, h, extra) \ HMT_MEDIUM_PPR_DISCARD; \ SET_SCRATCH0(r13);/* save r13 */ \ -__EXCEPTION_PROLOG_1 (PACA_EXGEN , extra, vec); \ +EXCEPTION_PROLOG_0 (PACA_EXGEN ); \ +__EXCEPTION_PROLOG_1 (PACA_EXGEN , extra, vec); \ EXCEPTION_PROLOG_PSERIES_1(label##_common, h); +#define _MASKABLE_EXCEPTION_PSERIES (vec, label, h, extra) \ __MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra)
@@ -394,9 +433,16 @@ label##_hv: \_MASKABLE_EXCEPTION_PSERIES (vec, label, \ EXC_HV, SOFTEN_TEST_HV) +#define MASKABLE_EXCEPTION_HV_OOL (vec, label) \ + .globl label##_hv; \ +label##_hv: \ + EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_TEST_HV, vec); \ + EXCEPTION_PROLOG_PSERIES_1(label##_common, EXC_HV); +#define __MASKABLE_RELON_EXCEPTION_PSERIES (vec, label, h, extra) \ HMT_MEDIUM_PPR_DISCARD; \ SET_SCRATCH0(r13);/* save r13 */ \ +EXCEPTION_PROLOG_0 (PACA_EXGEN ); \__EXCEPTION_PROLOG_1 (PACA_EXGEN , extra, vec); \ EXCEPTION_RELON_PROLOG_PSERIES_1(label##_common, h);#define _MASKABLE_RELON_EXCEPTION_PSERIES (vec, label, h, extra) \
@@ -416,6 +462,12 @@ label##_relon_hv: \_MASKABLE_RELON_EXCEPTION_PSERIES (vec, label, \ EXC_HV, SOFTEN_NOTEST_HV) +#define MASKABLE_RELON_EXCEPTION_HV_OOL (vec, label) \ + .globl label##_relon_hv; \ +label##_relon_hv: \ + EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_NOTEST_HV, vec); \ + EXCEPTION_PROLOG_PSERIES_1(label##_common, EXC_HV); +/* * Our exception common code can be passed various "additions" * to specify the behaviour of interrupts, whether to kick the
arch/powerpc/kernel/exceptions-64s.S +65 -30
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1.7.10.4
PATCH 3/4 KVM: PPC: Book3S HV: Preserve guest CFAR register value
In reply to Paul MackerrasThe CFAR (Come-From Address Register) is a useful debugging aid that exists on POWER7 processors. Currently HV KVM doesn't save or restore the CFAR register for guest vcpus, making the CFAR of limited use in guests.
This adds the necessary code to capture the CFAR value saved in the early exception entry code (it has to be saved before any branch is executed), save it in the vcpu.arch struct, and restore it on entry to the guest.
--- arch/powerpc/include/asm/exception-64s.h | 8 ++++++-- arch/powerpc/include/asm/kvm_book3s_asm.h | 3 +++ arch/powerpc/include/asm/kvm_host.h | 1 + arch/powerpc/kernel/asm-offsets.c | 5 +++++ arch/powerpc/kvm/book3s_hv_rmhandlers.S | 9 +++++++++ 5 files changed, 24 insertions(+), 2 deletions(-)
arch/powerpc/include/asm/exception-64s.h +6 -2
@@ -199,10 +199,14 @@ END_FTR_SECTION_NESTED(ftr,ftr,943)#define __KVM_HANDLER (area, h, n) \ do_kvm_##n: \ + BEGIN_FTR_SECTION_NESTED(947) \ + ld r10,area+EX_CFAR(r13); \ + std r10,HSTATE_CFAR(r13); \ + END_FTR_SECTION_NESTED(CPU_FTR_CFAR,CPU_FTR_CFAR,947); \ ld r10,area+EX_R10(r13); \ - stw r9,HSTATE_SCRATCH1(r13); \ + stw r9,HSTATE_SCRATCH1(r13); \ ld r9,area+EX_R9(r13); \ - std r12,HSTATE_SCRATCH0(r13); \ + std r12,HSTATE_SCRATCH0(r13); \ li r12,n; \ b kvmppc_interrupt
arch/powerpc/include/asm/kvm_book3s_asm.h +3 -0
@@ -93,6 +93,9 @@ struct kvmppc_host_state {u64 host_dscr;u64 dec_expires;#endif +#ifdef CONFIG_PPC_BOOK3S_64 +u64 cfar; +#endif };struct kvmppc_book3s_shadow_vcpu {
arch/powerpc/include/asm/kvm_host.h +1 -0
@@ -440,6 +440,7 @@ struct kvm_vcpu_arch {ulong uamor;u32 ctrl;ulong dabr; +ulong cfar;#endif u32 vrsave;/* also USPRG0 */ u32 mmucr;
arch/powerpc/kernel/asm-offsets.c +5 -0
@@ -475,6 +475,7 @@ int main(void) DEFINE(VCPU_LAST_INST, offsetof(struct kvm_vcpu, arch.last_inst)); DEFINE(VCPU_TRAP, offsetof(struct kvm_vcpu, arch.trap)); DEFINE(VCPU_PTID, offsetof(struct kvm_vcpu, arch.ptid)); + DEFINE(VCPU_CFAR, offsetof(struct kvm_vcpu, arch.cfar));DEFINE (VCORE_ENTRY_EXIT , offsetof(struct kvmppc_vcore , entry_exit_count));DEFINE (VCORE_NAP_COUNT , offsetof(struct kvmppc_vcore , nap_count));DEFINE (VCORE_IN_GUEST , offsetof(struct kvmppc_vcore , in_guest));
@@ -554,6 +555,10 @@ int main(void)DEFINE (IPI_PRIORITY ,IPI_PRIORITY );#endif /* CONFIG_KVM_BOOK3S_64_HV */ +#ifdef CONFIG_PPC_BOOK3S_64 +HSTATE_FIELD (HSTATE_CFAR , cfar); +#endif /* CONFIG_PPC_BOOK3S_64 */ +#else /* CONFIG_PPC_BOOK3S */ DEFINE(VCPU_CR, offsetof(struct kvm_vcpu, arch.cr)); DEFINE(VCPU_XER, offsetof(struct kvm_vcpu, arch.xer));
arch/powerpc/kvm/book3s_hv_rmhandlers.S +9 -0
@@ -539,6 +539,11 @@ fast_guest_return: /* Enter guest */ +BEGIN_FTR_SECTION + ld r5, VCPU_CFAR(r4) + mtspr SPRN_CFAR, r5 +END_FTR_SECTION_IFSET(CPU_FTR_CFAR) + ld r5, VCPU_LR(r4) lwz r6, VCPU_CR(r4) mtlr r5
@@ -604,6 +609,10 @@ kvmppc_interrupt: lwz r4, HSTATE_SCRATCH1(r13) std r3, VCPU_GPR(R12)(r9) stw r4, VCPU_CR(r9) +BEGIN_FTR_SECTION + ld r3, HSTATE_CFAR(r13) + std r3, VCPU_CFAR(r9) +END_FTR_SECTION_IFSET(CPU_FTR_CFAR) /* Restore R1/R2 so we can handle faults */ ld r1, HSTATE_HOST_R1(r13)
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1.7.10.4
Re: [PATCH 3/4] KVM: PPC: Book3S HV: Preserve guest CFAR register value
Quoted 11 lines · Paul Mackerras
The CFAR (Come-From Address Register) is a useful debugging aid that exists on POWER7 processors. Currently HV KVM doesn't save or restore the CFAR register for guest vcpus, making the CFAR of limited use in guests.
This adds the necessary code to capture the CFAR value saved in the early exception entry code (it has to be saved before any branch is executed), save it in the vcpu.arch struct, and restore it on entry to the guest.
Signed-off-by Paul Mackerras <[email protected]>
Alex
PATCH 4/4 KVM: PPC: Book3S PR: Fix compilation on 32-bit machines
In reply to Paul MackerrasCommit a413f474a0 ("powerpc: Disable relocation on exceptions whenever PR KVM is active") added calls to pSeries_disable_reloc_on_exc() and pSeries_enable_reloc_on_exc() to book3s_pr.c, and added declarations of those functions to <asm/hvcall.h>, but didn't add an include of <asm/hvcall.h> to book3s_pr.c. 64-bit kernels seem to get hvcall.h included via some other path, but 32-bit kernels fail to compile with:
arch/powerpc/kvm/book3s_pr.c: In function ‘kvmppc_core_init_vm’:arch/powerpc/kvm/book3s_pr.c:1300:4: error: implicit declaration of function ‘pSeries_disable_reloc_on_exc’ [-Werror=implicit-function-declaration] arch/powerpc/kvm/book3s_pr.c: In function ‘kvmppc_core_destroy_vm’:arch/powerpc/kvm/book3s_pr.c:1316:4: error: implicit declaration of function ‘pSeries_enable_reloc_on_exc’ [-Werror=implicit-function-declaration]
cc1: all warnings being treated as errors
make[2]: *** [arch/powerpc/kvm/book3s_pr.o] Error 1
make[1]: *** [arch/powerpc/kvm] Error 2
make: *** [sub-make] Error 2
This fixes it by adding an include of hvcall.h.
--- arch/powerpc/kvm/book3s_pr.c | 1 + 1 file changed, 1 insertion(+)
arch/powerpc/kvm/book3s_pr.c +1 -0
@@ -35,6 +35,7 @@#include <asm/mmu_context.h> #include <asm/switch_to.h> #include <asm/firmware.h> +#include <asm/hvcall.h> #include <linux/gfp.h> #include <linux/sched.h> #include <linux/vmalloc.h>
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1.7.10.4