In-kernel PSCI v0.2 emulation for KVM ARM/ARM64

We need a common place to share PSCI related defines among ARM kernel, ARM64 kernel, KVM ARM/ARM64 PSCI emulation, and user space.

We introduce uapi/linux/psci.h for this purpose. This newly added header will be first used by KVM ARM/ARM64 in-kernel PSCI emulation and user space (i.e. QEMU or KVMTOOL).

Signed-off-by Anup Patel <[email protected]>

Signed-off-by Pranavkumar Sawargaonkar <[email protected]>

---
 include/uapi/linux/Kbuild |    1 +
 include/uapi/linux/psci.h |   73 +++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 74 insertions(+)
 create mode 100644 include/uapi/linux/psci.h

include/uapi/linux/Kbuild +1 -0

index 6929571..24e9033 100644
@@ -317,6 +317,7 @@ header-y += ppp-ioctl.h
 header-y += ppp_defs.h
 header-y += pps.h
 header-y += prctl.h
+header-y += psci.h
 header-y += ptp_clock.h
 header-y += ptrace.h
 header-y += qnx4_fs.h

include/uapi/linux/psci.h new file +73 -1

new file mode 100644
index 0000000..fbf8a81
@@ -0,0 +1,73 @@
+/*
+ * ARM Power State and Coordination Interface (PSCI) header
+ *
+ * This header holds common PSCI defines and macros shared
+ * by: ARM kernel, ARM64 kernel, KVM ARM/ARM64 and user space.
+ *
+ * Copyright (C) 2014 Linaro Ltd.
+ * Author: Anup Patel <[email protected]>
+ */
+
+#ifndef _UAPI_LINUX_PSCI_H
+#define _UAPI_LINUX_PSCI_H
+
+/* PSCI v0.1 interface */
+#define PSCI_FN(base, n)                       ((base) + (n))
+
+#define PSCI_FN_CPU_SUSPEND(base)              PSCI_FN(base, 0)
+#define PSCI_FN_CPU_OFF(base)                  PSCI_FN(base, 1)
+#define PSCI_FN_CPU_ON(base)                   PSCI_FN(base, 2)
+#define PSCI_FN_MIGRATE(base)                  PSCI_FN(base, 3)
+
+/* PSCI v0.2 interface */
+#define PSCI_0_2_FN_BASE                       0x84000000
+#define PSCI_0_2_FN(n)                         (PSCI_0_2_FN_BASE + (n))
+#define PSCI_0_2_64BIT                         0x40000000
+#define PSCI_0_2_FN64_BASE                     \
+                                       (PSCI_0_2_FN_BASE + PSCI_0_2_64BIT)
+#define PSCI_0_2_FN64(n)                       (PSCI_0_2_FN64_BASE + (n))
+
+#define PSCI_0_2_FN_PSCI_VERSION               PSCI_0_2_FN(0)
+#define PSCI_0_2_FN_CPU_SUSPEND                        PSCI_0_2_FN(1)
+#define PSCI_0_2_FN_CPU_OFF                    PSCI_0_2_FN(2)
+#define PSCI_0_2_FN_CPU_ON                     PSCI_0_2_FN(3)
+#define PSCI_0_2_FN_AFFINITY_INFO              PSCI_0_2_FN(4)
+#define PSCI_0_2_FN_MIGRATE                    PSCI_0_2_FN(5)
+#define PSCI_0_2_FN_MIGRATE_INFO_TYPE          PSCI_0_2_FN(6)
+#define PSCI_0_2_FN_MIGRATE_INFO_UP_CPU                PSCI_0_2_FN(7)
+#define PSCI_0_2_FN_SYSTEM_OFF                 PSCI_0_2_FN(8)
+#define PSCI_0_2_FN_SYSTEM_RESET               PSCI_0_2_FN(9)
+
+#define PSCI_0_2_FN64_CPU_SUSPEND              PSCI_0_2_FN64(1)
+#define PSCI_0_2_FN64_CPU_ON                   PSCI_0_2_FN64(3)
+#define PSCI_0_2_FN64_AFFINITY_INFO            PSCI_0_2_FN64(4)
+#define PSCI_0_2_FN64_MIGRATE                  PSCI_0_2_FN64(5)
+#define PSCI_0_2_FN64_MIGRATE_INFO_UP_CPU      PSCI_0_2_FN64(7)
+
+#define PSCI_0_2_POWER_STATE_ID_MASK           0xffff
+#define PSCI_0_2_POWER_STATE_ID_SHIFT          0
+#define PSCI_0_2_POWER_STATE_TYPE_MASK         0x1
+#define PSCI_0_2_POWER_STATE_TYPE_SHIFT                16
+#define PSCI_0_2_POWER_STATE_AFFL_MASK         0x3
+#define PSCI_0_2_POWER_STATE_AFFL_SHIFT                24
+
+/* PSCI version decoding (independent of PSCI version) */
+#define PSCI_VERSION_MAJOR_MASK                        0xffff0000
+#define PSCI_VERSION_MINOR_MASK                        0x0000ffff
+#define PSCI_VERSION_MAJOR_SHIFT               16
+#define PSCI_VERSION_MAJOR(ver)                        \
+               (((ver) & PSCI_VER_MAJOR_MASK) >> PSCI_VER_MAJOR_SHIFT)
+#define PSCI_VERSION_MINOR(ver)                        ((ver) & PSCI_VER_MINOR_MASK)
+
+/* PSCI return values (inclusive of all PSCI versions) */
+#define PSCI_RET_SUCCESS                       0
+#define PSCI_RET_NOT_SUPPORTED                 -1
+#define PSCI_RET_INVALID_PARAMS                        -2
+#define PSCI_RET_DENIED                                -3
+#define PSCI_RET_ALREADY_ON                    -4
+#define PSCI_RET_ON_PENDING                    -5
+#define PSCI_RET_INTERNAL_FAILURE              -6
+#define PSCI_RET_NOT_PRESENT                   -7
+#define PSCI_RET_DISABLED                      -8
+
+#endif /* _UAPI_LINUX_PSCI_H */
--

1.7.9.5

Quoted 107 lines · Anup Patel

We need a common place to share PSCI related defines among ARM kernel, ARM64 kernel, KVM ARM/ARM64 PSCI emulation, and user space.

We introduce uapi/linux/psci.h for this purpose. This newly added header will be first used by KVM ARM/ARM64 in-kernel PSCI emulation and user space (i.e. QEMU or KVMTOOL).

Signed-off-by Anup Patel <[email protected]>

Signed-off-by Pranavkumar Sawargaonkar <[email protected]>

---
 include/uapi/linux/Kbuild |    1 +
 include/uapi/linux/psci.h |   73 +++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 74 insertions(+)
 create mode 100644 include/uapi/linux/psci.h

include/uapi/linux/Kbuild +1 -0

index 6929571..24e9033 100644
@@ -317,6 +317,7 @@ header-y += ppp-ioctl.h
 header-y += ppp_defs.h
 header-y += pps.h
 header-y += prctl.h
+header-y += psci.h
 header-y += ptp_clock.h
 header-y += ptrace.h
 header-y += qnx4_fs.h

include/uapi/linux/psci.h new file +73 -1

new file mode 100644
index 0000000..fbf8a81
@@ -0,0 +1,73 @@
+/*
+ * ARM Power State and Coordination Interface (PSCI) header
+ *
+ * This header holds common PSCI defines and macros shared
+ * by: ARM kernel, ARM64 kernel, KVM ARM/ARM64 and user space.
+ *
+ * Copyright (C) 2014 Linaro Ltd.
+ * Author: Anup Patel <[email protected]>
+ */
+
+#ifndef _UAPI_LINUX_PSCI_H
+#define _UAPI_LINUX_PSCI_H
+
+/* PSCI v0.1 interface */
+#define PSCI_FN(base, n)                       ((base) + (n))
+
+#define PSCI_FN_CPU_SUSPEND(base)              PSCI_FN(base, 0)
+#define PSCI_FN_CPU_OFF(base)                  PSCI_FN(base, 1)
+#define PSCI_FN_CPU_ON(base)                   PSCI_FN(base, 2)
+#define PSCI_FN_MIGRATE(base)                  PSCI_FN(base, 3)
+
+/* PSCI v0.2 interface */
+#define PSCI_0_2_FN_BASE                       0x84000000
+#define PSCI_0_2_FN(n)                         (PSCI_0_2_FN_BASE + (n))
+#define PSCI_0_2_64BIT                         0x40000000
+#define PSCI_0_2_FN64_BASE                     \
+                                       (PSCI_0_2_FN_BASE + PSCI_0_2_64BIT)
+#define PSCI_0_2_FN64(n)                       (PSCI_0_2_FN64_BASE + (n))
+
+#define PSCI_0_2_FN_PSCI_VERSION               PSCI_0_2_FN(0)
+#define PSCI_0_2_FN_CPU_SUSPEND                        PSCI_0_2_FN(1)
+#define PSCI_0_2_FN_CPU_OFF                    PSCI_0_2_FN(2)
+#define PSCI_0_2_FN_CPU_ON                     PSCI_0_2_FN(3)
+#define PSCI_0_2_FN_AFFINITY_INFO              PSCI_0_2_FN(4)
+#define PSCI_0_2_FN_MIGRATE                    PSCI_0_2_FN(5)
+#define PSCI_0_2_FN_MIGRATE_INFO_TYPE          PSCI_0_2_FN(6)
+#define PSCI_0_2_FN_MIGRATE_INFO_UP_CPU                PSCI_0_2_FN(7)
+#define PSCI_0_2_FN_SYSTEM_OFF                 PSCI_0_2_FN(8)
+#define PSCI_0_2_FN_SYSTEM_RESET               PSCI_0_2_FN(9)
+
+#define PSCI_0_2_FN64_CPU_SUSPEND              PSCI_0_2_FN64(1)
+#define PSCI_0_2_FN64_CPU_ON                   PSCI_0_2_FN64(3)
+#define PSCI_0_2_FN64_AFFINITY_INFO            PSCI_0_2_FN64(4)
+#define PSCI_0_2_FN64_MIGRATE                  PSCI_0_2_FN64(5)
+#define PSCI_0_2_FN64_MIGRATE_INFO_UP_CPU      PSCI_0_2_FN64(7)
+
+#define PSCI_0_2_POWER_STATE_ID_MASK           0xffff
+#define PSCI_0_2_POWER_STATE_ID_SHIFT          0
+#define PSCI_0_2_POWER_STATE_TYPE_MASK         0x1
+#define PSCI_0_2_POWER_STATE_TYPE_SHIFT                16
+#define PSCI_0_2_POWER_STATE_AFFL_MASK         0x3
+#define PSCI_0_2_POWER_STATE_AFFL_SHIFT                24
+
+/* PSCI version decoding (independent of PSCI version) */
+#define PSCI_VERSION_MAJOR_MASK                        0xffff0000
+#define PSCI_VERSION_MINOR_MASK                        0x0000ffff
+#define PSCI_VERSION_MAJOR_SHIFT               16
+#define PSCI_VERSION_MAJOR(ver)                        \
+               (((ver) & PSCI_VER_MAJOR_MASK) >> PSCI_VER_MAJOR_SHIFT)
+#define PSCI_VERSION_MINOR(ver)                        ((ver) & PSCI_VER_MINOR_MASK)
+
+/* PSCI return values (inclusive of all PSCI versions) */
+#define PSCI_RET_SUCCESS                       0
+#define PSCI_RET_NOT_SUPPORTED                 -1
+#define PSCI_RET_INVALID_PARAMS                        -2
+#define PSCI_RET_DENIED                                -3
+#define PSCI_RET_ALREADY_ON                    -4
+#define PSCI_RET_ON_PENDING                    -5
+#define PSCI_RET_INTERNAL_FAILURE              -6
+#define PSCI_RET_NOT_PRESENT                   -7
+#define PSCI_RET_DISABLED                      -8
+
+#endif /* _UAPI_LINUX_PSCI_H */
--

Quoted 2 lines

1.7.9.5

Since this includes some #defines from my version [1], consider whichever signature is more appropriate:

Acked-by Ashwin Chaugule <[email protected]>

Signed-off-by Ashwin Chaugule <[email protected]>

[1] http://www.spinics.net/lists/arm-kernel/msg319220.html

This patch adds emulation of PSCI v0.2 AFFINITY_INFO function call for KVM ARM/ARM64. This is a VCPU-level function call which will be used to determine current state of given affinity level.

Signed-off-by Anup Patel <[email protected]>

Signed-off-by Pranavkumar Sawargaonkar <[email protected]>

Reviewed-by Christoffer Dall <[email protected]>

---
 arch/arm/kvm/psci.c |   67 +++++++++++++++++++++++++++++++++++++++++++++++++--
 1 file changed, 65 insertions(+), 2 deletions(-)

arch/arm/kvm/psci.c +13 -0

index b964aa4..5fccf0b 100644
@@ -27,6 +27,31 @@
  * as described in ARM document number ARM DEN 0022A.
  */
 
+static unsigned long psci_affinity_mask(unsigned long affinity_level)
+{
+       unsigned long affinity_mask = MPIDR_HWID_BITMASK;
+
+       switch (affinity_level) {
+       case 0: /* All affinity levels are valid */
+               affinity_mask &= ~0x0UL;
+               break;
+       case 1: /* Aff0 ignored */
+               affinity_mask &= ~0xFFUL;
+               break;
+       case 2: /* Aff0 and Aff1 ignored */
+               affinity_mask &= ~0xFFFFUL;

arch/arm/kvm/psci.c +42 -3

+}
+
 static void kvm_psci_vcpu_off(struct kvm_vcpu *vcpu)
 {
        vcpu->arch.pause = true;

@@ -85,6 +110,42 @@ static unsigned long kvm_psci_vcpu_on(struct kvm_vcpu *source_vcpu)
        return PSCI_RET_SUCCESS;
 }
 
+static unsigned long kvm_psci_vcpu_affinity_info(struct kvm_vcpu *vcpu)
+{
+       int i;
+       unsigned long mpidr;
+       unsigned long target_affinity;
+       unsigned long target_affinity_mask;
+       unsigned long lowest_affinity_level;
+       struct kvm *kvm = vcpu->kvm;
+       struct kvm_vcpu *tmp;
+
+       target_affinity = *vcpu_reg(vcpu, 1);
+       lowest_affinity_level = *vcpu_reg(vcpu, 2);
+
+       /* Determine target affinity mask */
+       target_affinity_mask = psci_affinity_mask(lowest_affinity_level);
+       if (!target_affinity_mask)
+               return PSCI_RET_INVALID_PARAMS;
+
+       /* Ignore other bits of target affinity */
+       target_affinity &= target_affinity_mask;
+
+       /*
+        * If one or more VCPU matching target affinity are running
+        * then return 0 (ON) else return 1 (OFF)
+        */
+       kvm_for_each_vcpu(i, tmp, kvm) {
+               mpidr = kvm_vcpu_get_mpidr(tmp);
+               if (((mpidr & target_affinity_mask) == target_affinity) &&
+                   !tmp->arch.pause) {
+                       return 0;
+               }
+       }
+
+       return 1;
+}
+
 static inline void kvm_prepare_system_event(struct kvm_vcpu *vcpu, u32 type)
 {
        memset(&vcpu->run->system_event, 0, sizeof(vcpu->run->system_event));

@@ -132,6 +193,10 @@ static int kvm_psci_0_2_call(struct kvm_vcpu *vcpu)
        case PSCI_0_2_FN64_CPU_ON:
                val = kvm_psci_vcpu_on(vcpu);
                break;
+       case PSCI_0_2_FN_AFFINITY_INFO:
+       case PSCI_0_2_FN64_AFFINITY_INFO:
+               val = kvm_psci_vcpu_affinity_info(vcpu);
+               break;
        case PSCI_0_2_FN_SYSTEM_OFF:
                kvm_psci_system_off(vcpu);
                val = PSCI_RET_SUCCESS;

@@ -143,12 +208,10 @@ static int kvm_psci_0_2_call(struct kvm_vcpu *vcpu)
                ret = 0;
                break;
        case PSCI_0_2_FN_CPU_SUSPEND:
-       case PSCI_0_2_FN_AFFINITY_INFO:
        case PSCI_0_2_FN_MIGRATE:
        case PSCI_0_2_FN_MIGRATE_INFO_TYPE:
        case PSCI_0_2_FN_MIGRATE_INFO_UP_CPU:
        case PSCI_0_2_FN64_CPU_SUSPEND:
-       case PSCI_0_2_FN64_AFFINITY_INFO:
        case PSCI_0_2_FN64_MIGRATE:
        case PSCI_0_2_FN64_MIGRATE_INFO_UP_CPU:
                val = PSCI_RET_NOT_SUPPORTED;
--

1.7.9.5

_______________________________________________
kvmarm mailing list
kvmarm at lists.cs.columbia.edu
https://lists.cs.columbia.edu/mailman/listinfo/kvmarm

Quoted 32 lines · Anup Patel

This patch adds emulation of PSCI v0.2 AFFINITY_INFO function call for KVM ARM/ARM64. This is a VCPU-level function call which will be used to determine current state of given affinity level.

Signed-off-by Anup Patel <[email protected]>

Signed-off-by Pranavkumar Sawargaonkar <[email protected]>

Reviewed-by Christoffer Dall <[email protected]>

---
 arch/arm/kvm/psci.c |   67 +++++++++++++++++++++++++++++++++++++++++++++++++--
 1 file changed, 65 insertions(+), 2 deletions(-)

arch/arm/kvm/psci.c +13 -0

index b964aa4..5fccf0b 100644
@@ -27,6 +27,31 @@
  * as described in ARM document number ARM DEN 0022A.
  */
 
+static unsigned long psci_affinity_mask(unsigned long affinity_level)
+{
+       unsigned long affinity_mask = MPIDR_HWID_BITMASK;
+
+       switch (affinity_level) {
+       case 0: /* All affinity levels are valid */
+               affinity_mask &= ~0x0UL;
+               break;
+       case 1: /* Aff0 ignored */
+               affinity_mask &= ~0xFFUL;
+               break;
+       case 2: /* Aff0 and Aff1 ignored */
+               affinity_mask &= ~0xFFFFUL;

arch/arm/kvm/psci.c line 52

Quoted 10 lines

arch/arm/kvm/psci.c +10 -0

+               break;
+       case 3: /* Aff0, Aff1, and Aff2 ignored */
+               affinity_mask &= ~0xFFFFFFUL;
+               break;
+       default:
+               affinity_mask = 0;
+               break;
+       };
+
+       return affinity_mask;

This function can be written as:

if (affinity_level <= 3)

    return MPIDR_HWID_BITMASK & ~GEN_MASK_ULL((affinity_level * 8) - 1, 0);

return 0;

Quoted 80 lines

arch/arm/kvm/psci.c +42 -3

+}
+
 static void kvm_psci_vcpu_off(struct kvm_vcpu *vcpu)
 {
        vcpu->arch.pause = true;

@@ -85,6 +110,42 @@ static unsigned long kvm_psci_vcpu_on(struct kvm_vcpu *source_vcpu)
        return PSCI_RET_SUCCESS;
 }
 
+static unsigned long kvm_psci_vcpu_affinity_info(struct kvm_vcpu *vcpu)
+{
+       int i;
+       unsigned long mpidr;
+       unsigned long target_affinity;
+       unsigned long target_affinity_mask;
+       unsigned long lowest_affinity_level;
+       struct kvm *kvm = vcpu->kvm;
+       struct kvm_vcpu *tmp;
+
+       target_affinity = *vcpu_reg(vcpu, 1);
+       lowest_affinity_level = *vcpu_reg(vcpu, 2);
+
+       /* Determine target affinity mask */
+       target_affinity_mask = psci_affinity_mask(lowest_affinity_level);
+       if (!target_affinity_mask)
+               return PSCI_RET_INVALID_PARAMS;
+
+       /* Ignore other bits of target affinity */
+       target_affinity &= target_affinity_mask;
+
+       /*
+        * If one or more VCPU matching target affinity are running
+        * then return 0 (ON) else return 1 (OFF)
+        */
+       kvm_for_each_vcpu(i, tmp, kvm) {
+               mpidr = kvm_vcpu_get_mpidr(tmp);
+               if (((mpidr & target_affinity_mask) == target_affinity) &&
+                   !tmp->arch.pause) {
+                       return 0;
+               }
+       }
+
+       return 1;
+}
+
 static inline void kvm_prepare_system_event(struct kvm_vcpu *vcpu, u32 type)
 {
        memset(&vcpu->run->system_event, 0, sizeof(vcpu->run->system_event));

@@ -132,6 +193,10 @@ static int kvm_psci_0_2_call(struct kvm_vcpu *vcpu)
        case PSCI_0_2_FN64_CPU_ON:
                val = kvm_psci_vcpu_on(vcpu);
                break;
+       case PSCI_0_2_FN_AFFINITY_INFO:
+       case PSCI_0_2_FN64_AFFINITY_INFO:
+               val = kvm_psci_vcpu_affinity_info(vcpu);
+               break;
        case PSCI_0_2_FN_SYSTEM_OFF:
                kvm_psci_system_off(vcpu);
                val = PSCI_RET_SUCCESS;

@@ -143,12 +208,10 @@ static int kvm_psci_0_2_call(struct kvm_vcpu *vcpu)
                ret = 0;
                break;
        case PSCI_0_2_FN_CPU_SUSPEND:
-       case PSCI_0_2_FN_AFFINITY_INFO:
        case PSCI_0_2_FN_MIGRATE:
        case PSCI_0_2_FN_MIGRATE_INFO_TYPE:
        case PSCI_0_2_FN_MIGRATE_INFO_UP_CPU:
        case PSCI_0_2_FN64_CPU_SUSPEND:
-       case PSCI_0_2_FN64_AFFINITY_INFO:
        case PSCI_0_2_FN64_MIGRATE:
        case PSCI_0_2_FN64_MIGRATE_INFO_UP_CPU:
                val = PSCI_RET_NOT_SUPPORTED;
--

1.7.9.5

_______________________________________________
kvmarm mailing list
kvmarm at lists.cs.columbia.edu
https://lists.cs.columbia.edu/mailman/listinfo/kvmarm

This patch adds emulation of PSCI v0.2 MIGRATE, MIGRATE_INFO_TYPE, and MIGRATE_INFO_UP_CPU function calls for KVM ARM/ARM64.

KVM ARM/ARM64 being a hypervisor (and not a Trusted OS), we cannot provide this functions hence we emulate these functions in following way:
1. MIGRATE - Returns "Not Supported"
2. MIGRATE_INFO_TYPE - Return 2 i.e. Trusted OS is either not present or does not require migration
3. MIGRATE_INFO_UP_CPU - Returns "Not Supported"

Signed-off-by Anup Patel <[email protected]>

Signed-off-by Pranavkumar Sawargaonkar <[email protected]>

Reviewed-by Christoffer Dall <[email protected]>

---
 arch/arm/kvm/psci.c |   20 +++++++++++++++-----
 1 file changed, 15 insertions(+), 5 deletions(-)

arch/arm/kvm/psci.c +0 -0

index 5fccf0b..d8335da 100644
@@ -197,6 +197,21 @@ static int kvm_psci_0_2_call(struct kvm_vcpu *vcpu)
        case PSCI_0_2_FN64_AFFINITY_INFO:
                val = kvm_psci_vcpu_affinity_info(vcpu);
                break;

arch/arm/kvm/psci.c +5 -6

+               break;
+       case PSCI_0_2_FN_MIGRATE_INFO_UP_CPU:
+       case PSCI_0_2_FN64_MIGRATE_INFO_UP_CPU:
+               val = PSCI_RET_NOT_SUPPORTED;
+               break;
        case PSCI_0_2_FN_SYSTEM_OFF:
                kvm_psci_system_off(vcpu);
                val = PSCI_RET_SUCCESS;

@@ -208,12 +223,7 @@ static int kvm_psci_0_2_call(struct kvm_vcpu *vcpu)
                ret = 0;
                break;
        case PSCI_0_2_FN_CPU_SUSPEND:
-       case PSCI_0_2_FN_MIGRATE:
-       case PSCI_0_2_FN_MIGRATE_INFO_TYPE:
-       case PSCI_0_2_FN_MIGRATE_INFO_UP_CPU:
        case PSCI_0_2_FN64_CPU_SUSPEND:
-       case PSCI_0_2_FN64_MIGRATE:
-       case PSCI_0_2_FN64_MIGRATE_INFO_UP_CPU:
                val = PSCI_RET_NOT_SUPPORTED;
                break;
        default:
--

1.7.9.5

_______________________________________________
kvmarm mailing list
kvmarm at lists.cs.columbia.edu
https://lists.cs.columbia.edu/mailman/listinfo/kvmarm

Quoted 10 lines · Anup Patel

This patch adds emulation of PSCI v0.2 MIGRATE, MIGRATE_INFO_TYPE, and MIGRATE_INFO_UP_CPU function calls for KVM ARM/ARM64.

KVM ARM/ARM64 being a hypervisor (and not a Trusted OS), we cannot provide this functions hence we emulate these functions in following way:
1. MIGRATE - Returns "Not Supported"
2. MIGRATE_INFO_TYPE - Return 2 i.e. Trusted OS is either not present or does not require migration
3. MIGRATE_INFO_UP_CPU - Returns "Not Supported"

Quoted 3 lines

Signed-off-by Anup Patel <[email protected]>

Signed-off-by Pranavkumar Sawargaonkar <[email protected]>

Reviewed-by Christoffer Dall <[email protected]>

One minor thing below, otherwise:

Acked-by Rob Herring <[email protected]>

Quoted 16 lines

---
 arch/arm/kvm/psci.c |   20 +++++++++++++++-----
 1 file changed, 15 insertions(+), 5 deletions(-)

arch/arm/kvm/psci.c +4 -0

index 5fccf0b..d8335da 100644
@@ -197,6 +197,21 @@ static int kvm_psci_0_2_call(struct kvm_vcpu *vcpu)
        case PSCI_0_2_FN64_AFFINITY_INFO:
                val = kvm_psci_vcpu_affinity_info(vcpu);
                break;
+       case PSCI_0_2_FN_MIGRATE:
+       case PSCI_0_2_FN64_MIGRATE:
+               val = PSCI_RET_NOT_SUPPORTED;
+               break;

arch/arm/kvm/psci.c static int kvm_psci_0_2_call(struct kvm_vcpu *vcpu) · line 209

Quoted 6 lines

arch/arm/kvm/psci.c +6 -0

+       case PSCI_0_2_FN_MIGRATE_INFO_TYPE:
+               /*
+                * Trusted OS is either not present or
+                * does not require migration
+                */
+               val = 2;

This value should be defined int psci.h along with other possible values.

Quoted 25 lines

arch/arm/kvm/psci.c +5 -6

+               break;
+       case PSCI_0_2_FN_MIGRATE_INFO_UP_CPU:
+       case PSCI_0_2_FN64_MIGRATE_INFO_UP_CPU:
+               val = PSCI_RET_NOT_SUPPORTED;
+               break;
        case PSCI_0_2_FN_SYSTEM_OFF:
                kvm_psci_system_off(vcpu);
                val = PSCI_RET_SUCCESS;

@@ -208,12 +223,7 @@ static int kvm_psci_0_2_call(struct kvm_vcpu *vcpu)
                ret = 0;
                break;
        case PSCI_0_2_FN_CPU_SUSPEND:
-       case PSCI_0_2_FN_MIGRATE:
-       case PSCI_0_2_FN_MIGRATE_INFO_TYPE:
-       case PSCI_0_2_FN_MIGRATE_INFO_UP_CPU:
        case PSCI_0_2_FN64_CPU_SUSPEND:
-       case PSCI_0_2_FN64_MIGRATE:
-       case PSCI_0_2_FN64_MIGRATE_INFO_UP_CPU:
                val = PSCI_RET_NOT_SUPPORTED;
                break;
        default:
--

1.7.9.5

Quoted 4 lines

_______________________________________________
kvmarm mailing list
kvmarm at lists.cs.columbia.edu
https://lists.cs.columbia.edu/mailman/listinfo/kvmarm

As-per PSCI v0.2, the source CPU provides physical address of "entry point" and "context id" for starting a target CPU. Also, if target CPU is already running then we should return ALREADY_ON.

Current emulation of CPU_ON function does not consider physical address of "context id" and returns INVALID_PARAMETERS if target CPU is already running.

This patch updates kvm_psci_vcpu_on() such that it works for both PSCI v0.1 and PSCI v0.2.

Signed-off-by Anup Patel <[email protected]>

Signed-off-by Pranavkumar Sawargaonkar <[email protected]>

Reviewed-by Christoffer Dall <[email protected]>

---
 arch/arm/kvm/psci.c |   12 +++++++++++-
 1 file changed, 11 insertions(+), 1 deletion(-)

arch/arm/kvm/psci.c +0 -0

index d8335da..fdbd829 100644

Quoted 27 lines · Anup Patel

As-per PSCI v0.2, the source CPU provides physical address of "entry point" and "context id" for starting a target CPU. Also, if target CPU is already running then we should return ALREADY_ON.

Current emulation of CPU_ON function does not consider physical address of "context id" and returns INVALID_PARAMETERS if target CPU is already running.

This patch updates kvm_psci_vcpu_on() such that it works for both PSCI v0.1 and PSCI v0.2.

Signed-off-by Anup Patel <[email protected]>

Signed-off-by Pranavkumar Sawargaonkar <[email protected]>

Reviewed-by Christoffer Dall <[email protected]>

---
 arch/arm/kvm/psci.c |   12 +++++++++++-
 1 file changed, 11 insertions(+), 1 deletion(-)

arch/arm/kvm/psci.c +0 -0

index d8335da..fdbd829 100644
@@ -101,6 +109,8 @@ static unsigned long kvm_psci_vcpu_on(struct kvm_vcpu *source_vcpu)
                kvm_vcpu_set_be(vcpu);
 

arch/arm/kvm/psci.c static unsigned long kvm_psci_vcpu_on(struct kvm_vcpu *source_vcpu) · line 113

Quoted 3 lines

arch/arm/kvm/psci.c +2 -0

        *vcpu_pc(vcpu) = target_pc;
+       if (kvm_psci_version(source_vcpu) != KVM_ARM_PSCI_0_1)
+               *vcpu_reg(vcpu, 0) = context_id;

This could be done unconditionally. The register value is undefined for 0.1, so whatever was in r3/x3 meets that requirement.

Rob

This patch adds emulation of PSCI v0.2 CPU_SUSPEND function call for KVM ARM/ARM64. This is a CPU-level function call which can suspend current CPU or current CPU cluster. We don't have VCPU clusters in KVM so we only suspend the current VCPU.

The CPU_SUSPEND emulation is not tested much because currently there is no CPUIDLE driver in Linux kernel that uses PSCI CPU_SUSPEND. The PSCI CPU_SUSPEND implementation in ARM64 kernel was tested using a Simple CPUIDLE driver which is not published due to unstable DT-bindings for PSCI.
(For more info, http://lwn.net/Articles/574950/)

Even if we had stable DT-bindings for PSCI and CPUIDLE driver that uses PSCI CPU_SUSPEND then still we need to define SUSPEND states and WAKEUP events for KVM ARM/ARM64.

Due to above, we implement CPU_SUSPEND emulation similar to WFI (Wait-for-interrupt) emulation and we also treat power-down request to be same as stand-by request. This is also consistent with section 5.4.1 and section 5.4.2 of PSCI v0.2 specification.

Signed-off-by Anup Patel <[email protected]>

Signed-off-by Pranavkumar Sawargaonkar <[email protected]>

---
 arch/arm/kvm/psci.c |   27 +++++++++++++++++++++++----
 1 file changed, 23 insertions(+), 4 deletions(-)

arch/arm/kvm/psci.c +0 -0

index fdbd829..74fa4ad 100644
@@ -52,6 +52,25 @@ static unsigned long psci_affinity_mask(unsigned long affinity_level)
 	return affinity_mask;

arch/arm/kvm/psci.c +15 -4

+	 *
+	 * Further, we also treat power-down request to be same as
+	 * stand-by request as-per section 5.4.2 clause 3 of PSCI v0.2
+	 * specification (ARM DEN 0022A). This means all suspend states
+	 * for KVM PSCI emulation will preserve the register state.
+	 */
+	kvm_vcpu_block(vcpu);
+
+	return PSCI_RET_SUCCESS;
+}
+
 static void kvm_psci_vcpu_off(struct kvm_vcpu *vcpu)
 {
 	vcpu->arch.pause = true;

@@ -195,6 +214,10 @@ static int kvm_psci_0_2_call(struct kvm_vcpu *vcpu)
 		 */
 		val = 2;
 		break;
+	case PSCI_0_2_FN_CPU_SUSPEND:
+	case PSCI_0_2_FN64_CPU_SUSPEND:
+		val = kvm_psci_vcpu_suspend(vcpu);
+		break;
 	case PSCI_0_2_FN_CPU_OFF:
 		kvm_psci_vcpu_off(vcpu);
 		val = PSCI_RET_SUCCESS;

@@ -232,10 +255,6 @@ static int kvm_psci_0_2_call(struct kvm_vcpu *vcpu)
 		val = PSCI_RET_SUCCESS;
 		ret = 0;
 		break;
-	case PSCI_0_2_FN_CPU_SUSPEND:
-	case PSCI_0_2_FN64_CPU_SUSPEND:
-		val = PSCI_RET_NOT_SUPPORTED;
-		break;
 	default:
 		return -EINVAL;
 	}

Signature · 1 line

1.7.9.5

Quoted 35 lines · Anup Patel

This patch adds emulation of PSCI v0.2 CPU_SUSPEND function call for KVM ARM/ARM64. This is a CPU-level function call which can suspend current CPU or current CPU cluster. We don't have VCPU clusters in KVM so we only suspend the current VCPU.

The CPU_SUSPEND emulation is not tested much because currently there is no CPUIDLE driver in Linux kernel that uses PSCI CPU_SUSPEND. The PSCI CPU_SUSPEND implementation in ARM64 kernel was tested using a Simple CPUIDLE driver which is not published due to unstable DT-bindings for PSCI.
(For more info, http://lwn.net/Articles/574950/)

Even if we had stable DT-bindings for PSCI and CPUIDLE driver that uses PSCI CPU_SUSPEND then still we need to define SUSPEND states and WAKEUP events for KVM ARM/ARM64.

Due to above, we implement CPU_SUSPEND emulation similar to WFI (Wait-for-interrupt) emulation and we also treat power-down request to be same as stand-by request. This is also consistent with section 5.4.1 and section 5.4.2 of PSCI v0.2 specification.

Signed-off-by Anup Patel <[email protected]>

Signed-off-by Pranavkumar Sawargaonkar <[email protected]>

---
 arch/arm/kvm/psci.c |   27 +++++++++++++++++++++++----
 1 file changed, 23 insertions(+), 4 deletions(-)

arch/arm/kvm/psci.c +0 -0

index fdbd829..74fa4ad 100644
@@ -52,6 +52,25 @@ static unsigned long psci_affinity_mask(unsigned long affinity_level)
      return affinity_mask;
 }
 

arch/arm/kvm/psci.c static unsigned long psci_affinity_mask(unsigned long affinity_level) · line 62

Quoted 8 lines

arch/arm/kvm/psci.c +8 -0

+static unsigned long kvm_psci_vcpu_suspend(struct kvm_vcpu *vcpu)
+{
+     /*
+      * NOTE: Currently, we don't have any wakeup events for KVM
+      * so for simplicity we make VCPU suspend emulation to be
+      * same-as WFI (Wait-for-interrupt) emulation. This is also
+      * consistent with intended use of StateID as described in
+      * section 5.4.1 of PSCI v0.2 specification (ARM DEN 0022A).

The WFI implementation wakes up on interrupts, so we are inherently defining that as a wakeup event for KVM with this patch, so the comment should be adjusted accordingly.

-Christoffer

Quoted 39 lines

arch/arm/kvm/psci.c +15 -5

+      *
+      * Further, we also treat power-down request to be same as
+      * stand-by request as-per section 5.4.2 clause 3 of PSCI v0.2
+      * specification (ARM DEN 0022A). This means all suspend states
+      * for KVM PSCI emulation will preserve the register state.
+      */
+     kvm_vcpu_block(vcpu);
+
+     return PSCI_RET_SUCCESS;
+}
+
 static void kvm_psci_vcpu_off(struct kvm_vcpu *vcpu)
 {
      vcpu->arch.pause = true;

@@ -195,6 +214,10 @@ static int kvm_psci_0_2_call(struct kvm_vcpu *vcpu)
               */
              val = 2;
              break;
+     case PSCI_0_2_FN_CPU_SUSPEND:
+     case PSCI_0_2_FN64_CPU_SUSPEND:
+             val = kvm_psci_vcpu_suspend(vcpu);
+             break;
      case PSCI_0_2_FN_CPU_OFF:
              kvm_psci_vcpu_off(vcpu);
              val = PSCI_RET_SUCCESS;

@@ -232,10 +255,6 @@ static int kvm_psci_0_2_call(struct kvm_vcpu *vcpu)
              val = PSCI_RET_SUCCESS;
              ret = 0;
              break;
-     case PSCI_0_2_FN_CPU_SUSPEND:
-     case PSCI_0_2_FN64_CPU_SUSPEND:
-             val = PSCI_RET_NOT_SUPPORTED;
-             break;
      default:
              return -EINVAL;
      }
--

1.7.9.5

Currently, KVM ARM/ARM64 only provides in-kernel emulation of Power State and Coordination Interface (PSCI) v0.1.

This patchset aims at providing newer PSCI v0.2 for KVM ARM/ARM64 VCPUs such that it does not break current KVM ARM/ARM64 ABI.

The user space tools (i.e. QEMU or KVMTOOL) will have to explicitly enable KVM_ARM_VCPU_PSCI_0_2 feature using KVM_ARM_VCPU_INIT ioctl for providing PSCI v0.2 to VCPUs.