Skip to contentSkip to conversation

CCF support for Renesas r7s72100

PATCH Superseded Wolfram Sang 7 participants 26 messages Apr 29, 2014 – May 14, 2014

Subsystems (7)

v4 of 6 Superseded Latest is v6 →

lore
Share & tools
lore
#0 lore raw

v4 cover CCF support for Renesas r7s72100

This series moves the r7s72100 platfrom from the legacy clock implementation to the common clock framework.

This series has been tested with the renesas-devel-v3.15-rc2-20140428 tag. If you want to boot into a console, you have a runtime dependency [1].

Changes since V4:

* only use dt alias for scif2

Changes since V3:

* rebased and tested against latest renesas/devel-tag
* using the new "clock-indices" binding
* reordered patches to skip the workaround entry for scif2
* moved serial aliases from the dtsi to the board file (and kept the numbering according to the legacy board code)
* updated my email-address

The workaround in the last patch could be avoided once the DT patches for MTU2 are available. Or we include the patch right now and clean the little bit up later in an incremental fashion. Please apply.

Thanks,

Wolfram

PS: A tree can be found here with this series and the dependency patch:

git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux.git renesas/r7s-ccf

[1] http://www.spinics.net/lists/linux-sh/msg30918.html (clk: shmobile: clk-mstp: change to using clock-indices)

Wolfram Sang (11):
ARM: shmobile: r7s72100: document MSTP clock support
ARM: shmobile: r7s72100: add essential clock nodes to dtsi
ARM: shmobile: r7s72100: genmai: populate nodes for external clocks
ARM: shmobile: r7s72100: add scif nodes to dtsi
ARM: shmobile: r7s72100: genmai: add uart aliases and activate scif2
as console
ARM: shmobile: r7s72100: genmai: platform scif devices only for legacy
support
ARM: shmobile: r7s72100: add i2c clocks to dtsi
ARM: shmobile: r7s72100: remove I2C DT clocks from legacy clock
support
ARM: shmobile: r7s72100: add spi clocks to dtsi
ARM: shmobile: r7s72100: remove SPI DT clocks from legacy clock
support
ARM: shmobile: r7s72100: use workaround for non DT-clocks

 .../bindings/clock/renesas,cpg-mstp-clocks.txt     |   1 +
 arch/arm/boot/dts/r7s72100-genmai-reference.dts    |  26 ++-
 arch/arm/boot/dts/r7s72100.dtsi                    | 215 ++++++++++++++++++++-
 arch/arm/mach-shmobile/board-genmai-reference.c    |  14 +-
 arch/arm/mach-shmobile/board-genmai.c              |  44 +++++
 arch/arm/mach-shmobile/clock-r7s72100.c            |   9 -
 arch/arm/mach-shmobile/setup-r7s72100.c            |  43 -----
 include/dt-bindings/clock/r7s72100-clock.h         |  41 ++++
 8 files changed, 337 insertions(+), 56 deletions(-)
 create mode 100644 include/dt-bindings/clock/r7s72100-clock.h
Signature · 1 line
1.9.2
#1 lore raw

PATCH v5 1/11 ARM: shmobile: r7s72100: document MSTP clock support

From: Wolfram Sang <[email protected]>

---
 Documentation/devicetree/bindings/clock/renesas,cpg-mstp-clocks.txt | 1 +
 1 file changed, 1 insertion(+)
Documentation/devicetree/bindings/clock/renesas,cpg-mstp-clocks.txt +1 -0
index 02a25d99ca61..6c3c0847e4fd 100644
@@ -10,6 +10,7 @@ index in the group, from 0 to 31.
 Required Properties:
 
   - compatible: Must be one of the following
+    - "renesas,r7s72100-mstp-clocks" for R7S72100 (RZ) MSTP gate clocks
     - "renesas,r8a7790-mstp-clocks" for R8A7790 (R-Car H2) MSTP gate clocks
     - "renesas,r8a7791-mstp-clocks" for R8A7791 (R-Car M2) MSTP gate clocks
     - "renesas,cpg-mstp-clock" for generic MSTP gate clocks
Signature · 1 line
1.9.2
#2 lore raw

PATCH v5 1/11 ARM: shmobile: r7s72100: document MSTP clock support

Quoted 21 lines · Wolfram Sang

From: Wolfram Sang <[email protected]>

---
 Documentation/devicetree/bindings/clock/renesas,cpg-mstp-clocks.txt | 1 +
 1 file changed, 1 insertion(+)
Documentation/devicetree/bindings/clock/renesas,cpg-mstp-clocks.txt +1 -0
index 02a25d99ca61..6c3c0847e4fd 100644
@@ -10,6 +10,7 @@ index in the group, from 0 to 31.
 Required Properties:
 
   - compatible: Must be one of the following
+    - "renesas,r7s72100-mstp-clocks" for R7S72100 (RZ) MSTP gate clocks
     - "renesas,r8a7790-mstp-clocks" for R8A7790 (R-Car H2) MSTP gate clocks
     - "renesas,r8a7791-mstp-clocks" for R8A7791 (R-Car M2) MSTP gate clocks
     - "renesas,cpg-mstp-clock" for generic MSTP gate clocks
Signature · 1 line
1.9.2

I believe that Mike Turquette (CCed) should take this.

I also believe that as it is relates to bindings it needs to be reviewed by the devicetree people (CCed). (Please correct me if I am wrong.)

#3 lore raw

PATCH v5 1/11 ARM: shmobile: r7s72100: document MSTP clock support

Quoted 25 lines · Simon Horman
Quoted 20 lines · Wolfram Sang

From: Wolfram Sang <[email protected]>

---
 Documentation/devicetree/bindings/clock/renesas,cpg-mstp-clocks.txt | 1 +
 1 file changed, 1 insertion(+)
Documentation/devicetree/bindings/clock/renesas,cpg-mstp-clocks.txt +1 -1
index 02a25d99ca61..6c3c0847e4fd 100644
@@ -10,6 +10,7 @@ index in the group, from 0 to 31.
 Required Properties:
 
   - compatible: Must be one of the following
+    - "renesas,r7s72100-mstp-clocks" for R7S72100 (RZ) MSTP gate clocks
     - "renesas,r8a7790-mstp-clocks" for R8A7790 (R-Car H2) MSTP gate clocks
     - "renesas,r8a7791-mstp-clocks" for R8A7791 (R-Car M2) MSTP gate clocks
     - "renesas,cpg-mstp-clock" for generic MSTP gate clocks
--
Quoted 1 line

1.9.2

I believe that Mike Turquette (CCed) should take this.

Quoted 3 lines

I also believe that as it is relates to bindings it needs to be reviewed by the devicetree people (CCed). (Please correct me if I am wrong.)

You're correct, but this change is fairly trivial.

Gr{oetje,eeting}s,

Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds

#4 lore raw

PATCH v5 1/11 ARM: shmobile: r7s72100: document MSTP clock support

In reply to Wolfram Sang

Quoting Wolfram Sang (2014-04-29 03:03:32)

Quoted 3 lines

From: Wolfram Sang <[email protected]>

No need to take this through the clk tree. Feel free to send it with the rest through arm-soc.

Regards,
Mike

Quoted 24 lines
---
 Documentation/devicetree/bindings/clock/renesas,cpg-mstp-clocks.txt | 1 +
 1 file changed, 1 insertion(+)
Documentation/devicetree/bindings/clock/renesas,cpg-mstp-clocks.txt +1 -0
index 02a25d99ca61..6c3c0847e4fd 100644
@@ -10,6 +10,7 @@ index in the group, from 0 to 31.
 Required Properties:
 
   - compatible: Must be one of the following
+    - "renesas,r7s72100-mstp-clocks" for R7S72100 (RZ) MSTP gate clocks
     - "renesas,r8a7790-mstp-clocks" for R8A7790 (R-Car H2) MSTP gate clocks
     - "renesas,r8a7791-mstp-clocks" for R8A7791 (R-Car M2) MSTP gate clocks
     - "renesas,cpg-mstp-clock" for generic MSTP gate clocks
Signature · 7 lines
1.9.2


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel at lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
#5 lore raw

PATCH v5 1/11 ARM: shmobile: r7s72100: document MSTP clock support

Quoted 9 lines · Mike Turquette

Quoting Wolfram Sang (2014-04-29 03:03:32)

Quoted 3 lines

From: Wolfram Sang <[email protected]>

No need to take this through the clk tree. Feel free to send it with the rest through arm-soc.

Thanks Mike.

Wolfram,

Its a getting a little to close to rc6 for me to take this series for v3.16, especially considering some bits seem to need tweaking (I am thinking of sci).

Could you either:

* Re-post it without the sci changes and
I'll look at queuing it up for v3.17 or;
* Re-post it with the sci changes once the sci driver changes have filtered through.

Quoted 32 lines

Regards,
Mike

Quoted 24 lines
---
 Documentation/devicetree/bindings/clock/renesas,cpg-mstp-clocks.txt | 1 +
 1 file changed, 1 insertion(+)
Documentation/devicetree/bindings/clock/renesas,cpg-mstp-clocks.txt +1 -0
index 02a25d99ca61..6c3c0847e4fd 100644
@@ -10,6 +10,7 @@ index in the group, from 0 to 31.
 Required Properties:
 
   - compatible: Must be one of the following
+    - "renesas,r7s72100-mstp-clocks" for R7S72100 (RZ) MSTP gate clocks
     - "renesas,r8a7790-mstp-clocks" for R8A7790 (R-Car H2) MSTP gate clocks
     - "renesas,r8a7791-mstp-clocks" for R8A7791 (R-Car M2) MSTP gate clocks
     - "renesas,cpg-mstp-clock" for generic MSTP gate clocks
Signature · 7 lines
1.9.2


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel at lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

--
To unsubscribe from this list: send the line "unsubscribe linux-sh" in the body of a message to majordomo at vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html

#6 lore raw

PATCH v5 1/11 ARM: shmobile: r7s72100: document MSTP clock support

Simon,

Quoted 7 lines

Its a getting a little to close to rc6 for me to take this series for v3.16, especially considering some bits seem to need tweaking (I am thinking of sci).

Could you either:

* Re-post it without the sci changes and
I'll look at queuing it up for v3.17 or;

If it is possible and does not cause too much burden for you, I'd prefer to include it soonish and handle the fixups incrementally. Since it touches a few files which change a lot, rebasing and retesting is extra work (done twice for this series IIRC) and thus I'd prefer to do the clenaups as seperate patches.

So, if no one objects, I'll resend tomorrow with Geerts fixup folded into my series and retested against latest renesas/devel.

-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 836 bytes
Desc: Digital signature
URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20140513/6c609e84/attachment.sig>

#7 lore raw

PATCH v5 1/11 ARM: shmobile: r7s72100: document MSTP clock support

Quoted 10 lines · Wolfram Sang

Simon,

Quoted 7 lines

Its a getting a little to close to rc6 for me to take this series for v3.16, especially considering some bits seem to need tweaking (I am thinking of sci).

Could you either:

* Re-post it without the sci changes and
I'll look at queuing it up for v3.17 or;

Quoted 8 lines

If it is possible and does not cause too much burden for you, I'd prefer to include it soonish and handle the fixups incrementally. Since it touches a few files which change a lot, rebasing and retesting is extra work (done twice for this series IIRC) and thus I'd prefer to do the clenaups as seperate patches.

So, if no one objects, I'll resend tomorrow with Geerts fixup folded into my series and retested against latest renesas/devel.

I will do my best. But I need to have pull-requests sent off to the arm-soc maintainers before rc6 appears. And ideally patches should have been present in next for a day before I send such a request. So by my calculations I need to push things to my next tree very soon (i.e. today) in order to reach the above mentioned criteria.

#8 lore raw

PATCH v5 1/11 ARM: shmobile: r7s72100: document MSTP clock support

Quoted 5 lines

I will do my best. But I need to have pull-requests sent off to the arm-soc maintainers before rc6 appears. And ideally patches should have been present in next for a day before I send such a request. So by my calculations I need to push things to my next tree very soon (i.e. today) in order to reach the above mentioned criteria.

Thank you very much! Luckily(?) I can't sleep today, so I'll send the patches tested against renesas/devel in a few minutes.

-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 836 bytes
Desc: Digital signature
URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20140514/67dc00b0/attachment.sig>

#9 lore raw

PATCH v5 1/11 ARM: shmobile: r7s72100: document MSTP clock support

Quoted 8 lines · Wolfram Sang
Quoted 5 lines

I will do my best. But I need to have pull-requests sent off to the arm-soc maintainers before rc6 appears. And ideally patches should have been present in next for a day before I send such a request. So by my calculations I need to push things to my next tree very soon (i.e. today) in order to reach the above mentioned criteria.

Thank you very much! Luckily(?) I can't sleep today, so I'll send the patches tested against renesas/devel in a few minutes.

Luckily ! :^)

I see the new series and am queuing it up.
So far, so good :)

#10 lore raw

PATCH v5 1/11 ARM: shmobile: r7s72100: document MSTP clock support

In reply to Mike Turquette

Hi Mike, Stephen,

Quoted 9 lines · Mike Turquette

Quoting Wolfram Sang (2014-04-29 03:03:32)

Quoted 3 lines

From: Wolfram Sang <[email protected]>

No need to take this through the clk tree. Feel free to send it with the rest through arm-soc.

(merging in clk/clk-next)

Note that this will cause a conflict for you, as Mike applied commit 5483bf698f42a6f0467463b064084eb888298232 ("clk: shmobile: r8a7779:
Add MSTP clock support"), which adds a line at the exact same spot.

Resolution: both lines should be kept.

Gr{oetje,eeting}s,

Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds

#11 lore raw

PATCH v5 1/11 ARM: shmobile: r7s72100: document MSTP clock support

Hi Geert,

Quoted 12 lines · On Wed, 14 May 2014 12:26:38 +0200 Geert Uytterhoeven <[email protected]>…
Quoted 9 lines · Mike Turquette

Quoting Wolfram Sang (2014-04-29 03:03:32)

Quoted 3 lines

From: Wolfram Sang <[email protected]>

No need to take this through the clk tree. Feel free to send it with the rest through arm-soc.

Quoted 7 lines

(merging in clk/clk-next)

Note that this will cause a conflict for you, as Mike applied commit 5483bf698f42a6f0467463b064084eb888298232 ("clk: shmobile: r8a7779:
Add MSTP clock support"), which adds a line at the exact same spot.

Resolution: both lines should be kept.

Thanks.

Signature · 9 lines
Cheers,
Stephen Rothwell                    sfr at canb.auug.org.au
-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 836 bytes
Desc: not available
URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20140514/8a7768c7/attachment.sig>
#12 lore raw

PATCH v5 2/11 ARM: shmobile: r7s72100: add essential clock nodes to dtsi

In reply to Wolfram Sang

From: Wolfram Sang <[email protected]>

Only essential clocks are added for now. Other clocks will be added when needed.

---
 arch/arm/boot/dts/r7s72100.dtsi            | 86 +++++++++++++++++++++++++++++-
 include/dt-bindings/clock/r7s72100-clock.h | 28 ++++++++++
 2 files changed, 113 insertions(+), 1 deletion(-)
 create mode 100644 include/dt-bindings/clock/r7s72100-clock.h
arch/arm/boot/dts/r7s72100.dtsi +85 -1
index ee700717a34b..5a6e2481b567 100644
@@ -1,13 +1,15 @@
 /*
  * Device Tree Source for the r7s72100 SoC
  *
- * Copyright (C) 2013 Renesas Solutions Corp.
+ * Copyright (C) 2013-14 Renesas Solutions Corp.
+ * Copyright (C) 2014 Wolfram Sang, Sang Engineering <[email protected]>
  *
  * This file is licensed under the terms of the GNU General Public License
  * version 2.  This program is licensed "as is" without any warranty of any
  * kind, whether express or implied.
  */
 
+#include <dt-bindings/clock/r7s72100-clock.h>
 #include <dt-bindings/interrupt-controller/irq.h>
 
 / {
@@ -28,6 +30,88 @@
 		spi4 = &spi4;
 	};
 
+	clocks {
+		ranges;
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		/* External clocks */
+		extal_clk: extal_clk {
+			#clock-cells = <0>;
+			compatible = "fixed-clock";
+			/* If clk present, value must be set by board */
+			clock-frequency = <0>;
+			clock-output-names = "extal";
+		};
+
+		usb_x1_clk: usb_x1_clk {
+			#clock-cells = <0>;
+			compatible = "fixed-clock";
+			/* If clk present, value must be set by board */
+			clock-frequency = <0>;
+			clock-output-names = "usb_x1";
+		};
+
+		/* Special CPG clocks */
+		cpg_clocks: cpg_clocks at fcfe0000 {
+			#clock-cells = <1>;
+			compatible = "renesas,r7s72100-cpg-clocks",
+				     "renesas,rz-cpg-clocks";
+			reg = <0xfcfe0000 0x18>;
+			clocks = <&extal_clk>, <&usb_x1_clk>;
+			clock-output-names = "pll", "i", "g";
+		};
+
+		/* Fixed factor clocks */
+		b_clk: b_clk {
+			#clock-cells = <0>;
+			compatible = "fixed-factor-clock";
+			clocks = <&cpg_clocks R7S72100_CLK_PLL>;
+			clock-mult = <1>;
+			clock-div = <3>;
+			clock-output-names = "b";
+		};
+		p1_clk: p1_clk {
+			#clock-cells = <0>;
+			compatible = "fixed-factor-clock";
+			clocks = <&cpg_clocks R7S72100_CLK_PLL>;
+			clock-mult = <1>;
+			clock-div = <6>;
+			clock-output-names = "p1";
+		};
+		p0_clk: p0_clk {
+			#clock-cells = <0>;
+			compatible = "fixed-factor-clock";
+			clocks = <&cpg_clocks R7S72100_CLK_PLL>;
+			clock-mult = <1>;
+			clock-div = <12>;
+			clock-output-names = "p0";
+		};
+
+		/* MSTP clocks */
+		mstp3_clks: mstp3_clks at fcfe0420 {
+			#clock-cells = <1>;
+			compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
+			reg = <0xfcfe0420 4>;
+			clocks = <&p0_clk>;
+			clock-indices = <R7S72100_CLK_MTU2>;
+			clock-output-names = "mtu2";
+		};
+
+		mstp4_clks: mstp4_clks at fcfe0424 {
+			#clock-cells = <1>;
+			compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
+			reg = <0xfcfe0424 4>;
+			clocks = <&p1_clk>, <&p1_clk>, <&p1_clk>, <&p1_clk>,
+				 <&p1_clk>, <&p1_clk>, <&p1_clk>, <&p1_clk>;
+			clock-indices = <
+				R7S72100_CLK_SCIF0 R7S72100_CLK_SCIF1 R7S72100_CLK_SCIF2 R7S72100_CLK_SCIF3
+				R7S72100_CLK_SCIF4 R7S72100_CLK_SCIF5 R7S72100_CLK_SCIF6 R7S72100_CLK_SCIF7
+			>;
+			clock-output-names = "scif0", "scif1", "scif2", "scif3", "scif4", "scif5", "scif6", "scif7";
+		};
+	};
+
 	cpus {
 		#address-cells = <1>;
 		#size-cells = <0>;
include/dt-bindings/clock/r7s72100-clock.h new file +28 -0
new file mode 100644
index 000000000000..c756f1cf0d52
@@ -0,0 +1,28 @@
+/*
+ * Copyright (C) 2014 Renesas Solutions Corp.
+ * Copyright (C) 2014 Wolfram Sang, Sang Engineering <[email protected]>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ */
+
+#ifndef __DT_BINDINGS_CLOCK_R7S72100_H__
+#define __DT_BINDINGS_CLOCK_R7S72100_H__
+
+#define R7S72100_CLK_PLL	0
+
+/* MSTP3 */
+#define R7S72100_CLK_MTU2	3
+
+/* MSTP4 */
+#define R7S72100_CLK_SCIF0	7
+#define R7S72100_CLK_SCIF1	6
+#define R7S72100_CLK_SCIF2	5
+#define R7S72100_CLK_SCIF3	4
+#define R7S72100_CLK_SCIF4	3
+#define R7S72100_CLK_SCIF5	2
+#define R7S72100_CLK_SCIF6	1
+#define R7S72100_CLK_SCIF7	0
+
+#endif /* __DT_BINDINGS_CLOCK_R7S72100_H__ */
Signature · 1 line
1.9.2
#13 lore raw

PATCH v5 3/11 ARM: shmobile: r7s72100: genmai: populate nodes for external clocks

In reply to Wolfram Sang

From: Wolfram Sang <[email protected]>

---
 arch/arm/boot/dts/r7s72100-genmai-reference.dts | 8 ++++++++
 1 file changed, 8 insertions(+)
arch/arm/boot/dts/r7s72100-genmai-reference.dts +8 -0
index e664611a47c8..941e72ce7c82 100644
@@ -30,6 +30,14 @@
 	};
 };
 
+&extal_clk {
+	clock-frequency = <13330000>;
+};
+
+&usb_x1_clk {
+	clock-frequency = <48000000>;
+};
+
 &i2c2 {
 	status = "okay";
 	clock-frequency = <400000>;
Signature · 1 line
1.9.2
#14 lore raw

PATCH v5 4/11 ARM: shmobile: r7s72100: add scif nodes to dtsi

In reply to Wolfram Sang

From: Wolfram Sang <[email protected]>

---
 arch/arm/boot/dts/r7s72100.dtsi | 96 +++++++++++++++++++++++++++++++++++++++++
 1 file changed, 96 insertions(+)
arch/arm/boot/dts/r7s72100.dtsi +96 -0
index 5a6e2481b567..a4a67380b0a2 100644
@@ -200,6 +200,102 @@
 		status = "disabled";
 	};
 
+	scif0: serial at e8007000 {
+		compatible = "renesas,scif-r7s72100", "renesas,scif";
+		reg = <0xe8007000 64>;
+		interrupts = <0 190 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 191 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 192 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 189 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp4_clks R7S72100_CLK_SCIF0>;
+		clock-names = "sci_ick";
+		status = "disabled";
+	};
+
+	scif1: serial at e8007800 {
+		compatible = "renesas,scif-r7s72100", "renesas,scif";
+		reg = <0xe8007800 64>;
+		interrupts = <0 194 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 195 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 196 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 193 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp4_clks R7S72100_CLK_SCIF1>;
+		clock-names = "sci_ick";
+		status = "disabled";
+	};
+
+	scif2: serial at e8008000 {
+		compatible = "renesas,scif-r7s72100", "renesas,scif";
+		reg = <0xe8008000 64>;
+		interrupts = <0 198 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 199 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 200 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 197 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp4_clks R7S72100_CLK_SCIF2>;
+		clock-names = "sci_ick";
+		status = "disabled";
+	};
+
+	scif3: serial at e8008800 {
+		compatible = "renesas,scif-r7s72100", "renesas,scif";
+		reg = <0xe8008800 64>;
+		interrupts = <0 202 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 203 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 204 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 201 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp4_clks R7S72100_CLK_SCIF3>;
+		clock-names = "sci_ick";
+		status = "disabled";
+	};
+
+	scif4: serial at e8009000 {
+		compatible = "renesas,scif-r7s72100", "renesas,scif";
+		reg = <0xe8009000 64>;
+		interrupts = <0 206 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 207 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 208 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 205 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp4_clks R7S72100_CLK_SCIF4>;
+		clock-names = "sci_ick";
+		status = "disabled";
+	};
+
+	scif5: serial at e8009800 {
+		compatible = "renesas,scif-r7s72100", "renesas,scif";
+		reg = <0xe8009800 64>;
+		interrupts = <0 210 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 211 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 212 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 209 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp4_clks R7S72100_CLK_SCIF5>;
+		clock-names = "sci_ick";
+		status = "disabled";
+	};
+
+	scif6: serial at e800a000 {
+		compatible = "renesas,scif-r7s72100", "renesas,scif";
+		reg = <0xe800a000 64>;
+		interrupts = <0 214 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 215 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 216 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 213 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp4_clks R7S72100_CLK_SCIF6>;
+		clock-names = "sci_ick";
+		status = "disabled";
+	};
+
+	scif7: serial at e800a800 {
+		compatible = "renesas,scif-r7s72100", "renesas,scif";
+		reg = <0xe800a800 64>;
+		interrupts = <0 218 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 219 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 220 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 217 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp4_clks R7S72100_CLK_SCIF7>;
+		clock-names = "sci_ick";
+		status = "disabled";
+	};
+
 	spi0: spi at e800c800 {
 		compatible = "renesas,rspi-r7s72100", "renesas,rspi-rz";
 		reg = <0xe800c800 0x24>;
Signature · 1 line
1.9.2
#15 lore raw

PATCH v5 4/11 ARM: shmobile: r7s72100: add scif nodes to dtsi

Hi Wolfram,

Thank you for the patches.

Quoted 14 lines · On Tuesday 29 April 2014 12:03:35 Wolfram Sang wrote:

From: Wolfram Sang <[email protected]>

---
 arch/arm/boot/dts/r7s72100.dtsi | 96 ++++++++++++++++++++++++++++++++++++++
 1 file changed, 96 insertions(+)
(quoted diff) +0 -0

b/arch/arm/boot/dts/r7s72100.dtsi index 5a6e2481b567..a4a67380b0a2 100644

arch/arm/boot/dts/r7s72100.dtsi +0 -0
@@ -200,6 +200,102 @@
 		status = "disabled";
 	};

arch/arm/boot/dts/r7s72100.dtsi line 211

Quoted 10 lines
arch/arm/boot/dts/r7s72100.dtsi +9 -0
 
+	scif0: serial at e8007000 {
+		compatible = "renesas,scif-r7s72100", "renesas,scif";
+		reg = <0xe8007000 64>;
+		interrupts = <0 190 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 191 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 192 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 189 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp4_clks R7S72100_CLK_SCIF0>;
+		clock-names = "sci_ick";

I've just sent a patch set that removes the interface clock from the SCI driver in favour of the functional clock. I can't test the patch set this week as I'm traveling and don't have access to the hardware. I've asked Simon to test it with his SCI DT enabling patches for r8a7779. If not problem is found, I'd like that series to go in first to avoid dependencies on sci_ick in the device tree. Could you then rebase this patch on top of that, and rename sci_ick to fck ?

Apart from that, for the whole series,

Quoted 90 lines
arch/arm/boot/dts/r7s72100.dtsi +87 -0
+		status = "disabled";
+	};
+
+	scif1: serial at e8007800 {
+		compatible = "renesas,scif-r7s72100", "renesas,scif";
+		reg = <0xe8007800 64>;
+		interrupts = <0 194 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 195 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 196 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 193 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp4_clks R7S72100_CLK_SCIF1>;
+		clock-names = "sci_ick";
+		status = "disabled";
+	};
+
+	scif2: serial at e8008000 {
+		compatible = "renesas,scif-r7s72100", "renesas,scif";
+		reg = <0xe8008000 64>;
+		interrupts = <0 198 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 199 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 200 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 197 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp4_clks R7S72100_CLK_SCIF2>;
+		clock-names = "sci_ick";
+		status = "disabled";
+	};
+
+	scif3: serial at e8008800 {
+		compatible = "renesas,scif-r7s72100", "renesas,scif";
+		reg = <0xe8008800 64>;
+		interrupts = <0 202 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 203 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 204 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 201 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp4_clks R7S72100_CLK_SCIF3>;
+		clock-names = "sci_ick";
+		status = "disabled";
+	};
+
+	scif4: serial at e8009000 {
+		compatible = "renesas,scif-r7s72100", "renesas,scif";
+		reg = <0xe8009000 64>;
+		interrupts = <0 206 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 207 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 208 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 205 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp4_clks R7S72100_CLK_SCIF4>;
+		clock-names = "sci_ick";
+		status = "disabled";
+	};
+
+	scif5: serial at e8009800 {
+		compatible = "renesas,scif-r7s72100", "renesas,scif";
+		reg = <0xe8009800 64>;
+		interrupts = <0 210 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 211 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 212 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 209 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp4_clks R7S72100_CLK_SCIF5>;
+		clock-names = "sci_ick";
+		status = "disabled";
+	};
+
+	scif6: serial at e800a000 {
+		compatible = "renesas,scif-r7s72100", "renesas,scif";
+		reg = <0xe800a000 64>;
+		interrupts = <0 214 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 215 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 216 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 213 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp4_clks R7S72100_CLK_SCIF6>;
+		clock-names = "sci_ick";
+		status = "disabled";
+	};
+
+	scif7: serial at e800a800 {
+		compatible = "renesas,scif-r7s72100", "renesas,scif";
+		reg = <0xe800a800 64>;
+		interrupts = <0 218 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 219 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 220 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 217 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp4_clks R7S72100_CLK_SCIF7>;
+		clock-names = "sci_ick";
+		status = "disabled";
+	};
+
 	spi0: spi at e800c800 {
 		compatible = "renesas,rspi-r7s72100", "renesas,rspi-rz";
 		reg = <0xe800c800 0x24>;
Signature · 3 lines
Regards,

Laurent Pinchart
#16 lore raw

PATCH v5 4/11 ARM: shmobile: r7s72100: add scif nodes to dtsi

Quoted 30 lines · Laurent Pinchart

Hi Wolfram,

Thank you for the patches.

Quoted 14 lines · On Tuesday 29 April 2014 12:03:35 Wolfram Sang wrote:

From: Wolfram Sang <[email protected]>

---
 arch/arm/boot/dts/r7s72100.dtsi | 96 ++++++++++++++++++++++++++++++++++++++
 1 file changed, 96 insertions(+)
(quoted diff) +0 -0

b/arch/arm/boot/dts/r7s72100.dtsi index 5a6e2481b567..a4a67380b0a2 100644

arch/arm/boot/dts/r7s72100.dtsi +0 -0
@@ -200,6 +200,102 @@
 		status = "disabled";
 	};

arch/arm/boot/dts/r7s72100.dtsi line 211

Quoted 10 lines
arch/arm/boot/dts/r7s72100.dtsi +9 -0
 
+	scif0: serial at e8007000 {
+		compatible = "renesas,scif-r7s72100", "renesas,scif";
+		reg = <0xe8007000 64>;
+		interrupts = <0 190 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 191 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 192 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 189 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp4_clks R7S72100_CLK_SCIF0>;
+		clock-names = "sci_ick";
Quoted 7 lines

I've just sent a patch set that removes the interface clock from the SCI driver in favour of the functional clock. I can't test the patch set this week as I'm traveling and don't have access to the hardware. I've asked Simon to test it with his SCI DT enabling patches for r8a7779. If not problem is found, I'd like that series to go in first to avoid dependencies on sci_ick in the device tree. Could you then rebase this patch on top of that, and rename sci_ick to fck ?

I think it would be better to merge things in parallel rather than needing to wait on Greg to pick up an SCI driver change and for it to filter into a tree where we can use it before enabling these devices.

Quoted 100 lines

Apart from that, for the whole series,

Quoted 90 lines
arch/arm/boot/dts/r7s72100.dtsi +87 -0
+		status = "disabled";
+	};
+
+	scif1: serial at e8007800 {
+		compatible = "renesas,scif-r7s72100", "renesas,scif";
+		reg = <0xe8007800 64>;
+		interrupts = <0 194 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 195 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 196 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 193 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp4_clks R7S72100_CLK_SCIF1>;
+		clock-names = "sci_ick";
+		status = "disabled";
+	};
+
+	scif2: serial at e8008000 {
+		compatible = "renesas,scif-r7s72100", "renesas,scif";
+		reg = <0xe8008000 64>;
+		interrupts = <0 198 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 199 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 200 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 197 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp4_clks R7S72100_CLK_SCIF2>;
+		clock-names = "sci_ick";
+		status = "disabled";
+	};
+
+	scif3: serial at e8008800 {
+		compatible = "renesas,scif-r7s72100", "renesas,scif";
+		reg = <0xe8008800 64>;
+		interrupts = <0 202 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 203 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 204 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 201 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp4_clks R7S72100_CLK_SCIF3>;
+		clock-names = "sci_ick";
+		status = "disabled";
+	};
+
+	scif4: serial at e8009000 {
+		compatible = "renesas,scif-r7s72100", "renesas,scif";
+		reg = <0xe8009000 64>;
+		interrupts = <0 206 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 207 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 208 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 205 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp4_clks R7S72100_CLK_SCIF4>;
+		clock-names = "sci_ick";
+		status = "disabled";
+	};
+
+	scif5: serial at e8009800 {
+		compatible = "renesas,scif-r7s72100", "renesas,scif";
+		reg = <0xe8009800 64>;
+		interrupts = <0 210 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 211 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 212 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 209 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp4_clks R7S72100_CLK_SCIF5>;
+		clock-names = "sci_ick";
+		status = "disabled";
+	};
+
+	scif6: serial at e800a000 {
+		compatible = "renesas,scif-r7s72100", "renesas,scif";
+		reg = <0xe800a000 64>;
+		interrupts = <0 214 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 215 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 216 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 213 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp4_clks R7S72100_CLK_SCIF6>;
+		clock-names = "sci_ick";
+		status = "disabled";
+	};
+
+	scif7: serial at e800a800 {
+		compatible = "renesas,scif-r7s72100", "renesas,scif";
+		reg = <0xe800a800 64>;
+		interrupts = <0 218 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 219 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 220 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 217 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp4_clks R7S72100_CLK_SCIF7>;
+		clock-names = "sci_ick";
+		status = "disabled";
+	};
+
 	spi0: spi at e800c800 {
 		compatible = "renesas,rspi-r7s72100", "renesas,rspi-rz";
 		reg = <0xe800c800 0x24>;
Signature · 3 lines
Regards,

Laurent Pinchart
#17 lore raw

PATCH v5 5/11 ARM: shmobile: r7s72100: genmai: add uart alias and activate scif2 as console

In reply to Wolfram Sang

From: Wolfram Sang <[email protected]>

We keep the UART naming backwards compatible with the legacy version.

---
 arch/arm/boot/dts/r7s72100-genmai-reference.dts | 11 ++++++++++-
 1 file changed, 10 insertions(+), 1 deletion(-)
arch/arm/boot/dts/r7s72100-genmai-reference.dts +10 -1
index 941e72ce7c82..ca88458e0706 100644
@@ -1,7 +1,8 @@
 /*
  * Device Tree Source for the Genmai board
  *
- * Copyright (C) 2013 Renesas Solutions Corp.
+ * Copyright (C) 2013-14 Renesas Solutions Corp.
+ * Copyright (C) 2014 Wolfram Sang, Sang Engineering <[email protected]>
  *
  * This file is licensed under the terms of the GNU General Public License
  * version 2.  This program is licensed "as is" without any warranty of any
@@ -15,6 +16,10 @@
 	model = "Genmai";
 	compatible = "renesas,genmai-reference", "renesas,r7s72100";
 
+	aliases {
+		serial2 = &scif2;
+	};
+
 	chosen {
 		bootargs = "console=ttySC2,115200 ignore_loglevel rw root=/dev/nfs ip=dhcp";
 	};
@@ -48,3 +53,7 @@
 		pagesize = <64>;
 	};
 };
+
+&scif2 {
+	status = "okay";
+};
Signature · 1 line
1.9.2
#18 lore raw

PATCH v5 6/11 ARM: shmobile: r7s72100: genmai: platform scif devices only for legacy support

In reply to Wolfram Sang

From: Wolfram Sang <[email protected]>

We have now DT support for SCIF, so use the platform_device initialization only for the legacy support.

---
 arch/arm/mach-shmobile/board-genmai.c   | 44 +++++++++++++++++++++++++++++++++
 arch/arm/mach-shmobile/setup-r7s72100.c | 43 --------------------------------
 2 files changed, 44 insertions(+), 43 deletions(-)
arch/arm/mach-shmobile/board-genmai.c +44 -0
index 6c328d63b819..c94201ee8596 100644
@@ -21,6 +21,7 @@
 
 #include <linux/kernel.h>
 #include <linux/platform_device.h>
+#include <linux/serial_sci.h>
 #include <linux/sh_eth.h>
 #include <linux/spi/rspi.h>
 #include <linux/spi/spi.h>
@@ -89,6 +90,40 @@ static const struct spi_board_info spi_info[] __initconst = {
 	},
 };
 
+/* SCIF */
+#define R7S72100_SCIF(index, baseaddr, irq)				\
+static const struct plat_sci_port scif##index##_platform_data = {	\
+	.type		= PORT_SCIF,					\
+	.regtype	= SCIx_SH2_SCIF_FIFODATA_REGTYPE,		\
+	.flags		= UPF_BOOT_AUTOCONF | UPF_IOREMAP,		\
+	.scscr		= SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |	\
+			  SCSCR_REIE,					\
+};									\
+									\
+static struct resource scif##index##_resources[] = {			\
+	DEFINE_RES_MEM(baseaddr, 0x100),				\
+	DEFINE_RES_IRQ(irq + 1),					\
+	DEFINE_RES_IRQ(irq + 2),					\
+	DEFINE_RES_IRQ(irq + 3),					\
+	DEFINE_RES_IRQ(irq),						\
+}									\
+
+R7S72100_SCIF(0, 0xe8007000, gic_iid(221));
+R7S72100_SCIF(1, 0xe8007800, gic_iid(225));
+R7S72100_SCIF(2, 0xe8008000, gic_iid(229));
+R7S72100_SCIF(3, 0xe8008800, gic_iid(233));
+R7S72100_SCIF(4, 0xe8009000, gic_iid(237));
+R7S72100_SCIF(5, 0xe8009800, gic_iid(241));
+R7S72100_SCIF(6, 0xe800a000, gic_iid(245));
+R7S72100_SCIF(7, 0xe800a800, gic_iid(249));
+
+#define r7s72100_register_scif(index)					       \
+	platform_device_register_resndata(&platform_bus, "sh-sci", index,      \
+					  scif##index##_resources,	       \
+					  ARRAY_SIZE(scif##index##_resources), \
+					  &scif##index##_platform_data,	       \
+					  sizeof(scif##index##_platform_data))
+
 static void __init genmai_add_standard_devices(void)
 {
 	r7s72100_clock_init();
@@ -102,6 +137,15 @@ static void __init genmai_add_standard_devices(void)
 	r7s72100_register_rspi(3);
 	r7s72100_register_rspi(4);
 	spi_register_board_info(spi_info, ARRAY_SIZE(spi_info));
+
+	r7s72100_register_scif(0);
+	r7s72100_register_scif(1);
+	r7s72100_register_scif(2);
+	r7s72100_register_scif(3);
+	r7s72100_register_scif(4);
+	r7s72100_register_scif(5);
+	r7s72100_register_scif(6);
+	r7s72100_register_scif(7);
 }
 
 static const char * const genmai_boards_compat_dt[] __initconst = {
arch/arm/mach-shmobile/setup-r7s72100.c +0 -43

61 lines not on this page · raw message

Signature · 1 line
1.9.2
#19 lore raw

PATCH v5 7/11 ARM: shmobile: r7s72100: add i2c clocks to dtsi

In reply to Wolfram Sang

From: Wolfram Sang <[email protected]>

---
 arch/arm/boot/dts/r7s72100.dtsi            | 15 +++++++++++++++
 include/dt-bindings/clock/r7s72100-clock.h |  6 ++++++
 2 files changed, 21 insertions(+)
arch/arm/boot/dts/r7s72100.dtsi +15 -0
index a4a67380b0a2..afce2e344c7a 100644
@@ -110,6 +110,17 @@
 			>;
 			clock-output-names = "scif0", "scif1", "scif2", "scif3", "scif4", "scif5", "scif6", "scif7";
 		};
+
+		mstp9_clks: mstp9_clks at fcfe0438 {
+			#clock-cells = <1>;
+			compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
+			reg = <0xfcfe0438 4>;
+			clocks = <&p0_clk>, <&p0_clk>, <&p0_clk>, <&p0_clk>;
+			clock-indices = <
+				R7S72100_CLK_I2C0 R7S72100_CLK_I2C1 R7S72100_CLK_I2C2 R7S72100_CLK_I2C3
+			>;
+			clock-output-names = "i2c0", "i2c1", "i2c2", "i2c3";
+		};
 	};
 
 	cpus {
@@ -145,6 +156,7 @@
 			     <0 162 IRQ_TYPE_LEVEL_HIGH>,
 			     <0 163 IRQ_TYPE_LEVEL_HIGH>,
 			     <0 164 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp9_clks R7S72100_CLK_I2C0>;
 		clock-frequency = <100000>;
 		status = "disabled";
 	};
@@ -162,6 +174,7 @@
 			     <0 170 IRQ_TYPE_LEVEL_HIGH>,
 			     <0 171 IRQ_TYPE_LEVEL_HIGH>,
 			     <0 172 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp9_clks R7S72100_CLK_I2C1>;
 		clock-frequency = <100000>;
 		status = "disabled";
 	};
@@ -179,6 +192,7 @@
 			     <0 178 IRQ_TYPE_LEVEL_HIGH>,
 			     <0 179 IRQ_TYPE_LEVEL_HIGH>,
 			     <0 180 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp9_clks R7S72100_CLK_I2C2>;
 		clock-frequency = <100000>;
 		status = "disabled";
 	};
@@ -196,6 +210,7 @@
 			     <0 186 IRQ_TYPE_LEVEL_HIGH>,
 			     <0 187 IRQ_TYPE_LEVEL_HIGH>,
 			     <0 188 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp9_clks R7S72100_CLK_I2C3>;
 		clock-frequency = <100000>;
 		status = "disabled";
 	};
include/dt-bindings/clock/r7s72100-clock.h +6 -0
index c756f1cf0d52..ff84e0bafd7b 100644
@@ -25,4 +25,10 @@
 #define R7S72100_CLK_SCIF6	1
 #define R7S72100_CLK_SCIF7	0
 
+/* MSTP9 */
+#define R7S72100_CLK_I2C0	7
+#define R7S72100_CLK_I2C1	6
+#define R7S72100_CLK_I2C2	5
+#define R7S72100_CLK_I2C3	4
+
 #endif /* __DT_BINDINGS_CLOCK_R7S72100_H__ */
Signature · 1 line
1.9.2
#20 lore raw

PATCH v5 8/11 ARM: shmobile: r7s72100: remove I2C DT clocks from legacy clock support

In reply to Wolfram Sang

From: Wolfram Sang <[email protected]>

Not used anymore since we switched to CCF.

---
 arch/arm/mach-shmobile/clock-r7s72100.c | 4 ----
 1 file changed, 4 deletions(-)
arch/arm/mach-shmobile/clock-r7s72100.c +0 -4
index bee0073c9b64..6974cadac51c 100644
@@ -199,10 +199,6 @@ static struct clk_lookup lookups[] = {
 	CLKDEV_DEV_ID("e800d800.spi", &mstp_clks[MSTP105]),
 	CLKDEV_DEV_ID("e800e000.spi", &mstp_clks[MSTP104]),
 	CLKDEV_DEV_ID("e800e800.spi", &mstp_clks[MSTP103]),
-	CLKDEV_DEV_ID("fcfee000.i2c", &mstp_clks[MSTP97]),
-	CLKDEV_DEV_ID("fcfee400.i2c", &mstp_clks[MSTP96]),
-	CLKDEV_DEV_ID("fcfee800.i2c", &mstp_clks[MSTP95]),
-	CLKDEV_DEV_ID("fcfeec00.i2c", &mstp_clks[MSTP94]),
 	CLKDEV_DEV_ID("r7s72100-ether", &mstp_clks[MSTP74]),
 	CLKDEV_CON_ID("mtu2_fck", &mstp_clks[MSTP33]),
 
Signature · 1 line
1.9.2
#21 lore raw

PATCH v5 9/11 ARM: shmobile: r7s72100: add spi clocks to dtsi

In reply to Wolfram Sang

From: Wolfram Sang <[email protected]>

---
 arch/arm/boot/dts/r7s72100.dtsi            | 18 ++++++++++++++++++
 include/dt-bindings/clock/r7s72100-clock.h |  7 +++++++
 2 files changed, 25 insertions(+)
arch/arm/boot/dts/r7s72100.dtsi +18 -0
index afce2e344c7a..f50fbc8f3bd9 100644
@@ -121,6 +121,19 @@
 			>;
 			clock-output-names = "i2c0", "i2c1", "i2c2", "i2c3";
 		};
+
+		mstp10_clks: mstp10_clks at fcfe043c {
+			#clock-cells = <1>;
+			compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
+			reg = <0xfcfe043c 4>;
+			clocks = <&p1_clk>, <&p1_clk>, <&p1_clk>, <&p1_clk>,
+				 <&p1_clk>;
+			clock-indices = <
+				R7S72100_CLK_SPI0 R7S72100_CLK_SPI1 R7S72100_CLK_SPI2 R7S72100_CLK_SPI3
+				R7S72100_CLK_SPI4
+			>;
+			clock-output-names = "spi0", "spi1", "spi2", "spi3", "spi4";
+		};
 	};
 
 	cpus {
@@ -318,6 +331,7 @@
 			     <0 239 IRQ_TYPE_LEVEL_HIGH>,
 			     <0 240 IRQ_TYPE_LEVEL_HIGH>;
 		interrupt-names = "error", "rx", "tx";
+		clocks = <&mstp10_clks R7S72100_CLK_SPI0>;
 		num-cs = <1>;
 		#address-cells = <1>;
 		#size-cells = <0>;
@@ -331,6 +345,7 @@
 			     <0 242 IRQ_TYPE_LEVEL_HIGH>,
 			     <0 243 IRQ_TYPE_LEVEL_HIGH>;
 		interrupt-names = "error", "rx", "tx";
+		clocks = <&mstp10_clks R7S72100_CLK_SPI1>;
 		num-cs = <1>;
 		#address-cells = <1>;
 		#size-cells = <0>;
@@ -344,6 +359,7 @@
 			     <0 245 IRQ_TYPE_LEVEL_HIGH>,
 			     <0 246 IRQ_TYPE_LEVEL_HIGH>;
 		interrupt-names = "error", "rx", "tx";
+		clocks = <&mstp10_clks R7S72100_CLK_SPI2>;
 		num-cs = <1>;
 		#address-cells = <1>;
 		#size-cells = <0>;
@@ -357,6 +373,7 @@
 			     <0 248 IRQ_TYPE_LEVEL_HIGH>,
 			     <0 249 IRQ_TYPE_LEVEL_HIGH>;
 		interrupt-names = "error", "rx", "tx";
+		clocks = <&mstp10_clks R7S72100_CLK_SPI3>;
 		num-cs = <1>;
 		#address-cells = <1>;
 		#size-cells = <0>;
@@ -370,6 +387,7 @@
 			     <0 251 IRQ_TYPE_LEVEL_HIGH>,
 			     <0 252 IRQ_TYPE_LEVEL_HIGH>;
 		interrupt-names = "error", "rx", "tx";
+		clocks = <&mstp10_clks R7S72100_CLK_SPI4>;
 		num-cs = <1>;
 		#address-cells = <1>;
 		#size-cells = <0>;
include/dt-bindings/clock/r7s72100-clock.h +7 -0
index ff84e0bafd7b..5128f4d94f44 100644
@@ -31,4 +31,11 @@
 #define R7S72100_CLK_I2C2	5
 #define R7S72100_CLK_I2C3	4
 
+/* MSTP10 */
+#define R7S72100_CLK_SPI0	7
+#define R7S72100_CLK_SPI1	6
+#define R7S72100_CLK_SPI2	5
+#define R7S72100_CLK_SPI3	4
+#define R7S72100_CLK_SPI4	3
+
 #endif /* __DT_BINDINGS_CLOCK_R7S72100_H__ */
Signature · 1 line
1.9.2
#22 lore raw

PATCH v5 10/11 ARM: shmobile: r7s72100: remove SPI DT clocks from legacy clock support

In reply to Wolfram Sang

From: Wolfram Sang <[email protected]>

Not used anymore since we switched to CCF.

---
 arch/arm/mach-shmobile/clock-r7s72100.c | 5 -----
 1 file changed, 5 deletions(-)
arch/arm/mach-shmobile/clock-r7s72100.c +0 -5
index 6974cadac51c..7ea712a051f0 100644
@@ -194,11 +194,6 @@ static struct clk_lookup lookups[] = {
 	CLKDEV_DEV_ID("rspi-rz.2", &mstp_clks[MSTP105]),
 	CLKDEV_DEV_ID("rspi-rz.3", &mstp_clks[MSTP104]),
 	CLKDEV_DEV_ID("rspi-rz.4", &mstp_clks[MSTP103]),
-	CLKDEV_DEV_ID("e800c800.spi", &mstp_clks[MSTP107]),
-	CLKDEV_DEV_ID("e800d000.spi", &mstp_clks[MSTP106]),
-	CLKDEV_DEV_ID("e800d800.spi", &mstp_clks[MSTP105]),
-	CLKDEV_DEV_ID("e800e000.spi", &mstp_clks[MSTP104]),
-	CLKDEV_DEV_ID("e800e800.spi", &mstp_clks[MSTP103]),
 	CLKDEV_DEV_ID("r7s72100-ether", &mstp_clks[MSTP74]),
 	CLKDEV_CON_ID("mtu2_fck", &mstp_clks[MSTP33]),
 
Signature · 1 line
1.9.2
#23 lore raw

PATCH v5 10/11 ARM: shmobile: r7s72100: remove SPI DT clocks from legacy clock support

Quoted 3 lines · Wolfram Sang

Not used anymore since we switched to CCF.

Gr{oetje,eeting}s,

Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds

#24 lore raw

PATCH v5 11/11 ARM: shmobile: r7s72100: use workaround for non DT-clocks

In reply to Wolfram Sang

From: Wolfram Sang <[email protected]>

MTU2 is not yet prepared for DT usage, so use the common workaround via clkdev for now.

---
 arch/arm/mach-shmobile/board-genmai-reference.c | 14 ++++++++++++--
 1 file changed, 12 insertions(+), 2 deletions(-)
arch/arm/mach-shmobile/board-genmai-reference.c +12 -2
index 7630c1053e32..fde558b66d4e 100644
@@ -18,18 +18,28 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
  */
 
-#include <linux/clk-provider.h>
 #include <linux/kernel.h>
 #include <linux/of_platform.h>
+#include <mach/clock.h>
 #include <mach/common.h>
 #include <mach/r7s72100.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 
+#ifdef CONFIG_COMMON_CLK
+/*
+ * This is a really crude hack to provide clkdev support to platform
+ * devices until they get moved to DT.
+ */
+static const struct clk_name clk_names[] = {
+	{ "mtu2", NULL, "sh_mtu2.0" },
+};
+#endif
+
 static void __init genmai_add_standard_devices(void)
 {
 #ifdef CONFIG_COMMON_CLK
-	of_clk_init(NULL);
+	shmobile_clk_workaround(clk_names, ARRAY_SIZE(clk_names), true);
 #else
 	r7s72100_clock_init();
 #endif
Signature · 1 line
1.9.2
maintainer
#25 lore raw

v4 cover CCF support for Renesas r7s72100

In reply to Wolfram Sang

Hi Wolfram,

Quoted 9 lines · Wolfram Sang

This series moves the r7s72100 platfrom from the legacy clock implementation to the common clock framework.

This series has been tested with the renesas-devel-v3.15-rc2-20140428 tag. If you want to boot into a console, you have a runtime dependency [1].

Changes since V4:

* only use dt alias for scif2

Thanks for fixing up the dt alias bits and sending a V4. This series looks good to me.

Cheers,

/ magnus