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ARM: at91/dt: sam9x5: Add CAN device nodes

PATCH Superseded Alexander Stein 2 participants 4 messages Oct 2, 2014 – Oct 6, 2014

Subsystems (2)
Device tree bindings Arm/Microchip (AT91) SoC support

v1 of 4 Superseded Latest is v4 →

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Alexander Stein

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#0 lore raw

PATCH 1/1 ARM: at91/dt: sam9x5: Add CAN device nodes

Add the missing CAN devices node including their pin muxing and clocks.

Signed-off-by Alexander Stein <[email protected]>

---
I could actually only test CAN1 due to the hardware I had available. Also CAN0 conflicts with DBGU pins, which I had to use.

 arch/arm/boot/dts/at91sam9x5.dtsi | 48 +++++++++++++++++++++++++++++++++++++++
 1 file changed, 48 insertions(+)
arch/arm/boot/dts/at91sam9x5.dtsi +48 -0
index e1a5c70..0a2164e 100644
@@ -363,6 +363,16 @@
 						#clock-cells = <0>;
 						reg = <28>;
 					};
+
+					can0_clk: can0_clk {
+						#clock-cells = <0>;
+						reg = <29>;
+					};
+
+					can1_clk: can1_clk {
+						#clock-cells = <0>;
+						reg = <30>;
+					};
 				};
 			};
 

@@ -407,6 +417,28 @@
 				};
 			};
 
+			can0: can at f8000000 {
+				compatible = "atmel,at91sam9x5-can";
+				reg = <0xf8000000 0x300>;
+				interrupts = <29 IRQ_TYPE_LEVEL_HIGH 3>;
+				pinctrl-names = "default";
+				pinctrl-0 = <&pinctrl_can0_rx_tx>;
+				clocks = <&can0_clk>;
+				clock-names = "can_clk";
+				status = "disabled";
+			};
+
+			can1: can at f8004000 {
+				compatible = "atmel,at91sam9x5-can";
+				reg = <0xf8004000 0x300>;
+				interrupts = <30 IRQ_TYPE_LEVEL_HIGH 3>;
+				pinctrl-names = "default";
+				pinctrl-0 = <&pinctrl_can1_rx_tx>;
+				clocks = <&can1_clk>;
+				clock-names = "can_clk";
+				status = "disabled";
+			};
+
 			tcb0: timer at f8008000 {
 				compatible = "atmel,at91sam9x5-tcb";
 				reg = <0xf8008000 0x100>;

@@ -763,6 +795,22 @@
 					};
 				};
 
+				can0 {
+					pinctrl_can0_rx_tx: can0_rx_tx {
+						atmel,pins =
+							<AT91_PIOA 9 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PA9 periph B RX */
+							 AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PA10 periph B TX */
+					};
+				};
+
+				can1 {
+					pinctrl_can1_rx_tx: can1_rx_tx {
+						atmel,pins =
+							<AT91_PIOA 6 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PA6 periph B RX */
+							 AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PA5 periph B TX */
+					};
+				};
+
 				pioA: gpio at fffff400 {
 					compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
 					reg = <0xfffff400 0x200>;
Signature · 1 line
2.0.4
#1 lore raw

PATCH 1/1 ARM: at91/dt: sam9x5: Add CAN device nodes

Hi,

Quoted 15 lines · Alexander Stein

Add the missing CAN devices node including their pin muxing and clocks.

Signed-off-by Alexander Stein <[email protected]>

---
I could actually only test CAN1 due to the hardware I had available. Also CAN0 conflicts with DBGU pins, which I had to use.

 arch/arm/boot/dts/at91sam9x5.dtsi | 48 +++++++++++++++++++++++++++++++++++++++
 1 file changed, 48 insertions(+)
arch/arm/boot/dts/at91sam9x5.dtsi +0 -0
index e1a5c70..0a2164e 100644

arch/arm/boot/dts/at91sam9x5.dtsi line 802

Quoted 8 lines
arch/arm/boot/dts/at91sam9x5.dtsi +5 -0
@@ -763,6 +795,22 @@
 					};
 				};
 
+				can0 {
+					pinctrl_can0_rx_tx: can0_rx_tx {
+						atmel,pins =
+							<AT91_PIOA 9 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PA9 periph B RX */
+							 AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PA10 periph B TX */

I would stop adding that comment as this is pretty clear that your are setting PA9 and P10 to periph B. A more useful kind of comment is what pin it conflicts with. Maybe something like:

							<AT91_PIOA 9 AT91_PERIPH_B AT91_PINCTRL_NONE	/* CANRX0, conflicts with DRXD */

arch/arm/boot/dts/at91sam9x5.dtsi line 810

Quoted 8 lines
arch/arm/boot/dts/at91sam9x5.dtsi +8 -0
+					};
+				};
+
+				can1 {
+					pinctrl_can1_rx_tx: can1_rx_tx {
+						atmel,pins =
+							<AT91_PIOA 6 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PA6 periph B RX */
+							 AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PA5 periph B TX */

ditto

Quoted 14 lines
arch/arm/boot/dts/at91sam9x5.dtsi +3 -0
+					};
+				};
+
 				pioA: gpio at fffff400 {
 					compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
 					reg = <0xfffff400 0x200>;
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_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel at lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
Signature · 3 lines
Alexandre Belloni, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
author
#2 lore raw

PATCH v2 1/1 ARM: at91/dt: sam9x5: Add CAN device nodes

Add the missing CAN devices node including their pin muxing and clocks.

Signed-off-by Alexander Stein <[email protected]>

---
Changes in v2:
* Adjusted pinmux comment

 arch/arm/boot/dts/at91sam9x5.dtsi | 48 +++++++++++++++++++++++++++++++++++++++
 1 file changed, 48 insertions(+)
arch/arm/boot/dts/at91sam9x5.dtsi +48 -0
index e1a5c70..e3f11f2 100644
@@ -363,6 +363,16 @@
 						#clock-cells = <0>;
 						reg = <28>;
 					};
+
+					can0_clk: can0_clk {
+						#clock-cells = <0>;
+						reg = <29>;
+					};
+
+					can1_clk: can1_clk {
+						#clock-cells = <0>;
+						reg = <30>;
+					};
 				};
 			};
 

@@ -407,6 +417,28 @@
 				};
 			};
 
+			can0: can at f8000000 {
+				compatible = "atmel,at91sam9x5-can";
+				reg = <0xf8000000 0x300>;
+				interrupts = <29 IRQ_TYPE_LEVEL_HIGH 3>;
+				pinctrl-names = "default";
+				pinctrl-0 = <&pinctrl_can0_rx_tx>;
+				clocks = <&can0_clk>;
+				clock-names = "can_clk";
+				status = "disabled";
+			};
+
+			can1: can at f8004000 {
+				compatible = "atmel,at91sam9x5-can";
+				reg = <0xf8004000 0x300>;
+				interrupts = <30 IRQ_TYPE_LEVEL_HIGH 3>;
+				pinctrl-names = "default";
+				pinctrl-0 = <&pinctrl_can1_rx_tx>;
+				clocks = <&can1_clk>;
+				clock-names = "can_clk";
+				status = "disabled";
+			};
+
 			tcb0: timer at f8008000 {
 				compatible = "atmel,at91sam9x5-tcb";
 				reg = <0xf8008000 0x100>;

@@ -763,6 +795,22 @@
 					};
 				};
 
+				can0 {
+					pinctrl_can0_rx_tx: can0_rx_tx {
+						atmel,pins =
+							<AT91_PIOA 9 AT91_PERIPH_B AT91_PINCTRL_NONE	/* CANRX, conflicts with DRXD */
+							 AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* CANTX, conflicts with DTXD */
+					};
+				};
+
+				can1 {
+					pinctrl_can1_rx_tx: can1_rx_tx {
+						atmel,pins =
+							<AT91_PIOA 6 AT91_PERIPH_B AT91_PINCTRL_NONE	/* CANRX, conflicts with RXD1 */
+							 AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* CANTX, conflicts with TXD1 */
+					};
+				};
+
 				pioA: gpio at fffff400 {
 					compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
 					reg = <0xfffff400 0x200>;
Signature · 1 line
2.0.4
#3 lore raw

PATCH v2 1/1 ARM: at91/dt: sam9x5: Add CAN device nodes

Hi,

Quoted 15 lines · Alexander Stein

Add the missing CAN devices node including their pin muxing and clocks.

Signed-off-by Alexander Stein <[email protected]>

---
Changes in v2:
* Adjusted pinmux comment

 arch/arm/boot/dts/at91sam9x5.dtsi | 48 +++++++++++++++++++++++++++++++++++++++
 1 file changed, 48 insertions(+)
arch/arm/boot/dts/at91sam9x5.dtsi +0 -0
index e1a5c70..e3f11f2 100644

arch/arm/boot/dts/at91sam9x5.dtsi line 802

Quoted 8 lines
arch/arm/boot/dts/at91sam9x5.dtsi +5 -0
@@ -763,6 +795,22 @@
 					};
 				};
 
+				can0 {
+					pinctrl_can0_rx_tx: can0_rx_tx {
+						atmel,pins =
+							<AT91_PIOA 9 AT91_PERIPH_B AT91_PINCTRL_NONE	/* CANRX, conflicts with DRXD */
+							 AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* CANTX, conflicts with DTXD */

Last nitpick, could you make that be CANRX0 and CANTX0 ?

arch/arm/boot/dts/at91sam9x5.dtsi line 810

Quoted 8 lines
arch/arm/boot/dts/at91sam9x5.dtsi +8 -0
+					};
+				};
+
+				can1 {
+					pinctrl_can1_rx_tx: can1_rx_tx {
+						atmel,pins =
+							<AT91_PIOA 6 AT91_PERIPH_B AT91_PINCTRL_NONE	/* CANRX, conflicts with RXD1 */
+							 AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* CANTX, conflicts with TXD1 */

And CANRX1, CANTX1 here so that it is the same as the datasheet.

Then you can add my acked-by.

Thanks !

Quoted 14 lines
arch/arm/boot/dts/at91sam9x5.dtsi +3 -0
+					};
+				};
+
 				pioA: gpio at fffff400 {
 					compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
 					reg = <0xfffff400 0x200>;
Signature · 7 lines
2.0.4


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel at lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
Signature · 3 lines
Alexandre Belloni, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com