Add SNVS clock gating and SNVS node for DT
Subsystems (6)
cover Add SNVS clock gating and SNVS node for DT
The following patch set adds support for clock gating of the SNVS peripheral required on the Vybrid platform. Also adds a device tree node for this peripheral.
This patchset was send before along with the patch which had clock changes to the rtc-snvs driver. Since these could not be merged then, till the changes for rtc-snvs landed in the mainline, I am sending them anew as the changes are now in the for-next branch
https://git.kernel.org/cgit/linux/kernel/git/shawnguo/linux.git/log/?h=for-next
The initial discussion can be found at the below links for the earlier set of patches:
[RESEND] v2:
https://lkml.org/lkml/2014/12/3/23
v2:
https://lkml.org/lkml/2014/11/7/295
v1:
https://lkml.org/lkml/2014/9/26/492
Sanchayan Maity (2):
ARM: imx: clk-vf610: Add clock for SNVS
ARM: dts: vfxxx: Add SNVS node
arch/arm/boot/dts/vf500.dtsi | 4 ++++ arch/arm/boot/dts/vfxxx.dtsi | 14 ++++++++++++++ arch/arm/mach-imx/clk-vf610.c | 2 ++ include/dt-bindings/clock/vf610-clock.h | 3 ++- 4 files changed, 22 insertions(+), 1 deletion(-)
Signature · 1 line
1.7.9.5
PATCH 1/2 ARM: imx: clk-vf610: Add clock for SNVS
Add support for clock gating of the SNVS peripheral.
--- arch/arm/mach-imx/clk-vf610.c | 2 ++ include/dt-bindings/clock/vf610-clock.h | 3 ++- 2 files changed, 4 insertions(+), 1 deletion(-)
arch/arm/mach-imx/clk-vf610.c +2 -0
@@ -380,6 +380,8 @@ static void __init vf610_clocks_init(struct device_node *ccm_node) clk[VF610_CLK_DMAMUX2 ] =imx_clk_gate2 ("dmamux2" ,"platform_bus" ,CCM_CCGR6 ,CCM_CCGRx_CGn (1 )); clk[VF610_CLK_DMAMUX3 ] =imx_clk_gate2 ("dmamux3" ,"platform_bus" ,CCM_CCGR6 ,CCM_CCGRx_CGn (2 )); + clk[VF610_CLK_SNVS ] =imx_clk_gate2 ("snvs-rtc" ,"ipg_bus" ,CCM_CCGR6 ,CCM_CCGRx_CGn (7 )); +imx_check_clocks (clk,ARRAY_SIZE (clk));clk_set_parent (clk[VF610_CLK_QSPI0_SEL ], clk[VF610_CLK_PLL1_PFD4 ]);
include/dt-bindings/clock/vf610-clock.h +2 -1
@@ -192,6 +192,7 @@#define VF610_PLL5_BYPASS 179#define VF610_PLL6_BYPASS 180#define VF610_PLL7_BYPASS 181 -#define VF610_CLK_END 182 +#define VF610_CLK_SNVS 182 +#define VF610_CLK_END 183#endif /* __DT_BINDINGS_CLOCK_VF610_H */
Signature · 1 line
1.7.9.5
PATCH 2/2 ARM: dts: vfxxx: Add SNVS node
In reply to Sanchayan MaityAdd device tree node for the Secure Non-Volatile Storage (SNVS) on the VF610 platform. The SNVS block also has a Real Time Counter (RTC).
--- arch/arm/boot/dts/vf500.dtsi | 4 ++++ arch/arm/boot/dts/vfxxx.dtsi | 14 ++++++++++++++ 2 files changed, 18 insertions(+)
arch/arm/boot/dts/vf500.dtsi +4 -0
@@ -130,6 +130,10 @@ interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; }; +&snvsrtc { + interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>; +}; + &src { interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>; };
arch/arm/boot/dts/vfxxx.dtsi +14 -0
@@ -351,6 +351,20 @@ status = "disabled"; }; + snvs0: snvs at 400a7000 { + compatible = "fsl,sec-v4.0-mon", "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x400a7000 0x2000>; + + snvsrtc: snvs-rtc-lp at 34 { + compatible = "fsl,sec-v4.0-mon-rtc-lp"; + reg = <0x34 0x58>; + clocks = <&clks VF610_CLK_SNVS>; + clock-names = "snvs-rtc"; + }; + }; + uart4: serial at 400a9000 { compatible = "fsl,vf610-lpuart"; reg = <0x400a9000 0x1000>;
Signature · 1 line
1.7.9.5
Shawn Guo
AppliedQuoted 3 lines · Sanchayan Maity
Sanchayan Maity (2):
ARM: imx: clk-vf610: Add clock for SNVS
ARM: dts: vfxxx: Add SNVS node
Applied both, thanks.